Created
July 23, 2022 10:23
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Samsung Galaxy S6 "zerolte" downstream DTS
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| /dts-v1/; | |
| / { | |
| model_info-hw_rev_end = <0x0b>; | |
| model_info-hw_rev = <0x0a>; | |
| model_info-subtype = "samsung"; | |
| model_info-platform = "android"; | |
| model_info-chip = <0x1cfc>; | |
| model = "Samsung ZERO-F LTE EUR rev06 board based on Exynos7420(EVT1), mPOP"; | |
| #size-cells = <0x01>; | |
| #address-cells = <0x01>; | |
| interrupt-parent = <0x01>; | |
| compatible = "samsung,ZERO-F LTE EUR EVT1 mPOP,r06\0samsung,exynos7420"; | |
| model_info-system_rev = "011"; | |
| s6e3ha2_wqhd_panel { | |
| phandle = <0xac>; | |
| linux,phandle = <0xac>; | |
| type_of_ddi = <0x00>; | |
| mic_ver = <0x02>; | |
| mic = <0x01>; | |
| timing,dsi-escape-clk = <0x10>; | |
| timing,dsi-hs-clk = <0x402>; | |
| timing,v-porch = <0x0f 0x01 0x01>; | |
| timing,h-porch = <0x01 0x01 0x01>; | |
| timing,refresh = <0x3c>; | |
| size = <0x3f 0x70>; | |
| resolution = <0x5a0 0xa00>; | |
| mode = <0x02>; | |
| }; | |
| antenna_switch { | |
| antenna_switch,gpio_antenna_switch = <0x76 0x06 0x00>; | |
| pinctrl-0 = <0xfc>; | |
| pinctrl-names = "default"; | |
| compatible = "antenna_switch"; | |
| status = "okay"; | |
| }; | |
| audio_pdata { | |
| status = "okay"; | |
| seamless_voicewakeup; | |
| compatible = "samsung,audio-pdata"; | |
| }; | |
| gps { | |
| status = "okay"; | |
| gpios = <0x25 0x07 0x01 0x2f 0x02 0x0f>; | |
| pinctrl-0 = <0xfa 0xfb>; | |
| pinctrl-names = "default"; | |
| compatible = "samsung,exynos54xx-bcm4753"; | |
| }; | |
| sec-mst { | |
| pinctrl-0 = <0xf7 0xf8 0xf9>; | |
| pinctrl-names = "default"; | |
| sec-mst,mst-pd-gpio = <0xf6 0x02 0x00>; | |
| sec-mst,mst-md-gpio = <0x6c 0x02 0x00>; | |
| sec-mst,mst-pwr-gpio = <0x42 0x02 0x00>; | |
| compatible = "sec-mst"; | |
| }; | |
| mif_pdata { | |
| mif,gpio_cp_dump_int = <0x55 0x03 0x0f>; | |
| mif,gpio_ap_dump_int = <0x6d 0x01 0x01>; | |
| mif,gpio_ipc_int2cp = <0x55 0x01 0x01>; | |
| mif,gpio_cp_status = <0x55 0x00 0x0f>; | |
| mif,gpio_phone_active = <0x22 0x07 0x0f>; | |
| mif,gpio_pda_active = <0x42 0x03 0x01>; | |
| mif,gpio_cp_reset = <0x44 0x01 0x01>; | |
| mif,gpio_cp_on = <0x6d 0x00 0x01>; | |
| pinctrl-0 = <0xea 0xeb 0xec 0xed 0xee 0xef 0xf0 0xf1 0xf2 0xf3 0xf4>; | |
| pinctrl-names = "default"; | |
| status = "okay"; | |
| mif,num_iodevs = <0x12>; | |
| mif,link_attrs = <0x3c9>; | |
| mif,link_name = "lli"; | |
| mif,link_types = <0x408>; | |
| mif,ipc_version = <0x32>; | |
| mif,use_handover = <0x00>; | |
| mif,modem_type = <0x0f>; | |
| mif,modem_net = <0x00>; | |
| mif,name = "ss333"; | |
| compatible = "sec_modem,modem_pdata"; | |
| link_pm { | |
| gpio_ap2cp_status = <0xf5 0x04 0x01>; | |
| gpio_cp2ap_status = <0x55 0x00 0x0f>; | |
| gpio_ap2cp_wakeup = <0x25 0x02 0x01>; | |
| gpio_cp2ap_wakeup = <0x2f 0x01 0x0f>; | |
| }; | |
| iodevs { | |
| io_device_17 { | |
| iod,app = "CBD"; | |
| iod,attrs = <0x202>; | |
| iod,links = <0x400>; | |
| iod,io_type = <0x00>; | |
| iod,format = <0x05>; | |
| iod,id = <0xe1>; | |
| iod,name = "umts_ramdump0"; | |
| }; | |
| io_device_16 { | |
| iod,app = "CBD"; | |
| iod,attrs = <0x02>; | |
| iod,tx_link = <0x0a>; | |
| iod,links = <0x408>; | |
| iod,io_type = <0x00>; | |
| iod,format = <0x04>; | |
| iod,id = <0xd7>; | |
| iod,name = "umts_boot0"; | |
| }; | |
| io_device_15 { | |
| iod,app = "RIL"; | |
| iod,attrs = <0x02>; | |
| iod,links = <0x400>; | |
| iod,io_type = <0x02>; | |
| iod,format = <0x03>; | |
| iod,id = <0x00>; | |
| iod,name = "multipdp"; | |
| }; | |
| io_device_14 { | |
| iod,dl_buffer_size = <0x800>; | |
| iod,dl_num_buffers = <0x64>; | |
| iod,ul_buffer_size = <0x800>; | |
| iod,ul_num_buffers = <0x32>; | |
| iod,app = "NET"; | |
| iod,attrs = <0x180>; | |
| iod,links = <0x400>; | |
| iod,io_type = <0x01>; | |
| iod,format = <0x01>; | |
| iod,id = <0x11>; | |
| iod,name = "rmnet7"; | |
| }; | |
| io_device_13 { | |
| iod,dl_buffer_size = <0x800>; | |
| iod,dl_num_buffers = <0x64>; | |
| iod,ul_buffer_size = <0x800>; | |
| iod,ul_num_buffers = <0x32>; | |
| iod,app = "NET"; | |
| iod,attrs = <0x180>; | |
| iod,links = <0x400>; | |
| iod,io_type = <0x01>; | |
| iod,format = <0x01>; | |
| iod,id = <0x10>; | |
| iod,name = "rmnet6"; | |
| }; | |
| io_device_12 { | |
| iod,dl_buffer_size = <0x800>; | |
| iod,dl_num_buffers = <0x100>; | |
| iod,ul_buffer_size = <0x800>; | |
| iod,ul_num_buffers = <0x80>; | |
| iod,app = "NET"; | |
| iod,attrs = <0x180>; | |
| iod,links = <0x400>; | |
| iod,io_type = <0x01>; | |
| iod,format = <0x01>; | |
| iod,id = <0x0f>; | |
| iod,name = "rmnet5"; | |
| }; | |
| io_device_11 { | |
| iod,dl_buffer_size = <0x800>; | |
| iod,dl_num_buffers = <0x100>; | |
| iod,ul_buffer_size = <0x800>; | |
| iod,ul_num_buffers = <0x80>; | |
| iod,app = "NET"; | |
| iod,attrs = <0x180>; | |
| iod,links = <0x400>; | |
| iod,io_type = <0x01>; | |
| iod,format = <0x01>; | |
| iod,id = <0x0e>; | |
| iod,name = "rmnet4"; | |
| }; | |
| io_device_10 { | |
| iod,dl_buffer_size = <0x800>; | |
| iod,dl_num_buffers = <0x64>; | |
| iod,ul_buffer_size = <0x800>; | |
| iod,ul_num_buffers = <0x32>; | |
| iod,app = "NET"; | |
| iod,attrs = <0x180>; | |
| iod,links = <0x400>; | |
| iod,io_type = <0x01>; | |
| iod,format = <0x01>; | |
| iod,id = <0x0d>; | |
| iod,name = "rmnet3"; | |
| }; | |
| io_device_9 { | |
| iod,dl_buffer_size = <0x800>; | |
| iod,dl_num_buffers = <0x64>; | |
| iod,ul_buffer_size = <0x800>; | |
| iod,ul_num_buffers = <0x32>; | |
| iod,app = "NET"; | |
| iod,attrs = <0x180>; | |
| iod,links = <0x400>; | |
| iod,io_type = <0x01>; | |
| iod,format = <0x01>; | |
| iod,id = <0x0c>; | |
| iod,name = "rmnet2"; | |
| }; | |
| io_device_8 { | |
| iod,dl_buffer_size = <0x800>; | |
| iod,dl_num_buffers = <0x200>; | |
| iod,ul_buffer_size = <0x800>; | |
| iod,ul_num_buffers = <0x100>; | |
| iod,app = "NET"; | |
| iod,attrs = <0x180>; | |
| iod,links = <0x400>; | |
| iod,io_type = <0x01>; | |
| iod,format = <0x01>; | |
| iod,id = <0x0b>; | |
| iod,name = "rmnet1"; | |
| }; | |
| io_device_7 { | |
| iod,dl_buffer_size = <0x800>; | |
| iod,dl_num_buffers = <0x200>; | |
| iod,ul_buffer_size = <0x800>; | |
| iod,ul_num_buffers = <0x100>; | |
| iod,app = "NET"; | |
| iod,attrs = <0x180>; | |
| iod,links = <0x400>; | |
| iod,io_type = <0x01>; | |
| iod,format = <0x01>; | |
| iod,id = <0x0a>; | |
| iod,name = "rmnet0"; | |
| }; | |
| io_device_6 { | |
| iod,dl_buffer_size = <0x800>; | |
| iod,dl_num_buffers = <0x20>; | |
| iod,ul_buffer_size = <0x800>; | |
| iod,ul_num_buffers = <0x10>; | |
| iod,app = "CLD"; | |
| iod,attrs = <0x82>; | |
| iod,links = <0x400>; | |
| iod,io_type = <0x00>; | |
| iod,format = <0x00>; | |
| iod,id = <0xf4>; | |
| iod,name = "ipc_loopback0"; | |
| }; | |
| io_device_5 { | |
| iod,dl_buffer_size = <0x800>; | |
| iod,dl_num_buffers = <0x80>; | |
| iod,ul_buffer_size = <0x800>; | |
| iod,ul_num_buffers = <0x10>; | |
| iod,app = "DIAG"; | |
| iod,attrs = <0x82>; | |
| iod,links = <0x400>; | |
| iod,io_type = <0x00>; | |
| iod,format = <0x01>; | |
| iod,id = <0x1c>; | |
| iod,name = "umts_dm0"; | |
| }; | |
| io_device_4 { | |
| iod,dl_buffer_size = <0x800>; | |
| iod,dl_num_buffers = <0x10>; | |
| iod,ul_buffer_size = <0x800>; | |
| iod,ul_num_buffers = <0x10>; | |
| iod,app = "Data Router"; | |
| iod,attrs = <0x82>; | |
| iod,links = <0x400>; | |
| iod,io_type = <0x00>; | |
| iod,format = <0x01>; | |
| iod,id = <0x19>; | |
| iod,name = "umts_router"; | |
| }; | |
| io_device_3 { | |
| iod,dl_buffer_size = <0x800>; | |
| iod,dl_num_buffers = <0x40>; | |
| iod,ul_buffer_size = <0x800>; | |
| iod,ul_num_buffers = <0x20>; | |
| iod,app = "CSVT"; | |
| iod,attrs = <0x82>; | |
| iod,links = <0x400>; | |
| iod,io_type = <0x00>; | |
| iod,format = <0x01>; | |
| iod,id = <0x01>; | |
| iod,name = "umts_csd"; | |
| }; | |
| io_device_2 { | |
| iod,dl_buffer_size = <0x800>; | |
| iod,dl_num_buffers = <0x200>; | |
| iod,ul_buffer_size = <0x800>; | |
| iod,ul_num_buffers = <0x10>; | |
| iod,app = "RFS"; | |
| iod,attrs = <0x82>; | |
| iod,links = <0x400>; | |
| iod,io_type = <0x00>; | |
| iod,format = <0x01>; | |
| iod,id = <0xf5>; | |
| iod,name = "umts_rfs0"; | |
| }; | |
| io_device_1 { | |
| iod,dl_buffer_size = <0x1000>; | |
| iod,dl_num_buffers = <0x20>; | |
| iod,ul_buffer_size = <0x1000>; | |
| iod,ul_num_buffers = <0x10>; | |
| iod,app = "RIL"; | |
| iod,attrs = <0x82>; | |
| iod,links = <0x400>; | |
| iod,io_type = <0x00>; | |
| iod,format = <0x00>; | |
| iod,id = <0xec>; | |
| iod,name = "umts_ipc1"; | |
| }; | |
| io_device_0 { | |
| iod,dl_buffer_size = <0x1000>; | |
| iod,dl_num_buffers = <0x20>; | |
| iod,ul_buffer_size = <0x1000>; | |
| iod,ul_num_buffers = <0x10>; | |
| iod,app = "RIL"; | |
| iod,attrs = <0x82>; | |
| iod,links = <0x400>; | |
| iod,io_type = <0x00>; | |
| iod,format = <0x00>; | |
| iod,id = <0xeb>; | |
| iod,name = "umts_ipc0"; | |
| }; | |
| }; | |
| }; | |
| max77843-charger { | |
| battery,chg_float_voltage = <0x10fe>; | |
| battery,chg_polarity_status = <0x00>; | |
| battery,chg_gpio_status = <0x00>; | |
| battery,chg_polarity_en = <0x00>; | |
| battery,chg_gpio_en = <0x00>; | |
| status = "disable"; | |
| }; | |
| max77843-fuelgauge { | |
| fuelgauge,cv_data = <0xa05 0x2a8 0xa14 0x9b3 0x2b0 0x9f5 0x965 0x2b8 0x9d7 0x91d 0x2c0 0x9b9 0x8d7 0x2c7 0x99a 0x894 0x2ce 0x97c 0x859 0x2d5 0x95e 0x81d 0x2dc 0x93f 0x7e0 0x2e2 0x921 0x7ac 0x2e9 0x902 0x766 0x2ef 0x8e4 0x72b 0x2f5 0x8c6 0x6f7 0x2fb 0x8a7 0x6bf 0x301 0x889 0x68a 0x306 0x86b 0x655 0x30c 0x84c 0x623 0x311 0x82e 0x5f5 0x316 0x810 0x5c8 0x31b 0x7f1 0x59d 0x320 0x7d3 0x56f 0x324 0x7b5 0x549 0x329 0x796 0x51f 0x32e 0x778 0x4f8 0x332 0x75a 0x4d3 0x336 0x73b 0x4ae 0x33a 0x71d 0x489 0x33e 0x6ff 0x464 0x342 0x6e0 0x444 0x346 0x6c2 0x423 0x349 0x6a4 0x403 0x34d 0x685 0x3e4 0x350 0x667 0x3c9 0x354 0x648 0x3ac 0x357 0x62a 0x38d 0x35a 0x60c 0x375 0x35d 0x5ed 0x35f 0x360 0x5cf 0x348 0x363 0x5b1 0x331 0x366 0x592 0x31a 0x368 0x574 0x303 0x36b 0x556 0x2ed 0x36e 0x537 0x2d5 0x370 0x519 0x2c3 0x373 0x4fb 0x2b8 0x375 0x4dc 0x2a2 0x377 0x4be 0x292 0x37a 0x4a0 0x280 0x37c 0x481 0x26a 0x37e 0x463 0x260 0x380 0x445 0x25c 0x382 0x426 0x248 0x384 0x408 0x237 0x387 0x3ea 0x229 0x38d 0x3cb 0x21b 0x391 0x3ad 0x20c 0x396 0x38e 0x203 0x399 0x370 0x1fb 0x39c 0x352 0x1ee 0x3a1 0x334 0x1dc 0x3a6 0x315 0x1d5 0x3a9 0x2f7 0x1cb 0x3ab 0x2d9 0x1c1 0x3af 0x2ba 0x1b6 0x3b2 0x29c 0x1af 0x3b5 0x27e 0x1a3 0x3b8 0x25f 0x198 0x3bd 0x241 0x192 0x3be 0x222 0x185 0x3c2 0x204 0x181 0x3c4 0x1e6 0x179 0x3c6 0x1c7 0x173 0x3c8 0x1a9 0x167 0x3cc 0x18b 0x161 0x3cf 0x16c 0x15b 0x3d0 0x14e 0x151 0x3d3 0x130 0x14b 0x3d5 0x111 0x147 0x3d7 0xf3 0x143 0x3d9 0xd5 0x13f 0x3da 0xb6 0x132 0x3dd 0x98 0x12f 0x3e0 0x7a 0x12a 0x3e1 0x5b 0x125 0x3e4 0x3d 0x122 0x3e5 0x1f 0x00 0x3e8 0x00>; | |
| fuelgauge,low_battery_table = <0xffffec78 0x00 0x00 0xfffffb1e 0x00 0xcf8 0xfffffd12 0x61 0xd7b 0xffffff9c 0x60 0xd85 0x00 0x00 0xd80>; | |
| fuelgauge,low_battery_comp_voltage = <0xe10>; | |
| fuelgauge,capacity = <0x1438>; | |
| fuelgauge,type_str = "SDI"; | |
| fuelgauge,is_using_model_data; | |
| fuelgauge,rcomp_charging = <0x35>; | |
| fuelgauge,rcomp0 = <0x35>; | |
| fuelgauge,temp_cocold = <0x194d>; | |
| fuelgauge,temp_cohot = <0x1b45>; | |
| fuelgauge,low_temp_recovery = <0x78>; | |
| fuelgauge,low_temp_limit = <0x64>; | |
| fuelgauge,qrtable30 = <0x1005>; | |
| fuelgauge,qrtable20 = <0x1603>; | |
| fuelgauge,v_empty_origin = <0x7d54>; | |
| fuelgauge,v_empty = <0xa558>; | |
| fuelgauge,using_hw_vempty; | |
| fuelgauge,using_temp_compensation; | |
| fuelgauge,repeated_fuelalert; | |
| fuelgauge,capacity_calculation_type = <0x1c>; | |
| fuelgauge,capacity_min = <0x00>; | |
| fuelgauge,capacity_max_margin = <0x12c>; | |
| fuelgauge,capacity_max = <0x3e8>; | |
| fuelgauge,fuel_alert_soc = <0x01>; | |
| status = "disable"; | |
| }; | |
| max77833-charger { | |
| battery,chg_float_voltage = <0x1130>; | |
| battery,chg_polarity_status = <0x00>; | |
| battery,chg_gpio_status = <0x00>; | |
| battery,chg_polarity_en = <0x00>; | |
| battery,chg_gpio_en = <0x00>; | |
| status = "disable"; | |
| }; | |
| max77833-fuelgauge { | |
| fuelgauge,low_battery_table = <0xffffec78 0x00 0x00 0xfffffb1e 0x00 0xcf8 0xfffffd12 0x61 0xd7b 0xffffff9c 0x60 0xd85 0x00 0x00 0xd80>; | |
| fuelgauge,low_battery_comp_voltage = <0xe10>; | |
| fuelgauge,capacity = <0x19c8>; | |
| fuelgauge,type_str = "SDI"; | |
| fuelgauge,is_using_model_data; | |
| fuelgauge,temp_cocold = <0xffffef1b>; | |
| fuelgauge,temp_cohot = <0xfffffc18>; | |
| fuelgauge,rcomp_charging = <0x63>; | |
| fuelgauge,rcomp0 = <0x63>; | |
| fuelgauge,qrtable30 = <0x780>; | |
| fuelgauge,qrtable20 = <0x900>; | |
| fuelgauge,repeated_fuelalert; | |
| fuelgauge,capacity_calculation_type = <0x1c>; | |
| fuelgauge,capacity_min = <0x00>; | |
| fuelgauge,capacity_max_margin = <0x64>; | |
| fuelgauge,capacity_max = <0x3e8>; | |
| fuelgauge,fuel_alert_soc = <0x01>; | |
| status = "disable"; | |
| }; | |
| battery { | |
| battery,cisd_cap_limit = <0xaf5>; | |
| battery,cisd_cap_low_thr = <0xbea>; | |
| battery,cisd_cap_high_thr = <0xdde>; | |
| io-channel-ranges; | |
| #io-channel-cells = <0x05>; | |
| io-channel-names = "adc-temp\0chg-adc-temp\0in-bat-adc\0discharging-check-adc\0ntc-check-adc"; | |
| io-channels = <0xe6 0x01 0xe6 0x03 0xe6 0x06 0xe6 0x05 0xe6 0x07>; | |
| battery,age_data = <0x00 0x10fe 0x10cc 0x109a 0x5d 0xc8 0x10ea 0x10b8 0x1086 0x59 0xfa 0x10d6 0x10a4 0x1072 0x55 0x12c 0x10c2 0x1090 0x105e 0x50 0x3e8 0x1090 0x105e 0x102c 0x4b>; | |
| battery,swelling_wc_chg_current = <0x2ee>; | |
| battery,swelling_block_time = <0x258>; | |
| battery,swelling_low_rechg_voltage = <0xfa0>; | |
| battery,swelling_high_rechg_voltage = <0x1004>; | |
| battery,swelling_drop_float_voltage = <0x1036>; | |
| battery,swelling_chg_current = <0x44c>; | |
| battery,swelling_low_temp_recov = <0x96>; | |
| battery,swelling_low_temp_block = <0x64>; | |
| battery,swelling_high_temp_recov = <0x168>; | |
| battery,swelling_high_temp_block = <0x19a>; | |
| battery,discharging_ntc_limit = <0xabe>; | |
| battery,discharging_adc_min = <0x6a4>; | |
| battery,discharging_adc_max = <0xa28>; | |
| battery,self_discharging_voltage_limit = <0x109a>; | |
| battery,force_discharging_recov = <0x226>; | |
| battery,force_discharging_limit = <0x28a>; | |
| battery,self_discharging_en; | |
| battery,chg_float_voltage = <0x10fe>; | |
| battery,charging_reset_time = <0x00>; | |
| battery,recharging_total_time = <0x1518>; | |
| battery,usb_charging_total_time = <0x8ca0>; | |
| battery,normal_charging_total_time = <0x4650>; | |
| battery,hv_charging_total_time = <0x2a30>; | |
| battery,charging_total_time = <0x3840>; | |
| battery,recharge_condition_vcell = <0x10cc>; | |
| battery,recharge_condition_soc = <0x62>; | |
| battery,recharge_condition_type = <0x04>; | |
| battery,recharge_check_count = <0x02>; | |
| battery,full_condition_vcell = <0x109a>; | |
| battery,full_condition_soc = <0x5d>; | |
| battery,full_condition_type = <0x0d>; | |
| battery,mix_input_limit_current_hv = <0x64>; | |
| battery,mix_high_tbat_recov_hv = <0x172>; | |
| battery,mix_high_tchg_hv = <0x1f4>; | |
| battery,mix_high_tbat_hv = <0x190>; | |
| battery,mix_input_limit_current = <0x64>; | |
| battery,mix_high_tbat_recov = <0x14a>; | |
| battery,mix_high_tchg = <0x3de>; | |
| battery,mix_high_tbat = <0x3de>; | |
| battery,wpc_delayed_current_time = <0x1a4>; | |
| battery,wpc_delayed_current = <0x35c>; | |
| battery,wpc_delayed_current_en; | |
| battery,wpc_charging_limit_current = <0x1c2>; | |
| battery,wpc_high_temp_recovery = <0x172>; | |
| battery,wpc_high_temp = <0x17c>; | |
| battery,chg_skip_check_time = <0x258>; | |
| battery,chg_skip_check_capacity = <0x0a>; | |
| battery,chg_charging_limit_current_2nd = <0x514>; | |
| battery,chg_charging_limit_current = <0x514>; | |
| battery,chg_high_temp_recovery = <0x20d>; | |
| battery,chg_high_temp_2nd = <0x212>; | |
| battery,chg_high_temp_1st = <0x212>; | |
| battery,chg_polarity_full_check = <0x01>; | |
| battery,chg_gpio_full_check = <0x00>; | |
| battery,full_check_count = <0x01>; | |
| battery,full_check_type_2nd = <0x07>; | |
| battery,full_check_type = <0x07>; | |
| battery,wpc_low_recovery_normal = <0x32>; | |
| battery,wpc_low_threshold_normal = <0x00>; | |
| battery,wpc_high_recovery_normal = <0x190>; | |
| battery,wpc_high_threshold_normal = <0x1c2>; | |
| battery,temp_low_recovery_lpm = <0x32>; | |
| battery,temp_low_threshold_lpm = <0x00>; | |
| battery,temp_high_recovery_lpm = <0x1c2>; | |
| battery,temp_high_threshold_lpm = <0x1f4>; | |
| battery,temp_highlimit_recovery_lpm = <0x2ee>; | |
| battery,temp_highlimit_threshold_lpm = <0x320>; | |
| battery,temp_low_recovery_normal = <0x32>; | |
| battery,temp_low_threshold_normal = <0x00>; | |
| battery,temp_high_recovery_normal = <0x1c2>; | |
| battery,temp_high_threshold_normal = <0x1f4>; | |
| battery,temp_highlimit_recovery_normal = <0x2ee>; | |
| battery,temp_highlimit_threshold_normal = <0x320>; | |
| battery,temp_low_recovery_event = <0x32>; | |
| battery,temp_low_threshold_event = <0x00>; | |
| battery,temp_high_recovery_event = <0x1c2>; | |
| battery,temp_high_threshold_event = <0x1f4>; | |
| battery,temp_highlimit_recovery_event = <0x2ee>; | |
| battery,temp_highlimit_threshold_event = <0x320>; | |
| battery,temp_check_count = <0x01>; | |
| battery,temp_check_type = <0x02>; | |
| battery,thermal_source = <0x02>; | |
| battery,ovp_uvlo_check_type = <0x03>; | |
| battery,check_adc_min = <0x00>; | |
| battery,check_adc_max = <0x5a0>; | |
| battery,check_count = <0x00>; | |
| battery,battery_check_type = <0x00>; | |
| battery,monitor_initial_count = <0x00>; | |
| battery,polling_type = <0x01>; | |
| battery,event_waiting_time = <0x258>; | |
| battery,cable_source_type = <0x01>; | |
| battery,cable_check_type = <0x04>; | |
| battery,adc_check_count = <0x05>; | |
| battery,inbat_voltage_table_data = <0x1b6 0x1b3 0x1ae 0x1a9 0x1a4 0x19f 0x19a 0x195 0x190 0x18b 0x186 0x181 0x17c 0x177 0x172 0x16d 0x168 0x163 0x15e 0x159 0x154>; | |
| battery,inbat_voltage_table_adc = <0xb16 0xafb 0xaec 0xacb 0xab1 0xa94 0xa79 0xa4e 0xa25 0xa08 0x9f5 0x9dc 0x9ca 0x9b3 0x982 0x963 0x93d 0x921 0x90c 0x8ef 0x8df>; | |
| battery,inbat_voltage = <0x01>; | |
| battery,wireless_cc_cv = <0x56>; | |
| battery,full_check_current_2nd = <0x7d 0x00 0x00 0x7d 0x7d 0x7d 0x7d 0x7d 0x7d 0x00 0x7d 0x7d 0x7d 0x7d 0x7d 0x00 0x00 0x7d 0x7d 0x7d 0x7d 0x7d 0x7d 0x00 0x7d 0x7d 0x7d 0x00 0x7d 0x7d 0x7d 0x00 0x7d 0x7d>; | |
| battery,full_check_current_1st = <0x113 0x00 0x00 0x113 0x113 0x113 0x113 0x113 0x113 0x00 0x113 0x113 0x113 0x113 0x113 0x00 0x00 0x113 0x113 0x113 0x113 0x113 0x113 0x00 0x113 0x113 0x113 0x00 0x113 0x113 0x113 0x00 0x113 0x113>; | |
| battery,fast_charging_current = <0x7d0 0x00 0x00 0x7d0 0x1cc 0x4b0 0x3e8 0x1cc 0x4b0 0x00 0x47e 0x47e 0x47e 0x640 0x7d0 0x00 0x00 0x190 0x2bc 0x514 0x12c 0x3e8 0x5dc 0x00 0x7d0 0x3e8 0x7d0 0x50 0x708 0x3e8 0x578 0x00 0x3e8 0x7d0>; | |
| battery,input_current_limit = <0x708 0x00 0x00 0x708 0x1cc 0x384 0x3e8 0x1cc 0x3e8 0x00 0x334 0x334 0x334 0x76c 0x708 0x00 0x00 0x190 0x2bc 0x514 0x12c 0x3e8 0x5dc 0x00 0x683 0x3e8 0x683 0x50 0x708 0x683 0x578 0x3e8 0x3e8 0x708>; | |
| battery,chg_temp_table_data = <0x2bc 0x28a 0x276 0x258 0x244 0x226 0x1f4 0x1c2 0x1ae 0x190 0x15e 0x12c 0xfa 0xc8 0x96 0x64 0x32 0x00 0xffffffe2 0xffffffce 0xffffff9c 0xffffff6a 0xffffff38>; | |
| battery,chg_temp_table_adc = <0x21e 0x27e 0x299 0x2dd 0x30e 0x357 0x3e8 0x490 0x4d5 0x53d 0x5fa 0x6c8 0x79d 0x87a 0x94a 0xa17 0xaf1 0xb9f 0xc09 0xc4d 0xcd4 0xd55 0xdb0>; | |
| battery,temp_table_data = <0x384 0x352 0x320 0x2ee 0x2bc 0x28a 0x276 0x258 0x244 0x226 0x1f4 0x1c2 0x1ae 0x190 0x15e 0x12c 0xfa 0xc8 0x96 0x64 0x32 0x00 0xffffffe2 0xffffffce 0xffffff9c 0xffffff6a 0xffffff38>; | |
| battery,temp_table_adc = <0x105 0x133 0x16b 0x19d 0x233 0x28f 0x2ca 0x2f2 0x325 0x372 0x401 0x4a8 0x4f1 0x561 0x62a 0x706 0x7f0 0x8dc 0x9bd 0xaa0 0xb8f 0xc53 0xcc2 0xd0c 0xda7 0xe2b 0xe8f>; | |
| battery,polling_time = <0x0a 0x1e 0x1e 0x1e 0xe10>; | |
| battery,mix_temp_check = <0x01>; | |
| battery,wpc_temp_check = <0x01>; | |
| battery,chg_temp_check = <0x01>; | |
| battery,temp_adc_type = <0x01>; | |
| battery,chip_vendor = "LSI"; | |
| battery,technology = <0x02>; | |
| battery,wirelss_charger_name = "bq51221-charger"; | |
| battery,fuelgauge_name = "max77843-fuelgauge"; | |
| battery,charger_name = "max77843-charger"; | |
| battery,vendor = "SDI SDI"; | |
| compatible = "samsung,sec-battery"; | |
| battery,factory_discharging = <0x6d 0x02 0x00>; | |
| pinctrl-0 = <0xe8 0xe9>; | |
| pinctrl-names = "default"; | |
| status = "okay"; | |
| sdchg_cs { | |
| sdchg,voltage_start = <0x1086>; | |
| sdchg,soc_end = <0x5c>; | |
| sdchg,soc_start = <0x60>; | |
| sdchg,temperature_end = <0x226>; | |
| sdchg,temperature_start = <0x258>; | |
| compatible = "samsung,sdchg_cs"; | |
| }; | |
| sdchg_ap { | |
| sdchg,voltage_start = <0x1086>; | |
| sdchg,soc_end = <0x5c>; | |
| sdchg,soc_start = <0x60>; | |
| sdchg,temperature_end = <0x226>; | |
| sdchg,temperature_start = <0x258>; | |
| compatible = "samsung,sdchg_ap"; | |
| }; | |
| }; | |
| simslot_count { | |
| gpios = <0x76 0x03 0x00>; | |
| pinctrl-0 = <0xe7>; | |
| pinctrl-names = "default"; | |
| compatible = "simslot_count"; | |
| status = "okay"; | |
| }; | |
| input_booster { | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| compatible = "input_booster"; | |
| status = "okay"; | |
| booster_key@8 { | |
| input_booster,phase_times = <0x00 0x00>; | |
| input_booster,tail_times = <0x00 0x1f4>; | |
| input_booster,head_times = <0x82 0x00>; | |
| input_booster,int_freqs = <0x00 0x00>; | |
| input_booster,mif_freqs = <0x00 0x00>; | |
| input_booster,kfc_freqs = <0xc3500 0x13c680>; | |
| input_booster,hmp_boost = <0x01 0x00>; | |
| input_booster,cpu_freqs = <0x124f80 0x00>; | |
| input_booster,levels = <0x01 0x02>; | |
| input_booster,type = <0x07>; | |
| input_booster,label = "PEN HOVER"; | |
| }; | |
| booster_key@7 { | |
| input_booster,phase_times = <0x00 0x00>; | |
| input_booster,tail_times = <0x00 0x00>; | |
| input_booster,head_times = <0x82 0x00>; | |
| input_booster,int_freqs = <0x00 0x00>; | |
| input_booster,mif_freqs = <0x00 0x00>; | |
| input_booster,kfc_freqs = <0xc3500 0x00>; | |
| input_booster,hmp_boost = <0x01 0x00>; | |
| input_booster,cpu_freqs = <0x124f80 0x00>; | |
| input_booster,levels = <0x01 0x02>; | |
| input_booster,type = <0x06>; | |
| input_booster,label = "MOUSE WHEEL"; | |
| }; | |
| booster_key@6 { | |
| input_booster,phase_times = <0x00 0x00>; | |
| input_booster,tail_times = <0x00 0x1f4>; | |
| input_booster,head_times = <0x82 0x00>; | |
| input_booster,int_freqs = <0x00 0x00>; | |
| input_booster,mif_freqs = <0x00 0x00>; | |
| input_booster,kfc_freqs = <0xc3500 0x124f80>; | |
| input_booster,hmp_boost = <0x01 0x00>; | |
| input_booster,cpu_freqs = <0x124f80 0x00>; | |
| input_booster,levels = <0x01 0x02>; | |
| input_booster,type = <0x05>; | |
| input_booster,label = "MOUSE"; | |
| }; | |
| booster_key@5 { | |
| input_booster,phase_times = <0x00 0x00>; | |
| input_booster,tail_times = <0x00 0x00>; | |
| input_booster,head_times = <0x82 0x82>; | |
| input_booster,int_freqs = <0x00 0x00>; | |
| input_booster,mif_freqs = <0x00 0x00>; | |
| input_booster,kfc_freqs = "\0\f5\0\0\f5"; | |
| input_booster,hmp_boost = <0x01 0x01>; | |
| input_booster,cpu_freqs = <0x124f80 0x124f80>; | |
| input_booster,levels = <0x01 0x02>; | |
| input_booster,type = <0x04>; | |
| input_booster,label = "KEYBOARD"; | |
| }; | |
| booster_key@4 { | |
| input_booster,phase_times = <0x00 0x00>; | |
| input_booster,tail_times = <0x00 0x1f4>; | |
| input_booster,head_times = <0x3e8 0x00>; | |
| input_booster,int_freqs = <0x00 0x00>; | |
| input_booster,mif_freqs = <0x00 0x00>; | |
| input_booster,kfc_freqs = "\0\f5\0\0\f5"; | |
| input_booster,hmp_boost = <0x01 0x01>; | |
| input_booster,cpu_freqs = <0x124f80 0x00>; | |
| input_booster,levels = <0x01 0x02>; | |
| input_booster,type = <0x03>; | |
| input_booster,label = "MULTITOUCH"; | |
| }; | |
| booster_key@3 { | |
| input_booster,phase_times = <0x00 0x00 0x00>; | |
| input_booster,tail_times = <0x00 0x00 0x1f4>; | |
| input_booster,head_times = <0x82 0x82 0x00>; | |
| input_booster,int_freqs = <0x00 0x00 0x00>; | |
| input_booster,mif_freqs = <0x00 0x00 0x00>; | |
| input_booster,kfc_freqs = <0xc3500 0xc3500 0x13c680>; | |
| input_booster,hmp_boost = <0x01 0x01 0x00>; | |
| input_booster,cpu_freqs = <0x124f80 0x124f80 0x00>; | |
| input_booster,levels = <0x01 0x02 0x03>; | |
| input_booster,type = <0x02>; | |
| input_booster,label = "TOUCH"; | |
| }; | |
| booster_key@2 { | |
| input_booster,phase_times = <0x00>; | |
| input_booster,tail_times = <0xc8>; | |
| input_booster,head_times = <0x00>; | |
| input_booster,int_freqs = <0x00>; | |
| input_booster,mif_freqs = <0x00>; | |
| input_booster,kfc_freqs = <0x00>; | |
| input_booster,hmp_boost = <0x01>; | |
| input_booster,cpu_freqs = <0x124f80>; | |
| input_booster,levels = <0x01>; | |
| input_booster,type = <0x01>; | |
| input_booster,label = "TOUCHKEY"; | |
| }; | |
| booster_key@1 { | |
| input_booster,phase_times = <0x00>; | |
| input_booster,tail_times = <0x1f4>; | |
| input_booster,head_times = <0x1f4>; | |
| input_booster,int_freqs = <0x00>; | |
| input_booster,mif_freqs = <0x00>; | |
| input_booster,kfc_freqs = <0x00>; | |
| input_booster,hmp_boost = <0x01>; | |
| input_booster,cpu_freqs = <0x124f80>; | |
| input_booster,levels = <0x01>; | |
| input_booster,type = <0x00>; | |
| input_booster,label = "KEY"; | |
| }; | |
| }; | |
| argos { | |
| #address-cells = <0x01>; | |
| compatible = "samsung,argos"; | |
| boot_device@8 { | |
| net_boost,table = <0x64 0x1174c0 0x00 0x104410 0x00 0x00 0x00 0x00 0x00 0x00 0x96 0x163780 0x00 0x1506d0 0x00 0x00 0x00 0x00 0x00 0x00 0xc8 0x196400 0x00 0x183350 0x00 0xce4c8 0x61a80 0x01 0x01 0x01 0x12c 0x1cee40 0x00 0x183350 0x00 0xce4c8 0x61a80 0x01 0x01 0x01>; | |
| net_boost,table_size = <0x04>; | |
| net_boost,node = "wlan0"; | |
| net_boost,label = "WIFI RX"; | |
| }; | |
| boot_device@7 { | |
| net_boost,table = <0x14 0xf4240 0x00 0xc3500 0x00 0x00 0x30d40 0x00 0x00 0x00 0x3c 0x196400 0x00 0x124f80 0x00 0x00 0x30d40 0x00 0x00 0x00 0xb4 0x1cee40 0x00 0x183350 0x00 0xce4c8 0x61a80 0x01 0x01 0x01>; | |
| net_boost,table_size = <0x03>; | |
| net_boost,node = "wlan0"; | |
| net_boost,label = "WIFI TX"; | |
| }; | |
| boot_device@6 { | |
| net_boost,table = <0x32 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x12c 0x00 0x00 0x00 0x00 0x00 0x00 0x01 0x01 0x01>; | |
| net_boost,table_size = <0x02>; | |
| net_boost,node = "wlan0"; | |
| net_boost,label = "WIFI"; | |
| }; | |
| boot_device@5 { | |
| net_boost,table = <0x0a 0x00 0x00 0x10d880 0x00 0xc96a8 0x186a0 0x00 0x01 0x00 0x64 0x00 0x00 0x16e360 0x00 0xc96a8 0x186a0 0x00 0x01 0x00>; | |
| net_boost,table_size = <0x02>; | |
| net_boost,node = "rmnet_data0 rmnet_data1 rmnet_data2 rmnet_data3 rmnet_data4 rmnet_data5 rmnet_data6 rmnet_data7"; | |
| net_boost,label = "QIPC"; | |
| }; | |
| boot_device@4 { | |
| net_boost,table = <0x78 0x155cc0 0x00 0x00 0x00 0xc96a8 0x00 0x00 0x00 0x00 0x82 0x16e360 0x00 0x00 0x00 0xc96a8 0x00 0x00 0x00 0x00 0x96 0x186a00 0x00 0x00 0x00 0xc96a8 0x00 0x00 0x00 0x00>; | |
| net_boost,table_size = <0x03>; | |
| net_boost,node = "clat clat4 v4-rmnet0 v4-rmnet1 v4-rmnet2 v4-rmnet3 v4-rmnet4 v4-rmnet5 v4-rmnet6 v4-rmnet7"; | |
| net_boost,label = "CLAT"; | |
| }; | |
| boot_device@3 { | |
| net_boost,table = <0x1e 0x124f80 0x00 0x124f80 0x00 0x00 0x30d40 0x00 0x00 0x00 0x5a 0x19f0a0 0x00 0x124f80 0x00 0x84918 0x412f8 0x00 0x00 0x01>; | |
| net_boost,table_size = <0x02>; | |
| net_boost,node = "p2p-wlan0-0"; | |
| net_boost,label = "P2P"; | |
| }; | |
| boot_device@2 { | |
| net_boost,table = <0x40 0x00 0x00 0x13d620 0x00 0x134980 0x61a80 0x00 0x00 0x00>; | |
| net_boost,table_size = <0x01>; | |
| net_boost,sysnode = "/sys/class/scsi_host/host0/transferred_cnt"; | |
| net_boost,node = [00]; | |
| net_boost,label = "UFS"; | |
| }; | |
| boot_device@1 { | |
| net_boost,table = <0x64 0x00 0x00 0x104410 0x00 0xcc1a0 0x00 0x00 0x01 0x00 0xc8 0x00 0x00 0x13c680 0x00 0xfa7d0 0x00 0x00 0x01 0x00 0x12c 0x00 0x00 0x16e360 0x00 0x17ae80 0x00 0x00 0x01 0x00>; | |
| net_boost,table_size = <0x03>; | |
| net_boost,node = "rmnet0 rmnet1 rmnet2 rmnet3 rmnet4 rmnet5 rmnet6 rmnet7"; | |
| net_boost,label = "IPC"; | |
| }; | |
| }; | |
| sec_thermistor@2 { | |
| io-channel-ranges; | |
| io-channel-names = "adc-pa-temp"; | |
| io-channels = <0xe6 0x02>; | |
| temp_array = <0x384 0x37a 0x370 0x366 0x35c 0x352 0x348 0x33e 0x334 0x32a 0x320 0x316 0x30c 0x302 0x2f8 0x2ee 0x2e4 0x2da 0x2d0 0x2c6 0x2bc 0x2b2 0x2a8 0x29e 0x294 0x28a 0x280 0x276 0x26c 0x262 0x258 0x24e 0x244 0x23a 0x230 0x226 0x21c 0x212 0x208 0x1fe 0x1f4 0x1ea 0x1e0 0x1d6 0x1cc 0x1c2 0x1b8 0x1ae 0x1a4 0x19a 0x190 0x186 0x17c 0x172 0x168 0x15e 0x154 0x14a 0x140 0x136 0x12c 0x122 0x118 0x10e 0x104 0xfa 0xf0 0xe6 0xdc 0xd2 0xc8 0xbe 0xb4 0xaa 0xa0 0x96 0x8c 0x82 0x78 0x6e 0x64 0x5a 0x50 0x46 0x3c 0x32 0x28 0x1e 0x14 0x0a 0x00 0xfffffff6 0xffffffec 0xffffffe2 0xffffffd8 0xffffffce 0xffffffc4 0xffffffba 0xffffffb0 0xffffffa6 0xffffff9c 0xffffff92 0xffffff88 0xffffff7e 0xffffff74 0xffffff6a 0xffffff60 0xffffff56 0xffffff4c 0xffffff42 0xffffff38>; | |
| adc_array = <0xd7 0xe0 0xea 0xf3 0xfd 0x106 0x10f 0x119 0x122 0x12c 0x135 0x142 0x14f 0x15c 0x169 0x176 0x185 0x194 0x1a2 0x1b1 0x1c0 0x1d1 0x1e2 0x1f3 0x204 0x215 0x229 0x23d 0x252 0x266 0x27a 0x292 0x2aa 0x2c1 0x2d9 0x2f1 0x30c 0x327 0x341 0x35c 0x377 0x396 0x3b4 0x3d3 0x3f1 0x410 0x434 0x458 0x47b 0x49f 0x4c3 0x4e9 0x50f 0x534 0x55a 0x580 0x5a8 0x5d1 0x5f9 0x622 0x64a 0x675 0x6a0 0x6cb 0x6f6 0x721 0x74d 0x779 0x7a5 0x7d1 0x7fd 0x82a 0x856 0x883 0x8af 0x8dc 0x906 0x930 0x95b 0x985 0x9af 0x9d8 0xa01 0xa29 0xa52 0xa7b 0xaa0 0xac5 0xae9 0xb0e 0xb33 0xb57 0xb7b 0xb9f 0xbc3 0xbe7 0xc05 0xc22 0xc40 0xc5d 0xc7b 0xc95 0xcaf 0xcca 0xce4 0xcfe 0xd14 0xd2a 0xd40 0xd56 0xd6c>; | |
| status = "okay"; | |
| compatible = "samsung,sec-pa-thermistor"; | |
| }; | |
| sec_thermistor@0 { | |
| io-channel-ranges; | |
| io-channel-names = "adc-ap-temp"; | |
| io-channels = <0xe6 0x00>; | |
| temp_array = <0x384 0x37a 0x370 0x366 0x35c 0x352 0x348 0x33e 0x334 0x32a 0x320 0x316 0x30c 0x302 0x2f8 0x2ee 0x2e4 0x2da 0x2d0 0x2c6 0x2bc 0x2b2 0x2a8 0x29e 0x294 0x28a 0x280 0x276 0x26c 0x262 0x258 0x24e 0x244 0x23a 0x230 0x226 0x21c 0x212 0x208 0x1fe 0x1f4 0x1ea 0x1e0 0x1d6 0x1cc 0x1c2 0x1b8 0x1ae 0x1a4 0x19a 0x190 0x186 0x17c 0x172 0x168 0x15e 0x154 0x14a 0x140 0x136 0x12c 0x122 0x118 0x10e 0x104 0xfa 0xf0 0xe6 0xdc 0xd2 0xc8 0xbe 0xb4 0xaa 0xa0 0x96 0x8c 0x82 0x78 0x6e 0x64 0x5a 0x50 0x46 0x3c 0x32 0x28 0x1e 0x14 0x0a 0x00 0xfffffff6 0xffffffec 0xffffffe2 0xffffffd8 0xffffffce 0xffffffc4 0xffffffba 0xffffffb0 0xffffffa6 0xffffff9c 0xffffff92 0xffffff88 0xffffff7e 0xffffff74 0xffffff6a 0xffffff60 0xffffff56 0xffffff4c 0xffffff42 0xffffff38>; | |
| adc_array = <0x122 0x12a 0x132 0x13a 0x142 0x14a 0x153 0x15c 0x165 0x16e 0x177 0x182 0x18d 0x198 0x1a3 0x1ae 0x1bf 0x1d0 0x1e1 0x1f2 0x203 0x217 0x22a 0x23e 0x251 0x265 0x274 0x282 0x291 0x2a0 0x2ae 0x2c5 0x2dd 0x2f4 0x30c 0x323 0x340 0x35d 0x37b 0x398 0x3b5 0x3d5 0x3f5 0x415 0x435 0x455 0x478 0x49b 0x4bf 0x4e2 0x505 0x52b 0x551 0x576 0x59c 0x5c2 0x5ee 0x61a 0x647 0x673 0x69f 0x6cc 0x6fa 0x727 0x755 0x782 0x7b1 0x7e1 0x810 0x840 0x86f 0x89f 0x8cf 0x8fe 0x92e 0x95e 0x98a 0x9b6 0x9e2 0xa0e 0xa3a 0xa6b 0xa9c 0xacd 0xafe 0xb2f 0xb58 0xb81 0xbaa 0xbd3 0xbfc 0xc23 0xc4b 0xc72 0xc98 0xcbe 0xcdf 0xd00 0xd21 0xd42 0xd63 0xd81 0xd9f 0xdbc 0xdda 0xdf8 0xe10 0xe28 0xe40 0xe58 0xe70>; | |
| status = "okay"; | |
| compatible = "samsung,sec-ap-thermistor"; | |
| }; | |
| fixedregulator@2 { | |
| phandle = <0xd1>; | |
| linux,phandle = <0xd1>; | |
| regulator-boot-on; | |
| endup-delay-us = <0x7d0>; | |
| startup-delay-us = <0x7d0>; | |
| enable-active-high; | |
| gpio = <0x83 0x04 0x00>; | |
| regulator-name = "ufs-vccq2"; | |
| compatible = "regulator-fixed"; | |
| }; | |
| fixedregulator@1 { | |
| phandle = <0xd0>; | |
| linux,phandle = <0xd0>; | |
| regulator-boot-on; | |
| enable-active-high; | |
| gpio = <0x83 0x04 0x00>; | |
| regulator-name = "ufs-vccq"; | |
| compatible = "regulator-fixed"; | |
| }; | |
| fixedregulator@0 { | |
| phandle = <0xcf>; | |
| linux,phandle = <0xcf>; | |
| regulator-boot-on; | |
| enable-active-high; | |
| gpio = <0x83 0x04 0x00>; | |
| regulator-name = "ufs-vcc"; | |
| compatible = "regulator-fixed"; | |
| }; | |
| secgpio_dvs { | |
| status = "okay"; | |
| compatible = "samsung,exynos7420-secgpio-dvs"; | |
| }; | |
| wlan { | |
| status = "okay"; | |
| pinctrl-0 = <0xc9 0xca>; | |
| pinctrl-names = "default"; | |
| gpios = <0x25 0x06 0x01 0x22 0x03 0x01>; | |
| compatible = "samsung,brcm-wlan"; | |
| }; | |
| bluetooth { | |
| status = "okay"; | |
| pinctrl-0 = <0xe3 0xe4 0xe5>; | |
| pinctrl-names = "default"; | |
| gpios = <0x25 0x01 0x00 0x76 0x04 0x00 0x22 0x01 0x0f>; | |
| compatible = "broadcom,bcm4358"; | |
| }; | |
| fimc-is_sensor_4e6@6A { | |
| status = "okay"; | |
| gpio_standby = <0xe0 0x06 0x01>; | |
| gpio_reset = <0xe0 0x04 0x01>; | |
| gpio_mclk = <0xdf 0x02 0x01>; | |
| sensor_i2c_addr = <0x6a>; | |
| sensor_i2c_ch = <0x01>; | |
| mclk_ch = <0x02>; | |
| id = <0x01>; | |
| position = <0x01>; | |
| pinctrl-2 = <0xe2 0xe1>; | |
| pinctrl-1 = <0x93 0xe1>; | |
| pinctrl-0; | |
| pinctrl-names = "pin0\0pin1\0pin2"; | |
| compatible = "samsung,exynos5-fimc-is-sensor-4e6"; | |
| }; | |
| fimc-is_sensor_4e6_c2@6A { | |
| status = "okay"; | |
| gpio_comp_reset = <0xe0 0x07 0x01>; | |
| gpio_standby = <0xe0 0x06 0x01>; | |
| gpio_reset = <0xe0 0x04 0x01>; | |
| gpio_mclk = <0xdf 0x02 0x01>; | |
| sensor_i2c_addr = <0x6a>; | |
| sensor_i2c_ch = <0x01>; | |
| mclk_ch = <0x02>; | |
| id = <0x00>; | |
| position = <0x01>; | |
| pinctrl-2 = <0x90 0xde 0xe2 0xdb 0xe1>; | |
| pinctrl-1 = <0x90 0x92 0x93 0xdb 0xe1>; | |
| pinctrl-0; | |
| pinctrl-names = "pin0\0pin1\0pin2"; | |
| compatible = "samsung,exynos5-fimc-is-sensor-4e6-c2"; | |
| companion { | |
| i2c_ch = <0x00>; | |
| i2c_addr = <0x7a>; | |
| spi_channel = <0x01>; | |
| product_name = <0x02>; | |
| }; | |
| }; | |
| fimc-is_sensor_2p2@5A { | |
| status = "okay"; | |
| gpio_comp_reset = <0xe0 0x07 0x01>; | |
| gpio_reset = <0xe0 0x05 0x01>; | |
| gpio_mclk = <0xdf 0x00 0x01>; | |
| sensor_i2c_addr = <0x5a>; | |
| sensor_i2c_ch = <0x00>; | |
| mclk_ch = <0x00>; | |
| id = <0x00>; | |
| position = <0x00>; | |
| pinctrl-2 = <0x90 0xdd 0xde 0xdb 0xdc>; | |
| pinctrl-1 = <0x90 0x91 0x92 0xdb 0xdc>; | |
| pinctrl-0; | |
| pinctrl-names = "pin0\0pin1\0pin2"; | |
| compatible = "samsung,exynos5-fimc-is-sensor-2p2"; | |
| ois { | |
| i2c_ch = <0x02>; | |
| i2c_addr = <0x48>; | |
| product_name = <0x01>; | |
| }; | |
| companion { | |
| i2c_ch = <0x00>; | |
| i2c_addr = <0x7a>; | |
| spi_channel = <0x01>; | |
| product_name = <0x02>; | |
| }; | |
| flash { | |
| flash_second_gpio = <0x03>; | |
| flash_first_gpio = <0x02>; | |
| product_name = <0x03>; | |
| }; | |
| af { | |
| i2c_ch = <0x02>; | |
| i2c_addr = <0x18>; | |
| product_name = <0x07>; | |
| }; | |
| }; | |
| fimc-is_sensor_imx240@34 { | |
| status = "okay"; | |
| gpio_comp_reset = <0xe0 0x07 0x01>; | |
| gpio_reset = <0xe0 0x05 0x01>; | |
| gpio_mclk = <0xdf 0x00 0x01>; | |
| sensor_i2c_addr = <0x34>; | |
| sensor_i2c_ch = <0x00>; | |
| mclk_ch = <0x00>; | |
| id = <0x00>; | |
| position = <0x00>; | |
| pinctrl-2 = <0x90 0xdd 0xde 0xdb 0xdc>; | |
| pinctrl-1 = <0x90 0x91 0x92 0xdb 0xdc>; | |
| pinctrl-0; | |
| pinctrl-names = "pin0\0pin1\0pin2"; | |
| compatible = "samsung,exynos5-fimc-is-sensor-imx240"; | |
| ois { | |
| i2c_ch = <0x02>; | |
| i2c_addr = <0x48>; | |
| product_name = <0x01>; | |
| }; | |
| companion { | |
| i2c_ch = <0x00>; | |
| i2c_addr = <0x7a>; | |
| spi_channel = <0x01>; | |
| product_name = <0x02>; | |
| }; | |
| flash { | |
| flash_second_gpio = <0x03>; | |
| flash_first_gpio = <0x02>; | |
| product_name = <0x03>; | |
| }; | |
| af { | |
| i2c_ch = <0x02>; | |
| i2c_addr = <0x18>; | |
| product_name = <0x07>; | |
| }; | |
| }; | |
| fimc_is_companion@14020000 { | |
| status = "okay"; | |
| comp_int_pinctrl = "13470000.pinctrl"; | |
| comp_int_pin = "gpc0-0"; | |
| mclk_ch = <0x01>; | |
| id = <0x00>; | |
| scenario = <0x00>; | |
| clocks = <0x14 0x11 0x14 0x15 0x14 0x18 0x14 0xa41 0x14 0xa42 0x14 0x7ee 0x14 0x7ef 0x14 0xce0 0x14 0xce1 0x14 0xcf5 0x14 0xcf6 0x14 0xcdc 0x14 0xcdd 0x14 0xfcf 0x14 0x156 0x14 0xc99>; | |
| clock-names = "sclk_isp_sensor1\0dout_sclk_isp_sensor1\0mout_sclk_isp_sensor1\0gate_isp_spi1\0gate_isp_spi0\0dout_sclk_isp_spi0\0dout_sclk_isp_spi1\0mout_user_mux_sclk_isp_spi0\0mout_user_mux_sclk_isp_spi1\0dout_clkdiv_pclk_cam1_busperi_167\0dout_clkdiv_pclk_cam1_busperi_84\0mout_user_mux_aclk_cam1_busperi_334\0mout_user_mux_aclk_cam1_bnscsis_133\0dout_aclk_cam1_333\0aclk_cam1_333\0mout_aclk_cam1_333_user"; | |
| samsung,power-domain = <0x49>; | |
| compatible = "samsung,exynos5-fimc-is-companion"; | |
| }; | |
| i2c@3d { | |
| status = "okay"; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| i2c-gpio,delay-us = <0x02>; | |
| gpios = <0xda 0x00 0x00 0xda 0x01 0x00>; | |
| compatible = "i2c-gpio"; | |
| fimc-is-vision@3d { | |
| reg = <0x3d>; | |
| compatible = "samsung,fimc_is_i2c0"; | |
| }; | |
| }; | |
| i2c@1c { | |
| status = "disabled"; | |
| pinctrl-0 = <0xd9>; | |
| pinctrl-names = "default"; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| i2c-gpio,delay-us = <0x02>; | |
| gpios = <0x6d 0x03 0x00 0x6d 0x02 0x00>; | |
| compatible = "i2c-gpio"; | |
| fimc-is-vision@20 { | |
| reg = <0x35>; | |
| compatible = "samsung,exynos5-fimc-is-sensor-6d1"; | |
| }; | |
| }; | |
| sound { | |
| status = "okay"; | |
| clock-names = "mclk"; | |
| clocks = <0x14 0x2d>; | |
| samsung,audio-codec = <0xd7 0xd7 0xd7 0xd7 0xd8 0xd8 0xd7 0xd7 0xd7 0xd7>; | |
| samsung,audio-cpu = <0xd4 0xd5 0xd5 0xd4 0xd5 0xd5 0xd6 0xd6 0xd6 0xd6>; | |
| compatible = "samsung,pacific-arizona"; | |
| }; | |
| dummy-i2s { | |
| phandle = <0xd5>; | |
| linux,phandle = <0xd5>; | |
| status = "okay"; | |
| compatible = "samsung,dummy-i2s"; | |
| }; | |
| dummy-codec { | |
| phandle = <0xd8>; | |
| linux,phandle = <0xd8>; | |
| status = "okay"; | |
| compatible = "samsung,dummy-codec"; | |
| }; | |
| ipa_pdata { | |
| ctlr.integral_reset_threshold = <0x05>; | |
| ctlr.integral_cutoff = <0x00>; | |
| ctlr.integral_reset_value = <0x00>; | |
| ctlr.feed_forward = <0x01>; | |
| ctlr.k_d = <0x00>; | |
| ctlr.k_i = <0x01>; | |
| ctlr.mult = <0x02>; | |
| enable_ctlr = <0x01>; | |
| hotplug_in_threshold = <0x00>; | |
| hotplug_out_threshold = <0x0a>; | |
| gpu_max_power = <0xc26>; | |
| big_max_power = <0x1998>; | |
| little_max_power = <0x3e8>; | |
| gpu_weight = <0x100>; | |
| big_weight = <0x100>; | |
| little_weight = <0x400>; | |
| ros_power = <0x1f4>; | |
| boost = <0x01>; | |
| tdp = <0xdac>; | |
| enabled = <0x01>; | |
| temp_threshold = <0x0a>; | |
| control_temp = <0x2d>; | |
| compatible = "samsung,exynos-ipa"; | |
| }; | |
| gpio_keys { | |
| pinctrl-names = "default"; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| compatible = "gpio-keys"; | |
| button@4 { | |
| gpio-key,wakeup = <0x01>; | |
| gpios = <0x43 0x05 0x0f>; | |
| linux,code = <0xac>; | |
| interrupt-parent = <0x43>; | |
| interrupts = <0x05 0x00 0x00>; | |
| label = "gpio-keys: KEY_HOMEPAGE"; | |
| }; | |
| button@3 { | |
| gpios = <0x43 0x02 0x0f>; | |
| linux,code = <0x73>; | |
| interrupt-parent = <0x43>; | |
| interrupts = <0x02 0x00 0x00>; | |
| label = "gpio-keys: KEY_VOLUMEUP"; | |
| }; | |
| button@2 { | |
| gpios = <0x43 0x03 0x0f>; | |
| linux,code = <0x72>; | |
| interrupt-parent = <0x43>; | |
| interrupts = <0x03 0x00 0x00>; | |
| label = "gpio-keys: KEY_VOLUMEDOWN"; | |
| }; | |
| button@1 { | |
| gpio-key,wakeup = <0x01>; | |
| gpios = <0x22 0x02 0x0f>; | |
| linux,code = <0x74>; | |
| interrupt-parent = <0x22>; | |
| interrupts = <0x02 0x00 0x00>; | |
| label = "gpio-keys: KEY_POWER"; | |
| }; | |
| }; | |
| i2c@50 { | |
| status = "okay"; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| i2c-gpio,delay-us = <0x02>; | |
| gpios = <0x58 0x03 0x00 0x58 0x04 0x00>; | |
| compatible = "i2c-gpio"; | |
| ice5lp@50 { | |
| clock-names = "clk_out"; | |
| clocks = <0x14 0x10cc>; | |
| irled,ldo = <0x44 0x02 0x00>; | |
| irled,power_type = "LDO"; | |
| ice5lp,spi_en_rstn = <0x58 0x00 0x00>; | |
| ice5lp,spi_clk_scl = <0x58 0x04 0x00>; | |
| ice5lp,spi_si_sda = <0x58 0x03 0x00>; | |
| ice5lp,irda_irq = <0x58 0x02 0x00>; | |
| ice5lp,cdone = <0x6d 0x06 0x00>; | |
| ice5lp,creset_b = <0x58 0x01 0x00>; | |
| reg = <0x50>; | |
| compatible = "lattice,ice5lp"; | |
| }; | |
| }; | |
| muic { | |
| muic,qc-hv = [09]; | |
| muic,afcmode-tx = [46]; | |
| muic,support-list = "OTG\0Charging Cable\0Jig USB On\0Jig UART Off\0Jig UART Off + VB\0Jig UART On\0TA\0USB\0CDP\0Undefined Charging\0Unofficial ID\0Unofficial ID + TA\0Unofficial ID + ANY TA\0Deskdock\0Deskdock + VB\0Unofficial ID + USB\0Unofficial ID + CDP\0TA or AFC\0AFC charger Prepare\0AFC charger 5V\0AFC charger 9V\0Fuelgauge test\0HMT\0TYPE2 Charger"; | |
| status = "disabled"; | |
| }; | |
| rgb { | |
| br_ratio_b_bl = <0x33e>; | |
| br_ratio_g_bl = <0xe6>; | |
| br_ratio_r_bl = <0x258>; | |
| low_powermode_current_bl = <0x02>; | |
| normal_powermode_current_bl = <0x0a>; | |
| br_ratio_b_rd = <0x33e>; | |
| br_ratio_g_rd = <0xe6>; | |
| br_ratio_r_rd = <0x1c2>; | |
| low_powermode_current_rd = <0x02>; | |
| normal_powermode_current_rd = <0x0a>; | |
| br_ratio_b_gr = <0x28>; | |
| br_ratio_g_gr = <0x1e>; | |
| br_ratio_r_gr = <0x46>; | |
| low_powermode_current_gr = <0x02>; | |
| normal_powermode_current_gr = <0x0a>; | |
| br_ratio_b_gd = <0x33e>; | |
| br_ratio_g_gd = <0xe6>; | |
| br_ratio_r_gd = <0x1c2>; | |
| low_powermode_current_gd = <0x02>; | |
| normal_powermode_current_gd = <0x0a>; | |
| br_ratio_b_bk = <0x1f4>; | |
| br_ratio_g_bk = <0xc8>; | |
| br_ratio_r_bk = <0x1c2>; | |
| low_powermode_current_bk = <0x02>; | |
| normal_powermode_current_bk = <0x0a>; | |
| br_ratio_b_wh = <0x384>; | |
| br_ratio_g_wh = <0x190>; | |
| br_ratio_r_wh = <0x384>; | |
| low_powermode_current_wh = <0x02>; | |
| normal_powermode_current_wh = <0x0a>; | |
| br_ratio_b = <0x2bc>; | |
| br_ratio_g = <0xe6>; | |
| br_ratio_r = <0x1c2>; | |
| low_powermode_current = <0x02>; | |
| normal_powermode_current = <0x0a>; | |
| rgb-name = "led_w\0led_r\0led_g\0led_b"; | |
| device_type = <0x01>; | |
| }; | |
| haptic { | |
| haptic,regulator_name = "VCC_MOTOR_3.0"; | |
| haptic,pwm_id = <0x01>; | |
| haptic,reg2 = <0x82>; | |
| haptic,period = <0x82e6>; | |
| haptic,duty = <0x8197>; | |
| haptic,max_timeout = <0x2710>; | |
| status = "okay"; | |
| }; | |
| certify_hall { | |
| certify_hall,gpio_certify_cover = <0x43 0x04 0x00>; | |
| pinctrl-0 = <0xd3>; | |
| pinctrl-names = "default"; | |
| compatible = "certify_hall"; | |
| status = "okay"; | |
| }; | |
| hall { | |
| hall,gpio_flip_cover = <0x43 0x01 0x00>; | |
| pinctrl-0 = <0xd2>; | |
| pinctrl-names = "default"; | |
| compatible = "hall"; | |
| status = "okay"; | |
| }; | |
| ion { | |
| compatible = "samsung,exynos5430-ion"; | |
| }; | |
| fixed-rate-clocks { | |
| oscclk { | |
| clock-frequency = <0x16e3600>; | |
| compatible = "samsung,exynos7420-oscclk"; | |
| }; | |
| }; | |
| chosen { | |
| linux,initrd-end = <0x433933bc>; | |
| linux,initrd-start = <0x43000000>; | |
| bootargs = "console=ram loglevel=4 sec_debug.level=0 sec_watchdog.sec_pet=5 androidboot.hardware=samsungexynos7420 androidboot.debug_level=0x4f4c ess_setup=0x46000000 sec_tima_log=0x200000@0x48002000 sec_avc_log=0x40000@0x48204000 charging_mode=0x0 s3cfb.bootloaderfb=0xe2a00000 lcdtype=4194323 consoleblank=0 lpj=239616 sec_debug.reset_reason=7 sec_reset.reset_reason=7 ehci_hcd.park=3 oops=panic pmic_info=35 cordon=d5b38555395d819bd0a6a7c98253511b connie=SM-G920F_OPEN_EUR_51f1ca0d62ccd19e992b8716b6c44e22 fg_reset=0 androidboot.emmc_checksum=3 androidboot.boot_salescode= androidboot.odin_download=1 androidboot.bootloader=G920FXXS6ETI6 androidboot.selinux=enforcing androidboot.security_mode=1526595585 androidboot.ucs_mode=0 androidboot.hw_rev=11 androidboot.warranty_bit=1 androidboot.hmac_mismatch=0 androidboot.sec_atd.tty=/dev/ttySAC1 androidboot.serialno=0123456789ABCDEF snd_soc_core.pmdown_time=1000 zero_sdchg_ic=0 androidboot.fmp_config=0"; | |
| serial = <0xc1031603 0x1085e75>; | |
| revision = <0x0b>; | |
| }; | |
| reserved-memory { | |
| ranges; | |
| #size-cells = <0x01>; | |
| #address-cells = <0x01>; | |
| sss_debug { | |
| reg = <0xf2c00000 0x100000>; | |
| compatible = "secure,sss-debug"; | |
| }; | |
| iram_vector { | |
| reg = <0xf2a00000 0x200000>; | |
| compatible = "mali,iram-vector"; | |
| }; | |
| mipi_lli { | |
| phandle = <0xbe>; | |
| linux,phandle = <0xbe>; | |
| alignment = <0x800000>; | |
| size = <0x800000>; | |
| #memory-region-cells = <0x00>; | |
| compatible = "mipi-lli-shmem"; | |
| }; | |
| secdma { | |
| id = <0x0d>; | |
| alignment = <0x40000>; | |
| size = <0x40000>; | |
| compatible = "exynos5433-ion,secdma"; | |
| }; | |
| mfc_nfw { | |
| id = <0x0c>; | |
| reg = <0xe2600000 0x110000>; | |
| compatible = "exynos5433-ion,mfc_nfw"; | |
| }; | |
| mfc_fw { | |
| id = <0x08>; | |
| reg = <0xe2800000 0x200000>; | |
| secure; | |
| compatible = "exynos5433-ion,mfc_fw"; | |
| }; | |
| video_ext { | |
| id = <0x01>; | |
| reg = <0xf0e00000 0x600000>; | |
| secure; | |
| compatible = "exynos5433-ion,video_ext"; | |
| }; | |
| video { | |
| compat-id = <0x04 0x05 0x06 0x07>; | |
| id = <0x0b>; | |
| reg = <0xe2a00000 0xe400000>; | |
| secure; | |
| compatible = "exynos5433-ion,video"; | |
| }; | |
| common { | |
| id = <0x00>; | |
| alignment = <0x1000>; | |
| size = <0x600000>; | |
| compatible = "exynos5433-ion,common"; | |
| }; | |
| }; | |
| memory@40000000 { | |
| reg = <0x40000000 0x20000000 0x60000000 0x20000000 0x80000000 0x20000000 0xa0000000 0x20000000 0xc0000000 0x20000000 0xe0000000 0x1e800000>; | |
| device_type = "memory"; | |
| }; | |
| pmu_coremem_ratio { | |
| const_lpki = <0x00 0x51d4 0xa3a8 0xf57c 0x14750 0x19924>; | |
| compatible = "samsung,exynos-pmu_coremem"; | |
| }; | |
| fips_fmp { | |
| compatible = "samsung,exynos-fips-fmp"; | |
| }; | |
| ufs@0x15570000 { | |
| ufs-cap-hibern8-with-clk-gating; | |
| ufs-cap-clk-gating; | |
| vccq2-fixed-regulator; | |
| vccq-fixed-regulator; | |
| vcc-fixed-regulator; | |
| vccq2-supply = <0xd1>; | |
| vccq-supply = <0xd0>; | |
| vcc-supply = <0xcf>; | |
| ufs-pa-hibern8time = <0x14>; | |
| ufs-pa-tacctivate = <0x06>; | |
| ufs-pa-granularity = <0x06>; | |
| ufs-rx-hibern8-time-cap = <0x05>; | |
| ufs-rx-min-activate-time-cap = <0x07>; | |
| ufs-rx-adv-fine-gran-sup_en = <0x00>; | |
| ufs-opts-skip-connection-estab; | |
| ufs,pmd-attr-hs-series = "HS_rate_b"; | |
| ufs,pmd-attr-gear = [02]; | |
| ufs,pmd-attr-lane = [02]; | |
| ufs,pmd-attr-mode = "FAST"; | |
| ufs,pmd-remote-l2-timer = <0x2ee0 0x7d00 0x3e80>; | |
| ufs,pmd-local-l2-timer = <0x1f40 0x6d60 0x4e20>; | |
| pclk-freq-avail-range = <0x42c1d80 0x7ed6b40>; | |
| freq-table-hz = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>; | |
| clock-names = "aclk_ufs\0sclk_ufsunipro\0phyclk_ufs_tx0_symbol\0phyclk_ufs_tx1_symbol\0phyclk_ufs_rx0_symbol\0phyclk_ufs_rx1_symbol\0ref_clk_1\0ref_clk_2\0mout_sclk_combo_phy_embedded\0top_sclk_phy_fsys1_26m"; | |
| clocks = <0x14 0x13a6 0x14 0x13a7 0x14 0x13a8 0x14 0x13a9 0x14 0x13aa 0x14 0x13ab 0x14 0x13ac 0x14 0x13ad 0x14 0x13ae 0x14 0x13af>; | |
| pinctrl-0 = <0xcd 0xce>; | |
| pinctrl-names = "default"; | |
| interrupts = <0x00 0xc8 0x00>; | |
| reg = <0x15570000 0x100 0x15570100 0x100 0x15571000 0x200 0x15572000 0x300>; | |
| ranges; | |
| #size-cells = <0x01>; | |
| #address-cells = <0x01>; | |
| compatible = "samsung,exynos-ufs"; | |
| ufs-phy { | |
| reg = <0x15571800 0x240>; | |
| ranges; | |
| #size-cells = <0x01>; | |
| #address-cells = <0x01>; | |
| ufs-phy-sys { | |
| reg = <0x105c0720 0x04>; | |
| }; | |
| }; | |
| }; | |
| pcie1@157B0000 { | |
| status = "okay"; | |
| phy-clk-num = <0x02>; | |
| pcie-clk-num = <0x0a>; | |
| ch-num = <0x01>; | |
| msi-base = <0xc8>; | |
| num-lanes = <0x01>; | |
| ranges = <0x800 0x00 0x1c000000 0x1c000000 0x00 0x1000 0x81000000 0x00 0x00 0x1c001000 0x00 0x10000 0x82000000 0x00 0x1c011000 0x1c011000 0x00 0x3feefff>; | |
| device_type = "pci"; | |
| #size-cells = <0x02>; | |
| #address-cells = <0x03>; | |
| pinctrl-1 = <0xc5 0xc6 0xc7 0xcc 0xc9 0xca 0xcb>; | |
| pinctrl-0 = <0xc5 0xc6 0xc7 0xc8 0xc9 0xca 0xcb>; | |
| pinctrl-names = "default\0pcie_reset"; | |
| clock-names = "aclk_xiu_wifi1x\0aclk_ahb2axi_pcie_wifi1\0aclk_pcie_wifi1_mstr_aclk\0aclk_pcie_wifi1_slv_aclk\0aclk_pcie_wifi1_dbi_aclk\0aclk_combo_phy_pcs_pclk_wifi1\0pclk_async_combo_phy_wifi1\0sclk_phy_fsys1_gated\0sclk_pcie_link_wifi1_gated\0phyclk_pcie_wifi1_tx0_gated\0phyclk_pcie_wifi1_rx0_gated\0sclk_combo_phy_wifi1_26m_gated"; | |
| clocks = <0x14 0xe74 0x14 0xe75 0x14 0xe76 0x14 0xe77 0x14 0xe78 0x14 0xe79 0x14 0xe7a 0x14 0xe7b 0x14 0xe7c 0x14 0xe7d 0x14 0xe7e 0x14 0xe7f>; | |
| interrupts = <0x00 0xcd 0x00>; | |
| reg = <0x15660000 0x1000 0x15630000 0x1000 0x1005265c 0x04 0x105c071c 0x04 0x157b0000 0x1000 0x156e0f00 0x04 0x156f00e4 0x04>; | |
| gpios = <0xc4 0x00 0x01 0x58 0x00 0x01>; | |
| compatible = "samsung,exynos7420-pcie"; | |
| }; | |
| pcie0@155C0000 { | |
| status = "disabled"; | |
| use-msi; | |
| phy-clk-num = <0x02>; | |
| pcie-clk-num = <0x09>; | |
| ch-num = <0x00>; | |
| msi-base = <0x2ee>; | |
| num-lanes = <0x01>; | |
| ranges = <0x800 0x00 0x18000000 0x18000000 0x00 0x1000 0x81000000 0x00 0x00 0x18001000 0x00 0x10000 0x82000000 0x00 0x18011000 0x18011000 0x00 0x3feefff>; | |
| device_type = "pci"; | |
| #size-cells = <0x02>; | |
| #address-cells = <0x03>; | |
| pinctrl-1 = <0xbf 0xc0 0xc3 0xc2>; | |
| pinctrl-0 = <0xbf 0xc0 0xc1 0xc2>; | |
| pinctrl-names = "default\0pcie_reset"; | |
| clock-names = "aclk_xiu_modemx\0aclk_combo_phy_modem_pcs_pclk\0sclk_phy_fsys0\0sclk_combo_phy_modem_26m\0pclk_async_combo_phy_modem\0aclk_pcie_modem_mstr_aclk\0aclk_pcie_modem_slv_aclk\0aclk_pcie_modem_dbi_aclk\0sclk_pcie_modem_gated\0phyclk_pcie_tx0_gated\0phyclk_pcie_rx0_gated"; | |
| clocks = <0x14 0xe10 0x14 0xe11 0x14 0xe12 0x14 0xe13 0x14 0xe14 0x14 0xe42 0x14 0xe43 0x14 0xe44 0x14 0xe45 0x14 0xe46 0x14 0xe47>; | |
| interrupts = <0x00 0xda 0x00>; | |
| reg = <0x10ee0000 0x1000 0x10ed0000 0x1000 0x10051088 0x04 0x105c0724 0x04 0x155c0000 0x1000 0x10e90f00 0x04 0x10ec00e4 0x04>; | |
| pcie,cp2ap_wake = <0x2f 0x02 0x0f>; | |
| gpios = <0x83 0x02 0x01>; | |
| compatible = "samsung,exynos7420-pcie"; | |
| }; | |
| mipi-lli@10F24000 { | |
| modem-name = "ss333"; | |
| memory-region = <0xbe>; | |
| status = "okay"; | |
| ranges; | |
| #size-cells = <0x01>; | |
| #address-cells = <0x01>; | |
| clock-names = "aclk_xiu_llisfrx\0aclk_axius_lli_be\0aclk_axius_lli_ll\0aclk_axius_llisfrx_llill\0aclk_axius_llisfrx_llibe\0aclk_lli_ll_init\0aclk_lli_ll_targ\0aclk_lli_be_init\0aclk_lli_be_targ\0aclk_lli_svc_loc\0aclk_lli_svc_rem\0user_phyclk_lli_tx0_symbol\0user_phyclk_lli_rx0_symbol\0aclk_xiu_modemx\0aclk_combo_phy_modem_pcs_pclk\0sclk_phy_fsys0\0sclk_combo_phy_modem_26m\0pclk_async_combo_phy_modem"; | |
| clocks = <0x14 0xdac 0x14 0xdad 0x14 0xdae 0x14 0xdaf 0x14 0xdb0 0x14 0xdb6 0x14 0xdb7 0x14 0xdb8 0x14 0xdb9 0x14 0xdba 0x14 0xdbb 0x14 0xdbc 0x14 0xdbd 0x14 0xe10 0x14 0xe11 0x14 0xe12 0x14 0xe13 0x14 0xe14>; | |
| interrupts = <0x00 0xd0 0x00 0x00 0xd1 0x00>; | |
| reg = <0x10f24000 0x4000 0x10f34000 0x4000 0x10050000 0x2000 0x105c0724 0x04>; | |
| compatible = "samsung,exynos-mipi-lli"; | |
| modems { | |
| xmm7260 { | |
| automode = <0x00>; | |
| scrambler = <0x00>; | |
| }; | |
| ss333 { | |
| is_ion_alloc = <0x00>; | |
| shdmem_size = <0x08>; | |
| automode = <0x00>; | |
| scrambler = <0x00>; | |
| }; | |
| ss303 { | |
| automode = <0x00>; | |
| scrambler = <0x00>; | |
| }; | |
| ss300 { | |
| automode = <0x00>; | |
| scrambler = <0x00>; | |
| }; | |
| }; | |
| mphy { | |
| modem-name = "ss333"; | |
| has_pma; | |
| reg = <0x10f20000 0x4000 0x10ed0000 0x200>; | |
| compatible = "samsung,exynos-mipi-lli-combo-mphy"; | |
| modems { | |
| xmm7260 { | |
| shd-refclk = <0x01>; | |
| init-gear = <0x02 0x01 0x01>; | |
| }; | |
| ss333 { | |
| shd-refclk = <0x01>; | |
| init-gear = <0x02 0x02 0x01>; | |
| }; | |
| ss303 { | |
| shd-refclk = <0x01>; | |
| init-gear = <0x02 0x01 0x01>; | |
| }; | |
| ss300 { | |
| shd-refclk = <0x01>; | |
| init-gear = <0x02 0x01 0x01>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| spdif@14DB0000 { | |
| status = "disabled"; | |
| pinctrl-1 = <0xbd>; | |
| pinctrl-0 = <0xbc>; | |
| pinctrl-names = "default\0idle"; | |
| samsung,lpass-subip; | |
| clock-names = "spdif\0sclk_spdif"; | |
| clocks = <0x14 0x1cc 0x14 0x1e0>; | |
| interrupts = <0x00 0x1b5 0x00>; | |
| dma-names = "tx"; | |
| dmas = <0x29 0x1d>; | |
| reg = <0x14db0000 0x100>; | |
| compatible = "samsung,spdif"; | |
| }; | |
| pcm@14D80000 { | |
| status = "disabled"; | |
| samsung,lpass-subip; | |
| clock-names = "pcm\0sclk_pcm"; | |
| clocks = <0x14 0x1cd 0x14 0x1e1>; | |
| interrupts = <0x00 0x1b4 0x00>; | |
| dma-names = "tx\0rx"; | |
| dmas = <0x29 0x1c 0x29 0x1b>; | |
| reg = <0x14d80000 0x100>; | |
| compatible = "samsung,pcm"; | |
| }; | |
| pcm@11450000 { | |
| status = "disabled"; | |
| samsung,lpass-subip; | |
| clock-names = "pcm\0sclk_pcm"; | |
| clocks = <0x14 0x19f 0x14 0x1c8>; | |
| interrupts = <0x00 0x47 0x00>; | |
| dma-names = "tx\0rx"; | |
| dmas = <0xb9 0x03 0xb9 0x04>; | |
| reg = <0x11450000 0x100>; | |
| compatible = "samsung,pcm"; | |
| }; | |
| i2s@14D60000 { | |
| status = "okay"; | |
| samsung,lpass-subip; | |
| samsung,supports-rstclr; | |
| samsung,supports-6ch; | |
| clock-names = "iis\0i2s_opclk0\0i2s_opclk1"; | |
| clocks = <0x14 0x1ce 0x14 0x1d3 0x14 0x1d3>; | |
| interrupts = <0x00 0x1b3 0x00>; | |
| dma-names = "tx\0rx"; | |
| dmas = <0x29 0x1f 0x29 0x1e>; | |
| reg = <0x14d60000 0x100>; | |
| compatible = "samsung,i2s-v5"; | |
| }; | |
| i2s@11440000 { | |
| phandle = <0xd4>; | |
| linux,phandle = <0xd4>; | |
| status = "okay"; | |
| pinctrl-1 = <0xbb>; | |
| pinctrl-0 = <0xba>; | |
| pinctrl-names = "default\0idle"; | |
| samsung,rx-sram = <0x3045000 0x2000>; | |
| samsung,rx-size = <0x80000>; | |
| samsung,rx-buf = <0x41000000>; | |
| samsung,rx-iommu; | |
| samsung,tx-size = <0x80000>; | |
| samsung,tx-buf = <0x40000000>; | |
| samsung,tx-iommu; | |
| samsung,lpass-subip; | |
| samsung,amixer = <0x04>; | |
| samsung,supports-low-rfs; | |
| samsung,supports-tdm; | |
| samsung,supports-secdai; | |
| samsung,supports-rstclr; | |
| samsung,supports-6ch; | |
| clock-names = "iis\0i2s_opclk0\0i2s_opclk1"; | |
| clocks = <0x14 0x19e 0x14 0x1c3 0x14 0x1b1>; | |
| interrupts = <0x00 0x46 0x00>; | |
| dma-names = "tx\0rx"; | |
| dmas = <0xb9 0x00 0xb9 0x02>; | |
| reg = <0x11440000 0x100>; | |
| compatible = "samsung,i2s-v5"; | |
| i2s-compr { | |
| clock-names = "iis\0i2s_opclk0\0i2s_opclk1"; | |
| clocks = <0x14 0x19e 0x14 0x1c3 0x14 0x1c9>; | |
| }; | |
| i2s-sec { | |
| samsung,tx-uhqa-buf = <0x44000000 0x40000>; | |
| samsung,tx-size = <0xa000>; | |
| samsung,tx-buf = <0x43000000>; | |
| samsung,tx-iommu; | |
| clock-names = "iis\0i2s_opclk0\0i2s_opclk1"; | |
| clocks = <0x14 0x19e 0x14 0x1c3 0x14 0x1c9>; | |
| dma-names = "tx-sec"; | |
| dmas = <0xb9 0x01>; | |
| }; | |
| }; | |
| eax { | |
| phandle = <0xd6>; | |
| linux,phandle = <0xd6>; | |
| status = "ok"; | |
| compatible = "samsung,exynos-amixer"; | |
| }; | |
| seiren { | |
| status = "ok"; | |
| samsung,lpass-subip; | |
| clock-names = "ca5\0ca5_opclk\0dmac\0timer"; | |
| clocks = <0x14 0x1ae 0x14 0x1c4 0x14 0x190 0x14 0x19d>; | |
| interrupts = <0x00 0x5d 0x00>; | |
| compatible = "samsung,exynos5430-seiren"; | |
| }; | |
| iommu-domain_lpass { | |
| domain-clients = <0xb8>; | |
| ranges; | |
| #size-cells = <0x01>; | |
| #address-cells = <0x01>; | |
| compatible = "samsung,exynos-iommu-bus"; | |
| sysmmu@0x114E0000 { | |
| sysmmu,block-when-stop; | |
| samsung,power-domain = <0x17>; | |
| qos = <0x04>; | |
| interrupts = <0x00 0x58 0x00>; | |
| reg = <0x114e0000 0x1000>; | |
| compatible = "samsung,exynos7420-sysmmu"; | |
| pb-info { | |
| pb@0 { | |
| master_axi_id_list = <0xb8>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| cec@101B0000 { | |
| ranges; | |
| #size-cells = <0x01>; | |
| #address-cells = <0x01>; | |
| clocks = <0x14 0x8f>; | |
| clock-names = "gate_hdmi_cec"; | |
| pinctrl-0 = <0xb7>; | |
| pinctrl-names = "hdmi_cec"; | |
| gpios = <0x2f 0x01 0x0f>; | |
| interrupts = <0x00 0x13 0x00>; | |
| reg = <0x101b0000 0x1000>; | |
| compatible = "samsung,exynos5-cec_driver"; | |
| hdmiphy-sys { | |
| reg = <0x105c0700 0x04>; | |
| }; | |
| }; | |
| hdmi@13970000 { | |
| audio_master_clk = <0x01>; | |
| ranges; | |
| #size-cells = <0x01>; | |
| #address-cells = <0x01>; | |
| ip_ver = <0x07>; | |
| clock-names = "hdmi_pixel\0hdmi_tmds\0pclk_hdmi\0pclk_hdmiphy"; | |
| clocks = <0x14 0xd9 0x14 0xda 0x14 0xdf 0x14 0xe0>; | |
| pinctrl-1 = <0xb6>; | |
| pinctrl-0 = <0xb5>; | |
| pinctrl-names = "hdmi_hdmi_hpd\0hdmi_ext_hpd"; | |
| interrupts = <0x00 0xc6 0x00>; | |
| samsung,power-domain = <0xb4>; | |
| reg = <0x13970000 0x80000 0x13af0000 0x8000>; | |
| compatible = "samsung,exynos5-hdmi_driver"; | |
| hdmiphy-sys { | |
| reg = <0x105c0700 0x04>; | |
| }; | |
| }; | |
| decon_ext { | |
| phandle = <0x9a>; | |
| linux,phandle = <0x9a>; | |
| trig_mode = <0x00>; | |
| psr_mode = <0x02>; | |
| default_win = <0x00>; | |
| n_src_pad = <0x01>; | |
| n_sink_pad = <0x06>; | |
| max_win = <0x06>; | |
| ip_ver = <0x07>; | |
| clock-names = "aclk_decon1\0pclk_decon1\0um_decon1_eclk\0m_decon1_eclk\0d_decon1_eclk\0decon1_eclk\0decon1_vclk\0sclk_dsd\0aclk_lh_disp1\0aclk_disp\0pclk_disp\0um_decon1_vclk\0m_decon1_vclk\0d_decon1_vclk\0disp_pll\0hdmi_pixel"; | |
| clocks = <0x14 0xd2 0x14 0xd3 0x14 0xd4 0x14 0xd5 0x14 0xd6 0x14 0xd7 0x14 0xd8 0x14 0xdb 0x14 0xe7 0x14 0xe8 0x14 0xe9 0x14 0xe1 0x14 0xe2 0x14 0xe3 0x14 0x0b 0x14 0xd9>; | |
| interrupts = <0x00 0xc3 0x00 0x00 0xc1 0x00 0x00 0xc2 0x00 0x00 0xc0 0x00>; | |
| samsung,power-domain = <0xb3>; | |
| reg = <0x13950000 0x10000>; | |
| #pb-id-cells = <0x04>; | |
| compatible = "samsung,exynos5-decon_driver"; | |
| }; | |
| tmu@10060000 { | |
| hotplug_in_threshold = <0x55>; | |
| hotplug_out_threshold = <0x5a>; | |
| throttle_passive_count = <0x04>; | |
| throttle_active_count = <0x01>; | |
| throttle_count = <0x05>; | |
| trigger_level_count = <0x08>; | |
| efuse_value = <0x4b>; | |
| cal_type = <0x01>; | |
| noise_cancel_mode = <0x04>; | |
| reference_voltage = <0x11 0x10 0x11 0x11>; | |
| gain = <0x09 0x08 0x09 0x09>; | |
| threshold_falling = <0x02>; | |
| interrupts = <0x00 0x6c 0x00 0x00 0x7c 0x00 0x00 0x6d 0x00 0x00 0x6b 0x00>; | |
| reg = <0x10060000 0x200 0x10064000 0x200 0x10068000 0x200 0x1006c000 0x200>; | |
| compatible = "samsung,exynos7420-tmu"; | |
| throttle_table { | |
| throttle_tab_4 { | |
| freq_max_cluster0 = <0x61a80>; | |
| freq_max_cluster1 = "\0\f5"; | |
| temp = <0x5f>; | |
| }; | |
| throttle_tab_3 { | |
| freq_max_cluster0 = <0xf4240>; | |
| freq_max_cluster1 = "\0\f5"; | |
| temp = <0x5a>; | |
| }; | |
| throttle_tab_2 { | |
| freq_max_cluster0 = <0x124f80>; | |
| freq_max_cluster1 = "\0\f5"; | |
| temp = <0x55>; | |
| }; | |
| throttle_tab_1 { | |
| freq_max_cluster0 = <0x155cc0>; | |
| freq_max_cluster1 = <0x13d620>; | |
| temp = <0x50>; | |
| }; | |
| throttle_tab_0 { | |
| freq_max_cluster0 = <0x16e360>; | |
| freq_max_cluster1 = <0x1a0040>; | |
| temp = <0x4b>; | |
| }; | |
| }; | |
| trigger_level_table { | |
| trigger_level_7 { | |
| enable = <0x01>; | |
| temp = <0x73>; | |
| }; | |
| trigger_level_6 { | |
| enable = <0x00>; | |
| temp = <0x69>; | |
| }; | |
| trigger_level_5 { | |
| enable = <0x01>; | |
| temp = <0x64>; | |
| }; | |
| trigger_level_4 { | |
| enable = <0x01>; | |
| temp = <0x5f>; | |
| }; | |
| trigger_level_3 { | |
| enable = <0x01>; | |
| temp = <0x5a>; | |
| }; | |
| trigger_level_2 { | |
| enable = <0x01>; | |
| temp = <0x55>; | |
| }; | |
| trigger_level_1 { | |
| enable = <0x01>; | |
| temp = <0x50>; | |
| }; | |
| trigger_level_0 { | |
| enable = <0x01>; | |
| temp = <0x4b>; | |
| }; | |
| }; | |
| }; | |
| decon_fb { | |
| phandle = <0x99>; | |
| linux,phandle = <0x99>; | |
| gpio_pcd = <0x55 0x02 0x00>; | |
| gpio_det = <0x76 0x01 0x00>; | |
| gpio_err = <0x76 0x07 0x00>; | |
| gpios = <0xb2 0x00 0x0f>; | |
| ranges; | |
| #size-cells = <0x01>; | |
| #address-cells = <0x01>; | |
| dsi_mode = <0x00>; | |
| trig_mode = <0x00>; | |
| psr_mode = <0x02>; | |
| default_win = <0x00>; | |
| n_src_pad = <0x01>; | |
| n_sink_pad = <0x07>; | |
| max_win = <0x07>; | |
| ip_ver = <0x02>; | |
| clock-names = "disp_pll\0mif_pll\0d_pclk_disp\0pclk_decon0\0aclk_decon0\0m_decon0_eclk\0d_decon0_eclk\0decon0_eclk\0m_decon0_vclk\0d_decon0_vclk\0decon0_vclk\0sclk_dsd\0aclk_lh_disp0\0aclk_lh_disp1\0aclk_disp\0pclk_disp"; | |
| clocks = <0x14 0x0b 0x14 0x2a 0x14 0xc8 0x14 0xdc 0x14 0xc9 0x14 0xca 0x14 0xcb 0x14 0xcc 0x14 0xcd 0x14 0xce 0x14 0xcf 0x14 0xdb 0x14 0xe6 0x14 0xe7 0x14 0xe8 0x14 0xe9>; | |
| interrupts = <0x00 0xbe 0x00 0x00 0xbc 0x00 0x00 0xbd 0x00>; | |
| samsung,power-domain = <0xb1>; | |
| reg = <0x13930000 0x10000>; | |
| #pb-id-cells = <0x04>; | |
| compatible = "samsung,exynos5-decon_driver"; | |
| te_eint { | |
| te_pend_mask = <0x01>; | |
| reg = <0x13470a34 0x04 0x13470934 0x04>; | |
| }; | |
| cam-stat { | |
| reg = <0x105c4044 0x04 0x105c4064 0x04>; | |
| }; | |
| }; | |
| vpp@0x13E05000 { | |
| phandle = <0x9e>; | |
| linux,phandle = <0x9e>; | |
| samsung,power-domain = <0xb0>; | |
| clocks = <0x14 0x1f7 0x14 0x1f9 0x14 0x1fa 0x14 0x1fb 0x14 0x1fd 0x14 0x1ff>; | |
| clock-names = "gate\0aclk_lh_vpp1\0d_pclk_vpp\0pclk_vpp\0aclk_smmu_vpp_sfw1\0pclk_smmu_vpp_sfw1"; | |
| interrupts = <0x00 0x10b 0x00>; | |
| reg = <0x13e05000 0x1000>; | |
| #pb-id-cells = <0x04>; | |
| compatible = "samsung,exynos7-vpp"; | |
| }; | |
| vpp@0x13E04000 { | |
| phandle = <0x9c>; | |
| linux,phandle = <0x9c>; | |
| samsung,power-domain = <0xaf>; | |
| clocks = <0x14 0x1f6 0x14 0x1f8 0x14 0x1fa 0x14 0x1fb 0x14 0x1fc 0x14 0x1fe>; | |
| clock-names = "gate\0aclk_lh_vpp0\0d_pclk_vpp\0pclk_vpp\0aclk_smmu_vpp_sfw0\0pclk_smmu_vpp_sfw0"; | |
| interrupts = <0x00 0x10a 0x00>; | |
| reg = <0x13e04000 0x1000>; | |
| #pb-id-cells = <0x04>; | |
| compatible = "samsung,exynos7-vpp"; | |
| }; | |
| vpp@0x13E03000 { | |
| phandle = <0x9d>; | |
| linux,phandle = <0x9d>; | |
| samsung,power-domain = <0xae>; | |
| clocks = <0x14 0x1f5 0x14 0x1f9 0x14 0x1fa 0x14 0x1fb 0x14 0x1fd 0x14 0x1ff>; | |
| clock-names = "gate\0aclk_lh_vpp1\0d_pclk_vpp\0pclk_vpp\0aclk_smmu_vpp_sfw1\0pclk_smmu_vpp_sfw1"; | |
| interrupts = <0x00 0x109 0x00>; | |
| reg = <0x13e03000 0x1000>; | |
| #pb-id-cells = <0x04>; | |
| compatible = "samsung,exynos7-vpp"; | |
| }; | |
| vpp@0x13E02000 { | |
| phandle = <0x9b>; | |
| linux,phandle = <0x9b>; | |
| samsung,power-domain = <0xad>; | |
| clocks = <0x14 0x1f4 0x14 0x1f8 0x14 0x1fa 0x14 0x1fb 0x14 0x1fc 0x14 0x1fe>; | |
| clock-names = "gate\0aclk_lh_vpp0\0d_pclk_vpp\0pclk_vpp\0aclk_smmu_vpp_sfw0\0pclk_smmu_vpp_sfw0"; | |
| interrupts = <0x00 0x108 0x00>; | |
| reg = <0x13e02000 0x1000>; | |
| #pb-id-cells = <0x04>; | |
| compatible = "samsung,exynos7-vpp"; | |
| }; | |
| dsim@0x13900000 { | |
| lcd_info = <0xac>; | |
| regulator_16V = "VDD_1P6_DDR"; | |
| regulator_18V = "VCC_DISPLAY_1.8V"; | |
| regulator_30V = "VCC_3.0V_LCD"; | |
| gpios = <0x76 0x00 0x01>; | |
| data_lane_cnt = <0x04>; | |
| pinctrl-1 = <0xab>; | |
| pinctrl-0 = <0xaa>; | |
| pinctrl-names = "turnon_tes\0turnoff_tes"; | |
| clock-names = "pclk_dsim0\0mipi0_rx\0mipi0_bit\0rgb_vclk0\0pclk_disp"; | |
| clocks = <0x14 0xdd 0x14 0xd0 0x14 0xd1 0x14 0xea 0x14 0xe9>; | |
| interrupts = <0x00 0xc4 0x00>; | |
| samsung,power-domain = <0xa9>; | |
| reg = <0x13900000 0x1000>; | |
| compatible = "samsung,exynos5-mipi-dsi"; | |
| }; | |
| otp_ctrl@0x101E0010 { | |
| reg = <0x101e0010 0x04>; | |
| compatible = "samsung,exynos5-otp_ctrl"; | |
| }; | |
| sysreg_disp@0x10050000 { | |
| reg = <0x10050000 0x3000>; | |
| compatible = "samsung,exynos5-sysreg_disp"; | |
| }; | |
| mdev_output { | |
| compatible = "samsung,exynos5-mdev"; | |
| }; | |
| mfc0@152E0000 { | |
| phandle = <0xa7>; | |
| linux,phandle = <0xa7>; | |
| num_qos_steps = <0x08>; | |
| min_rate = <0x186a0>; | |
| clock_rate = <0x17d78400>; | |
| ip_ver = <0x0b>; | |
| status = "ok"; | |
| samsung,power-domain = <0xa8>; | |
| clocks = <0x14 0x3e8 0x14 0x3e9 0x14 0x3ea 0x14 0x3eb 0x14 0x3f2 0x14 0x3f3 0x14 0x3f4 0x14 0x3fc 0x14 0x3fd 0x14 0x3fe 0x14 0x3ff>; | |
| clock-names = "aclk_mfc\0pclk_mfc\0dout_aclk_mfc_532\0dout_pclk_mfc\0aclk_lh_s_mfc_0\0aclk_lh_s_mfc_1\0aclk_noc_bus1_nrt\0pclk_gpio_bus1\0aclk_lh_mfc0\0aclk_lh_mfc1\0top_aclk_mfc_532"; | |
| interrupts = <0x00 0x140 0x00>; | |
| reg = <0x152e0000 0x10000>; | |
| #pb-id-cells = <0x00>; | |
| compatible = "samsung,mfc-v6"; | |
| mfc_qos_table { | |
| mfc_qos_extra_var_7 { | |
| has_enc_table = <0x00>; | |
| freq_kfc = <0x16e360>; | |
| freq_cpu = <0x16e360>; | |
| freq_mif = <0x104be0>; | |
| freq_int = <0x88b80>; | |
| freq_mfc = <0x72420>; | |
| thrd_mb = <0xed4e0>; | |
| }; | |
| mfc_qos_extra_var_6 { | |
| has_enc_table = <0x01>; | |
| freq_kfc = <0x16e360>; | |
| freq_cpu = <0x16e360>; | |
| freq_mif = <0xca260>; | |
| freq_int = <0x61a80>; | |
| freq_mfc = <0x518b0>; | |
| thrd_mb = <0x77880>; | |
| }; | |
| mfc_qos_extra_var_5 { | |
| has_enc_table = <0x00>; | |
| freq_kfc = <0x16e360>; | |
| freq_cpu = <0x16e360>; | |
| freq_mif = <0xca260>; | |
| freq_int = <0x61a80>; | |
| freq_mfc = <0x518b0>; | |
| thrd_mb = <0x77880>; | |
| }; | |
| mfc_qos_extra_var_4 { | |
| has_enc_table = <0x01>; | |
| freq_kfc = <0x16e360>; | |
| freq_cpu = <0x16e360>; | |
| freq_mif = <0xca260>; | |
| freq_int = <0x30d40>; | |
| freq_mfc = <0x30d40>; | |
| thrd_mb = <0x3bc40>; | |
| }; | |
| mfc_qos_extra_var_3 { | |
| has_enc_table = <0x00>; | |
| freq_kfc = <0x16e360>; | |
| freq_cpu = <0x16e360>; | |
| freq_mif = <0xca260>; | |
| freq_int = <0x40f10>; | |
| freq_mfc = <0x30d40>; | |
| thrd_mb = <0x3bc40>; | |
| }; | |
| mfc_qos_extra_var_2 { | |
| has_enc_table = <0x01>; | |
| freq_kfc = <0x16e360>; | |
| freq_cpu = <0x16e360>; | |
| freq_mif = <0xca260>; | |
| freq_int = <0x30d40>; | |
| freq_mfc = <0x30d40>; | |
| thrd_mb = <0x1a5e0>; | |
| }; | |
| mfc_qos_extra_var_1 { | |
| has_enc_table = <0x00>; | |
| freq_kfc = <0x16e360>; | |
| freq_cpu = <0x16e360>; | |
| freq_mif = <0xca260>; | |
| freq_int = <0x30d40>; | |
| freq_mfc = <0x30d40>; | |
| thrd_mb = <0x1a5e0>; | |
| }; | |
| mfc_qos_extra_var_0 { | |
| has_enc_table = <0x00>; | |
| freq_kfc = <0x16e360>; | |
| freq_cpu = <0x16e360>; | |
| freq_mif = <0xca260>; | |
| freq_int = <0x186a0>; | |
| freq_mfc = <0x186a0>; | |
| thrd_mb = <0x00>; | |
| }; | |
| mfc_qos_variant_7 { | |
| has_enc_table = <0x00>; | |
| freq_kfc = <0x00>; | |
| freq_cpu = <0x00>; | |
| freq_mif = <0xfa7d0>; | |
| freq_int = <0x88b80>; | |
| freq_mfc = <0x72420>; | |
| thrd_mb = <0xed4e0>; | |
| }; | |
| mfc_qos_variant_6 { | |
| has_enc_table = <0x01>; | |
| freq_kfc = <0x00>; | |
| freq_cpu = <0x00>; | |
| freq_mif = <0xca260>; | |
| freq_int = <0x61a80>; | |
| freq_mfc = <0x518b0>; | |
| thrd_mb = <0x77880>; | |
| }; | |
| mfc_qos_variant_5 { | |
| has_enc_table = <0x00>; | |
| freq_kfc = <0x00>; | |
| freq_cpu = <0x00>; | |
| freq_mif = <0xfa7d0>; | |
| freq_int = <0x86470>; | |
| freq_mfc = <0x518b0>; | |
| thrd_mb = <0x77880>; | |
| }; | |
| mfc_qos_variant_4 { | |
| has_enc_table = <0x01>; | |
| freq_kfc = <0x00>; | |
| freq_cpu = <0x00>; | |
| freq_mif = <0x65900>; | |
| freq_int = <0x40f10>; | |
| freq_mfc = <0x30d40>; | |
| thrd_mb = <0x3bc40>; | |
| }; | |
| mfc_qos_variant_3 { | |
| has_enc_table = <0x00>; | |
| freq_kfc = <0x00>; | |
| freq_cpu = <0x00>; | |
| freq_mif = <0x65900>; | |
| freq_int = <0x518b0>; | |
| freq_mfc = <0x30d40>; | |
| thrd_mb = <0x3bc40>; | |
| }; | |
| mfc_qos_variant_2 { | |
| has_enc_table = <0x01>; | |
| freq_kfc = <0x00>; | |
| freq_cpu = <0x00>; | |
| freq_mif = <0x28c58>; | |
| freq_int = <0x30d40>; | |
| freq_mfc = <0x30d40>; | |
| thrd_mb = <0x1a5e0>; | |
| }; | |
| mfc_qos_variant_1 { | |
| has_enc_table = <0x00>; | |
| freq_kfc = <0x00>; | |
| freq_cpu = <0x00>; | |
| freq_mif = <0x43620>; | |
| freq_int = <0x30d40>; | |
| freq_mfc = <0x30d40>; | |
| thrd_mb = <0x1a5e0>; | |
| }; | |
| mfc_qos_variant_0 { | |
| has_enc_table = <0x00>; | |
| freq_kfc = <0x00>; | |
| freq_cpu = <0x00>; | |
| freq_mif = <0x28c58>; | |
| freq_int = <0x186a0>; | |
| freq_mfc = <0x186a0>; | |
| thrd_mb = <0x00>; | |
| }; | |
| }; | |
| }; | |
| iommu-domain_mfc { | |
| domain-clients = <0xa7>; | |
| ranges; | |
| #size-cells = <0x01>; | |
| #address-cells = <0x01>; | |
| compatible = "samsung,exynos-iommu-bus"; | |
| sysmmu@0x15210000 { | |
| qos = <0x04>; | |
| interrupts = <0x00 0x13b 0x00>; | |
| reg = <0x15210000 0x1000>; | |
| compatible = "samsung,exynos7420-sysmmu"; | |
| pb-info { | |
| pb@0 { | |
| master_axi_id_list = <0xa7>; | |
| }; | |
| }; | |
| }; | |
| sysmmu@0x15200000 { | |
| qos = <0x04>; | |
| interrupts = <0x00 0x138 0x00>; | |
| reg = <0x15200000 0x1000>; | |
| compatible = "samsung,exynos7420-sysmmu"; | |
| pb-info { | |
| pb@0 { | |
| master_axi_id_list = <0xa7>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| iommu-domain_mscl { | |
| domain-clients = <0xa1 0xa2 0xa3>; | |
| ranges; | |
| #size-cells = <0x01>; | |
| #address-cells = <0x01>; | |
| compatible = "samsung,exynos-iommu-bus"; | |
| sysmmu@0x15140000 { | |
| sysmmu,block-when-stop; | |
| clock-names = "aclk\0pclk"; | |
| clocks = <0x14 0x5dd 0x14 0x5df>; | |
| qos = <0x04>; | |
| interrupts = <0x00 0x1af 0x00>; | |
| reg = <0x15140000 0x1000>; | |
| compatible = "samsung,exynos7420-sysmmu"; | |
| pb-info { | |
| pb@1 { | |
| dir = "w"; | |
| master_axi_id_list = <0xa2>; | |
| }; | |
| pb@0 { | |
| dir = "r"; | |
| master_axi_id_list = <0xa2>; | |
| }; | |
| }; | |
| }; | |
| sysmmu@0x15040000 { | |
| sysmmu,block-when-stop; | |
| clock-names = "aclk\0pclk"; | |
| clocks = <0x14 0x5dc 0x14 0x5de>; | |
| qos = <0x04>; | |
| interrupts = <0x00 0x1ac 0x00>; | |
| reg = <0x15040000 0x1000>; | |
| compatible = "samsung,exynos7420-sysmmu"; | |
| pb-info { | |
| pb@2 { | |
| master_axi_id_list = <0xa3>; | |
| }; | |
| pb@1 { | |
| dir = "w"; | |
| master_axi_id_list = <0xa1>; | |
| }; | |
| pb@0 { | |
| dir = "r"; | |
| master_axi_id_list = <0xa1>; | |
| }; | |
| }; | |
| }; | |
| jpeg0@15020000 { | |
| phandle = <0xa3>; | |
| linux,phandle = <0xa3>; | |
| clock-names = "gate\0gate2"; | |
| clocks = <0x14 0x278 0x14 0x28c>; | |
| samsung,power-domain = <0xa6>; | |
| ip_ver = <0x02>; | |
| interrupts = <0x00 0x1b2 0x00>; | |
| reg = <0x15020000 0x10000>; | |
| #pb-id-cells = <0x00>; | |
| compatible = "samsung,exynos-jpeg"; | |
| }; | |
| scaler@0x150100000 { | |
| phandle = <0xa2>; | |
| linux,phandle = <0xa2>; | |
| mscl,int_qos_minlock = <0x518b0>; | |
| clock-names = "gate\0gate2"; | |
| clocks = <0x14 0x277 0x14 0x28b>; | |
| samsung,power-domain = <0xa5>; | |
| interrupts = <0x00 0x1ab 0x00>; | |
| reg = <0x15010000 0x1300>; | |
| #pb-id-cells = <0x00>; | |
| compatible = "samsung,exynos5-scaler"; | |
| }; | |
| scaler@0x150000000 { | |
| phandle = <0xa1>; | |
| linux,phandle = <0xa1>; | |
| mscl,int_qos_minlock = <0x518b0>; | |
| clock-names = "gate\0gate2"; | |
| clocks = <0x14 0x276 0x14 0x28a>; | |
| samsung,power-domain = <0xa4>; | |
| interrupts = <0x00 0x1aa 0x00>; | |
| reg = <0x15000000 0x1300>; | |
| #pb-id-cells = <0x00>; | |
| compatible = "samsung,exynos5-scaler"; | |
| }; | |
| }; | |
| iommu-domain_g2d { | |
| domain-clients = <0x9f>; | |
| ranges; | |
| #size-cells = <0x01>; | |
| #address-cells = <0x01>; | |
| compatible = "samsung,exynos-iommu-bus"; | |
| sysmmu@0x15160000 { | |
| sysmmu,block-when-stop; | |
| clock-names = "aclk\0pclk"; | |
| clocks = <0x14 0x5e1 0x14 0x5e2>; | |
| qos = <0x04>; | |
| interrupts = <0x00 0x1b3 0x00>; | |
| reg = <0x15160000 0x1000>; | |
| compatible = "samsung,exynos7420-sysmmu"; | |
| pb-info { | |
| pb@0 { | |
| master_axi_id_list = <0x9f>; | |
| }; | |
| }; | |
| }; | |
| fimg2d@15100000 { | |
| phandle = <0x9f>; | |
| linux,phandle = <0x9f>; | |
| samsung,power-domain = <0xa0>; | |
| ip_ver = <0x09>; | |
| clock-names = "gate\0gate2"; | |
| clocks = <0x14 0x2cb 0x14 0x2d0>; | |
| interrupts = <0x00 0x1b5 0x00>; | |
| reg = <0x15100000 0x1000>; | |
| #size-cells = <0x01>; | |
| #address-cells = <0x01>; | |
| #pb-id-cells = <0x00>; | |
| compatible = "samsung,s5p-fimg2d"; | |
| g2d_qos_table { | |
| g2d_qos_variant_4 { | |
| freq_kfc = <0x7a120>; | |
| freq_cpu = <0x00>; | |
| freq_mif = <0x84918>; | |
| freq_int = <0x518b0>; | |
| }; | |
| g2d_qos_variant_3 { | |
| freq_kfc = "\0\f5"; | |
| freq_cpu = <0x00>; | |
| freq_mif = <0x84918>; | |
| freq_int = <0x518b0>; | |
| }; | |
| g2d_qos_variant_2 { | |
| freq_kfc = "\0\f5"; | |
| freq_cpu = <0x00>; | |
| freq_mif = <0x84918>; | |
| freq_int = <0x518b0>; | |
| }; | |
| g2d_qos_variant_1 { | |
| freq_kfc = "\0\f5"; | |
| freq_cpu = <0x00>; | |
| freq_mif = <0xca260>; | |
| freq_int = <0x61a80>; | |
| }; | |
| g2d_qos_variant_0 { | |
| freq_kfc = <0x16e360>; | |
| freq_cpu = <0x16e360>; | |
| freq_mif = <0xca260>; | |
| freq_int = <0x88b80>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| amba { | |
| ranges; | |
| interrupt-parent = <0x01>; | |
| compatible = "arm,amba-bus"; | |
| #size-cells = <0x01>; | |
| #address-cells = <0x01>; | |
| adma@11420000 { | |
| phandle = <0xb9>; | |
| linux,phandle = <0xb9>; | |
| status = "ok"; | |
| samsung,lpass-subip; | |
| #dma-mcode-addr = <0x3047000>; | |
| #dma-requests = <0x10>; | |
| #dma-channels = <0x08>; | |
| #dma-cells = <0x01>; | |
| clock-names = "apb_pclk"; | |
| clocks = <0x14 0x190>; | |
| interrupts = <0x00 0x61 0x00>; | |
| reg = <0x11420000 0x1000>; | |
| compatible = "arm,pl330\0arm,primecell"; | |
| }; | |
| pdma1@10EB0000 { | |
| #dma-requests = <0x20>; | |
| #dma-channels = <0x08>; | |
| #dma-cells = <0x01>; | |
| clock-names = "apb_pclk"; | |
| clocks = <0x14 0xb8>; | |
| interrupts = <0x00 0xe2 0x00>; | |
| reg = <0x10eb0000 0x1000>; | |
| compatible = "arm,pl330\0arm,primecell"; | |
| }; | |
| pdma0@10E10000 { | |
| phandle = <0x29>; | |
| linux,phandle = <0x29>; | |
| #dma-requests = <0x20>; | |
| #dma-channels = <0x08>; | |
| #dma-cells = <0x01>; | |
| clock-names = "apb_pclk"; | |
| clocks = <0x14 0xb7>; | |
| interrupts = <0x00 0xe1 0x00>; | |
| reg = <0x10e10000 0x1000>; | |
| compatible = "arm,pl330\0arm,primecell"; | |
| }; | |
| }; | |
| iommu-domain_disp0 { | |
| domain-clients = <0x99 0x9a 0x9b 0x9c 0x9d 0x9e>; | |
| ranges; | |
| #size-cells = <0x01>; | |
| #address-cells = <0x01>; | |
| compatible = "samsung,exynos-iommu-bus"; | |
| sysmmu@0x13E30000 { | |
| sysmmu,block-when-stop; | |
| clock-names = "aclk\0pclk"; | |
| clocks = <0x14 0x5f8 0x14 0x5fa>; | |
| qos = <0x0f>; | |
| interrupts = <0x00 0x103 0x00>; | |
| reg = <0x13e30000 0x1000>; | |
| compatible = "samsung,exynos7420-sysmmu"; | |
| pb-info { | |
| pb@0 { | |
| master_axi_id_list = <0x9d 0x00 0x01 0x02 0x03 0x9e 0x00 0x01 0x02 0x03>; | |
| }; | |
| }; | |
| }; | |
| sysmmu@0x13E20000 { | |
| sysmmu,block-when-stop; | |
| clock-names = "aclk\0pclk"; | |
| clocks = <0x14 0x5f7 0x14 0x5f9>; | |
| qos = <0x0f>; | |
| interrupts = <0x00 0x100 0x00>; | |
| reg = <0x13e20000 0x1000>; | |
| compatible = "samsung,exynos7420-sysmmu"; | |
| pb-info { | |
| pb@0 { | |
| master_axi_id_list = <0x9b 0x00 0x01 0x02 0x03 0x9c 0x00 0x01 0x02 0x03>; | |
| }; | |
| }; | |
| }; | |
| sysmmu@0x13A10000 { | |
| sysmmu,block-when-stop; | |
| clock-names = "aclk\0pclk"; | |
| clocks = <0x14 0x5e4 0x14 0x5e6>; | |
| qos = <0x0f>; | |
| interrupts = <0x00 0xb3 0x00>; | |
| reg = <0x13a10000 0x1000>; | |
| compatible = "samsung,exynos7420-sysmmu"; | |
| pb-info { | |
| pb@0 { | |
| master_axi_id_list = <0x99 0x00 0x01 0x8000 0x8001 0x9a 0x00 0x01 0x8000 0x8001>; | |
| }; | |
| }; | |
| }; | |
| sysmmu@0x13A00000 { | |
| sysmmu,block-when-stop; | |
| clock-names = "aclk\0pclk"; | |
| clocks = <0x14 0x5e3 0x14 0x5e5>; | |
| qos = <0x0f>; | |
| interrupts = <0x00 0xb0 0x00>; | |
| reg = <0x13a00000 0x1000>; | |
| compatible = "samsung,exynos7420-sysmmu"; | |
| pb-info { | |
| pb@0 { | |
| master_axi_id_list = <0x99 0x00 0x01 0x10000 0x10000 0x9a 0x00 0x01 0x10000 0x10000>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| iommu-domain_fimc-is { | |
| domain-clients = <0x95 0x96 0x97 0x98>; | |
| ranges; | |
| #size-cells = <0x01>; | |
| #address-cells = <0x01>; | |
| compatible = "samsung,exynos-iommu-bus"; | |
| sysmmu@0x141D0000 { | |
| sysmmu,block-when-stop; | |
| qos = <0x05>; | |
| interrupts = <0x00 0x98 0x00>; | |
| samsung,power-domain = <0x94>; | |
| reg = <0x141d0000 0x1000>; | |
| compatible = "samsung,exynos7420-sysmmu"; | |
| pb-info { | |
| pb@0 { | |
| master_axi_id_list = <0x95 0x10000 0x10000 0x10000 0x10000 0x10000 0x10000>; | |
| }; | |
| }; | |
| }; | |
| sysmmu@0x14280000 { | |
| sysmmu,block-when-stop; | |
| qos = <0x04>; | |
| interrupts = <0x00 0x12f 0x00>; | |
| samsung,power-domain = <0x94>; | |
| reg = <0x14280000 0x1000>; | |
| compatible = "samsung,exynos7420-sysmmu"; | |
| pb-info { | |
| pb@1 { | |
| master_axi_id_list = <0x95 0x8000 0x8001 0x8002 0x10000 0x10000 0x10000>; | |
| }; | |
| pb@0 { | |
| master_axi_id_list = <0x95 0x00 0x01 0x10000 0x10000 0x10000 0x10000>; | |
| }; | |
| }; | |
| }; | |
| sysmmu@0x14270000 { | |
| sysmmu,block-when-stop; | |
| qos = <0x04>; | |
| interrupts = <0x00 0x12d 0x00>; | |
| samsung,power-domain = <0x94>; | |
| reg = <0x14270000 0x1000>; | |
| compatible = "samsung,exynos7420-sysmmu"; | |
| pb-info { | |
| pb@0 { | |
| master_axi_id_list = <0x95 0x00 0x8000 0x8001 0x8002 0x10000 0x10000>; | |
| }; | |
| }; | |
| }; | |
| sysmmu@0x141E0000 { | |
| sysmmu,block-when-stop; | |
| qos = <0x04>; | |
| interrupts = <0x00 0x94 0x00>; | |
| samsung,power-domain = <0x94>; | |
| reg = <0x141e0000 0x1000>; | |
| compatible = "samsung,exynos7420-sysmmu"; | |
| pb-info { | |
| pb@0 { | |
| master_axi_id_list = <0x95 0x00 0x8000 0x8001 0x10000 0x10000 0x10000>; | |
| }; | |
| }; | |
| }; | |
| sysmmu@0x141C0000 { | |
| sysmmu,block-when-stop; | |
| samsung,power-domain = <0x94>; | |
| qos = <0x04>; | |
| interrupts = <0x00 0x96 0x00>; | |
| reg = <0x141c0000 0x1000>; | |
| compatible = "samsung,exynos7420-sysmmu"; | |
| pb-info { | |
| pb@0 { | |
| master_axi_id_list = <0x95 0x00 0x01 0x8000 0x8001 0x10000 0x10000>; | |
| }; | |
| }; | |
| }; | |
| sysmmu@0x141B0000 { | |
| sysmmu,block-when-stop; | |
| samsung,power-domain = <0x94>; | |
| qos = <0x04>; | |
| interrupts = <0x00 0x9c 0x00>; | |
| reg = <0x141b0000 0x1000>; | |
| compatible = "samsung,exynos7420-sysmmu"; | |
| pb-info { | |
| pb@0 { | |
| master_axi_id_list = <0x95 0x8000 0x8001 0x8002 0x10000 0x10000 0x10000>; | |
| }; | |
| }; | |
| }; | |
| sysmmu@0x141A0000 { | |
| sysmmu,block-when-stop; | |
| samsung,power-domain = <0x8f>; | |
| qos = <0x04>; | |
| interrupts = <0x00 0x9a 0x00>; | |
| reg = <0x141a0000 0x1000>; | |
| compatible = "samsung,exynos7420-sysmmu"; | |
| pb-info { | |
| pb@0 { | |
| master_axi_id_list = <0x98 0x8000 0x8001 0x8002>; | |
| }; | |
| }; | |
| }; | |
| sysmmu@0x140E0000 { | |
| sysmmu,block-when-stop; | |
| samsung,power-domain = <0x8f>; | |
| qos = <0x0f>; | |
| interrupts = <0x00 0x81 0x00>; | |
| reg = <0x140e0000 0x1000>; | |
| compatible = "samsung,exynos7420-sysmmu"; | |
| pb-info { | |
| pb@2 { | |
| master_axi_id_list = <0x96 0x8000 0x8001 0x8002 0x97 0x8000 0x8001 0x8002>; | |
| }; | |
| pb@1 { | |
| master_axi_id_list = <0x95 0x04 0x8004 0x800c 0x8014 0x10000 0x10000>; | |
| }; | |
| pb@0 { | |
| master_axi_id_list = <0x95 0x03 0x8003 0x800b 0x8013 0x801b 0x8023>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| fimc_is@14200000 { | |
| phandle = <0x95>; | |
| linux,phandle = <0x95>; | |
| total_camera_num = <0x02>; | |
| pinctrl-1; | |
| check_sensor_vendor; | |
| use_ois; | |
| use_ois_hsi2c; | |
| use_module_check; | |
| front_sensor_id = <0x15>; | |
| rear_sensor_id = <0x68>; | |
| clk_gate_strs = "gate_3aa1\0gate_isp\0gate_drc\0gate_scalerc\0gate_dis\0gate_3dnr\0gate_scalerp\0gate_fd\0gate_3aa0"; | |
| clk_gate_enums = <0x00 0x01 0x02 0x03 0x05 0x06 0x07 0x08 0x09>; | |
| status = "ok"; | |
| samsung,power-domain = <0x94>; | |
| clock-names = "oscclk\0mout_isp_pll\0mout_isp_pll_ctrl\0mout_cam_pll_ctrl\0mout_aud_pll\0mout_top0_mfc_pll\0mout_top0_cci_pll\0mout_top0_bus1_pll\0mout_top0_bus0_pll\0isp_pll\0cam_pll\0bus0_pll\0bus1_pll\0cci_pll\0mfc_pll\0aud_pll\0dout_aclk_isp0_isp0_590\0dout_aclk_isp0_tpu_590\0dout_aclk_isp0_trex_532\0dout_aclk_isp1_isp1_468\0dout_aclk_isp1_ahb_117\0dout_aclk_cam0_csis0_690\0dout_aclk_cam0_bnsa_690\0dout_aclk_cam0_bnsb_690\0dout_aclk_cam0_bnsd_690\0dout_aclk_cam0_csis1_174\0dout_aclk_cam0_3aa0_690\0dout_aclk_cam0_3aa1_468\0dout_aclk_cam0_trex_532\0dout_aclk_cam0_nocp_133\0dout_aclk_cam1_sclvra_491\0dout_aclk_cam1_arm_668\0dout_aclk_cam1_busperi_334\0dout_aclk_cam1_bnscsis_133\0dout_aclk_cam1_nocp_133\0dout_aclk_cam1_trex_532\0dout_sclk_isp_spi0\0dout_sclk_isp_spi1\0dout_sclk_isp_uart\0mout_aclk_isp0_isp0_590\0mout_aclk_isp0_tpu_590\0mout_aclk_isp0_trex_532\0mout_aclk_isp1_isp1_468\0mout_aclk_isp0_ahb_117\0mout_aclk_cam0_csis0_690\0mout_aclk_cam0_bnsa_690\0mout_aclk_cam0_bnsb_690\0mout_aclk_cam0_bnsd_690\0mout_aclk_cam0_csis1_174\0mout_aclk_cam0_3aa0_690\0mout_aclk_cam0_3aa1_468\0mout_aclk_cam0_trex_532\0mout_aclk_cam0_nocp_133\0mout_aclk_cam1_sclvra_491\0mout_aclk_cam1_arm_668\0mout_aclk_cam1_busperi_334\0mout_aclk_cam1_bnscsis_133\0mout_aclk_cam1_nocp_133\0mout_aclk_cam1_trex_532\0mout_sclk_isp_spi0\0mout_sclk_isp_spi1\0mout_sclk_isp_uart\0gate_aclk_csis0_i_wrap\0gate_aclk_fimc_bns_a\0gate_aclk_trex_a_5x1_bns_a\0gate_pclk_fimc_bns_a\0gate_cclk_asyncapb_socp_fimc_bns_a\0gate_aclk_fimc_bns_b\0gate_aclk_trex_a_5x1_bns_b\0gate_pclk_fimc_bns_b\0gate_cclk_asyncapb_socp_fimc_bns_b\0gate_aclk_fimc_bns_d\0gate_aclk_trex_a_5x1_bns_d\0gate_pclk_fimc_bns_d\0gate_cclk_asyncapb_socp_fimc_bns_d\0gate_aclk_csis1_i_wrap\0gate_aclk_csis3_i_wrap\0gate_aclk_fimc_3aa0\0gate_aclk_trex_a_5x1_aa0\0gate_aclk_pxl_asbs_fimc_bns_c\0gate_aclk_pxl_asbs_3aa0_in\0gate_pclk_fimc_3aa0\0gate_cclk_asyncapb_socp_3aa0\0gate_aclk_fimc_3aa1\0gate_aclk_trex_a_5x1_aa1\0gate_aclk_pxl_asbs_3aa1_in\0gate_pclk_fimc_3aa1\0gate_cclk_asyncapb_socp_3aa1\0gate_aclk_trex_a_5x1\0gate_aclk_axi_lh_async_si_top_cam0\0gate_pclk_csis0\0gate_pclk_csis1\0gate_pclk_csis3\0gate_aclk_axi2apb_bridge_is0p\0gate_pclk_asyncapb_socp_3aa0\0gate_pclk_asyncapb_socp_3aa1\0gate_pclk_asyncapb_socp_fimc_bns_a\0gate_pclk_asyncapb_socp_fimc_bns_b\0gate_pclk_asyncapb_socp_fimc_bns_d\0gate_pclk_freeruncnt\0gate_aclk_xiu_is0x\0gate_aclk_axi2ahb_is0p\0gate_hclk_ahbsyncdn_cam0\0gate_aclk_xiu_async_mi_cam0\0gate_pclk_xiu_async_mi_cam0\0gate_aclk_xiu_async_mi_is0x\0gate_pclk_xiu_async_mi_is0x\0gate_pclk_pmu_cam0\0gate_hclk_ahb2apb_bridge_is0p\0gate_pclk_trex_a_5x1\0gate_aclk_pxl_asbs_fimc_bns_c_int\0gate_aclk_pxl_asbm_fimc_bns_c_int\0gate_aclk_200_cam0_noc_p_cam0\0gate_aclk_xiu_async_si_is0x\0gate_user_phyclk_rxbyteclkhs0_s2a\0gate_user_phyclk_rxbyteclkhs0_s4\0gate_user_phyclk_rxbyteclkhs1_s4\0gate_user_phyclk_rxbyteclkhs2_s4\0gate_user_phyclk_rxbyteclkhs3_s4\0gate_aclk_fimc_scaler\0gate_aclk_fimc_vra\0gate_aclk_pxl_asbs_from_blkc\0gate_clk_fimc_scaler\0gate_clk_fimc_vra\0gate_clk_scaler_trex_b\0gate_clk_vra_trex_b\0gate_pclk_fimc_scaler\0gate_pclk_fimc_vra\0gate_cclk_asyncapb_socp_fimc_scaler\0gate_cclk_asyncapb_socp_fimc_vra_s0\0gate_cclk_asyncapb_socp_fimc_vra_s1\0gate_aclk_xiu_n_async_si_cortex\0gate_clk_mcu_isp_400_isp_arm_sys\0gate_atclks_asatbslv_cam1_cssys\0gate_pclkdbg_asapbmst_cssys_cam1\0gate_clk_csatbdownsizer_cam1\0gate_aclk_axi2apb_bridge_is3p\0gate_aclk_axispcx, gate_aclk_axisphx\0gate_aclk_gic_isp_arm_sys\0gate_aclk_r_axispcx\0gate_aclk_r_axisphx\0gate_aclk_xiu_ispx_1x4\0gate_aclk_xiu_n_async_mi_cortex\0gate_aclk_xiu_n_async_si_cam1\0gate_aclk_xiu_n_async_si_to_blkc\0gate_aclk_xiu_n_async_si_to_blkd\0gate_clk_isp_cpu_trex_b\0gate_hclk_ahbsyncdn_isp_peri\0gate_hclk_ahbsyncdn_isp2h\0gate_hclkm_asyncahb_cam1\0gate_pclk_asyncapb_socp_fimc_bns_c\0gate_pclk_asyncapb_socp_fimc_scaler\0gate_pclk_asyncapb_socp_fimc_vra_s0\0gate_pclk_asyncapb_socp_fimc_vra_s1\0gate_pclk_csis2\0gate_pclk_fimc_is_b_glue\0gate_pclk_xiu_n_async_mi_cortex\0gate_hclk_ahb_sfrisp2h\0gate_hclk_ahb2apb_bridge_is3p\0gate_hclk_ahb2apb_bridge_is5p\0gate_hclk_asyncahbslave_to_blkc\0gate_hclk_asyncahbslave_to_blkd\0gate_pclk_i2c0_isp\0gate_pclk_i2c1_isp\0gate_pclk_i2c2_isp\0gate_pclk_mcuctl_isp\0gate_pclk_mpwm_isp\0gate_pclk_mtcadc_isp\0gate_pclk_pwm_isp\0gate_pclk_spi0_isp\0gate_pclk_spi1_isp\0gate_pclk_trex_b\0gate_pclk_uart_isp\0gate_pclk_wdt_isp\0gate_pclk_xiu_n_async_mi_from_blkd\0gate_pclk_pmu_cam1\0gate_sclk_isp_pwm\0gate_sclk_isp_mpwm\0gate_pclk_fimc_bns_c\0gate_aclk_fimc_bns_c\0gate_cclk_asyncapb_socp_fimc_bns_c\0gate_clk_bns_c_trex_b\0gate_aclk_wrap_csis2\0gate_clk_133_cam1_noc_p_cam1\0gate_hclks_asyncahb_cam1\0gate_clk_axlh_async_si_top_cam1\0gate_aclk_xiu_n_async_mi_from_blkd\0gate_clk_b_trex_b\0gate_user_sclk_isp_spi0\0gate_user_sclk_isp_spi1\0gate_user_sclk_isp_uart\0gate_sclk_isp_mtcadc\0gate_sclk_i2c0_isp\0gate_sclk_i2c1_isp\0gate_sclk_i2c2_isp\0gate_user_phyclk_rxbyteclkhs0_s2b\0gate_clk_isp0_trex_c\0gate_aclk_isp_v4\0gate_clk_isp_v4\0gate_clk_pxl_asb_s_in\0gate_cclk_asyncapb_isp\0gate_pclk_isp_v4\0gate_clk_tpu_trex_c\0gate_aclk_tpu_v1\0gate_clk_tpu_v1\0gate_cclk_asyncapb_tpu\0gate_pclk_tpu_v1\0gate_clk_axi_lh_async_si_top_isp0\0gate_clk_c_trex_c\0gate_pclk_asyncapb_isp\0gate_pclk_asyncapb_tpu\0gate_aclk_axi2apb_bridge\0gate_aclk_xiu_async_m \0gate_pclk_pmu_isp0\0gate_hclk_ahb2apb_bridge\0gate_pclk_trex_c\0gate_hclkm_ahb_async_m\0gate_aclk_fimc_isp1\0gate_clk_fimc_isp1\0gate_aclk_pxl_asbs\0gate_aclk_xiu_n_async_si\0gate_pclk_fimc_isp1\0gate_aclk_xiu_n_async_mi\0gate_aclk_axi2apb_bridge_is2p\0gate_hclk_ahb2apb_bridge_is2p\0gate_hclkm_asyncahbmaster\0gate_pclk_pmu_isp1\0mout_user_mux_aclk_cam0_csis0_690\0mout_user_mux_aclk_cam0_bnsa_690\0mout_user_mux_aclk_cam0_bnsb_690\0mout_user_mux_aclk_cam0_bnsd_690\0mout_user_mux_aclk_cam0_csis1_174\0mout_user_mux_aclk_cam0_3aa0_690\0mout_user_mux_aclk_cam0_3aa1_468\0mout_user_mux_aclk_cam0_trex_532\0mout_user_mux_aclk_cam0_csis3_133\0mout_user_mux_aclk_cam0_nocp_133\0mout_user_mux_phyclk_rxbyteclkhs0_s2a\0mout_user_mux_phyclk_rxbyteclkhs0_s4\0mout_user_mux_phyclk_rxbyteclkhs1_s4\0mout_user_mux_phyclk_rxbyteclkhs2_s4\0mout_user_mux_phyclk_rxbyteclkhs3_s4\0mout_user_mux_aclk_cam1_sclvra_491\0mout_user_mux_aclk_cam1_arm_668\0mout_user_mux_aclk_cam1_busperi_334\0mout_user_mux_aclk_cam1_bnscsis_133\0mout_user_mux_aclk_cam1_nocp_133\0mout_user_mux_aclk_cam1_trex_532\0mout_user_mux_sclk_isp_spi0\0mout_user_mux_sclk_isp_spi1\0mout_user_mux_sclk_isp_uart\0mout_user_mux_phyclk_hs0_csis2_rx_byte\0mout_user_mux_aclk_isp0_isp0_590\0mout_user_mux_aclk_isp0_tpu_590\0mout_user_mux_aclk_isp0_trex_532\0mout_user_mux_aclk_isp1_isp1_468\0mout_user_mux_aclk_isp1_ahb_117\0dout_clkdiv_pclk_cam0_bnsa_345\0dout_clkdiv_pclk_cam0_bnsb_345\0dout_clkdiv_pclk_cam0_bnsd_345\0dout_clkdiv_pclk_cam0_3aa0_345\0dout_clkdiv_pclk_cam0_3aa1_234\0dout_clkdiv_pclk_cam0_trex_266\0dout_clkdiv_pclk_cam0_trex_133\0dout_clkdiv_pclk_cam1_sclvra_246\0dout_clkdiv_pclk_cam1_arm_167\0dout_clkdiv_pclk_cam1_busperi_167\0dout_clkdiv_pclk_cam1_busperi_84\0dout_clkdiv_pclk_isp0_isp0_295\0dout_clkdiv_pclk_isp0_tpu_295\0dout_clkdiv_pclk_isp0_trex_266\0dout_clkdiv_pclk_isp0_trex_133\0dout_clkdiv_pclk_isp1_isp1_234\0aclk_isp0_isp0_590\0aclk_isp0_tpu_590\0aclk_isp0_trex_532\0aclk_isp1_isp1_468\0aclk_isp1_ahb_117\0aclk_cam0_csis0_690\0aclk_cam0_bnsa_690\0aclk_cam0_bnsb_690\0aclk_cam0_bnsd_690\0aclk_cam0_csis1_174\0aclk_cam0_csis3_133\0aclk_cam0_3aa0_690\0aclk_cam0_3aa1_468\0aclk_cam0_trex_532\0aclk_cam0_nocp_133\0aclk_cam1_sclvra_491\0aclk_cam1_arm_668\0aclk_cam1_busperi_334\0aclk_cam1_bnscsis_133\0aclk_cam1_nocp_133\0aclk_cam1_trex_532\0sclk_isp_spi0\0sclk_isp_spi1\0sclk_isp_uart\0phyclk_rxbyteclkhs0_s2a\0phyclk_rxbyteclkhs0_s4\0phyclk_rxbyteclkhs1_s4\0phyclk_rxbyteclkhs2_s4\0phyclk_rxbyteclkhs3_s4\0phyclk_hs0_csis2_rx_byte\0gate_aclk_lh_cam0\0gate_aclk_lh_cam1\0gate_aclk_lh_isp\0gate_aclk_noc_bus0_nrt"; | |
| clocks = <0x14 0x01 0x14 0x0c 0x14 0x1a 0x14 0x1b 0x14 0x1c 0x14 0x1d 0x14 0x1e 0x14 0x1f 0x14 0x20 0x14 0x23 0x14 0x24 0x14 0x25 0x14 0x26 0x14 0x27 0x14 0x28 0x14 0x29 0x14 0x7d0 0x14 0x7d1 0x14 0x7d2 0x14 0x7d5 0x14 0x7d6 0x14 0x7da 0x14 0x7db 0x14 0x7dc 0x14 0x7dd 0x14 0x7de 0x14 0x7df 0x14 0x7e0 0x14 0x7e1 0x14 0x7e2 0x14 0x7e4 0x14 0x7e5 0x14 0x7e6 0x14 0x7e7 0x14 0x7e8 0x14 0x7e9 0x14 0x7ee 0x14 0x7ef 0x14 0x7f0 0x14 0x7f3 0x14 0x7f4 0x14 0x7f5 0x14 0x7f8 0x14 0x7f9 0x14 0x7fd 0x14 0x7fe 0x14 0x7ff 0x14 0x800 0x14 0x801 0x14 0x802 0x14 0x803 0x14 0x804 0x14 0x805 0x14 0x807 0x14 0x808 0x14 0x809 0x14 0x80a 0x14 0x80b 0x14 0x80c 0x14 0x811 0x14 0x812 0x14 0x813 0x14 0xbbd 0x14 0xbc2 0x14 0xbc3 0x14 0xbc7 0x14 0xbc8 0x14 0xbcc 0x14 0xbcd 0x14 0xbd1 0x14 0xbd2 0x14 0xbd6 0x14 0xbd7 0x14 0xbdb 0x14 0xbdc 0x14 0xbe0 0x14 0xbe1 0x14 0xbe5 0x14 0xbe6 0x14 0xbe7 0x14 0xbe8 0x14 0xbea 0x14 0xbeb 0x14 0xbef 0x14 0xbf0 0x14 0xbf1 0x14 0xbf4 0x14 0xbf5 0x14 0xbf9 0x14 0xbfa 0x14 0xbfe 0x14 0xbff 0x14 0xc00 0x14 0xc01 0x14 0xc02 0x14 0xc03 0x14 0xc04 0x14 0xc05 0x14 0xc06 0x14 0xc07 0x14 0xc08 0x14 0xc09 0x14 0xc0a 0x14 0xc0b 0x14 0xc0c 0x14 0xc0d 0x14 0xc0e 0x14 0xc0f 0x14 0xc10 0x14 0xc11 0x14 0xc12 0x14 0xc13 0x14 0xc17 0x14 0xc18 0x14 0xc19 0x14 0xc1a 0x14 0xc1b 0x14 0xc1c 0x14 0xc1d 0x14 0xc21 0x14 0xc22 0x14 0xc23 0x14 0xc24 0x14 0xc25 0x14 0xc26 0x14 0xc27 0x14 0xc2b 0x14 0xc2c 0x14 0xc2d 0x14 0xc2e 0x14 0xc2f 0x14 0xc30 0x14 0xc31 0x14 0xc35 0x14 0xc36 0x14 0xc37 0x14 0xc3a 0x14 0xc3b 0x14 0xc3c 0x14 0xc3d 0x14 0xc3e 0x14 0xc3f 0x14 0xc40 0x14 0xc41 0x14 0xc42 0x14 0xc43 0x14 0xc44 0x14 0xc45 0x14 0xc46 0x14 0xc47 0x14 0xc4e 0x14 0xc4f 0x14 0xc50 0x14 0xc51 0x14 0xc52 0x14 0xc53 0x14 0xc54 0x14 0xc5d 0x14 0xc5e 0x14 0xc5f 0x14 0xc60 0x14 0xc61 0x14 0xc62 0x14 0xc63 0x14 0xc64 0x14 0xc65 0x14 0xc66 0x14 0xc67 0x14 0xc68 0x14 0xc69 0x14 0xc6a 0x14 0xc6b 0x14 0xc6c 0x14 0xc6d 0x14 0xc6e 0x14 0xc6f 0x14 0xc70 0x14 0xc71 0x14 0xc76 0x14 0xc77 0x14 0xc78 0x14 0xc79 0x14 0xc7a 0x14 0xc80 0x14 0xc81 0x14 0xc85 0x14 0xc86 0x14 0xc87 0x14 0xc88 0x14 0xc89 0x14 0xc8a 0x14 0xc8b 0x14 0xc8c 0x14 0xc8d 0x14 0xc8e 0x14 0xc8f 0x14 0xc94 0x14 0xc95 0x14 0xc96 0x14 0xc97 0x14 0xc99 0x14 0xc9a 0x14 0xc9e 0x14 0xc9f 0x14 0xca0 0x14 0xca3 0x14 0xca4 0x14 0xca8 0x14 0xca9 0x14 0xcad 0x14 0xcae 0x14 0xcaf 0x14 0xcb0 0x14 0xcb1 0x14 0xcb7 0x14 0xcb8 0x14 0xcb9 0x14 0xcbc 0x14 0xcbd 0x14 0xcbe 0x14 0xcbf 0x14 0xcc1 0x14 0xcc2 0x14 0xcc3 0x14 0xcc6 0x14 0xcc7 0x14 0xcc8 0x14 0xccb 0x14 0xccc 0x14 0xccd 0x14 0xcce 0x14 0xccf 0x14 0xcd0 0x14 0xcd1 0x14 0xcd2 0x14 0xcd3 0x14 0xcd4 0x14 0xcd5 0x14 0xcd6 0x14 0xcd7 0x14 0xcd8 0x14 0xcd9 0x14 0xcda 0x14 0xcdb 0x14 0xcdc 0x14 0xcdd 0x14 0xcde 0x14 0xcdf 0x14 0xce0 0x14 0xce1 0x14 0xce2 0x14 0xce3 0x14 0xce4 0x14 0xce5 0x14 0xce6 0x14 0xce7 0x14 0xce8 0x14 0xce9 0x14 0xcea 0x14 0xceb 0x14 0xcec 0x14 0xced 0x14 0xcee 0x14 0xcef 0x14 0xcf3 0x14 0xcf4 0x14 0xcf5 0x14 0xcf6 0x14 0xcf8 0x14 0xcf9 0x14 0xcfa 0x14 0xcfb 0x14 0xcfc 0x14 0xcfd 0x14 0xcfe 0x14 0xcff 0x14 0xd02 0x14 0xd03 0x14 0xd07 0x14 0xd08 0x14 0xd09 0x14 0xd0a 0x14 0xd0b 0x14 0xd0c 0x14 0xd0d 0x14 0xd0e 0x14 0xd0f 0x14 0xd10 0x14 0xd11 0x14 0xd12 0x14 0xd13 0x14 0xd14 0x14 0xd15 0x14 0xd16 0x14 0xd1b 0x14 0xd1c 0x14 0xd1d 0x14 0xd20 0x14 0xd21 0x14 0xd22 0x14 0xd23 0x14 0xd24 0x14 0xd25 0x14 0xd2a 0x14 0xd2b 0x14 0xd2c 0x14 0xd2d>; | |
| pinctrl-0 = <0x90 0x91 0x92 0x93>; | |
| pinctrl-names = "default\0release"; | |
| interrupts = <0x00 0xab 0x00 0x00 0xac 0x00>; | |
| reg = <0x14370000 0x10000>; | |
| #pb-id-cells = <0x06>; | |
| compatible = "samsung,exynos5-fimc-is"; | |
| fimc_is_dvfs { | |
| table2 { | |
| max_i2c = <0x00>; | |
| max_mif = <0x163780>; | |
| max_cam = <0x83d60>; | |
| max_int = <0x88b80>; | |
| video_high_speed_240fps_i2c = <0x00>; | |
| video_high_speed_240fps_mif = <0x163780>; | |
| video_high_speed_240fps_cam = <0x7c830>; | |
| video_high_speed_240fps_int = <0x86470>; | |
| video_high_speed_120fps_i2c = <0x00>; | |
| video_high_speed_120fps_mif = <0x104be0>; | |
| video_high_speed_120fps_cam = <0x7c830>; | |
| video_high_speed_120fps_int = <0x83d60>; | |
| video_high_speed_60fps_i2c = <0x00>; | |
| video_high_speed_60fps_mif = <0xca260>; | |
| video_high_speed_60fps_cam = <0x81650>; | |
| video_high_speed_60fps_int = <0x83d60>; | |
| preview_high_speed_fps_i2c = <0x00>; | |
| preview_high_speed_fps_mif = <0xca260>; | |
| preview_high_speed_fps_cam = <0x7c830>; | |
| preview_high_speed_fps_int = <0x83d60>; | |
| dual_video_capture_i2c = <0x00>; | |
| dual_video_capture_mif = <0xca260>; | |
| dual_video_capture_cam = <0x7ef40>; | |
| dual_video_capture_int = <0x7c830>; | |
| dual_video_i2c = <0x00>; | |
| dual_video_mif = <0xca260>; | |
| dual_video_cam = <0x7ef40>; | |
| dual_video_int = <0x7c830>; | |
| dual_capture_i2c = <0x00>; | |
| dual_capture_mif = <0xca260>; | |
| dual_capture_cam = <0x7ef40>; | |
| dual_capture_int = <0x83d60>; | |
| dual_preview_i2c = <0x00>; | |
| dual_preview_mif = <0xca260>; | |
| dual_preview_cam = <0x7ef40>; | |
| dual_preview_int = <0x83d60>; | |
| rear_video_uhd_capture_i2c = <0x00>; | |
| rear_video_uhd_capture_mif = <0xca260>; | |
| rear_video_uhd_capture_cam = <0x81650>; | |
| rear_video_uhd_capture_int = <0x86470>; | |
| rear_video_whd_capture_i2c = <0x00>; | |
| rear_video_whd_capture_mif = <0xca260>; | |
| rear_video_whd_capture_cam = <0x81650>; | |
| rear_video_whd_capture_int = <0x7c830>; | |
| rear_video_fhd_capture_i2c = <0x00>; | |
| rear_video_fhd_capture_mif = <0xca260>; | |
| rear_video_fhd_capture_cam = <0x81650>; | |
| rear_video_fhd_capture_int = <0x7c830>; | |
| rear_video_uhd_i2c = <0x00>; | |
| rear_video_uhd_mif = <0xca260>; | |
| rear_video_uhd_cam = <0x81650>; | |
| rear_video_uhd_int = <0x86470>; | |
| rear_video_whd_i2c = <0x00>; | |
| rear_video_whd_mif = <0xca260>; | |
| rear_video_whd_cam = <0x81650>; | |
| rear_video_whd_int = <0x7c830>; | |
| rear_video_fhd_i2c = <0x00>; | |
| rear_video_fhd_mif = <0xca260>; | |
| rear_video_fhd_cam = <0x81650>; | |
| rear_video_fhd_int = <0x7c830>; | |
| rear_capture_i2c = <0x00>; | |
| rear_capture_mif = <0xca260>; | |
| rear_capture_cam = <0x81650>; | |
| rear_capture_int = <0x7ef40>; | |
| rear_preview_uhd_i2c = <0x00>; | |
| rear_preview_uhd_mif = <0xca260>; | |
| rear_preview_uhd_cam = <0x81650>; | |
| rear_preview_uhd_int = <0x86470>; | |
| rear_preview_whd_i2c = <0x00>; | |
| rear_preview_whd_mif = <0xca260>; | |
| rear_preview_whd_cam = <0x81650>; | |
| rear_preview_whd_int = <0x7ef40>; | |
| rear_preview_fhd_i2c = <0x00>; | |
| rear_preview_fhd_mif = <0xca260>; | |
| rear_preview_fhd_cam = <0x81650>; | |
| rear_preview_fhd_int = <0x7ef40>; | |
| front_companion_video_whd_capture_i2c = <0x00>; | |
| front_companion_video_whd_capture_mif = <0xca260>; | |
| front_companion_video_whd_capture_cam = <0x7a120>; | |
| front_companion_video_whd_capture_int = <0x81650>; | |
| front_companion_video_capture_i2c = <0x00>; | |
| front_companion_video_capture_mif = <0xca260>; | |
| front_companion_video_capture_cam = <0x7a120>; | |
| front_companion_video_capture_int = <0x81650>; | |
| front_companion_video_whd_i2c = <0x00>; | |
| front_companion_video_whd_mif = <0xca260>; | |
| front_companion_video_whd_cam = <0x7a120>; | |
| front_companion_video_whd_int = <0x81650>; | |
| front_companion_video_i2c = <0x00>; | |
| front_companion_video_mif = <0xca260>; | |
| front_companion_video_cam = <0x7a120>; | |
| front_companion_video_int = <0x81650>; | |
| front_companion_capture_i2c = <0x00>; | |
| front_companion_capture_mif = <0xca260>; | |
| front_companion_capture_cam = <0x7a120>; | |
| front_companion_capture_int = <0x81650>; | |
| front_companion_preview_i2c = <0x00>; | |
| front_companion_preview_mif = <0xca260>; | |
| front_companion_preview_cam = <0x7a120>; | |
| front_companion_preview_int = <0x81650>; | |
| front_vt2_i2c = <0x00>; | |
| front_vt2_mif = <0xca260>; | |
| front_vt2_cam = <0x7a120>; | |
| front_vt2_int = <0x7a120>; | |
| front_vt1_i2c = <0x00>; | |
| front_vt1_mif = <0xca260>; | |
| front_vt1_cam = <0x7a120>; | |
| front_vt1_int = <0x7a120>; | |
| front_video_whd_capture_i2c = <0x00>; | |
| front_video_whd_capture_mif = <0xca260>; | |
| front_video_whd_capture_cam = <0x7a120>; | |
| front_video_whd_capture_int = <0x81650>; | |
| front_video_capture_i2c = <0x00>; | |
| front_video_capture_mif = <0xca260>; | |
| front_video_capture_cam = <0x7a120>; | |
| front_video_capture_int = <0x81650>; | |
| front_video_whd_i2c = <0x00>; | |
| front_video_whd_mif = <0xca260>; | |
| front_video_whd_cam = <0x7a120>; | |
| front_video_whd_int = <0x81650>; | |
| front_video_i2c = <0x00>; | |
| front_video_mif = <0xca260>; | |
| front_video_cam = <0x7a120>; | |
| front_video_int = <0x81650>; | |
| front_capture_i2c = <0x00>; | |
| front_capture_mif = <0xca260>; | |
| front_capture_cam = <0x7a120>; | |
| front_capture_int = <0x81650>; | |
| front_preview_i2c = <0x00>; | |
| front_preview_mif = <0xca260>; | |
| front_preview_cam = <0x7a120>; | |
| front_preview_int = <0x81650>; | |
| default_i2c = <0x00>; | |
| default_mif = <0xca260>; | |
| default_cam = <0x81650>; | |
| default_int = <0x7ef40>; | |
| desc = "processed bayer 16MP version"; | |
| }; | |
| table1 { | |
| max_i2c = <0x00>; | |
| max_mif = <0x163780>; | |
| max_cam = <0x83d60>; | |
| max_int = <0x88b80>; | |
| video_high_speed_240fps_i2c = <0x00>; | |
| video_high_speed_240fps_mif = <0x17ae80>; | |
| video_high_speed_240fps_cam = <0x83d60>; | |
| video_high_speed_240fps_int = <0x88b80>; | |
| video_high_speed_120fps_i2c = <0x00>; | |
| video_high_speed_120fps_mif = <0x163780>; | |
| video_high_speed_120fps_cam = <0x7c830>; | |
| video_high_speed_120fps_int = <0x86470>; | |
| video_high_speed_60fps_i2c = <0x00>; | |
| video_high_speed_60fps_mif = <0xca260>; | |
| video_high_speed_60fps_cam = <0x7c830>; | |
| video_high_speed_60fps_int = <0x86470>; | |
| preview_high_speed_fps_i2c = <0x00>; | |
| preview_high_speed_fps_mif = <0x163780>; | |
| preview_high_speed_fps_cam = <0x83d60>; | |
| preview_high_speed_fps_int = <0x86470>; | |
| dual_video_capture_i2c = <0x00>; | |
| dual_video_capture_mif = <0x163780>; | |
| dual_video_capture_cam = <0x83d60>; | |
| dual_video_capture_int = <0x88b80>; | |
| dual_video_i2c = <0x00>; | |
| dual_video_mif = <0x163780>; | |
| dual_video_cam = <0x83d60>; | |
| dual_video_int = <0x88b80>; | |
| dual_capture_i2c = <0x00>; | |
| dual_capture_mif = <0x163780>; | |
| dual_capture_cam = <0x83d60>; | |
| dual_capture_int = <0x88b80>; | |
| dual_preview_i2c = <0x00>; | |
| dual_preview_mif = <0x163780>; | |
| dual_preview_cam = <0x83d60>; | |
| dual_preview_int = <0x88b80>; | |
| rear_video_uhd_capture_i2c = <0x00>; | |
| rear_video_uhd_capture_mif = <0x163780>; | |
| rear_video_uhd_capture_cam = <0x83d60>; | |
| rear_video_uhd_capture_int = <0x88b80>; | |
| rear_video_whd_capture_i2c = <0x00>; | |
| rear_video_whd_capture_mif = <0x163780>; | |
| rear_video_whd_capture_cam = <0x83d60>; | |
| rear_video_whd_capture_int = <0x88b80>; | |
| rear_video_fhd_capture_i2c = <0x00>; | |
| rear_video_fhd_capture_mif = <0x163780>; | |
| rear_video_fhd_capture_cam = <0x83d60>; | |
| rear_video_fhd_capture_int = <0x88b80>; | |
| rear_video_uhd_i2c = <0x00>; | |
| rear_video_uhd_mif = <0xca260>; | |
| rear_video_uhd_cam = <0x83d60>; | |
| rear_video_uhd_int = <0x88b80>; | |
| rear_video_whd_i2c = <0x00>; | |
| rear_video_whd_mif = <0xca260>; | |
| rear_video_whd_cam = <0x83d60>; | |
| rear_video_whd_int = <0x83d60>; | |
| rear_video_fhd_i2c = <0x00>; | |
| rear_video_fhd_mif = <0xca260>; | |
| rear_video_fhd_cam = <0x83d60>; | |
| rear_video_fhd_int = <0x83d60>; | |
| rear_capture_i2c = <0x00>; | |
| rear_capture_mif = <0x163780>; | |
| rear_capture_cam = <0x83d60>; | |
| rear_capture_int = <0x88b80>; | |
| rear_preview_uhd_i2c = <0x00>; | |
| rear_preview_uhd_mif = <0xca260>; | |
| rear_preview_uhd_cam = <0x83d60>; | |
| rear_preview_uhd_int = <0x88b80>; | |
| rear_preview_whd_i2c = <0x00>; | |
| rear_preview_whd_mif = <0xca260>; | |
| rear_preview_whd_cam = <0x83d60>; | |
| rear_preview_whd_int = <0x86470>; | |
| rear_preview_fhd_i2c = <0x00>; | |
| rear_preview_fhd_mif = <0xca260>; | |
| rear_preview_fhd_cam = <0x83d60>; | |
| rear_preview_fhd_int = <0x86470>; | |
| front_companion_video_whd_capture_i2c = <0x00>; | |
| front_companion_video_whd_capture_mif = <0xca260>; | |
| front_companion_video_whd_capture_cam = <0x7a120>; | |
| front_companion_video_whd_capture_int = <0x81650>; | |
| front_companion_video_capture_i2c = <0x00>; | |
| front_companion_video_capture_mif = <0xca260>; | |
| front_companion_video_capture_cam = <0x7a120>; | |
| front_companion_video_capture_int = <0x81650>; | |
| front_companion_video_whd_i2c = <0x00>; | |
| front_companion_video_whd_mif = <0xca260>; | |
| front_companion_video_whd_cam = <0x7a120>; | |
| front_companion_video_whd_int = <0x81650>; | |
| front_companion_video_i2c = <0x00>; | |
| front_companion_video_mif = <0xca260>; | |
| front_companion_video_cam = <0x7a120>; | |
| front_companion_video_int = <0x81650>; | |
| front_companion_capture_i2c = <0x00>; | |
| front_companion_capture_mif = <0xca260>; | |
| front_companion_capture_cam = <0x7a120>; | |
| front_companion_capture_int = <0x81650>; | |
| front_companion_preview_i2c = <0x00>; | |
| front_companion_preview_mif = <0xca260>; | |
| front_companion_preview_cam = <0x7a120>; | |
| front_companion_preview_int = <0x81650>; | |
| front_vt2_i2c = <0x00>; | |
| front_vt2_mif = <0xca260>; | |
| front_vt2_cam = <0x7a120>; | |
| front_vt2_int = <0x7a120>; | |
| front_vt1_i2c = <0x00>; | |
| front_vt1_mif = <0xca260>; | |
| front_vt1_cam = <0x7a120>; | |
| front_vt1_int = <0x7a120>; | |
| front_video_whd_capture_i2c = <0x00>; | |
| front_video_whd_capture_mif = <0xca260>; | |
| front_video_whd_capture_cam = <0x7a120>; | |
| front_video_whd_capture_int = <0x81650>; | |
| front_video_capture_i2c = <0x00>; | |
| front_video_capture_mif = <0xca260>; | |
| front_video_capture_cam = <0x7a120>; | |
| front_video_capture_int = <0x81650>; | |
| front_video_whd_i2c = <0x00>; | |
| front_video_whd_mif = <0xca260>; | |
| front_video_whd_cam = <0x7a120>; | |
| front_video_whd_int = <0x81650>; | |
| front_video_i2c = <0x00>; | |
| front_video_mif = <0xca260>; | |
| front_video_cam = <0x7a120>; | |
| front_video_int = <0x81650>; | |
| front_capture_i2c = <0x00>; | |
| front_capture_mif = <0xca260>; | |
| front_capture_cam = <0x7a120>; | |
| front_capture_int = <0x81650>; | |
| front_preview_i2c = <0x00>; | |
| front_preview_mif = <0xca260>; | |
| front_preview_cam = <0x7a120>; | |
| front_preview_int = <0x81650>; | |
| default_i2c = <0x00>; | |
| default_mif = <0x163780>; | |
| default_cam = <0x83d60>; | |
| default_int = <0x88b80>; | |
| desc = "Pure bayer Version"; | |
| }; | |
| }; | |
| camera_info1 { | |
| ois = <0x00>; | |
| companion = <0x01>; | |
| fw_dump = <0x00>; | |
| fw_write = <0x00>; | |
| upgrade = <0x00>; | |
| core_voltage = <0x00>; | |
| read_version = <0x00>; | |
| cal_memory = <0x02>; | |
| isp = <0x00>; | |
| }; | |
| camera_info0 { | |
| ois = <0x01>; | |
| companion = <0x01>; | |
| fw_dump = <0x00>; | |
| fw_write = <0x02>; | |
| upgrade = <0x01>; | |
| core_voltage = <0x01>; | |
| read_version = <0x00>; | |
| cal_memory = <0x01>; | |
| isp = <0x00>; | |
| }; | |
| clk_gate_ctrl { | |
| group2 { | |
| mask_clk_off_self_org = <0x01 0x02 0x03 0x05 0x06 0x07 0x08>; | |
| mask_clk_on_org = <0x01 0x02 0x03 0x05 0x06 0x07 0x08>; | |
| }; | |
| group1 { | |
| }; | |
| group0 { | |
| mask_clk_off_self_org = <0x09>; | |
| mask_clk_on_org = <0x09>; | |
| }; | |
| }; | |
| }; | |
| fimc_is_sensor@14040000 { | |
| status = "okay"; | |
| is_bns = <0x00>; | |
| flite_ch = <0x03>; | |
| csi_ch = <0x03>; | |
| id = <0x03>; | |
| scenario = <0x00>; | |
| clocks = <0x14 0x10 0x14 0x11 0x14 0x12 0x14 0x14 0x14 0x15 0x14 0x16 0x14 0x17 0x14 0x18 0x14 0x19>; | |
| clock-names = "sclk_isp_sensor0\0sclk_isp_sensor1\0sclk_isp_sensor2\0dout_sclk_isp_sensor0\0dout_sclk_isp_sensor1\0dout_sclk_isp_sensor2\0mout_sclk_isp_sensor0\0mout_sclk_isp_sensor1\0mout_sclk_isp_sensor2"; | |
| samsung,power-domain = <0x8f>; | |
| interrupts = <0x00 0x87 0x00>; | |
| reg = <0x14040000 0x10000 0x14080000 0x10000>; | |
| #pb-id-cells = <0x03>; | |
| compatible = "samsung,exynos5-fimc-is-sensor"; | |
| }; | |
| fimc_is_sensor@14110000 { | |
| phandle = <0x98>; | |
| linux,phandle = <0x98>; | |
| status = "okay"; | |
| is_bns = <0x01>; | |
| flite_ch = <0x02>; | |
| csi_ch = <0x02>; | |
| id = <0x02>; | |
| scenario = <0x00>; | |
| clocks = <0x14 0x10 0x14 0x11 0x14 0x12 0x14 0x14 0x14 0x15 0x14 0x16 0x14 0x17 0x14 0x18 0x14 0x19>; | |
| clock-names = "sclk_isp_sensor0\0sclk_isp_sensor1\0sclk_isp_sensor2\0dout_sclk_isp_sensor0\0dout_sclk_isp_sensor1\0dout_sclk_isp_sensor2\0mout_sclk_isp_sensor0\0mout_sclk_isp_sensor1\0mout_sclk_isp_sensor2"; | |
| samsung,power-domain = <0x8f>; | |
| interrupts = <0x00 0x92 0x00>; | |
| reg = <0x14110000 0x10000 0x14100000 0x10000>; | |
| #pb-id-cells = <0x03>; | |
| compatible = "samsung,exynos5-fimc-is-sensor"; | |
| }; | |
| fimc_is_sensor@14030000 { | |
| phandle = <0x97>; | |
| linux,phandle = <0x97>; | |
| status = "okay"; | |
| is_bns = <0x00>; | |
| flite_ch = <0x01>; | |
| csi_ch = <0x01>; | |
| id = <0x01>; | |
| scenario = <0x00>; | |
| clocks = <0x14 0x10 0x14 0x11 0x14 0x12 0x14 0x14 0x14 0x15 0x14 0x16 0x14 0x17 0x14 0x18 0x14 0x19>; | |
| clock-names = "sclk_isp_sensor0\0sclk_isp_sensor1\0sclk_isp_sensor2\0dout_sclk_isp_sensor0\0dout_sclk_isp_sensor1\0dout_sclk_isp_sensor2\0mout_sclk_isp_sensor0\0mout_sclk_isp_sensor1\0mout_sclk_isp_sensor2"; | |
| samsung,power-domain = <0x8f>; | |
| interrupts = <0x00 0x86 0x00>; | |
| reg = <0x14030000 0x10000 0x14010000 0x10000>; | |
| #pb-id-cells = <0x03>; | |
| compatible = "samsung,exynos5-fimc-is-sensor"; | |
| }; | |
| fimc_is_sensor@14020000 { | |
| phandle = <0x96>; | |
| linux,phandle = <0x96>; | |
| status = "okay"; | |
| is_bns = <0x01>; | |
| flite_ch = <0x00>; | |
| csi_ch = <0x00>; | |
| id = <0x00>; | |
| scenario = <0x00>; | |
| clocks = <0x14 0x10 0x14 0x11 0x14 0x12 0x14 0x14 0x14 0x15 0x14 0x16 0x14 0x17 0x14 0x18 0x14 0x19>; | |
| clock-names = "sclk_isp_sensor0\0sclk_isp_sensor1\0sclk_isp_sensor2\0dout_sclk_isp_sensor0\0dout_sclk_isp_sensor1\0dout_sclk_isp_sensor2\0mout_sclk_isp_sensor0\0mout_sclk_isp_sensor1\0mout_sclk_isp_sensor2"; | |
| samsung,power-domain = <0x8f>; | |
| interrupts = <0x00 0x85 0x00>; | |
| reg = <0x14020000 0x10000 0x14000000 0x10000>; | |
| #pb-id-cells = <0x03>; | |
| compatible = "samsung,exynos5-fimc-is-sensor"; | |
| }; | |
| pd-vpp@105c41e0 { | |
| reg = <0x105c41e0 0x20>; | |
| compatible = "samsung,exynos-pd"; | |
| spd-vgr1@105c41e0 { | |
| phandle = <0xb0>; | |
| linux,phandle = <0xb0>; | |
| bts-status = "enabled"; | |
| compatible = "samsung,exynos-spd"; | |
| }; | |
| spd-vgr0@105c41e0 { | |
| phandle = <0xaf>; | |
| linux,phandle = <0xaf>; | |
| bts-status = "enabled"; | |
| compatible = "samsung,exynos-spd"; | |
| }; | |
| spd-vg1@105c41e0 { | |
| phandle = <0xae>; | |
| linux,phandle = <0xae>; | |
| bts-status = "enabled"; | |
| compatible = "samsung,exynos-spd"; | |
| }; | |
| spd-vg0@105c41e0 { | |
| phandle = <0xad>; | |
| linux,phandle = <0xad>; | |
| bts-status = "enabled"; | |
| compatible = "samsung,exynos-spd"; | |
| }; | |
| }; | |
| pd-mscl@105c41c0 { | |
| reg = <0x105c41c0 0x20>; | |
| compatible = "samsung,exynos-pd"; | |
| spd-g2d@105c41c0 { | |
| phandle = <0xa0>; | |
| linux,phandle = <0xa0>; | |
| compatible = "samsung,exynos-spd"; | |
| }; | |
| spd-jpeg@105c41c0 { | |
| phandle = <0xa6>; | |
| linux,phandle = <0xa6>; | |
| compatible = "samsung,exynos-spd"; | |
| }; | |
| spd-mscl1@105c41c0 { | |
| phandle = <0xa5>; | |
| linux,phandle = <0xa5>; | |
| compatible = "samsung,exynos-spd"; | |
| }; | |
| spd-mscl0@105c41c0 { | |
| phandle = <0xa4>; | |
| linux,phandle = <0xa4>; | |
| compatible = "samsung,exynos-spd"; | |
| }; | |
| }; | |
| pd-mfc@105c41a0 { | |
| phandle = <0xa8>; | |
| linux,phandle = <0xa8>; | |
| bts-status = "enabled"; | |
| reg = <0x105c41a0 0x20>; | |
| compatible = "samsung,exynos-pd"; | |
| }; | |
| pd-isp1@105c4180 { | |
| phandle = <0x8e>; | |
| linux,phandle = <0x8e>; | |
| bts-status = "enabled"; | |
| parent = <0x49>; | |
| reg = <0x105c4180 0x20>; | |
| compatible = "samsung,exynos-pd"; | |
| }; | |
| pd-isp0@105c4140 { | |
| phandle = <0x94>; | |
| linux,phandle = <0x94>; | |
| bts-status = "enabled"; | |
| parent = <0x8e 0x8f 0x49>; | |
| reg = <0x105c4140 0x20>; | |
| compatible = "samsung,exynos-pd"; | |
| }; | |
| pd-g3d@105c4100 { | |
| phandle = <0x8d>; | |
| linux,phandle = <0x8d>; | |
| pd-option = <0x1101>; | |
| reg = <0x105c4100 0x20>; | |
| compatible = "samsung,exynos-pd"; | |
| }; | |
| pd-disp@105c4080 { | |
| phandle = <0xa9>; | |
| linux,phandle = <0xa9>; | |
| reg = <0x105c4080 0x20>; | |
| compatible = "samsung,exynos-pd"; | |
| spd-hdmi@105c4080 { | |
| phandle = <0xb4>; | |
| linux,phandle = <0xb4>; | |
| compatible = "samsung,exynos-spd"; | |
| }; | |
| spd-decon1@105c4080 { | |
| phandle = <0xb3>; | |
| linux,phandle = <0xb3>; | |
| bts-status = "enabled"; | |
| compatible = "samsung,exynos-spd"; | |
| }; | |
| spd-decon0@105c4080 { | |
| phandle = <0xb1>; | |
| linux,phandle = <0xb1>; | |
| bts-status = "enabled"; | |
| compatible = "samsung,exynos-spd"; | |
| }; | |
| }; | |
| pd-cam1@105c4060 { | |
| phandle = <0x49>; | |
| linux,phandle = <0x49>; | |
| bts-status = "enabled"; | |
| reg = <0x105c4060 0x20>; | |
| compatible = "samsung,exynos-pd"; | |
| }; | |
| pd-cam0@105c4040 { | |
| phandle = <0x8f>; | |
| linux,phandle = <0x8f>; | |
| bts-status = "enabled"; | |
| parent = <0x49>; | |
| reg = <0x105c4040 0x20>; | |
| compatible = "samsung,exynos-pd"; | |
| }; | |
| pd-aud@105c4000 { | |
| phandle = <0x17>; | |
| linux,phandle = <0x17>; | |
| reg = <0x105c4000 0x20>; | |
| compatible = "samsung,exynos-pd"; | |
| }; | |
| mali { | |
| samsung,power-domain = <0x8d>; | |
| clock-names = "fin_pll\0fout_g3d_pll\0aclk_g3d\0dout_aclk_g3d\0mout_g3d\0sclk_hpm_g3d\0aclk_lh_g3d0\0aclk_lh_g3d1"; | |
| clocks = <0x14 0x01 0x14 0x0a 0x14 0xa0 0x14 0xa1 0x14 0xa2 0x14 0xa3 0x14 0x12c 0x14 0x12d>; | |
| interrupt-names = "JOB\0MMU\0GPU"; | |
| interrupts = <0x00 0xf1 0x00 0x00 0xf2 0x00 0x00 0xf0 0x00>; | |
| reg = <0x14ac0000 0x5000>; | |
| compatible = "arm,mali"; | |
| }; | |
| usb2phy@15530000 { | |
| phandle = <0x8c>; | |
| linux,phandle = <0x8c>; | |
| ranges; | |
| #size-cells = <0x01>; | |
| #address-cells = <0x01>; | |
| samsung,hsicphy_reg_offset = <0x04>; | |
| samsung,hsicphy_en_mask = <0x02>; | |
| clock-names = "ext_xtal\0aclk\0aclk_axius\0aclk_ahb\0aclk_ahb2axi\0sclk_usbhost20\0sclk_usb20phy_hsic\0oscclk_phy\0freeclk\0phyclk"; | |
| clocks = <0x14 0x01 0x14 0x139c 0x14 0x139d 0x14 0x139e 0x14 0x139f 0x14 0x13a0 0x14 0x13a1 0x14 0x13a2 0x14 0x13a3 0x14 0x13a4>; | |
| reg = <0x15530000 0x100>; | |
| compatible = "samsung,exynos7420-usb2phy"; | |
| usbphy-sys { | |
| reg = <0x105c0700 0x0c>; | |
| }; | |
| }; | |
| usb@15520000 { | |
| status = "ok"; | |
| usb-phy = <0x8c>; | |
| clock-names = "aclk\0aclk_axius\0aclk_ahb\0aclk_ahb2axi\0sclk_usbhost20\0sclk_usb20phy_hsic\0oscclk_phy\0freeclk\0phyclk"; | |
| clocks = <0x14 0x139c 0x14 0x139d 0x14 0x139e 0x14 0x139f 0x14 0x13a0 0x14 0x13a1 0x14 0x13a2 0x14 0x13a3 0x14 0x13a4>; | |
| interrupts = <0x00 0xde 0x00>; | |
| reg = <0x15520000 0x100>; | |
| compatible = "samsung,exynos5-ohci"; | |
| }; | |
| usb@15510000 { | |
| status = "ok"; | |
| hsic-ports = <0x02>; | |
| has-synopsys-hsic; | |
| usb-phy = <0x8c>; | |
| clock-names = "aclk\0aclk_axius\0aclk_ahb\0aclk_ahb2axi\0sclk_usbhost20\0sclk_usb20phy_hsic\0oscclk_phy\0freeclk\0phyclk"; | |
| clocks = <0x14 0x139c 0x14 0x139d 0x14 0x139e 0x14 0x139f 0x14 0x13a0 0x14 0x13a1 0x14 0x13a2 0x14 0x13a3 0x14 0x13a4>; | |
| interrupts = <0x00 0xde 0x00>; | |
| reg = <0x15510000 0x100>; | |
| compatible = "samsung,exynos5-ehci"; | |
| }; | |
| usbphy@15500000 { | |
| phandle = <0x8b>; | |
| linux,phandle = <0x8b>; | |
| ranges; | |
| #size-cells = <0x01>; | |
| #address-cells = <0x01>; | |
| clock-names = "ext_xtal\0aclk\0sclk_ref\0sclk\0oscclk_phy\0phyclock\0pipe_pclk"; | |
| clocks = <0x14 0x01 0x14 0x1392 0x14 0x1394 0x14 0x1395 0x14 0x1396 0x14 0x1397 0x14 0x1398>; | |
| reg = <0x15500000 0x100>; | |
| compatible = "samsung,exynos7420-usb3phy"; | |
| usbphy-sys { | |
| reg = <0x105c0704 0x04>; | |
| }; | |
| }; | |
| usbphy { | |
| phandle = <0x8a>; | |
| linux,phandle = <0x8a>; | |
| compatible = "samsung,exynos5-usb2phy-dummy"; | |
| }; | |
| usb@15400000 { | |
| status = "okay"; | |
| ranges; | |
| #size-cells = <0x01>; | |
| #address-cells = <0x01>; | |
| reg = <0x15400000 0x10000>; | |
| clock-names = "aclk\0aclk_axius\0sclk_ref\0sclk\0oscclk_phy\0phyclock\0pipe_pclk\0aclk_ahb_usblinkh"; | |
| clocks = <0x14 0x1392 0x14 0x1393 0x14 0x1394 0x14 0x1395 0x14 0x1396 0x14 0x1397 0x14 0x1398 0x14 0x1399>; | |
| compatible = "samsung,exynos5-dwusb3"; | |
| dwc3 { | |
| adj-sof-accuracy; | |
| dr_mode = "otg"; | |
| maximum-speed = "high-speed"; | |
| usb-phy = <0x8a 0x8b>; | |
| interrupts = <0x00 0xdf 0x00>; | |
| reg = <0x15400000 0x10000>; | |
| compatible = "synopsys,dwc3"; | |
| }; | |
| }; | |
| usb_data_mdm_bridge { | |
| compatible = "samsung,acm_data_mdm_bridge"; | |
| }; | |
| usb_ctrl_mdm_bridge { | |
| #pb-id-cells = <0x00>; | |
| compatible = "samsung,acm_ctrl_mdm_bridge"; | |
| }; | |
| usb_notifier { | |
| compatible = "samsung,usb-notifier"; | |
| }; | |
| mcomp@11170000 { | |
| ranges; | |
| #size-cells = <0x01>; | |
| #address-cells = <0x01>; | |
| interrupts = <0x00 0x121 0x00>; | |
| clocks = <0x14 0x12c>; | |
| reg = <0x11170000 0x1000>; | |
| compatible = "samsung,exynos-mcomp"; | |
| }; | |
| dwmmc2@15560000 { | |
| vqmmc-supply = <0x89>; | |
| vdd_vmmc-supply = <0x88>; | |
| cd-gpio = <0x22 0x04 0x0f>; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| pinctrl-0 = <0x84 0x85 0x86 0x87>; | |
| pinctrl-names = "default"; | |
| ciu_clkin = <0x19 0x32 0x32 0x64 0xc8 0x64 0xc8 0x190>; | |
| num-ref-clks = <0x08>; | |
| clk_str_num = <0x06>; | |
| clk_val = <0x02>; | |
| clk_addr = "10E60000.pinctrl"; | |
| clk_pin = "gpr4-0"; | |
| samsung,dw-mshc-ddr-timing = <0x03 0x00 0x02 0x01>; | |
| samsung,dw-mshc-sdr-timing = <0x03 0x00 0x03 0x02>; | |
| samsung,dw-mshc-ciu-div = <0x03>; | |
| not-allow-single-dma; | |
| fix-fmp-size-mismatch; | |
| bypass-for-allpass; | |
| desc-size = <0x03>; | |
| qos_int_level = <0x61a80>; | |
| card-detect-delay = <0xc8>; | |
| fifo-depth = <0x40>; | |
| use-fine-tuning; | |
| clock-gate; | |
| biu-clock-gate; | |
| bypass-smu; | |
| cd-type = <0x00>; | |
| enable-cclk-on-suspend; | |
| supports-highspeed; | |
| num-slots = <0x01>; | |
| status = "okay"; | |
| clock-names = "biu\0dout_mmc_a\0gate_ciu"; | |
| clocks = <0x14 0xc0 0x14 0xbf 0x14 0xbe>; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| interrupts = <0x00 0xd8 0x00>; | |
| reg = <0x15560000 0x2000>; | |
| compatible = "samsung,exynos7420-dw-mshc"; | |
| slot@0 { | |
| disable-wp; | |
| bus-width = <0x04>; | |
| reg = <0x00>; | |
| }; | |
| }; | |
| dwmmc1@15750000 { | |
| status = "disabled"; | |
| clock-names = "biu\0dout_mmc_a\0gate_ciu"; | |
| clocks = <0x14 0xb4 0x14 0xbb 0x14 0xba>; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| interrupts = <0x00 0xca 0x00>; | |
| reg = <0x15750000 0x2000>; | |
| compatible = "samsung,exynos7420-dw-mshc"; | |
| }; | |
| dwmmc0@15740000 { | |
| gpios = <0x83 0x04 0x00>; | |
| pinctrl-0 = <0x7d 0x7e 0x7f 0x80 0x81 0x82>; | |
| pinctrl-names = "default"; | |
| ciu_clkin = <0x19 0x32 0x32 0x64 0xc8 0x64 0xc8 0x190>; | |
| num-ref-clks = <0x08>; | |
| clk_str_num = <0x06>; | |
| clk_val = <0x04>; | |
| clk_addr = "15690000.pinctrl"; | |
| clk_pin = "gpr0-0"; | |
| samsung,dw-mshc-ddr200-delay-line = <0x76>; | |
| samsung,dw-mshc-ddr200-timing = <0x01 0x00 0x02 0x02>; | |
| samsung,dw-mshc-hs200-timing = <0x03 0x00 0x03 0x01>; | |
| samsung,dw-mshc-ddr-timing = <0x03 0x00 0x03 0x02>; | |
| samsung,dw-mshc-sdr-timing = <0x03 0x00 0x02 0x00>; | |
| samsung,dw-mshc-ciu-div = <0x03>; | |
| card-detect-delay = <0xc8>; | |
| fifo-depth = <0x40>; | |
| desc-size = <0x03>; | |
| qos_int_level = <0x61a80>; | |
| use-enable-shift; | |
| enable-cache-control; | |
| supports-ddr200-mode; | |
| supports-hs200-mode; | |
| supports-highspeed; | |
| bypass-for-allpass; | |
| use-fine-tuning; | |
| only_once_tune; | |
| enable-cclk-on-suspend; | |
| clock-gate; | |
| biu-clock-gate; | |
| fixed_volt; | |
| use-smu; | |
| broken-cd; | |
| num-slots = <0x01>; | |
| status = "disabled"; | |
| clock-names = "biu\0dout_mmc_a\0gate_ciu"; | |
| clocks = <0x14 0xb4 0x14 0xb6 0x14 0xb5>; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| interrupts = <0x00 0xc9 0x00>; | |
| reg = <0x15740000 0x2000>; | |
| compatible = "samsung,exynos7420-dw-mshc"; | |
| slot@0 { | |
| bus-width = <0x08>; | |
| reg = <0x00>; | |
| }; | |
| }; | |
| hsi2c@136A0000 { | |
| pinctrl-2 = <0x7b>; | |
| pinctrl-1 = <0x7c>; | |
| clock-frequency = <0x61a80>; | |
| status = "okay"; | |
| gpio_scl = <0x69 0x03 0x01>; | |
| gpio_sda = <0x69 0x02 0x01>; | |
| samsung,scl-clk-stretching; | |
| clock-names = "rate_hsi2c\0gate_hsi2c"; | |
| clocks = <0x14 0x83 0x14 0x83>; | |
| pinctrl-0 = <0x7b>; | |
| pinctrl-names = "default\0on_i2c\0off_i2c"; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| interrupts = <0x00 0x1bf 0x00>; | |
| reg = <0x136a0000 0x1000>; | |
| samsung,check-transdone-int; | |
| compatible = "samsung,exynos5-hsi2c"; | |
| front_eeprom@51 { | |
| pinfunc_off = <0x02>; | |
| pinfunc_on = <0x00>; | |
| fimc_is_front_eeprom_scl = "gpb2-5"; | |
| fimc_is_front_eeprom_sda = "gpb2-4"; | |
| fimc_is_front_eeprom_pinname = "13470000.pinctrl"; | |
| use_i2c_pinctrl; | |
| reg = <0x51>; | |
| compatible = "samsung,front-eeprom-i2c"; | |
| }; | |
| af@0c { | |
| pinfunc_off = <0x02>; | |
| pinfunc_on = <0x00>; | |
| fimc_is_af_scl = "gpc2-5"; | |
| fimc_is_af_sda = "gpc2-4"; | |
| fimc_is_af_pinname = "13470000.pinctrl"; | |
| use_i2c_pinctrl; | |
| reg = <0x0c>; | |
| compatible = "samsung,af"; | |
| }; | |
| ois@24 { | |
| pinfunc_off = <0x02>; | |
| pinfunc_on = <0x00>; | |
| fimc_is_ois_scl = "gpc2-5"; | |
| fimc_is_ois_sda = "gpc2-4"; | |
| fimc_is_ois_pinname = "13470000.pinctrl"; | |
| use_i2c_pinctrl; | |
| reg = <0x24>; | |
| compatible = "rumba,ois"; | |
| }; | |
| }; | |
| hsi2c@13690000 { | |
| status = "disabled"; | |
| gpio_scl = <0x69 0x01 0x01>; | |
| gpio_sda = <0x69 0x00 0x01>; | |
| samsung,scl-clk-stretching; | |
| clock-names = "rate_hsi2c\0gate_hsi2c"; | |
| clocks = <0x14 0x82 0x14 0x82>; | |
| pinctrl-0 = <0x7a>; | |
| pinctrl-names = "default"; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| interrupts = <0x00 0x1be 0x00>; | |
| reg = <0x13690000 0x1000>; | |
| samsung,check-transdone-int; | |
| compatible = "samsung,exynos5-hsi2c"; | |
| }; | |
| hsi2c@13680000 { | |
| status = "disabled"; | |
| gpio_scl = <0x4f 0x07 0x01>; | |
| gpio_sda = <0x4f 0x06 0x01>; | |
| samsung,scl-clk-stretching; | |
| clock-names = "rate_hsi2c\0gate_hsi2c"; | |
| clocks = <0x14 0x81 0x14 0x81>; | |
| pinctrl-0 = <0x79>; | |
| pinctrl-names = "default"; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| interrupts = <0x00 0x1bd 0x00>; | |
| reg = <0x13680000 0x1000>; | |
| samsung,check-transdone-int; | |
| compatible = "samsung,exynos5-hsi2c"; | |
| }; | |
| hsi2c@14E20000 { | |
| status = "disabled"; | |
| gpio_scl = <0x78 0x03 0x01>; | |
| gpio_sda = <0x78 0x02 0x01>; | |
| samsung,scl-clk-stretching; | |
| clock-names = "rate_hsi2c\0gate_hsi2c"; | |
| clocks = <0x14 0x80 0x14 0x80>; | |
| pinctrl-0 = <0x77>; | |
| pinctrl-names = "default"; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| interrupts = <0x00 0x1cf 0x00>; | |
| reg = <0x14e20000 0x1000>; | |
| samsung,check-transdone-int; | |
| compatible = "samsung,exynos5-hsi2c"; | |
| }; | |
| hsi2c@14E10000 { | |
| secure-mode; | |
| status = "okay"; | |
| samsung,scl-clk-stretching; | |
| clock-names = "rate_hsi2c\0gate_hsi2c"; | |
| clocks = <0x14 0x7f 0x14 0x7f>; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| interrupts = <0x00 0x1ce 0x00>; | |
| reg = <0x14e10000 0x1000>; | |
| samsung,check-transdone-int; | |
| compatible = "samsung,exynos5-hsi2c"; | |
| touchscreen@20 { | |
| stm,firmware_name = "tsp_stm/stm_z1.fw"; | |
| stm,tspid2_gpio = <0x76 0x02 0x00>; | |
| stm,tspid_gpio = <0x68 0x04 0x00>; | |
| stm,project_name = "ZEROF\0G920"; | |
| stm,regulator_avdd = "tsp_avdd"; | |
| stm,regulator_dvdd = "tsp_io"; | |
| stm,grip_area = <0x200>; | |
| stm,max_coords = <0xfff 0xfff>; | |
| stm,num_lines = <0x1c 0x10>; | |
| stm,irq_type = <0x2008>; | |
| stm,irq_gpio = <0x55 0x06 0x00>; | |
| pinctrl-1 = <0x75>; | |
| pinctrl-0 = <0x74>; | |
| pinctrl-names = "on_state\0off_state"; | |
| reg = <0x49>; | |
| compatible = "stm,fts_touch"; | |
| }; | |
| }; | |
| hsi2c@14E00000 { | |
| secure-mode; | |
| status = "okay"; | |
| gpio_scl = <0x6c 0x01 0x01>; | |
| gpio_sda = <0x6c 0x00 0x01>; | |
| samsung,scl-clk-stretching; | |
| clock-names = "rate_hsi2c\0gate_hsi2c"; | |
| clocks = <0x14 0x7e 0x14 0x7e>; | |
| pinctrl-0 = <0x6b>; | |
| pinctrl-names = "default"; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| interrupts = <0x00 0x1cd 0x00>; | |
| reg = <0x14e00000 0x1000>; | |
| samsung,check-transdone-int; | |
| compatible = "samsung,exynos5-hsi2c"; | |
| max86900@51 { | |
| max86900,led_3p3 = "V_HRM_3.3V"; | |
| max86900,vdd_1p8 = "HRM_VDD_1.8V"; | |
| max86900,hrm_int-gpio = <0x55 0x05 0x00>; | |
| pinctrl-2 = <0x73>; | |
| pinctrl-1 = <0x72>; | |
| pinctrl-0 = <0x71>; | |
| pinctrl-names = "default\0sleep\0idle"; | |
| interrupts = <0x05 0x00 0x00>; | |
| interrupt-parent = <0x55>; | |
| reg = <0x51>; | |
| compatible = "max86900"; | |
| }; | |
| pn547@2B { | |
| pn547,i2c_1p8 = "VDD20_1P8_AP"; | |
| pn547,pwr_req = <0x6d 0x01 0x00>; | |
| pn547,clk_req-gpio = <0x22 0x06 0x0f>; | |
| pn547,irq-gpio = <0x43 0x06 0x00>; | |
| pn547,firm-gpio = <0x6d 0x04 0x00>; | |
| pn547,ven-gpio = <0x44 0x05 0x00>; | |
| pinctrl-0 = <0x70 0x6f>; | |
| pinctrl-names = "default"; | |
| interrupt-parent = <0x43>; | |
| interrupts = <0x06 0x00 0x00>; | |
| reg = <0x2b>; | |
| compatible = "pn547"; | |
| }; | |
| sec-nfc@27 { | |
| sec-nfc,i2c_1p8 = "VDD20_1P8_AP"; | |
| clocks = <0x14 0x22 0x14 0xbfb 0x14 0xffc 0x14 0xffd 0x14 0xadc>; | |
| clock-names = "sclk_isp_sensor1\0mout_sclk_isp_sensor1\0dout_sclk_isp_sensor1_a\0dout_sclk_isp_sensor1_b\0gate_top_cam1"; | |
| pinctrl-0 = <0x6e 0x6f>; | |
| pinctrl-names = "default"; | |
| sec-nfc,clk_use = <0x02>; | |
| sec-nfc,clk_req-gpio = <0x22 0x06 0x0f>; | |
| sec-nfc,firm-gpio = <0x6d 0x04 0x00>; | |
| sec-nfc,irq-gpio = <0x43 0x06 0x00>; | |
| sec-nfc,ven-gpio = <0x44 0x05 0x00>; | |
| interrupt-parent = <0x43>; | |
| interrupts = <0x06 0x00 0x00>; | |
| reg = <0x27>; | |
| compatible = "sec-nfc"; | |
| }; | |
| }; | |
| hsi2c@13670000 { | |
| status = "okay"; | |
| gpio_scl = <0x63 0x03 0x01>; | |
| gpio_sda = <0x63 0x02 0x01>; | |
| samsung,scl-clk-stretching; | |
| clock-names = "rate_hsi2c\0gate_hsi2c"; | |
| clocks = <0x14 0x7d 0x14 0x7d>; | |
| pinctrl-0 = <0x6a>; | |
| pinctrl-names = "default"; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| interrupts = <0x00 0x1bc 0x00>; | |
| reg = <0x13670000 0x1000>; | |
| samsung,check-transdone-int; | |
| compatible = "samsung,exynos5-hsi2c"; | |
| bq51221-charger@6c { | |
| status = "okay"; | |
| reg = <0x6c>; | |
| compatible = "ti,bq51221-charger"; | |
| }; | |
| max77838@60 { | |
| status = "disabled"; | |
| reg = <0x60>; | |
| compatible = "maxim,max77838"; | |
| regulators { | |
| LDO4 { | |
| regulator-max-microvolt = <0x325aa0>; | |
| regulator-min-microvolt = <0x325aa0>; | |
| regulator-name = "tsp_avdd"; | |
| }; | |
| LDO3 { | |
| regulator-boot-on; | |
| regulator-max-microvolt = <0x2dc6c0>; | |
| regulator-min-microvolt = <0x2dc6c0>; | |
| regulator-name = "VCC_3.0V_LCD"; | |
| }; | |
| LDO2 { | |
| regulator-max-microvolt = <0x1c3a90>; | |
| regulator-min-microvolt = <0x1c3a90>; | |
| regulator-name = "tsp_io"; | |
| }; | |
| LDO1 { | |
| regulator-boot-on; | |
| regulator-max-microvolt = <0x1b7740>; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-name = "VCC_DISPLAY_1.8V"; | |
| }; | |
| }; | |
| }; | |
| }; | |
| hsi2c@13660000 { | |
| samsung,use-apm; | |
| clock-frequency = <0x2625a0>; | |
| samsung,hs-mode; | |
| status = "okay"; | |
| gpio_scl = <0x63 0x01 0x01>; | |
| gpio_sda = <0x63 0x00 0x01>; | |
| samsung,scl-clk-stretching; | |
| clock-names = "rate_hsi2c\0gate_hsi2c"; | |
| clocks = <0x14 0x7c 0x14 0x7c>; | |
| pinctrl-1 = <0x62>; | |
| pinctrl-0 = <0x61>; | |
| pinctrl-names = "default\0apm"; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| interrupts = <0x00 0x1bb 0x00>; | |
| reg = <0x13660000 0x1000>; | |
| samsung,check-transdone-int; | |
| compatible = "samsung,exynos5-hsi2c"; | |
| s2mps15_pmic@66 { | |
| init_time,wday = <0x04>; | |
| init_time,year = <0x73>; | |
| init_time,mon = <0x00>; | |
| init_time,mday = <0x01>; | |
| init_time,hour = <0x0c>; | |
| init_time,min = <0x00>; | |
| init_time,sec = <0x00>; | |
| check_jigon = <0x00>; | |
| smpl_timer_val = <0x00>; | |
| wtsr_timer_val = <0x03>; | |
| smpl_en = <0x01>; | |
| wtsr_en = <0x01>; | |
| buck6en_addr = "13470000.pinctrl"; | |
| buck6en_pin = "gpb0-4"; | |
| dvs_en = <0x01>; | |
| g3d_en = <0x01>; | |
| buck_dvs_on; | |
| adc-on; | |
| smpl_warn_hys = <0x18>; | |
| smpl_warn_vth = <0xb54>; | |
| smpl_warn_en = <0x01>; | |
| gpios = <0x68 0x00 0x00 0x69 0x04 0x02 0x68 0x01 0x01>; | |
| pinctrl-0 = <0x64 0x65 0x66 0x67>; | |
| pinctrl-names = "default"; | |
| interrupt-parent = <0x2f>; | |
| interrupts = <0x07 0x00 0x00>; | |
| reg = <0x66>; | |
| compatible = "samsung,s2mps15-pmic"; | |
| regulators { | |
| LDO26 { | |
| phandle = <0x26>; | |
| linux,phandle = <0x26>; | |
| regulator-max-microvolt = <0x124f80>; | |
| regulator-min-microvolt = <0x124f80>; | |
| regulator-name = "VDD_1.2V_CODEC"; | |
| }; | |
| LDO25 { | |
| phandle = <0x88>; | |
| linux,phandle = <0x88>; | |
| regulator-max-microvolt = <0x325aa0>; | |
| regulator-min-microvolt = <0x325aa0>; | |
| regulator-name = "PROX_LED_3.3V"; | |
| }; | |
| LDO24 { | |
| regulator-max-microvolt = <0x331df0>; | |
| regulator-min-microvolt = <0x325aa0>; | |
| regulator-name = "V_HRM_3.3V"; | |
| }; | |
| LDO23 { | |
| regulator-max-microvolt = <0x1b7740>; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-name = "VDD_1.8V_ESE"; | |
| }; | |
| LDO22 { | |
| regulator-max-microvolt = <0x124f80>; | |
| regulator-min-microvolt = <0x124f80>; | |
| regulator-name = "VDD22_1P2_AP"; | |
| }; | |
| LDO21 { | |
| regulator-boot-on; | |
| regulator-max-microvolt = <0x325aa0>; | |
| regulator-min-microvolt = <0x325aa0>; | |
| regulator-name = "vtouch_3.3v"; | |
| }; | |
| LDO20 { | |
| regulator-max-microvolt = <0x1b7740>; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-name = "VDD20_1P8_AP"; | |
| }; | |
| LDO19 { | |
| regulator-max-microvolt = <0x2dc6c0>; | |
| regulator-min-microvolt = <0x2dc6c0>; | |
| regulator-name = "MST_LEVEL_3.0V"; | |
| }; | |
| LDO18 { | |
| regulator-max-microvolt = <0x1c3a90>; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-name = "HRM_VDD_1.8V"; | |
| }; | |
| LDO17 { | |
| regulator-max-microvolt = <0x2dc6c0>; | |
| regulator-min-microvolt = <0x2dc6c0>; | |
| regulator-name = "VCC_MOTOR_3.0"; | |
| }; | |
| LDO16 { | |
| phandle = <0x27>; | |
| linux,phandle = <0x27>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-name = "VCC_1.8V_CODEC_PMIC"; | |
| }; | |
| LDO15 { | |
| regulator-max-microvolt = <0x1c3a90>; | |
| regulator-min-microvolt = <0x1c3a90>; | |
| regulator-name = "tsp_io"; | |
| }; | |
| LDO8 { | |
| regulator-initial-mode = <0x01>; | |
| regulator-always-on; | |
| regulator-max-microvolt = <0xf4240>; | |
| regulator-min-microvolt = <0xaae60>; | |
| regulator-name = "vdd_ldo8"; | |
| }; | |
| LDO2 { | |
| phandle = <0x89>; | |
| linux,phandle = <0x89>; | |
| regulator-boot-on; | |
| regulator-initial-mode = <0x01>; | |
| regulator-ramp-delay = <0x2ee0>; | |
| regulator-max-microvolt = <0x325aa0>; | |
| regulator-min-microvolt = <0x18b820>; | |
| regulator-name = "vqmmc"; | |
| }; | |
| BUCK9 { | |
| regulator-initial-mode = <0x03>; | |
| regulator-ramp-delay = <0x2ee0>; | |
| regulator-always-on; | |
| regulator-max-microvolt = <0x200b20>; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-name = "vdd_mldo"; | |
| }; | |
| BUCK8 { | |
| regulator-initial-mode = <0x03>; | |
| regulator-ramp-delay = <0x2ee0>; | |
| regulator-always-on; | |
| regulator-max-microvolt = <0x16e360>; | |
| regulator-min-microvolt = <0xf4240>; | |
| regulator-name = "vdd_lldo"; | |
| }; | |
| BUCK6 { | |
| regulator-initial-mode = <0x01>; | |
| regulator-ramp-delay = <0x2ee0>; | |
| regulator-boot-on; | |
| regulator-always-on; | |
| regulator-max-microvolt = <0xf4240>; | |
| regulator-min-microvolt = <0x7a120>; | |
| regulator-name = "vdd_g3d"; | |
| }; | |
| BUCK5 { | |
| regulator-initial-mode = <0x01>; | |
| regulator-ramp-delay = <0x2ee0>; | |
| regulator-boot-on; | |
| regulator-always-on; | |
| regulator-max-microvolt = <0xf4240>; | |
| regulator-min-microvolt = <0x7a120>; | |
| regulator-name = "vdd_disp_cam0"; | |
| }; | |
| BUCK4 { | |
| regulator-initial-mode = <0x01>; | |
| regulator-ramp-delay = <0x2ee0>; | |
| regulator-boot-on; | |
| regulator-always-on; | |
| regulator-max-microvolt = <0xf4240>; | |
| regulator-min-microvolt = <0x7a120>; | |
| regulator-name = "vdd_int"; | |
| }; | |
| BUCK3 { | |
| regulator-initial-mode = <0x01>; | |
| regulator-ramp-delay = <0x2ee0>; | |
| regulator-boot-on; | |
| regulator-always-on; | |
| regulator-max-microvolt = <0x124f80>; | |
| regulator-min-microvolt = <0x7a120>; | |
| regulator-name = "vdd_apollo"; | |
| }; | |
| BUCK2 { | |
| regulator-initial-mode = <0x01>; | |
| regulator-ramp-delay = <0x2ee0>; | |
| regulator-boot-on; | |
| regulator-always-on; | |
| regulator-max-microvolt = <0x13d620>; | |
| regulator-min-microvolt = <0x7a120>; | |
| regulator-name = "vdd_atlas"; | |
| }; | |
| BUCK1 { | |
| regulator-initial-mode = <0x01>; | |
| regulator-ramp-delay = <0x2ee0>; | |
| regulator-boot-on; | |
| regulator-always-on; | |
| regulator-max-microvolt = <0xf4240>; | |
| regulator-min-microvolt = <0x7a120>; | |
| regulator-name = "vdd_mif"; | |
| }; | |
| }; | |
| }; | |
| }; | |
| hsi2c@14E70000 { | |
| pinctrl-2 = <0x5d>; | |
| pinctrl-1 = <0x5c>; | |
| status = "okay"; | |
| gpio_scl = <0x5b 0x03 0x01>; | |
| gpio_sda = <0x5b 0x02 0x01>; | |
| samsung,scl-clk-stretching; | |
| clock-names = "rate_hsi2c\0gate_hsi2c"; | |
| clocks = <0x14 0x7b 0x14 0x7b>; | |
| pinctrl-0 = <0x5a>; | |
| pinctrl-names = "default\0on_i2c\0off_i2c"; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| interrupts = <0x00 0x1cc 0x00>; | |
| reg = <0x14e70000 0x1000>; | |
| samsung,check-transdone-int; | |
| compatible = "samsung,exynos5-hsi2c"; | |
| touchkey@20 { | |
| cypress,fw_path = "cypress/cypress_zerof.fw"; | |
| cypress,boot-on-ldo = "true"; | |
| cypress,ic-stabilizing-time = <0x96>; | |
| cypress,ap-io-power = "true"; | |
| cypress,sub-det = <0x2f 0x00 0x00>; | |
| cypress,irq-gpio = <0x43 0x00 0x01>; | |
| cypress,scl-gpio = <0x5b 0x03 0x00>; | |
| cypress,sda-gpio = <0x5b 0x02 0x00>; | |
| interrupt-parent = <0x43>; | |
| interrupts = <0x00 0x00 0x00>; | |
| reg = <0x20>; | |
| compatible = "cypress,cypress_touchkey"; | |
| pinctrl-2 = <0x60>; | |
| pinctrl-1 = <0x5f>; | |
| pinctrl-0 = <0x5e>; | |
| pinctrl-names = "on_irq\0off_irq\0sub_det"; | |
| }; | |
| }; | |
| hsi2c@14E60000 { | |
| status = "okay"; | |
| gpio_scl = <0x57 0x03 0x01>; | |
| gpio_sda = <0x57 0x02 0x01>; | |
| samsung,scl-clk-stretching; | |
| clock-names = "rate_hsi2c\0gate_hsi2c"; | |
| clocks = <0x14 0x7a 0x14 0x7a>; | |
| pinctrl-0 = <0x56>; | |
| pinctrl-names = "default"; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| interrupts = <0x00 0x1cb 0x00>; | |
| reg = <0x14e60000 0x1000>; | |
| samsung,check-transdone-int; | |
| compatible = "samsung,exynos5-hsi2c"; | |
| s2mpb02@59 { | |
| pinctrl-0 = <0x59>; | |
| pinctrl-names = "default"; | |
| s2mpb02,irq-gpio = <0x58 0x02 0x00>; | |
| reg = <0x59>; | |
| compatible = "samsung,s2mpb02"; | |
| torch { | |
| status = "okay"; | |
| leds2 { | |
| timeout = <0x0f>; | |
| brightness = <0x09>; | |
| id = <0x01>; | |
| ledname = "torch-sec1"; | |
| }; | |
| leds1 { | |
| timeout = <0x03>; | |
| brightness = <0x0f>; | |
| id = <0x00>; | |
| ledname = "leds-sec1"; | |
| }; | |
| }; | |
| regulators { | |
| s2mpb02-ldo17 { | |
| regulator-max-microvolt = <0x325aa0>; | |
| regulator-min-microvolt = <0x325aa0>; | |
| regulator-name = "tsp_avdd"; | |
| }; | |
| s2mpb02-ldo16 { | |
| regulator-max-microvolt = <0x2dc6c0>; | |
| regulator-min-microvolt = <0x2dc6c0>; | |
| regulator-name = "VCC_3.0V_LCD"; | |
| }; | |
| s2mpb02-ldo15 { | |
| regulator-max-microvolt = <0x2ab980>; | |
| regulator-min-microvolt = <0x2ab980>; | |
| regulator-name = "OIS_VDD_2.8V"; | |
| }; | |
| s2mpb02-ldo14 { | |
| regulator-max-microvolt = <0x2ab980>; | |
| regulator-min-microvolt = <0x2ab980>; | |
| regulator-name = "OIS_VM_2.8V"; | |
| }; | |
| s2mpb02-ldo13 { | |
| regulator-max-microvolt = <0x2c4020>; | |
| regulator-min-microvolt = <0x2c4020>; | |
| regulator-name = "VDDA_2.9V_VT"; | |
| }; | |
| s2mpb02-ldo12 { | |
| regulator-max-microvolt = <0x2ab980>; | |
| regulator-min-microvolt = <0x2ab980>; | |
| regulator-name = "VDDAF_2.8V_CAM"; | |
| }; | |
| s2mpb02-ldo11 { | |
| regulator-max-microvolt = <0x2d0370>; | |
| regulator-min-microvolt = <0x2ab980>; | |
| regulator-name = "VDDA_2.9V_CAM"; | |
| }; | |
| s2mpb02-ldo10 { | |
| regulator-max-microvolt = <0x1b7740>; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-name = "VCC_DISPLAY_1.8V"; | |
| }; | |
| s2mpb02-ldo9 { | |
| regulator-max-microvolt = <0x1b7740>; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-name = "VDDA_1.8V_COMP"; | |
| }; | |
| s2mpb02-ldo8 { | |
| regulator-max-microvolt = <0x1b7740>; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-name = "VDDIO_1.8V_COMP"; | |
| }; | |
| s2mpb02-ldo7 { | |
| regulator-max-microvolt = <0x1b7740>; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-name = "VDDIO_1.8V_CAM"; | |
| }; | |
| s2mpb02-ldo6 { | |
| regulator-max-microvolt = <0x1b7740>; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-name = "VDDIO_1.8V_VT"; | |
| }; | |
| s2mpb02-ldo5 { | |
| regulator-max-microvolt = <0x124f80>; | |
| regulator-min-microvolt = <0x124f80>; | |
| regulator-name = "VDDD_1.2V_VT"; | |
| }; | |
| s2mpb02-ldo4 { | |
| regulator-max-microvolt = <0xf4240>; | |
| regulator-min-microvolt = <0xaae60>; | |
| regulator-name = "VDDD_RET_1.0V_COMP"; | |
| }; | |
| s2mpb02-ldo3 { | |
| regulator-max-microvolt = <0x124f80>; | |
| regulator-min-microvolt = <0xf4240>; | |
| regulator-name = "VDDD_1.2V_CAM"; | |
| }; | |
| s2mpb02-ldo2 { | |
| regulator-max-microvolt = <0xf4240>; | |
| regulator-min-microvolt = <0xf4240>; | |
| regulator-name = "VDDD_CORE_1.0V_COMP"; | |
| }; | |
| s2mpb02-ldo1 { | |
| regulator-max-microvolt = <0xdbba0>; | |
| regulator-min-microvolt = <0xdbba0>; | |
| regulator-name = "VDDD_NORET_0.9V_COMP"; | |
| }; | |
| s2mpb02-buck2 { | |
| regulator-max-microvolt = <0xcf850>; | |
| regulator-min-microvolt = <0x9eb10>; | |
| regulator-name = "VDDD_CORE_0.8V_COMP"; | |
| }; | |
| s2mpb02-buck1 { | |
| regulator-max-microvolt = <0x186a00>; | |
| regulator-min-microvolt = <0x186a00>; | |
| regulator-name = "VDD_1P6_DDR"; | |
| }; | |
| }; | |
| }; | |
| }; | |
| hsi2c@13650000 { | |
| status = "okay"; | |
| gpio_scl = <0x4f 0x03 0x01>; | |
| gpio_sda = <0x4f 0x02 0x01>; | |
| samsung,scl-clk-stretching; | |
| clock-names = "rate_hsi2c\0gate_hsi2c"; | |
| clocks = <0x14 0x79 0x14 0x79>; | |
| pinctrl-0 = <0x52>; | |
| pinctrl-names = "default"; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| interrupts = <0x00 0x1ba 0x00>; | |
| reg = <0x13650000 0x1000>; | |
| samsung,check-transdone-int; | |
| compatible = "samsung,exynos5-hsi2c"; | |
| max77843@66 { | |
| max77843,wakeup; | |
| max77843,irq-gpio = <0x55 0x04 0x01>; | |
| pinctrl-0 = <0x53 0x54>; | |
| pinctrl-names = "default"; | |
| reg = <0x66>; | |
| compatible = "maxim,max77843"; | |
| status = "okay"; | |
| regulators { | |
| ESAFEOUT2 { | |
| regulator-max-microvolt = <0x4ac4a0>; | |
| regulator-min-microvolt = <0x325aa0>; | |
| regulator-name = "safeout2_range"; | |
| regulator-compatible = "safeout2"; | |
| }; | |
| ESAFEOUT1 { | |
| regulator-boot-on; | |
| regulator-max-microvolt = <0x4ac4a0>; | |
| regulator-min-microvolt = <0x325aa0>; | |
| regulator-name = "safeout1_range"; | |
| regulator-compatible = "safeout1"; | |
| }; | |
| }; | |
| }; | |
| max77833@66 { | |
| max77833,wakeup; | |
| max77833,irq-gpio = <0x55 0x04 0x01>; | |
| pinctrl-0 = <0x53 0x54>; | |
| pinctrl-names = "default"; | |
| reg = <0x66>; | |
| compatible = "maxim,max77833"; | |
| status = "disabled"; | |
| regulators { | |
| ESAFEOUT2 { | |
| regulator-max-microvolt = <0x4ac4a0>; | |
| regulator-min-microvolt = <0x325aa0>; | |
| regulator-name = "safeout2_range"; | |
| regulator-compatible = "safeout2"; | |
| }; | |
| ESAFEOUT1 { | |
| regulator-boot-on; | |
| regulator-max-microvolt = <0x4ac4a0>; | |
| regulator-min-microvolt = <0x325aa0>; | |
| regulator-name = "safeout1_range"; | |
| regulator-compatible = "safeout1"; | |
| }; | |
| }; | |
| }; | |
| }; | |
| hsi2c@13640000 { | |
| status = "okay"; | |
| gpio_scl = <0x4f 0x01 0x01>; | |
| gpio_sda = <0x4f 0x00 0x01>; | |
| samsung,scl-clk-stretching; | |
| clock-names = "rate_hsi2c\0gate_hsi2c"; | |
| clocks = <0x14 0x78 0x14 0x78>; | |
| pinctrl-0 = <0x4e>; | |
| pinctrl-names = "default"; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| interrupts = <0x00 0x1b9 0x00>; | |
| reg = <0x13640000 0x1000>; | |
| samsung,check-transdone-int; | |
| compatible = "samsung,exynos5-hsi2c"; | |
| max98505@31 { | |
| maxim,sysclk = <0xbb8000>; | |
| maxim,spk_vol = <0x14>; | |
| maxim,platform_type = <0x00>; | |
| i2c-gpio,delay-us = <0x02>; | |
| gpios = <0x4f 0x01 0x00 0x4f 0x00 0x00>; | |
| pinctrl-0 = <0x50 0x51>; | |
| pinctrl-names = "default"; | |
| reg = <0x31>; | |
| compatible = "maxim,max98505"; | |
| }; | |
| }; | |
| spi@143A0000 { | |
| num-cs = <0x01>; | |
| samsung,power-domain = <0x49>; | |
| domain = "cam1"; | |
| pinctrl-0 = <0x4b 0x4c>; | |
| pinctrl-names = "default"; | |
| clock-names = "spi\0spi_busclk0"; | |
| clocks = <0x14 0xc6a 0x14 0x7ef>; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| swap-mode; | |
| interrupts = <0x00 0xaf 0x00>; | |
| reg = <0x143a0000 0x100>; | |
| compatible = "samsung,exynos742x-spi"; | |
| fimc_is_spi_0@0 { | |
| pinctrl-0 = <0x4d>; | |
| pinctrl-names = "default"; | |
| fimc_is_spi_mosi = "gpc3-7"; | |
| fimc_is_spi_miso = "gpc3-6"; | |
| fimc_is_spi_ssn = "gpc3-5"; | |
| fimc_is_spi_clk = "gpc3-4"; | |
| fimc_is_spi_pinname = "13470000.pinctrl"; | |
| reg = <0x00>; | |
| spi-max-frequency = <0x2faf080>; | |
| compatible = "samsung,fimc_is_spi1"; | |
| controller-data { | |
| samsung,spi-feedback-delay = <0x00>; | |
| cs-gpio = <0x4a 0x05 0x00>; | |
| }; | |
| }; | |
| }; | |
| spi@14390000 { | |
| num-cs = <0x01>; | |
| samsung,power-domain = <0x49>; | |
| domain = "cam1"; | |
| pinctrl-0 = <0x47 0x48>; | |
| pinctrl-names = "default"; | |
| clock-names = "spi\0spi_busclk0"; | |
| clocks = <0x14 0xc69 0x14 0x7ee>; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| swap-mode; | |
| interrupts = <0x00 0xa4 0x00>; | |
| reg = <0x14390000 0x100>; | |
| compatible = "samsung,exynos742x-spi"; | |
| fimc_is_spi_0@0 { | |
| fimc_is_spi_mosi = "gpc3-3"; | |
| fimc_is_spi_miso = "gpc3-2"; | |
| fimc_is_spi_ssn = "gpc3-1"; | |
| fimc_is_spi_clk = "gpc3-0"; | |
| fimc_is_spi_pinname = "13470000.pinctrl"; | |
| reg = <0x00>; | |
| spi-max-frequency = <0x2faf080>; | |
| compatible = "samsung,fimc_is_spi0"; | |
| controller-data { | |
| samsung,spi-feedback-delay = <0x01>; | |
| cs-gpio = <0x4a 0x01 0x00>; | |
| }; | |
| }; | |
| }; | |
| spi@14d90000 { | |
| status = "disabled"; | |
| pinctrl-0 = <0x46>; | |
| pinctrl-names = "default"; | |
| clock-names = "spi\0spi_busclk0"; | |
| clocks = <0x14 0x89 0x14 0x75>; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| swap-mode; | |
| interrupts = <0x00 0x1d5 0x00>; | |
| reg = <0x14d90000 0x100>; | |
| compatible = "samsung,exynos742x-spi"; | |
| }; | |
| spi@14d70000 { | |
| secure-mode; | |
| status = "okay"; | |
| pinctrl-0 = <0x39 0x3a>; | |
| pinctrl-names = "default"; | |
| clock-names = "spi\0spi_busclk0"; | |
| clocks = <0x14 0x88 0x14 0x74>; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| swap-mode; | |
| interrupts = <0x00 0x1d4 0x00>; | |
| reg = <0x14d70000 0x100>; | |
| compatible = "samsung,exynos742x-spi"; | |
| vfsspi-spi@0 { | |
| vfsspi-ldocontrol = <0x01>; | |
| vfsspi-orient = <0x00>; | |
| vfsspi-ocpen = <0x45 0x04 0x01>; | |
| vfsspi-ldoPin2 = <0x44 0x07 0x00>; | |
| vfsspi-ldoPin = <0x44 0x06 0x00>; | |
| vfsspi-drdyPin = <0x43 0x07 0x00>; | |
| vfsspi-sleepPin = <0x42 0x04 0x00>; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| pinctrl-2 = <0x41>; | |
| pinctrl-1 = <0x40>; | |
| pinctrl-0 = <0x3b 0x3c 0x3d 0x3e 0x3f>; | |
| pinctrl-names = "default\0sleep\0idle"; | |
| spi-max-frequency = <0x124f800>; | |
| reg = <0x00>; | |
| compatible = "vfsspi,vfs7xxx"; | |
| controller-data { | |
| samsung,spi-chip-select-mode = <0x00>; | |
| samsung,spi-feedback-delay = <0x00>; | |
| }; | |
| }; | |
| }; | |
| spi@14d50000 { | |
| samsung,ese-oberthur; | |
| pinctrl-4 = <0x37>; | |
| pinctrl-3 = <0x36>; | |
| pinctrl-2 = <0x35>; | |
| pinctrl-1 = <0x34>; | |
| spiclk-pin-name = "gpg4-0"; | |
| spiclk-pindev-name = "14c90000.pinctrl"; | |
| status = "okay"; | |
| pinctrl-0 = <0x33>; | |
| pinctrl-names = "default\0ese-pwoff\0clk-fix\0clk-recover\0ese-disable"; | |
| clock-names = "spi\0spi_busclk0"; | |
| clocks = <0x14 0x87 0x14 0x73>; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| swap-mode; | |
| dma-names = "tx\0rx"; | |
| dmas = <0x29 0x0d 0x29 0x0c>; | |
| dma-mode; | |
| interrupts = <0x00 0x1d3 0x00>; | |
| reg = <0x14d50000 0x100>; | |
| compatible = "samsung,exynos742x-spi"; | |
| ese_spi@0 { | |
| p3-vdd-1p8 = "VDD_1.8V_ESE"; | |
| p3-cs-gpio = <0x38 0x01 0x00>; | |
| p3-clkpin = <0x18>; | |
| p3-cspin = <0x17>; | |
| p3-misopin = <0x16>; | |
| p3-mosipin = <0x15>; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| spi-max-frequency = <0x989680>; | |
| reg = <0x00>; | |
| compatible = "ese_p3"; | |
| controller-data { | |
| samsung,spi-chip-select-mode = <0x01>; | |
| }; | |
| }; | |
| }; | |
| spi@14d40000 { | |
| status = "okay"; | |
| pinctrl-0 = <0x31 0x32>; | |
| pinctrl-names = "default"; | |
| clock-names = "spi\0spi_busclk0"; | |
| clocks = <0x14 0x86 0x14 0x72>; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| interrupts = <0x00 0x1d2 0x00>; | |
| reg = <0x14d40000 0x100>; | |
| compatible = "samsung,exynos742x-spi"; | |
| spidev@0 { | |
| spi-max-frequency = <0x186a0>; | |
| reg = <0x00>; | |
| compatible = "spi_boot_link"; | |
| #size-cells = <0x01>; | |
| #address-cells = <0x01>; | |
| controller-data { | |
| samsung,spi-chip-select-mode = <0x01>; | |
| samsung,spi-feedback-delay = <0x00>; | |
| }; | |
| }; | |
| }; | |
| spi@14d30000 { | |
| num-cs = <0x01>; | |
| spi-clkoff-time = <0x00>; | |
| status = "okay"; | |
| pinctrl-0 = <0x2a 0x2b>; | |
| pinctrl-names = "default"; | |
| clock-names = "spi\0spi_busclk0"; | |
| clocks = <0x14 0x85 0x14 0x71>; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| swap-mode; | |
| dma-names = "tx\0rx"; | |
| dmas = <0x29 0x09 0x29 0x08>; | |
| dma-mode; | |
| interrupts = <0x00 0x1d1 0x00>; | |
| reg = <0x14d30000 0x100>; | |
| compatible = "samsung,exynos742x-spi"; | |
| BCM4773@0 { | |
| ssp-glass-type = <0x00>; | |
| ssp-hw-rev = <0x03>; | |
| ssp-mag-array = <0x27e5 0xfffffe98 0x9a 0xffffff32 0x21e1 0xffffffc5 0xffffffbe 0xffffffc5 0x28ef>; | |
| ssp-ap-rev = <0x01>; | |
| ssp,prox-low_thresh = <0x578>; | |
| ssp,prox-hi_thresh = <0x7d0>; | |
| ssp-sns-combination = <0x00>; | |
| ssp-mag-position = <0x00>; | |
| ssp-acc-position = <0x00>; | |
| ssp-mcu-resp = <0x25 0x04 0x00>; | |
| ssp-mcu-req = <0x25 0x05 0x01>; | |
| ssp-host-req = <0x2f 0x06 0x01>; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| pinctrl-0 = <0x2c 0x2d 0x2e>; | |
| pinctrl-names = "default"; | |
| spi-cpha; | |
| spi-cpol; | |
| spi-max-frequency = <0x18cba80>; | |
| reg = <0x00>; | |
| compatible = "ssp,BCM4773"; | |
| controller-data { | |
| samsung,spi-feedback-delay = <0x00>; | |
| cs-gpio = <0x30 0x03 0x00>; | |
| }; | |
| }; | |
| }; | |
| spi@14d20000 { | |
| num-cs = <0x01>; | |
| status = "okay"; | |
| pinctrl-0 = <0x21>; | |
| pinctrl-names = "default"; | |
| clock-names = "spi\0spi_busclk0"; | |
| clocks = <0x14 0x84 0x14 0x76>; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| swap-mode; | |
| interrupts = <0x00 0x1d0 0x00>; | |
| reg = <0x14d20000 0x100>; | |
| compatible = "samsung,exynos742x-spi"; | |
| wm1840@0 { | |
| phandle = <0xd7>; | |
| linux,phandle = <0xd7>; | |
| SPKVDDR-supply = <0x27>; | |
| SPKVDDL-supply = <0x27>; | |
| DBVDD4-supply = <0x27>; | |
| DBVDD3-supply = <0x27>; | |
| DBVDD2-supply = <0x27>; | |
| CPVDD-supply = <0x27>; | |
| DBVDD1-supply = <0x27>; | |
| LDOVDD-supply = <0x27>; | |
| AVDD-supply = <0x27>; | |
| DCVDD-supply = <0x26>; | |
| wlf,rev-specific-fw; | |
| wlf,out-mono = <0x00 0x01 0x01 0x00 0x00 0x00>; | |
| wlf,inmode = <0x02 0x02 0x00 0x00 0x02 0x02 0x02 0x02 0x00 0x00 0x00 0x00>; | |
| wlf,dmic-ref = <0x01 0x02 0x01 0x00 0x00 0x00>; | |
| wlf,max-channels-clocked = <0x02 0x00 0x00 0x00>; | |
| wlf,jd-wake-time = <0x1388>; | |
| wlf,micd-open-circuit-declare = <0x01>; | |
| wlf,micd-software-compare; | |
| wlf,gpsw = <0x03>; | |
| wlf,gpio-defaults = <0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0x2000 0x6000 0x2000 0x6000 0x2000 0x6000 0x2000 0x6000 0x2000 0x6000 0x2000 0x6000 0x2000 0x6000 0x2000 0x6000 0x2000 0x6000 0x2000 0x6000 0x2000 0x6000 0x2000 0x6000 0x2000 0x6000 0x2000 0x6000 0x2000 0x6000 0x2000 0x6000 0x2000 0xe000 0x2000 0xe000 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff 0xffffffff>; | |
| wlf,micbias4 = <0x708 0x00 0x01 0x00 0x00>; | |
| wlf,micbias3 = <0x708 0x00 0x01 0x00 0x00>; | |
| wlf,micbias2 = <0xaf0 0x00 0x01 0x00 0x00>; | |
| wlf,micbias1 = <0x708 0x00 0x01 0x00 0x00>; | |
| wlf,micd-configs = <0x00 0x02 0x00>; | |
| wlf,hs-mic = <0x03>; | |
| wlf,micd-ranges = <0x74 0xe2 0xad 0x246 0x141 0x73 0x2f0 0x72 0x4e9 0xd9>; | |
| wlf,hpdet-short-circuit-imp = <0x03>; | |
| wlf,hpdet-ext-res = <0x21>; | |
| wlf,hpdet-channel = <0x01>; | |
| wlf,hpdet-moisture-debounce = <0x28>; | |
| wlf,hpdet-moisture-imp = <0x7d0>; | |
| wlf,micd-force-micbias; | |
| wlf,micd-timeout = <0x3e8>; | |
| wlf,micd-dbtime = <0x01>; | |
| wlf,micd-rate = <0x07>; | |
| wlf,micd-bias-start-time = <0x01>; | |
| wlf,micd-pol-gpio = <0x00>; | |
| wlf,micd-detect-debounce = <0x12c>; | |
| wlf,micd-clamp-mode = <0x08>; | |
| wlf,use-jd-gpio; | |
| wlf,init-mic-delay = <0x1e>; | |
| wlf,reset = <0x25 0x00 0x00>; | |
| pinctrl-0 = <0x23 0x24>; | |
| pinctrl-names = "default"; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| interrupt-parent = <0x22>; | |
| interrupts = <0x05 0x00 0x00>; | |
| spi-max-frequency = <0x1312d00>; | |
| reg = <0x00>; | |
| compatible = "wlf,wm1840"; | |
| controller-data { | |
| samsung,spi-feedback-delay = <0x00>; | |
| cs-gpio = <0x28 0x01 0x00>; | |
| }; | |
| adsps { | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| adsp@2FFE00 { | |
| reg = <0x2ffe00>; | |
| firmware { | |
| DSM { | |
| wlf,bin-file = "None"; | |
| wlf,wmfw-file = "dsm"; | |
| }; | |
| }; | |
| }; | |
| adsp@37FE00 { | |
| reg = <0x37fe00>; | |
| firmware { | |
| LPSD { | |
| wlf,bin-file = "lpsd-control"; | |
| wlf,wmfw-file = "ez2-control"; | |
| }; | |
| VOICECONTROL { | |
| wlf,compr-caps = <0x01 0x01 0x04 0x01 0x3e80>; | |
| wlf,bin-file = "ez2-control"; | |
| wlf,wmfw-file = "ez2-control"; | |
| }; | |
| }; | |
| }; | |
| adsp@27FE00 { | |
| reg = <0x27fe00>; | |
| firmware { | |
| RX_WB { | |
| wlf,bin-file = "rx-anc-wb"; | |
| wlf,wmfw-file = "rx-anc-wb"; | |
| }; | |
| RX_NB { | |
| wlf,bin-file = "rx-anc-nb"; | |
| wlf,wmfw-file = "rx-anc-nb"; | |
| }; | |
| }; | |
| }; | |
| adsp@1FFE00 { | |
| reg = <0x1ffe00>; | |
| firmware { | |
| TX_WB_MEETING { | |
| wlf,bin-file = "tx-wb-meeting"; | |
| wlf,wmfw-file = "tx-wb-meeting"; | |
| }; | |
| TX_SWB_CONVERSATION { | |
| wlf,bin-file = "tx-swb-conversation"; | |
| wlf,wmfw-file = "tx-swb"; | |
| }; | |
| TX_SWB_INTERVIEW { | |
| wlf,bin-file = "tx-swb-interview"; | |
| wlf,wmfw-file = "tx-swb"; | |
| }; | |
| TX_WB { | |
| wlf,bin-file = "tx-wb"; | |
| wlf,wmfw-file = "tx-wb"; | |
| }; | |
| TX_NB { | |
| wlf,bin-file = "tx-nb"; | |
| wlf,wmfw-file = "tx-nb"; | |
| }; | |
| }; | |
| }; | |
| adsp@17FE00 { | |
| reg = <0x17fe00>; | |
| firmware { | |
| TX_FB_MEETING { | |
| wlf,bin-file = "tx-fb-meeting"; | |
| wlf,wmfw-file = "tx-fb-meeting"; | |
| }; | |
| TX_SWB_CONVERSATION { | |
| wlf,bin-file = "None"; | |
| wlf,wmfw-file = "tx-swb"; | |
| }; | |
| TX_SWB_INTERVIEW { | |
| wlf,bin-file = "None"; | |
| wlf,wmfw-file = "tx-swb"; | |
| }; | |
| TX_WB { | |
| wlf,bin-file = "None"; | |
| wlf,wmfw-file = "tx-wb"; | |
| }; | |
| TX_NB { | |
| wlf,bin-file = "None"; | |
| wlf,wmfw-file = "tx-nb"; | |
| }; | |
| }; | |
| }; | |
| adsp@0FFE00 { | |
| reg = <0xffe00>; | |
| firmware { | |
| TRACE { | |
| wlf,compr-caps = <0x01 0x08 0x04 0x01 0x1f40 0x3e80 0x5dc0>; | |
| wlf,bin-file = "None"; | |
| wlf,wmfw-file = "trace"; | |
| }; | |
| }; | |
| }; | |
| }; | |
| }; | |
| }; | |
| uart@11460000 { | |
| status = "okay"; | |
| uart-sclk-frequency = <0x6f94740>; | |
| samsung,lpass-subip; | |
| clock-names = "gate_pclk4\0gate_uart4\0sclk_uart4"; | |
| clocks = <0x14 0x1a0 0x14 0x1b0 0x14 0x1c7>; | |
| pinctrl-2 = <0x20>; | |
| pinctrl-1 = <0x1f>; | |
| pinctrl-0 = <0x1c 0x1d 0x1e>; | |
| pinctrl-names = "default\0idle\0lpm"; | |
| interrupts = <0x00 0x5b 0x00>; | |
| reg = <0x11460000 0x100>; | |
| samsung,separate-uart-clk; | |
| compatible = "samsung,exynos7420-uart"; | |
| }; | |
| uart@14C40000 { | |
| status = "okay"; | |
| clock-names = "gate_pclk3\0gate_uart3\0sclk_uart3"; | |
| clocks = <0x14 0x6f 0x14 0x70 0x14 0x6e>; | |
| pinctrl-0 = <0x1b>; | |
| pinctrl-names = "default"; | |
| interrupts = <0x00 0x1ca 0x00>; | |
| reg = <0x14c40000 0x100>; | |
| samsung,separate-uart-clk; | |
| compatible = "samsung,exynos7420-uart"; | |
| }; | |
| uart@14C30000 { | |
| status = "okay"; | |
| clock-names = "gate_pclk2\0gate_uart2\0sclk_uart2"; | |
| clocks = <0x14 0x6b 0x14 0x6c 0x14 0x66>; | |
| pinctrl-0 = <0x1a>; | |
| pinctrl-names = "default"; | |
| interrupts = <0x00 0x1c9 0x00>; | |
| reg = <0x14c30000 0x100>; | |
| samsung,separate-uart-clk; | |
| compatible = "samsung,exynos7420-uart"; | |
| }; | |
| uart@14C20000 { | |
| status = "okay"; | |
| clock-names = "gate_pclk1\0gate_uart1\0sclk_uart1"; | |
| clocks = <0x14 0x69 0x14 0x6a 0x14 0x65>; | |
| pinctrl-0 = <0x19>; | |
| pinctrl-names = "default"; | |
| interrupts = <0x00 0x1c8 0x00>; | |
| reg = <0x14c20000 0x100>; | |
| samsung,separate-uart-clk; | |
| compatible = "samsung,exynos7420-uart"; | |
| }; | |
| uart@13630000 { | |
| status = "disabled"; | |
| uart-sclk-frequency = <0xbebc200>; | |
| clock-names = "gate_pclk0\0gate_uart0\0sclk_uart0"; | |
| clocks = <0x14 0x67 0x14 0x68 0x14 0x64>; | |
| pinctrl-0 = <0x18>; | |
| pinctrl-names = "default"; | |
| interrupts = <0x00 0x1b8 0x00>; | |
| reg = <0x13630000 0x100>; | |
| samsung,separate-uart-clk; | |
| compatible = "samsung,exynos7420-uart"; | |
| }; | |
| lpass@11400000 { | |
| phandle = <0xb8>; | |
| linux,phandle = <0xb8>; | |
| status = "ok"; | |
| samsung,power-domain = <0x17>; | |
| clock-names = "dmac\0sramc\0intr\0timer\0fin_pll\0fout_aud_pll\0dout_sclk_aud_pll\0mout_aud_pll_user_top\0mout_aud_pll_user\0dout_aud_cdclk\0mout_sclk_i2s\0dout_sclk_i2s\0mout_aud_pll_top0\0mout_sclk_i2s1\0dout_sclk_i2s1\0dout_aclk_aud\0dout_aclk_ca5"; | |
| clocks = <0x14 0x190 0x14 0x191 0x14 0x196 0x14 0x19d 0x14 0x01 0x14 0x29 0x14 0x1d7 0x14 0x1d8 0x14 0x1b8 0x14 0x1c5 0x14 0x1ba 0x14 0x1c9 0x14 0x1d9 0x14 0x1dd 0x14 0x1e2 0x14 0x1c3 0x14 0x1c4>; | |
| reg = <0x11400000 0x100 0x3000000 0x48000 0x11500000 0x100>; | |
| #pb-id-cells = <0x00>; | |
| compatible = "samsung,exynos7420-lpass"; | |
| }; | |
| mct@101C0000 { | |
| use-clockevent-only; | |
| clock-names = "fin_pll\0mct"; | |
| clocks = <0x14 0x01 0x14 0x6d>; | |
| interrupts = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b>; | |
| interrupt-parent = <0x16>; | |
| #interrupt-cells = <0x01>; | |
| interrupt-controller; | |
| reg = <0x101c0000 0x800>; | |
| compatible = "samsung,exynos4210-mct"; | |
| mct-map { | |
| phandle = <0x16>; | |
| linux,phandle = <0x16>; | |
| interrupt-map = <0x00 0x01 0x00 0x70 0x00 0x01 0x01 0x00 0x71 0x00 0x02 0x01 0x00 0x72 0x00 0x03 0x01 0x00 0x73 0x00 0x04 0x01 0x00 0x74 0x00 0x05 0x01 0x00 0x75 0x00 0x06 0x01 0x00 0x76 0x00 0x07 0x01 0x00 0x77 0x00 0x08 0x01 0x00 0x78 0x00 0x09 0x01 0x00 0x79 0x00 0x0a 0x01 0x00 0x7a 0x00 0x0b 0x01 0x00 0x7b 0x00>; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x00>; | |
| #interrupt-cells = <0x01>; | |
| }; | |
| }; | |
| clock-controller@0x10570000 { | |
| phandle = <0x14>; | |
| linux,phandle = <0x14>; | |
| #clock-cells = <0x01>; | |
| reg = <0x10570000 0x1000>; | |
| compatible = "samsung,exynos7420-clock"; | |
| }; | |
| timer { | |
| use-physical-timer; | |
| use-clocksource-only; | |
| clock-frequency = <0x16e3600>; | |
| interrupts = <0x01 0x0d 0xff01 0x01 0x0e 0xff01 0x01 0x0b 0xff01 0x01 0x0a 0xff01>; | |
| compatible = "arm,armv8-timer"; | |
| }; | |
| interrupt-controller@11001000 { | |
| phandle = <0x01>; | |
| linux,phandle = <0x01>; | |
| interrupts = <0x01 0x09 0xf04>; | |
| reg = <0x11001000 0x1000 0x11002000 0x1000 0x11004000 0x2000 0x11006000 0x2000>; | |
| interrupt-controller; | |
| #address-cells = <0x00>; | |
| #interrupt-cells = <0x03>; | |
| compatible = "arm,cortex-a15-gic\0arm,cortex-a9-gic"; | |
| }; | |
| adc@13620000 { | |
| phandle = <0xe6>; | |
| linux,phandle = <0xe6>; | |
| clock-names = "gate_adcif"; | |
| clocks = <0x14 0x8e>; | |
| io-channel-ranges; | |
| #io-channel-cells = <0x01>; | |
| interrupts = <0x00 0x1c0 0x00>; | |
| reg = <0x13620000 0x100>; | |
| compatible = "samsung,exynos-adc-v2"; | |
| }; | |
| persistent_clock@10590000 { | |
| clock-names = "gate_rtc"; | |
| clocks = <0x14 0xb9>; | |
| reg = <0x10590000 0x100>; | |
| compatible = "samsung,exynos_persistent_clock"; | |
| }; | |
| rtc@10590000 { | |
| clock-names = "gate_rtc"; | |
| clocks = <0x14 0xb9>; | |
| interrupts = <0x00 0x163 0x00 0x00 0x164 0x00>; | |
| reg = <0x10590000 0x100>; | |
| compatible = "samsung,s3c6410-rtc"; | |
| }; | |
| watchdog@10020000 { | |
| pmu_wdt_reset_type = <0x01>; | |
| timeout-sec = <0x1e>; | |
| clock-names = "rate_watchdog\0gate_watchdog"; | |
| clocks = <0x14 0x8c 0x14 0x8c>; | |
| interrupts = <0x00 0x65 0x00>; | |
| reg = <0x10020000 0x100>; | |
| compatible = "samsung,s3c2410-wdt"; | |
| }; | |
| pwm-clock-controller@136c0000 { | |
| phandle = <0x15>; | |
| linux,phandle = <0x15>; | |
| #clock-cells = <0x01>; | |
| reg = <0x136c0000 0x50>; | |
| compatible = "samsung,exynos-pwm-clock"; | |
| }; | |
| pwm@136c0000 { | |
| clock-control = <0x01>; | |
| status = "ok"; | |
| clock-names = "gate_timers\0pwm-scaler0\0pwm-scaler1\0pwm-tdiv0\0pwm-tdiv1\0pwm-tdiv2\0pwm-tdiv3\0pwm-tin0\0pwm-tin1\0pwm-tin2\0pwm-tin3"; | |
| clocks = <0x14 0x8d 0x15 0x01 0x15 0x02 0x15 0x05 0x15 0x06 0x15 0x07 0x15 0x08 0x15 0x0a 0x15 0x0b 0x15 0x0c 0x15 0x0d>; | |
| #pwm-cells = <0x03>; | |
| reg = <0x136c0000 0x1000>; | |
| compatible = "samsung,s3c6400-pwm"; | |
| }; | |
| power-mode { | |
| lpc_residency = <0xbb8>; | |
| cpd_residency = <0xbb8>; | |
| lpc-val = <0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x107f00 0x11f1f0 0x18 0x0f 0x0f 0x0f>; | |
| lpc-reg = <0x105c4044 0x105c4064 0x105c4084 0x105c4104 0x105c41a4 0x105c41e4 0x13610900 0x14c80900 0x10e90800 0x105c4144 0x105c4184 0x105c41c4>; | |
| lpm-val = <0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x0f 0x107f00 0x11f1f0>; | |
| lpm-reg = <0x105c4044 0x105c4064 0x105c4084 0x105c4104 0x105c4144 0x105c4184 0x105c41a4 0x105c41c4 0x105c41e4 0x13610900 0x14c80900>; | |
| compatible = "exynos,power-mode"; | |
| }; | |
| apm@11240000 { | |
| compatible = "samsung,exynos-apm"; | |
| }; | |
| mailbox@11240000 { | |
| cl_period = <0x00>; | |
| asv_v3_mif_margin = <0x02>; | |
| asv_v3_g3d_margin = <0x02>; | |
| asv_v3_apollo_margin = <0x04>; | |
| asv_v3_atlas_margin = <0x04>; | |
| asv_v2_mif_margin = <0x02>; | |
| asv_v2_g3d_margin = <0x02>; | |
| asv_v2_apollo_margin = <0x02>; | |
| asv_v2_atlas_margin = <0x02>; | |
| asv_v1_mif_margin = <0x00>; | |
| asv_v1_g3d_margin = <0x00>; | |
| asv_v1_apollo_margin = <0x02>; | |
| asv_v1_atlas_margin = <0x02>; | |
| asv_v0_mif_margin = <0x00>; | |
| asv_v0_g3d_margin = <0x00>; | |
| asv_v0_apollo_margin = <0x00>; | |
| asv_v0_atlas_margin = <0x00>; | |
| interrupts = <0x00 0x11d 0x00 0x00 0x11f 0x00>; | |
| reg = <0x11240000 0x100 0x11200000 0x40000>; | |
| samsung,mbox-names = "exynos-apm"; | |
| compatible = "samsung,exynos-mailbox"; | |
| }; | |
| psci { | |
| cpu_on = <0xc4000003>; | |
| cpu_off = <0x84000002>; | |
| cpu_suspend = <0xc4000001>; | |
| method = "smc"; | |
| compatible = "arm,psci"; | |
| }; | |
| coresight { | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| reg = <0x16000000 0xc00000>; | |
| compatible = "exynos,coresight"; | |
| etr { | |
| offset = <0xb000>; | |
| device_type = "etr"; | |
| }; | |
| etf { | |
| offset = <0xc000>; | |
| device_type = "etf"; | |
| }; | |
| funnel@1 { | |
| offset = <0x9000>; | |
| device_type = "funnel"; | |
| }; | |
| funnel@0 { | |
| offset = <0x4000>; | |
| device_type = "funnel"; | |
| }; | |
| etm_atlas@3 { | |
| offset = <0x740000>; | |
| device_type = "etm"; | |
| }; | |
| etm_atlas@2 { | |
| offset = <0x640000>; | |
| device_type = "etm"; | |
| }; | |
| etm_atlas@1 { | |
| offset = <0x540000>; | |
| device_type = "etm"; | |
| }; | |
| etm_atlas@0 { | |
| offset = <0x440000>; | |
| device_type = "etm"; | |
| }; | |
| etm_apollo@3 { | |
| offset = <0xb40000>; | |
| device_type = "etm"; | |
| }; | |
| etm_apollo@2 { | |
| offset = <0xa40000>; | |
| device_type = "etm"; | |
| }; | |
| etm_apollo@1 { | |
| offset = <0x940000>; | |
| device_type = "etm"; | |
| }; | |
| etm_apollo@0 { | |
| offset = <0x840000>; | |
| device_type = "etm"; | |
| }; | |
| css_pc@7 { | |
| offset = <0x710000>; | |
| device_type = "cs"; | |
| }; | |
| css_pc@6 { | |
| offset = <0x610000>; | |
| device_type = "cs"; | |
| }; | |
| css_pc@5 { | |
| offset = <0x510000>; | |
| device_type = "cs"; | |
| }; | |
| css_pc@4 { | |
| offset = <0x410000>; | |
| device_type = "cs"; | |
| }; | |
| css_pc@3 { | |
| offset = <0xb10000>; | |
| device_type = "cs"; | |
| }; | |
| css_pc@2 { | |
| offset = <0xa10000>; | |
| device_type = "cs"; | |
| }; | |
| css_pc@1 { | |
| offset = <0x910000>; | |
| device_type = "cs"; | |
| }; | |
| css_pc@0 { | |
| offset = <0x810000>; | |
| device_type = "cs"; | |
| }; | |
| }; | |
| cpus { | |
| #size-cells = <0x00>; | |
| #address-cells = <0x02>; | |
| cpu@3 { | |
| cpu-idle-states = <0x11 0x12 0x13>; | |
| enable-method = "psci"; | |
| reg = <0x00 0x03>; | |
| compatible = "arm,cortex-a57\0arm,armv8"; | |
| device_type = "cpu"; | |
| }; | |
| cpu@2 { | |
| cpu-idle-states = <0x11 0x12 0x13>; | |
| enable-method = "psci"; | |
| reg = <0x00 0x02>; | |
| compatible = "arm,cortex-a57\0arm,armv8"; | |
| device_type = "cpu"; | |
| }; | |
| cpu@1 { | |
| cpu-idle-states = <0x11 0x12 0x13>; | |
| enable-method = "psci"; | |
| reg = <0x00 0x01>; | |
| compatible = "arm,cortex-a57\0arm,armv8"; | |
| device_type = "cpu"; | |
| }; | |
| cpu@0 { | |
| cpu-idle-states = <0x11 0x12 0x13>; | |
| enable-method = "psci"; | |
| reg = <0x00 0x00>; | |
| compatible = "arm,cortex-a57\0arm,armv8"; | |
| device_type = "cpu"; | |
| }; | |
| cpu@103 { | |
| cpu-idle-states = <0x11 0x12 0x13>; | |
| enable-method = "psci"; | |
| reg = <0x00 0x103>; | |
| compatible = "arm,cortex-a53\0arm,armv8"; | |
| device_type = "cpu"; | |
| }; | |
| cpu@102 { | |
| cpu-idle-states = <0x11 0x12 0x13>; | |
| enable-method = "psci"; | |
| reg = <0x00 0x102>; | |
| compatible = "arm,cortex-a53\0arm,armv8"; | |
| device_type = "cpu"; | |
| }; | |
| cpu@101 { | |
| cpu-idle-states = <0x11 0x12 0x13>; | |
| enable-method = "psci"; | |
| reg = <0x00 0x101>; | |
| compatible = "arm,cortex-a53\0arm,armv8"; | |
| device_type = "cpu"; | |
| }; | |
| cpu@100 { | |
| cpu-idle-states = <0x11 0x12 0x13>; | |
| enable-method = "psci"; | |
| reg = <0x00 0x100>; | |
| compatible = "arm,cortex-a53\0arm,armv8"; | |
| device_type = "cpu"; | |
| }; | |
| idle-states { | |
| multiple_drv_count = <0x02>; | |
| entry-method = "arm,psci"; | |
| LPM { | |
| phandle = <0x13>; | |
| linux,phandle = <0x13>; | |
| compatible = "arm,idle-state"; | |
| CLUSTER1_LPM { | |
| cluster = <0x01>; | |
| status = "enabled"; | |
| min-residency-us = <0xbb8>; | |
| exit-latency-us = <0x12c>; | |
| entry-method-param = <0x1000000>; | |
| desc = "System power down"; | |
| }; | |
| CLUSTER0_LPM { | |
| cluster = <0x00>; | |
| status = "enabled"; | |
| min-residency-us = <0xbb8>; | |
| exit-latency-us = <0x12c>; | |
| entry-method-param = <0x1000000>; | |
| desc = "System power down"; | |
| }; | |
| }; | |
| C2 { | |
| phandle = <0x12>; | |
| linux,phandle = <0x12>; | |
| compatible = "arm,idle-state"; | |
| CLUSTER1_C2 { | |
| cluster = <0x01>; | |
| status = "enabled"; | |
| min-residency-us = <0x2ee>; | |
| exit-latency-us = <0x64>; | |
| entry-method-param = <0x00>; | |
| desc = "APOLLO power down"; | |
| }; | |
| CLUSTER0_C2 { | |
| cluster = <0x00>; | |
| status = "enabled"; | |
| min-residency-us = <0x7d0>; | |
| exit-latency-us = <0x64>; | |
| entry-method-param = <0x00>; | |
| desc = "ATLAS power down"; | |
| }; | |
| }; | |
| C1 { | |
| phandle = <0x11>; | |
| linux,phandle = <0x11>; | |
| compatible = "arm,idle-state"; | |
| CLUSTER1_C1 { | |
| cluster = <0x01>; | |
| status = "enabled"; | |
| min-residency-us = <0x1f4>; | |
| exit-latency-us = <0x01>; | |
| entry-method-param = <0x00>; | |
| desc = "APOLLO clock gating(WFI)"; | |
| }; | |
| CLUSTER0_C1 { | |
| cluster = <0x00>; | |
| status = "enabled"; | |
| min-residency-us = <0x1f4>; | |
| exit-latency-us = <0x01>; | |
| entry-method-param = <0x00>; | |
| desc = "ATLAS clock gating(WFI)"; | |
| }; | |
| }; | |
| }; | |
| }; | |
| aliases { | |
| spi7 = "/spi@143A0000"; | |
| spi6 = "/spi@14390000"; | |
| spi5 = "/spi@14d90000"; | |
| spi4 = "/spi@14d70000"; | |
| spi3 = "/spi@14d50000"; | |
| spi2 = "/spi@14d40000"; | |
| spi1 = "/spi@14d30000"; | |
| spi0 = "/spi@14d20000"; | |
| mfc0 = "/mfc0@152E0000"; | |
| jpeg0 = "/iommu-domain_mscl/jpeg0@15020000"; | |
| scaler1 = "/iommu-domain_mscl/scaler@0x150100000"; | |
| scaler0 = "/iommu-domain_mscl/scaler@0x150000000"; | |
| fimg2d0 = "/iommu-domain_g2d/fimg2d@15100000"; | |
| hsi2c11 = "/hsi2c@136A0000"; | |
| hsi2c10 = "/hsi2c@13690000"; | |
| hsi2c9 = "/hsi2c@13680000"; | |
| hsi2c8 = "/hsi2c@14E20000"; | |
| hsi2c7 = "/hsi2c@14E10000"; | |
| hsi2c6 = "/hsi2c@14E00000"; | |
| hsi2c5 = "/hsi2c@13670000"; | |
| hsi2c4 = "/hsi2c@13660000"; | |
| hsi2c3 = "/hsi2c@14E70000"; | |
| hsi2c2 = "/hsi2c@14E60000"; | |
| hsi2c1 = "/hsi2c@13650000"; | |
| hsi2c0 = "/hsi2c@13640000"; | |
| uart4 = "/uart@11460000"; | |
| uart3 = "/uart@14C40000"; | |
| uart2 = "/uart@14C30000"; | |
| uart1 = "/uart@14C20000"; | |
| uart0 = "/uart@13630000"; | |
| dsim0 = "/dsim@0x13900000"; | |
| decon1 = "/decon_ext"; | |
| decon0 = "/decon_fb"; | |
| vpp3 = "/vpp@0x13E05000"; | |
| vpp2 = "/vpp@0x13E04000"; | |
| vpp1 = "/vpp@0x13E03000"; | |
| vpp0 = "/vpp@0x13E02000"; | |
| mdev0 = "/mdev_output"; | |
| mshc2 = "/dwmmc2@15560000"; | |
| mshc1 = "/dwmmc1@15750000"; | |
| mshc0 = "/dwmmc0@15740000"; | |
| pinctrl9 = "/pinctrl@15690000"; | |
| pinctrl8 = "/pinctrl@10E60000"; | |
| pinctrl7 = "/pinctrl@14CA0000"; | |
| pinctrl6 = "/pinctrl@14C90000"; | |
| pinctrl5 = "/pinctrl@14CE0000"; | |
| pinctrl4 = "/pinctrl@14CD0000"; | |
| pinctrl3 = "/pinctrl@14870000"; | |
| pinctrl2 = "/pinctrl@13470000"; | |
| pinctrl1 = "/pinctrl@114B0000"; | |
| pinctrl0 = "/pinctrl@10580000"; | |
| }; | |
| arm-pmu { | |
| interrupts = <0x00 0x20 0x04 0x00 0x21 0x04 0x00 0x22 0x04 0x00 0x23 0x04 0x00 0x38 0x04 0x00 0x39 0x04 0x00 0x3a 0x04 0x00 0x3b 0x04>; | |
| compatible = "arm,armv8-pmuv3"; | |
| }; | |
| NOC_PERIP_GROUP3@10430000 { | |
| sub-addr = <0x10430000 0x13400000 0x14800000 0x10500000 0x10500000 0x10600000 0x10400000 0x16000000 0x10830000 0x10860000 0x10800000 0x10930000 0x10960000 0x10900000 0x10a30000 0x10a60000 0x10a00000 0x10b30000 0x10b60000 0x10b00000 0x11900000 0x11800000 0x11400000 0x3000000 0x14000000 0x14400000 0x14000000 0x13800000 0x15610000 0x15650000 0x156a0000 0x10f00000 0x10e00000 0x15400000 0x15500000 0x18000000 0x15570000 0x15540000 0x15600000 0x15700000 0x2000000 0x00 0x4000000 0x1c000000 0x14a00000 0x15200000 0x15000000 0x13600000 0x14e00000 0x14c00000 0x10000000 0x13e00000>; | |
| sub-index = <0x120 0x160 0x180 0x100 0x101 0x102 0x120 0x140 0x1a0 0x1a1 0x1a2 0x1c0 0x1c1 0x1c2 0x1e0 0x1e1 0x1e2 0x200 0x201 0x202 0x240 0x260 0x280 0x281 0x2a0 0x2a1 0x2c0 0x2e0 0x300 0x301 0x302 0x303 0x304 0x305 0x306 0x307 0x320 0x321 0x322 0x323 0x324 0x325 0x326 0x327 0x340 0x360 0x380 0x3a0 0x3c0 0x3c1 0x3e0 0x400>; | |
| target-desc = "P_CORE0\0P_CORE1\0P_CORE(CORESIGHT)\0P_BUS0SFR\0P_BUS1SFR\0P_MIF0\0P_MIF1\0P_MIF2\0P_MIF3\0SER_CORE_PERI_TO\0TNSP_P_APL\0TNSP_P_ATL\0TNSP_P_AUD\0TNSP_P_CAM0\0TNSP_P_CAM1\0TNSP_P_DISP\0TNSP_P_FSYS0\0TNSP_P_FSYS1\0TNSP_P_G3D\0TNSP_P_MFC\0TNSP_P_MSCL\0TNSP_P_PERIC0\0TNSP_P_PERIC1\0TNSP_P_PERIS\0TNSP_P_VPP"; | |
| init-desc = "APB_PERI\0P_CCI"; | |
| sub-array = <0x34>; | |
| sub-num = <0x08>; | |
| target-num = <0x20>; | |
| init-num = <0x02>; | |
| errlog5-bits = <0x00 0x0c>; | |
| errlog4-bits = <0x00 0x00>; | |
| errlog3-bits = <0x00 0x19>; | |
| errlog2-bits = <0x00 0x00>; | |
| errlog1-bits = <0x00 0x11>; | |
| errlog0-format-bits = <0x1f 0x1f>; | |
| errlog0-len1-bits = <0x10 0x16>; | |
| errlog0-errcode-bits = <0x08 0x0a>; | |
| errlog0-opc-bits = <0x01 0x04>; | |
| errlog0-lock-bits = <0x00 0x00>; | |
| errcld-bits = <0x00 0x00>; | |
| errvld-bits = <0x00 0x00>; | |
| faulten-bits = <0x00 0x00>; | |
| init-bits = <0x11 0x11>; | |
| target-bits = <0x0c 0x10>; | |
| sub-bits = <0x09 0x0b>; | |
| seq-bits = <0x00 0x08>; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| interrupts = <0x00 0x165 0x00>; | |
| reg = <0x10430000 0x100>; | |
| compatible = "samsung,exynos-noc"; | |
| }; | |
| NOC_HRT_GROUP2@10450000 { | |
| sub-addr = <0x13460000 0x10550000 0x00 0x00 0x1080 0x2100 0x3180 0x4080 0x5000 0x6180 0x7100 0x8100 0x9180 0xa000 0xb080 0xc180 0xd100 0xe080 0xf000 0x80 0x80 0x1000 0x2180 0x3100 0x4000 0x5080 0x6100 0x7180 0x8180 0x9100 0xa080 0xb000 0xc100 0xd180 0xe000 0xf080 0x100 0x100 0x1180 0x2000 0x3080 0x4180 0x5100 0x6080 0x7000 0x8000 0x9080 0xa100 0xb180 0xc080 0xd000 0xe180 0xf100 0x180 0x180 0x1100 0x2080 0x3000 0x4100 0x5180 0x6000 0x7080 0x8080 0x9000 0xa180 0xb100 0xc000 0xd080 0xe100 0xf180 0x00 0x00 0x1080 0x2100 0x3180 0x4080 0x5000 0x6180 0x7100 0x8100 0x9180 0xa000 0xb080 0xc180 0xd100 0xe080 0xf000 0x80 0x80 0x1000 0x2180 0x3100 0x4000 0x5080 0x6100 0x7180 0x8180 0x9100 0xa080 0xb000 0xc100 0xd180 0xe000 0xf080 0x100 0x100 0x1180 0x2000 0x3080 0x4180 0x5100 0x6080 0x7000 0x8000 0x9080 0xa100 0xb180 0xc080 0xd000 0xe180 0xf100 0x180 0x180 0x1100 0x2080 0x3000 0x4100 0x5180 0x6000 0x7080 0x8080 0x9000 0xa180 0xb100 0xc000 0xd080 0xe100 0xf180 0x00 0x00 0x1080 0x2100 0x3180 0x4080 0x5000 0x6180 0x7100 0x8100 0x9180 0xa000 0xb080 0xc180 0xd100 0xe080 0xf000 0x80 0x80 0x1000 0x2180 0x3100 0x4000 0x5080 0x6100 0x7180 0x8180 0x9100 0xa080 0xb000 0xc100 0xd180 0xe000 0xf080 0x100 0x100 0x1180 0x2000 0x3080 0x4180 0x5100 0x6080 0x7000 0x8000 0x9080 0xa100 0xb180 0xc080 0xd000 0xe180 0xf100 0x180 0x180 0x1100 0x2080 0x3000 0x4100 0x5180 0x6000 0x7080 0x8080 0x9000 0xa180 0xb100 0xc000 0xd080 0xe100 0xf180 0x00 0x00 0x1080 0x2100 0x3180 0x4080 0x5000 0x6180 0x7100 0x8100 0x9180 0xa000 0xb080 0xc180 0xd100 0xe080 0xf000 0x80 0x80 0x1000 0x2180 0x3100 0x4000 0x5080 0x6100 0x7180 0x8180 0x9100 0xa080 0xb000 0xc100 0xd180 0xe000 0xf080 0x100 0x100 0x1180 0x2000 0x3080 0x4180 0x5100 0x6080 0x7000 0x8000 0x9080 0xa100 0xb180 0xc080 0xd000 0xe180 0xf100 0x180 0x180 0x1100 0x2080 0x3000 0x4100 0x5180 0x6000 0x7080 0x8080 0x9000 0xa180 0xb100 0xc000 0xd080 0xe100 0xf180 0x00 0x00 0x1080 0x2100 0x3180 0x4080 0x5000 0x6180 0x7100 0x8100 0x9180 0xa000 0xb080 0xc180 0xd100 0xe080 0xf000 0x80 0x80 0x1000 0x2180 0x3100 0x4000 0x5080 0x6100 0x7180 0x8180 0x9100 0xa080 0xb000 0xc100 0xd180 0xe000 0xf080 0x100 0x100 0x1180 0x2000 0x3080 0x4180 0x5100 0x6080 0x7000 0x8000 0x9080 0xa100 0xb180 0xc080 0xd000 0xe180 0xf100 0x180 0x180 0x1100 0x2080 0x3000 0x4100 0x5180 0x6000 0x7080 0x8080 0x9000 0xa180 0xb100 0xc000 0xd080 0xe100 0xf180 0x00 0x00 0x1080 0x2100 0x3180 0x4080 0x5000 0x6180 0x7100 0x8100 0x9180 0xa000 0xb080 0xc180 0xd100 0xe080 0xf000 0x80 0x80 0x1000 0x2180 0x3100 0x4000 0x5080 0x6100 0x7180 0x8180 0x9100 0xa080 0xb000 0xc100 0xd180 0xe000 0xf080 0x100 0x100 0x1180 0x2000 0x3080 0x4180 0x5100 0x6080 0x7000 0x8000 0x9080 0xa100 0xb180 0xc080 0xd000 0xe180 0xf100 0x180 0x180 0x1100 0x2080 0x3000 0x4100 0x5180 0x6000 0x7080 0x8080 0x9000 0xa180 0xb100 0xc000 0xd080 0xe100 0xf180 0x00 0x00 0x1080 0x2100 0x3180 0x4080 0x5000 0x6180 0x7100 0x8100 0x9180 0xa000 0xb080 0xc180 0xd100 0xe080 0xf000 0x80 0x80 0x1000 0x2180 0x3100 0x4000 0x5080 0x6100 0x7180 0x8180 0x9100 0xa080 0xb000 0xc100 0xd180 0xe000 0xf080 0x100 0x100 0x1180 0x2000 0x3080 0x4180 0x5100 0x6080 0x7000 0x8000 0x9080 0xa100 0xb180 0xc080 0xd000 0xe180 0xf100 0x180 0x180 0x1100 0x2080 0x3000 0x4100 0x5180 0x6000 0x7080 0x8080 0x9000 0xa180 0xb100 0xc000 0xd080 0xe100 0xf180 0x10450000>; | |
| sub-index = <0x80 0x1a0 0x200 0x201 0x202 0x203 0x204 0x205 0x206 0x207 0x208 0x209 0x20a 0x20b 0x20c 0x20d 0x20e 0x20f 0x210 0x220 0x221 0x222 0x223 0x224 0x225 0x226 0x227 0x228 0x229 0x22a 0x22b 0x22c 0x22d 0x22e 0x22f 0x230 0x240 0x241 0x242 0x243 0x244 0x245 0x246 0x247 0x248 0x249 0x24a 0x24b 0x24c 0x24d 0x24e 0x24f 0x250 0x260 0x261 0x262 0x263 0x264 0x265 0x266 0x267 0x268 0x269 0x26a 0x26b 0x26c 0x26d 0x26e 0x26f 0x270 0x300 0x301 0x302 0x303 0x304 0x305 0x306 0x307 0x308 0x309 0x30a 0x30b 0x30c 0x30d 0x30e 0x30f 0x310 0x320 0x321 0x322 0x323 0x324 0x325 0x326 0x327 0x328 0x329 0x32a 0x32b 0x32c 0x32d 0x32e 0x32f 0x330 0x340 0x341 0x342 0x343 0x344 0x345 0x346 0x347 0x348 0x349 0x34a 0x34b 0x34c 0x34d 0x34e 0x34f 0x350 0x360 0x361 0x362 0x363 0x364 0x365 0x366 0x367 0x368 0x369 0x36a 0x36b 0x36c 0x36d 0x36e 0x36f 0x370 0x400 0x401 0x402 0x403 0x404 0x405 0x406 0x407 0x408 0x409 0x40a 0x40b 0x40c 0x40d 0x40e 0x40f 0x410 0x420 0x421 0x422 0x423 0x424 0x425 0x426 0x427 0x428 0x429 0x42a 0x42b 0x42c 0x42d 0x42e 0x42f 0x430 0x440 0x441 0x442 0x443 0x444 0x445 0x446 0x447 0x448 0x449 0x44a 0x44b 0x44c 0x44d 0x44e 0x44f 0x450 0x460 0x461 0x462 0x463 0x464 0x465 0x466 0x467 0x468 0x469 0x46a 0x46b 0x46c 0x46d 0x46e 0x46f 0x470 0x500 0x501 0x502 0x503 0x504 0x505 0x506 0x507 0x508 0x509 0x50a 0x50b 0x50c 0x50d 0x50e 0x50f 0x510 0x620 0x621 0x622 0x623 0x624 0x625 0x626 0x627 0x628 0x629 0x62a 0x62b 0x62c 0x62d 0x62e 0x62f 0x630 0x740 0x741 0x742 0x743 0x744 0x745 0x746 0x747 0x748 0x749 0x74a 0x74b 0x74c 0x74d 0x74e 0x74f 0x750 0x860 0x861 0x862 0x863 0x864 0x865 0x866 0x867 0x868 0x869 0x86a 0x86b 0x86c 0x86d 0x86e 0x86f 0x870 0x900 0x901 0x902 0x903 0x904 0x905 0x906 0x907 0x908 0x909 0x90a 0x90b 0x90c 0x90d 0x90e 0x90f 0x910 0x920 0x921 0x922 0x923 0x924 0x925 0x926 0x927 0x928 0x929 0x92a 0x92b 0x92c 0x92d 0x92e 0x92f 0x930 0x940 0x941 0x942 0x943 0x944 0x945 0x946 0x947 0x948 0x949 0x94a 0x94b 0x94c 0x94d 0x94e 0x94f 0x950 0x960 0x961 0x962 0x963 0x964 0x965 0x966 0x967 0x968 0x969 0x96a 0x96b 0x96c 0x96d 0x96e 0x96f 0x970 0xa00 0xa01 0xa02 0xa03 0xa04 0xa05 0xa06 0xa07 0xa08 0xa09 0xa0a 0xa0b 0xa0c 0xa0d 0xa0e 0xa0f 0xa10 0xa20 0xa21 0xa22 0xa23 0xa24 0xa25 0xa26 0xa27 0xa28 0xa29 0xa2a 0xa2b 0xa2c 0xa2d 0xa2e 0xa2f 0xa30 0xa40 0xa41 0xa42 0xa43 0xa44 0xa45 0xa46 0xa47 0xa48 0xa49 0xa4a 0xa4b 0xa4c 0xa4d 0xa4e 0xa4f 0xa50 0xa60 0xa61 0xa62 0xa63 0xa64 0xa65 0xa66 0xa67 0xa68 0xa69 0xa6a 0xa6b 0xa6c 0xa6d 0xa6e 0xa6f 0xa70 0xb00 0xb01 0xb02 0xb03 0xb04 0xb05 0xb06 0xb07 0xb08 0xb09 0xb0a 0xb0b 0xb0c 0xb0d 0xb0e 0xb0f 0xb10 0xb20 0xb21 0xb22 0xb23 0xb24 0xb25 0xb26 0xb27 0xb28 0xb29 0xb2a 0xb2b 0xb2c 0xb2d 0xb2e 0xb2f 0xb30 0xb40 0xb41 0xb42 0xb43 0xb44 0xb45 0xb46 0xb47 0xb48 0xb49 0xb4a 0xb4b 0xb4c 0xb4d 0xb4e 0xb4f 0xb50 0xb60 0xb61 0xb62 0xb63 0xb64 0xb65 0xb66 0xb67 0xb68 0xb69 0xb6a 0xb6b 0xb6c 0xb6d 0xb6e 0xb6f 0xb70 0xcc0>; | |
| target-desc = "MEM0_0\0MEM1_0\0MEM2_0\0MEM3_0\0SER_BUS0_RT\0SER_CORE_RT\0SER_CORE_RT_TO"; | |
| init-desc = "APB_BUS0_RT\0APB_CORE_RT\0CAM0\0DISP0\0DISP1\0INSP0(From BE)\0INSP1(From BE)\0INSP2(From BE)\0INSP3(From BE)\0INSP_ISP\0VPP0\0VPP1\0APB_CORE_RT_TO"; | |
| sub-array = <0x1df>; | |
| sub-num = <0x20>; | |
| target-num = <0x08>; | |
| init-num = <0x10>; | |
| errlog5-bits = <0x00 0x10>; | |
| errlog4-bits = <0x00 0x03>; | |
| errlog3-bits = <0x00 0x1f>; | |
| errlog2-bits = <0x00 0x00>; | |
| errlog1-bits = <0x00 0x14>; | |
| errlog0-format-bits = <0x1f 0x1f>; | |
| errlog0-len1-bits = <0x10 0x17>; | |
| errlog0-errcode-bits = <0x08 0x0a>; | |
| errlog0-opc-bits = <0x01 0x04>; | |
| errlog0-lock-bits = <0x00 0x00>; | |
| errcld-bits = <0x00 0x00>; | |
| errvld-bits = <0x00 0x00>; | |
| faulten-bits = <0x00 0x00>; | |
| init-bits = <0x11 0x14>; | |
| target-bits = <0x0e 0x10>; | |
| sub-bits = <0x09 0x0d>; | |
| seq-bits = <0x00 0x08>; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| interrupts = <0x00 0x148 0x00>; | |
| reg = <0x10450000 0x100>; | |
| compatible = "samsung,exynos-noc"; | |
| }; | |
| NOC_BE_GROUP1@10560000 { | |
| sub-addr = <0x13450000 0x14850000 0x10560000 0x00 0x00 0x00 0x1080 0x2100 0x3180 0x4080 0x5000 0x6180 0x7100 0x8100 0x9180 0xa000 0xb080 0xc180 0xd100 0xe080 0xf000 0x80 0x80 0x1000 0x2180 0x3100 0x4000 0x5080 0x6100 0x7180 0x8180 0x9100 0xa080 0xb000 0xc100 0xd180 0xe000 0xf080 0x100 0x100 0x1180 0x2000 0x3080 0x4180 0x5100 0x6080 0x7000 0x8000 0x9080 0xa100 0xb180 0xc080 0xd000 0xe180 0xf100 0x180 0x180 0x1100 0x2080 0x3000 0x4100 0x5180 0x6000 0x7080 0x8080 0x9000 0xa180 0xb100 0xc000 0xd080 0xe100 0xf180 0x00 0x00 0x00 0x1080 0x2100 0x3180 0x4080 0x5000 0x6180 0x7100 0x8100 0x9180 0xa000 0xb080 0xc180 0xd100 0xe080 0xf000 0x80 0x80 0x1000 0x2180 0x3100 0x4000 0x5080 0x6100 0x7180 0x8180 0x9100 0xa080 0xb000 0xc100 0xd180 0xe000 0xf080 0x100 0x100 0x1180 0x2000 0x3080 0x4180 0x5100 0x6080 0x7000 0x8000 0x9080 0xa100 0xb180 0xc080 0xd000 0xe180 0xf100 0x180 0x180 0x1100 0x2080 0x3000 0x4100 0x5180 0x6000 0x7080 0x8080 0x9000 0xa180 0xb100 0xc000 0xd080 0xe100 0xf180 0xcafe 0x00 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| target-desc = "MEM_S0\0MEM_S1\0P_CORE_T\0SER_BUS0_NRT\0SER_BUS1_NRT\0SER_CORE_NRT\0TNSP0(DRAM CH0)\0TNSP1(DRAM CH1)\0TNSP2(DRAM CH2)\0TNSP3(DRAM_CH3)\0TNSP_ISP\0SER_CORE_NRT_TO"; | |
| init-desc = "APB_BUS0_NRT\0APB_BUS1_NRT\0APB_CORE_NRT\0AUD\0CAM1\0FSYS0\0FSYS1\0G3D0\0G3D1\0IMEM\0ISP\0MFC0\0MFC1\0MSCL0\0MSCL1\0APB_CORE_NRT_TO"; | |
| sub-array = <0x3e2>; | |
| sub-num = <0x40>; | |
| target-num = <0x10>; | |
| init-num = <0x10>; | |
| errlog5-bits = <0x00 0x16>; | |
| errlog4-bits = <0x00 0x03>; | |
| errlog3-bits = <0x00 0x1f>; | |
| errlog2-bits = <0x00 0x00>; | |
| errlog1-bits = <0x00 0x16>; | |
| errlog0-format-bits = <0x1f 0x1f>; | |
| errlog0-len1-bits = <0x10 0x1b>; | |
| errlog0-errcode-bits = <0x08 0x0a>; | |
| errlog0-opc-bits = <0x01 0x04>; | |
| errlog0-lock-bits = <0x00 0x00>; | |
| errcld-bits = <0x00 0x00>; | |
| errvld-bits = <0x00 0x00>; | |
| faulten-bits = <0x00 0x00>; | |
| init-bits = <0x13 0x16>; | |
| target-bits = <0x0f 0x12>; | |
| sub-bits = <0x09 0x0e>; | |
| seq-bits = <0x00 0x08>; | |
| #size-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| interrupts = <0x00 0x152 0x00>; | |
| reg = <0x10440000 0x100>; | |
| compatible = "samsung,exynos-noc"; | |
| timeout { | |
| #size-cells = <0x01>; | |
| #address-cells = <0x01>; | |
| timeout_apollo@0x1005243C { | |
| enable-bit = <0x0e>; | |
| enabled = <0x00>; | |
| reg = <0x1005243c 0x100>; | |
| nickname = "NOC-timeout-apollo"; | |
| }; | |
| timeout_atlas@0x1005243C { | |
| enable-bit = <0x0d>; | |
| enabled = <0x00>; | |
| reg = <0x1005243c 0x100>; | |
| nickname = "NOC-timeout-atlas"; | |
| }; | |
| timeout_peri@0x10050718 { | |
| enable-bit = <0x03>; | |
| enabled = <0x00>; | |
| reg = <0x10050718 0x100>; | |
| nickname = "NOC-timeout-peri-path"; | |
| }; | |
| timeout_data@0x10050718 { | |
| enable-bit = <0x02>; | |
| enabled = <0x00>; | |
| reg = <0x10050718 0x100>; | |
| nickname = "NOC-timeout-data-path"; | |
| }; | |
| }; | |
| }; | |
| pinctrl@15690000 { | |
| pinctrl-1 = <0x10>; | |
| pinctrl-0 = <0x0f>; | |
| pinctrl-names = "default\0sleep"; | |
| interrupts = <0x00 0xcb 0x00>; | |
| reg = <0x15690000 0x1000>; | |
| compatible = "samsung,exynos7420-pinctrl"; | |
| antenna-switch-en { | |
| phandle = <0xfc>; | |
| linux,phandle = <0xfc>; | |
| samsung,pin-val = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpr3-6"; | |
| }; | |
| sub-pmic-irq { | |
| phandle = <0x59>; | |
| linux,phandle = <0x59>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpr2-2"; | |
| }; | |
| sleep-state { | |
| phandle = <0x10>; | |
| linux,phandle = <0x10>; | |
| gpr3-7 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr3-7"; | |
| }; | |
| gpr3-6 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pins = "gpr3-6"; | |
| }; | |
| gpr3-5 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr3-5"; | |
| }; | |
| gpr3-4 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pins = "gpr3-4"; | |
| }; | |
| gpr3-3 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr3-3"; | |
| }; | |
| gpr3-2 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr3-2"; | |
| }; | |
| gpr3-1 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr3-1"; | |
| }; | |
| gpr3-0 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr3-0"; | |
| }; | |
| gpr2-4 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr2-4"; | |
| }; | |
| gpr2-3 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr2-3"; | |
| }; | |
| gpr2-2 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr2-2"; | |
| }; | |
| gpr2-1 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr2-1"; | |
| }; | |
| gpr2-0 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr2-0"; | |
| }; | |
| gpr1-7 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr1-7"; | |
| }; | |
| gpr1-6 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr1-6"; | |
| }; | |
| gpr1-5 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr1-5"; | |
| }; | |
| gpr1-4 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr1-4"; | |
| }; | |
| gpr1-3 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr1-3"; | |
| }; | |
| gpr1-2 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr1-2"; | |
| }; | |
| gpr1-1 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr1-1"; | |
| }; | |
| gpr1-0 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr1-0"; | |
| }; | |
| gpr0-3 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr0-3"; | |
| }; | |
| gpr0-2 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr0-2"; | |
| }; | |
| gpr0-1 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr0-1"; | |
| }; | |
| gpr0-0 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr0-0"; | |
| }; | |
| }; | |
| initial-state { | |
| phandle = <0x0f>; | |
| linux,phandle = <0x0f>; | |
| gpr3-2 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpr3-2"; | |
| }; | |
| gpr2-4 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpr2-4"; | |
| }; | |
| gpr2-3 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpr2-3"; | |
| }; | |
| gpr1-7 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpr1-7"; | |
| }; | |
| gpr1-6 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpr1-6"; | |
| }; | |
| gpr1-5 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpr1-5"; | |
| }; | |
| gpr1-4 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpr1-4"; | |
| }; | |
| gpr1-3 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpr1-3"; | |
| }; | |
| gpr1-2 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpr1-2"; | |
| }; | |
| gpr1-1 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpr1-1"; | |
| }; | |
| gpr1-0 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpr1-0"; | |
| }; | |
| gpr0-3 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpr0-3"; | |
| }; | |
| gpr0-2 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpr0-2"; | |
| }; | |
| gpr0-1 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpr0-1"; | |
| }; | |
| gpr0-0 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpr0-0"; | |
| }; | |
| }; | |
| simslot-irq { | |
| phandle = <0xe7>; | |
| linux,phandle = <0xe7>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x0f>; | |
| samsung,pins = "gpr3-3"; | |
| }; | |
| grip-i2c { | |
| samsung,pin-drv = <0x03>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpr1-3\0gpr1-4"; | |
| }; | |
| pcie0_eint { | |
| phandle = <0xc2>; | |
| linux,phandle = <0xc2>; | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpr2-1"; | |
| }; | |
| bt-btwake { | |
| phandle = <0xe4>; | |
| linux,phandle = <0xe4>; | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpr3-4"; | |
| }; | |
| pcie_eint { | |
| phandle = <0xcb>; | |
| linux,phandle = <0xcb>; | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x0f>; | |
| samsung,pins = "gpr2-0"; | |
| }; | |
| sd1-bus-width8 { | |
| samsung,pin-drv = <0x04>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpr3-4\0gpr3-5\0gpr3-6\0gpr3-7"; | |
| }; | |
| sd1-bus-width4 { | |
| samsung,pin-drv = <0x04>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpr3-1\0gpr3-2\0gpr3-3"; | |
| }; | |
| sd1-bus-width1 { | |
| samsung,pin-drv = <0x04>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpr3-0"; | |
| }; | |
| sd1-cmd { | |
| samsung,pin-drv = <0x04>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpr2-1"; | |
| }; | |
| sd1-clk { | |
| samsung,pin-drv = <0x04>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpr2-0"; | |
| }; | |
| sd0-bus-width8 { | |
| phandle = <0x82>; | |
| linux,phandle = <0x82>; | |
| samsung,pin-drv = <0x04>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpr1-4\0gpr1-5\0gpr1-6\0gpr1-7"; | |
| }; | |
| sd0-bus-width4 { | |
| phandle = <0x81>; | |
| linux,phandle = <0x81>; | |
| samsung,pin-drv = <0x04>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpr1-1\0gpr1-2\0gpr1-3"; | |
| }; | |
| sd0-bus-width1 { | |
| phandle = <0x80>; | |
| linux,phandle = <0x80>; | |
| samsung,pin-drv = <0x04>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpr1-0"; | |
| }; | |
| sd0-qrdy { | |
| samsung,pin-drv = <0x04>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpr0-3"; | |
| }; | |
| sd0-rdqs { | |
| phandle = <0x7f>; | |
| linux,phandle = <0x7f>; | |
| samsung,pin-drv = <0x04>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpr0-2"; | |
| }; | |
| sd0-cmd { | |
| phandle = <0x7e>; | |
| linux,phandle = <0x7e>; | |
| samsung,pin-drv = <0x04>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpr0-1"; | |
| }; | |
| sd0-clk { | |
| phandle = <0x7d>; | |
| linux,phandle = <0x7d>; | |
| samsung,pin-drv = <0x04>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpr0-0"; | |
| }; | |
| gpr3 { | |
| phandle = <0x76>; | |
| linux,phandle = <0x76>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpr2 { | |
| phandle = <0x58>; | |
| linux,phandle = <0x58>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpr1 { | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpr0 { | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| }; | |
| pinctrl@10E60000 { | |
| pinctrl-1 = <0x0e>; | |
| pinctrl-0 = <0x0d>; | |
| pinctrl-names = "default\0sleep"; | |
| interrupts = <0x00 0xdd 0x00>; | |
| reg = <0x10e60000 0x1000>; | |
| compatible = "samsung,exynos7420-pinctrl"; | |
| sleep-state { | |
| phandle = <0x0e>; | |
| linux,phandle = <0x0e>; | |
| gpr4-6 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr4-6"; | |
| }; | |
| gpr4-5 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr4-5"; | |
| }; | |
| gpr4-4 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr4-4"; | |
| }; | |
| gpr4-3 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr4-3"; | |
| }; | |
| gpr4-2 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr4-2"; | |
| }; | |
| gpr4-1 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr4-1"; | |
| }; | |
| gpr4-0 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpr4-0"; | |
| }; | |
| }; | |
| initial-state { | |
| phandle = <0x0d>; | |
| linux,phandle = <0x0d>; | |
| gpr4-6 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpr4-6"; | |
| }; | |
| gpr4-5 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpr4-5"; | |
| }; | |
| gpr4-4 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpr4-4"; | |
| }; | |
| gpr4-3 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpr4-3"; | |
| }; | |
| gpr4-2 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpr4-2"; | |
| }; | |
| gpr4-1 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpr4-1"; | |
| }; | |
| gpr4-0 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpr4-0"; | |
| }; | |
| }; | |
| sd2-bus-width4 { | |
| phandle = <0x87>; | |
| linux,phandle = <0x87>; | |
| samsung,pin-drv = <0x02>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpr4-4\0gpr4-5\0gpr4-6"; | |
| }; | |
| sd2-bus-width1 { | |
| phandle = <0x86>; | |
| linux,phandle = <0x86>; | |
| samsung,pin-drv = <0x02>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpr4-3"; | |
| }; | |
| sd2-cmd { | |
| phandle = <0x85>; | |
| linux,phandle = <0x85>; | |
| samsung,pin-drv = <0x02>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpr4-1"; | |
| }; | |
| sd2-clk { | |
| phandle = <0x84>; | |
| linux,phandle = <0x84>; | |
| samsung,pin-drv = <0x03>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpr4-0"; | |
| }; | |
| gpr4 { | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| }; | |
| pinctrl@14CA0000 { | |
| pinctrl-0 = <0x0c>; | |
| pinctrl-names = "sleep"; | |
| interrupts = <0x00 0x1dc 0x00>; | |
| reg = <0x14ca0000 0x1000>; | |
| compatible = "samsung,exynos7420-pinctrl"; | |
| ocp-en { | |
| phandle = <0x3f>; | |
| linux,phandle = <0x3f>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpv7-4"; | |
| }; | |
| sleep-state { | |
| phandle = <0x0c>; | |
| linux,phandle = <0x0c>; | |
| gpv7-4 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pins = "gpv7-4"; | |
| }; | |
| gpv7-3 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x00>; | |
| samsung,pins = "gpv7-3"; | |
| }; | |
| gpv7-2 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpv7-2"; | |
| }; | |
| gpv7-1 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x00>; | |
| samsung,pins = "gpv7-1"; | |
| }; | |
| gpv7-0 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x00>; | |
| samsung,pins = "gpv7-0"; | |
| }; | |
| }; | |
| spi4-bus-a8xe { | |
| samsung,pin-drv = <0x03>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpv7-3\0gpv7-2\0gpv7-1\0gpv7-0"; | |
| }; | |
| spi4-cs { | |
| phandle = <0x3a>; | |
| linux,phandle = <0x3a>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpv7-1"; | |
| }; | |
| spi4-bus { | |
| phandle = <0x39>; | |
| linux,phandle = <0x39>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpv7-3\0gpv7-2\0gpv7-0"; | |
| }; | |
| gpv7 { | |
| phandle = <0x45>; | |
| linux,phandle = <0x45>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| }; | |
| pinctrl@14C90000 { | |
| pinctrl-0 = <0x0b>; | |
| pinctrl-names = "sleep"; | |
| interrupts = <0x00 0x1db 0x00>; | |
| reg = <0x14c90000 0x1000>; | |
| compatible = "samsung,exynos7420-pinctrl"; | |
| sleep-state { | |
| phandle = <0x0b>; | |
| linux,phandle = <0x0b>; | |
| gpg4-3 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpg4-3"; | |
| }; | |
| gpg4-2 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpg4-2"; | |
| }; | |
| gpg4-1 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpg4-1"; | |
| }; | |
| gpg4-0 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpg4-0"; | |
| }; | |
| }; | |
| spi3-ese-disable { | |
| phandle = <0x37>; | |
| linux,phandle = <0x37>; | |
| samsung,pin-val = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpg4-3\0gpg4-2\0gpg4-0"; | |
| }; | |
| spi3-clk-recover { | |
| phandle = <0x36>; | |
| linux,phandle = <0x36>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpg4-0"; | |
| }; | |
| spi3-clk-fix { | |
| phandle = <0x35>; | |
| linux,phandle = <0x35>; | |
| samsung,pin-val = <0x01>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpg4-0"; | |
| }; | |
| spi3-ese-pwoff { | |
| phandle = <0x34>; | |
| linux,phandle = <0x34>; | |
| samsung,pin-val = <0x00>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpg4-3\0gpg4-2\0gpg4-0"; | |
| }; | |
| spi3-cs { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpg4-1"; | |
| }; | |
| spi3-cs-func { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpg4-1"; | |
| }; | |
| spi3-bus { | |
| phandle = <0x33>; | |
| linux,phandle = <0x33>; | |
| samsung,pin-drv = <0x03>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpg4-3\0gpg4-2\0gpg4-0"; | |
| }; | |
| gpg4 { | |
| phandle = <0x38>; | |
| linux,phandle = <0x38>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| }; | |
| pinctrl@14CE0000 { | |
| pinctrl-1 = <0x0a>; | |
| pinctrl-0 = <0x09>; | |
| pinctrl-names = "default\0sleep"; | |
| interrupts = <0x00 0x1da 0x00>; | |
| reg = <0x14ce0000 0x1000>; | |
| compatible = "samsung,exynos7420-pinctrl"; | |
| sec-mst,mst-pd-gpio { | |
| phandle = <0xf9>; | |
| linux,phandle = <0xf9>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpj1-2"; | |
| }; | |
| sleep-state { | |
| phandle = <0x0a>; | |
| linux,phandle = <0x0a>; | |
| gpj1-2 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpj1-2"; | |
| }; | |
| gpj1-1 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpj1-1"; | |
| }; | |
| gpj1-0 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpj1-0"; | |
| }; | |
| }; | |
| initial-state { | |
| phandle = <0x09>; | |
| linux,phandle = <0x09>; | |
| gpj1-2 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpj1-2"; | |
| }; | |
| }; | |
| hs-i2c7-bus { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpj1-1\0gpj1-0"; | |
| }; | |
| gpj1 { | |
| phandle = <0xf6>; | |
| linux,phandle = <0xf6>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| }; | |
| pinctrl@14CD0000 { | |
| pinctrl-1 = <0x08>; | |
| pinctrl-0 = <0x07>; | |
| pinctrl-names = "default\0sleep"; | |
| interrupts = <0x00 0x1d9 0x00>; | |
| reg = <0x14cd0000 0x1000>; | |
| compatible = "samsung,exynos7420-pinctrl"; | |
| sec-mst,mst-md-gpio { | |
| phandle = <0xf8>; | |
| linux,phandle = <0xf8>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpj0-2"; | |
| }; | |
| sleep-state { | |
| phandle = <0x08>; | |
| linux,phandle = <0x08>; | |
| gpj0-2 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpj0-2"; | |
| }; | |
| gpj0-1 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpj0-1"; | |
| }; | |
| gpj0-0 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpj0-0"; | |
| }; | |
| }; | |
| initial-state { | |
| phandle = <0x07>; | |
| linux,phandle = <0x07>; | |
| gpj0-2 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpj0-2"; | |
| }; | |
| }; | |
| hs-i2c6-bus { | |
| phandle = <0x6b>; | |
| linux,phandle = <0x6b>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpj0-1\0gpj0-0"; | |
| }; | |
| gpj0 { | |
| phandle = <0x6c>; | |
| linux,phandle = <0x6c>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| }; | |
| pinctrl@14870000 { | |
| pinctrl-1 = <0x06>; | |
| pinctrl-0 = <0x05>; | |
| pinctrl-names = "default\0sleep"; | |
| interrupts = <0x00 0x180 0x00>; | |
| reg = <0x14870000 0x1000>; | |
| compatible = "samsung,exynos7420-pinctrl"; | |
| codec-reset { | |
| phandle = <0x23>; | |
| linux,phandle = <0x23>; | |
| samsung,pin-val = <0x00>; | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpf4-0"; | |
| }; | |
| sec-mst,mst-pwr-gpio { | |
| phandle = <0xf7>; | |
| linux,phandle = <0xf7>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpf3-2"; | |
| }; | |
| btp-reset { | |
| phandle = <0x3c>; | |
| linux,phandle = <0x3c>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpf3-4"; | |
| }; | |
| btp-ldo2 { | |
| phandle = <0x3e>; | |
| linux,phandle = <0x3e>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpf1-7"; | |
| }; | |
| btp-ldo { | |
| phandle = <0x3d>; | |
| linux,phandle = <0x3d>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpf1-6"; | |
| }; | |
| cp_reset { | |
| phandle = <0xeb>; | |
| linux,phandle = <0xeb>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpf1-1"; | |
| }; | |
| ap2cp_wakeup { | |
| phandle = <0xee>; | |
| linux,phandle = <0xee>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpf4-2"; | |
| }; | |
| ap2cp_status { | |
| phandle = <0xef>; | |
| linux,phandle = <0xef>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpf0-4"; | |
| }; | |
| pda_active { | |
| phandle = <0xec>; | |
| linux,phandle = <0xec>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpf3-3"; | |
| }; | |
| ap_dump_int { | |
| phandle = <0xf3>; | |
| linux,phandle = <0xf3>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpf5-1"; | |
| }; | |
| cp_on { | |
| phandle = <0xea>; | |
| linux,phandle = <0xea>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpf5-0"; | |
| }; | |
| sleep-state { | |
| phandle = <0x06>; | |
| linux,phandle = <0x06>; | |
| gpv6-2 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpv6-2"; | |
| }; | |
| gpv6-1 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpv6-1"; | |
| }; | |
| gpv6-0 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpv6-0"; | |
| }; | |
| gph1-5 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pins = "gph1-5"; | |
| }; | |
| gph1-4 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x00>; | |
| samsung,pins = "gph1-4"; | |
| }; | |
| gph1-3 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gph1-3"; | |
| }; | |
| gph1-2 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gph1-2"; | |
| }; | |
| gph1-1 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gph1-1"; | |
| }; | |
| gph1-0 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gph1-0"; | |
| }; | |
| gpg2-4 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pins = "gpg2-4"; | |
| }; | |
| gpg2-3 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pins = "gpg2-3"; | |
| }; | |
| gpg2-2 { | |
| samsung,pin-pud-pdn = <0x03>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pins = "gpg2-2"; | |
| }; | |
| gpg2-1 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpg2-1"; | |
| }; | |
| gpg2-0 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pins = "gpg2-0"; | |
| }; | |
| gpg1-4 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpg1-4"; | |
| }; | |
| gpg1-3 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpg1-3"; | |
| }; | |
| gpg1-2 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpg1-2"; | |
| }; | |
| gpg1-1 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pins = "gpg1-1"; | |
| }; | |
| gpg1-0 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpg1-0"; | |
| }; | |
| gpf5-7 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpf5-7"; | |
| }; | |
| gpf5-6 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpf5-6"; | |
| }; | |
| gpf5-5 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpf5-5"; | |
| }; | |
| gpf5-4 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x00>; | |
| samsung,pins = "gpf5-4"; | |
| }; | |
| gpf5-3 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpf5-3"; | |
| }; | |
| gpf5-2 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pins = "gpf5-2"; | |
| }; | |
| gpf5-1 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pins = "gpf5-1"; | |
| }; | |
| gpf5-0 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pins = "gpf5-0"; | |
| }; | |
| gpf4-7 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pins = "gpf4-7"; | |
| }; | |
| gpf4-6 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pins = "gpf4-6"; | |
| }; | |
| gpf4-5 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x00>; | |
| samsung,pins = "gpf4-5"; | |
| }; | |
| gpf4-4 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpf4-4"; | |
| }; | |
| gpf4-3 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x00>; | |
| samsung,pins = "gpf4-3"; | |
| }; | |
| gpf4-2 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pins = "gpf4-2"; | |
| }; | |
| gpf4-1 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pins = "gpf4-1"; | |
| }; | |
| gpf4-0 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pins = "gpf4-0"; | |
| }; | |
| gpf3-4 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pins = "gpf3-4"; | |
| }; | |
| gpf3-3 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x00>; | |
| samsung,pins = "gpf3-3"; | |
| }; | |
| gpf3-2 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpf3-2"; | |
| }; | |
| gpf3-1 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpf3-1"; | |
| }; | |
| gpf3-0 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x01>; | |
| samsung,pins = "gpf3-0"; | |
| }; | |
| gpf2-3 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpf2-3"; | |
| }; | |
| gpf2-2 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpf2-2"; | |
| }; | |
| gpf2-1 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpf2-1"; | |
| }; | |
| gpf2-0 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpf2-0"; | |
| }; | |
| gpf1-7 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pins = "gpf1-7"; | |
| }; | |
| gpf1-6 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pins = "gpf1-6"; | |
| }; | |
| gpf1-5 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pins = "gpf1-5"; | |
| }; | |
| gpf1-4 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpf1-4"; | |
| }; | |
| gpf1-3 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpf1-3"; | |
| }; | |
| gpf1-2 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpf1-2"; | |
| }; | |
| gpf1-1 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pins = "gpf1-1"; | |
| }; | |
| gpf1-0 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpf1-0"; | |
| }; | |
| gpf0-7 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pins = "gpf0-7"; | |
| }; | |
| gpf0-6 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pins = "gpf0-6"; | |
| }; | |
| gpf0-5 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpf0-5"; | |
| }; | |
| gpf0-4 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pins = "gpf0-4"; | |
| }; | |
| gpf0-3 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpf0-3"; | |
| }; | |
| gpf0-2 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpf0-2"; | |
| }; | |
| gpf0-1 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpf0-1"; | |
| }; | |
| gpf0-0 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpf0-0"; | |
| }; | |
| }; | |
| initial-state { | |
| phandle = <0x05>; | |
| linux,phandle = <0x05>; | |
| gpv6-2 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpv6-2"; | |
| }; | |
| gpv6-1 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpv6-1"; | |
| }; | |
| gpv6-0 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpv6-0"; | |
| }; | |
| gph1-3 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gph1-3"; | |
| }; | |
| gph1-2 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gph1-2"; | |
| }; | |
| gph1-1 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gph1-1"; | |
| }; | |
| gph1-0 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gph1-0"; | |
| }; | |
| gpg1-3 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpg1-3"; | |
| }; | |
| gpg1-2 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpg1-2"; | |
| }; | |
| gpf5-7 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpf5-7"; | |
| }; | |
| gpf5-6 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpf5-6"; | |
| }; | |
| gpf5-5 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpf5-5"; | |
| }; | |
| gpf5-3 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpf5-3"; | |
| }; | |
| gpf3-2 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpf3-2"; | |
| }; | |
| gpf3-1 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpf3-1"; | |
| }; | |
| gpf2-3 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpf2-3"; | |
| }; | |
| gpf2-2 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpf2-2"; | |
| }; | |
| gpf2-1 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpf2-1"; | |
| }; | |
| gpf2-0 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpf2-0"; | |
| }; | |
| gpf1-3 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpf1-3"; | |
| }; | |
| gpf1-2 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpf1-2"; | |
| }; | |
| gpf1-0 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpf1-0"; | |
| }; | |
| gpf0-5 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpf0-5"; | |
| }; | |
| gpf0-3 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpf0-3"; | |
| }; | |
| gpf0-2 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpf0-2"; | |
| }; | |
| gpf0-1 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpf0-1"; | |
| }; | |
| gpf0-0 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpf0-0"; | |
| }; | |
| }; | |
| factory-discharging { | |
| phandle = <0xe9>; | |
| linux,phandle = <0xe9>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpf5-2"; | |
| }; | |
| smpl-warn { | |
| phandle = <0x67>; | |
| linux,phandle = <0x67>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x0f>; | |
| samsung,pins = "gpg1-0"; | |
| }; | |
| pm-wrsti { | |
| phandle = <0x65>; | |
| linux,phandle = <0x65>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pins = "gpf3-0"; | |
| }; | |
| g3d-dvs { | |
| phandle = <0x66>; | |
| linux,phandle = <0x66>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpg1-1"; | |
| }; | |
| ssp-mcu-resp { | |
| phandle = <0x2e>; | |
| linux,phandle = <0x2e>; | |
| samsung,pin-drv = <0x03>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpf4-4"; | |
| }; | |
| ssp-mcu-req { | |
| phandle = <0x2d>; | |
| linux,phandle = <0x2d>; | |
| samsung,pin-drv = <0x03>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpf4-5"; | |
| }; | |
| ssp-gps-pwr-en { | |
| phandle = <0xfa>; | |
| linux,phandle = <0xfa>; | |
| samsung,pin-drv = <0x03>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpf4-7"; | |
| }; | |
| bt-en { | |
| phandle = <0xe5>; | |
| linux,phandle = <0xe5>; | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpf4-1"; | |
| }; | |
| nfc-pn547-en { | |
| phandle = <0x70>; | |
| linux,phandle = <0x70>; | |
| samsung,pin-val = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpf1-5"; | |
| }; | |
| nfc-n5-firm { | |
| phandle = <0x6f>; | |
| linux,phandle = <0x6f>; | |
| samsung,pin-val = <0x01>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpf5-4"; | |
| }; | |
| nfc-n5-en { | |
| phandle = <0x6e>; | |
| linux,phandle = <0x6e>; | |
| samsung,pin-val = <0x01>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpf1-5"; | |
| }; | |
| ufs-rst-n { | |
| phandle = <0xcd>; | |
| linux,phandle = <0xcd>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gph1-5"; | |
| }; | |
| ufs-refclk-out { | |
| phandle = <0xce>; | |
| linux,phandle = <0xce>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpg2-4"; | |
| }; | |
| spi5-cs { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpf2-1"; | |
| }; | |
| spi5-cs-func { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpf2-1"; | |
| }; | |
| spi5-bus { | |
| phandle = <0x46>; | |
| linux,phandle = <0x46>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpf2-3\0gpf2-2\0gpf2-0"; | |
| }; | |
| cfg_wlanen { | |
| phandle = <0xc9>; | |
| linux,phandle = <0xc9>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pin-drv = <0x03>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpf4-6"; | |
| }; | |
| pcie1_reset_clear { | |
| phandle = <0xc8>; | |
| linux,phandle = <0xc8>; | |
| samsung,pin-pud-pdn = <0x03>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpg2-2"; | |
| }; | |
| pcie1_link_reset { | |
| phandle = <0xcc>; | |
| linux,phandle = <0xcc>; | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpg2-2"; | |
| }; | |
| pcie1_perst { | |
| phandle = <0xc6>; | |
| linux,phandle = <0xc6>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pin-drv = <0x03>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpg2-0"; | |
| }; | |
| pcie1_clkreq { | |
| phandle = <0xc5>; | |
| linux,phandle = <0xc5>; | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pin-drv = <0x03>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpf0-6"; | |
| }; | |
| pcie0_reset_clear { | |
| phandle = <0xc1>; | |
| linux,phandle = <0xc1>; | |
| samsung,pin-pud-pdn = <0x03>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gph1-3"; | |
| }; | |
| pcie0_link_reset { | |
| phandle = <0xc3>; | |
| linux,phandle = <0xc3>; | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gph1-3"; | |
| }; | |
| pcie0_perst { | |
| phandle = <0xc0>; | |
| linux,phandle = <0xc0>; | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pin-drv = <0x03>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gph1-2"; | |
| }; | |
| pcie0_clkreq { | |
| phandle = <0xbf>; | |
| linux,phandle = <0xbf>; | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pin-drv = <0x03>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpv6-1"; | |
| }; | |
| gpv6 { | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gph1 { | |
| phandle = <0x83>; | |
| linux,phandle = <0x83>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpg2 { | |
| phandle = <0xc4>; | |
| linux,phandle = <0xc4>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpg1 { | |
| phandle = <0x68>; | |
| linux,phandle = <0x68>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpf5 { | |
| phandle = <0x6d>; | |
| linux,phandle = <0x6d>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpf4 { | |
| phandle = <0x25>; | |
| linux,phandle = <0x25>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpf3 { | |
| phandle = <0x42>; | |
| linux,phandle = <0x42>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpf2 { | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpf1 { | |
| phandle = <0x44>; | |
| linux,phandle = <0x44>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpf0 { | |
| phandle = <0xf5>; | |
| linux,phandle = <0xf5>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| etc1 { | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| }; | |
| pinctrl@13470000 { | |
| pinctrl-1 = <0x04>; | |
| pinctrl-0 = <0x03>; | |
| pinctrl-names = "default\0sleep"; | |
| interrupts = <0x00 0x17f 0x00>; | |
| reg = <0x13470000 0x1000>; | |
| compatible = "samsung,exynos7420-pinctrl"; | |
| cfg_gpio { | |
| phandle = <0x5d>; | |
| linux,phandle = <0x5d>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpd1-3\0gpd1-2"; | |
| }; | |
| cfg-i2c { | |
| phandle = <0x5c>; | |
| linux,phandle = <0x5c>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x03>; | |
| samsung,pins = "gpd1-3\0gpd1-2"; | |
| }; | |
| max98505-i2c { | |
| phandle = <0x50>; | |
| linux,phandle = <0x50>; | |
| status = "okay"; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pins = "gpd2-0\0gpd2-1"; | |
| }; | |
| spi2-miso { | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpd5-2"; | |
| }; | |
| sleep-state { | |
| phandle = <0x04>; | |
| linux,phandle = <0x04>; | |
| gpg3-3 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpg3-3"; | |
| }; | |
| gpg3-2 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpg3-2"; | |
| }; | |
| gpg3-1 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpg3-1"; | |
| }; | |
| gpg3-0 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpg3-0"; | |
| }; | |
| gpg0-1 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpg0-1"; | |
| }; | |
| gpg0-0 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpg0-0"; | |
| }; | |
| gpd8-1 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd8-1"; | |
| }; | |
| gpd8-0 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd8-0"; | |
| }; | |
| gpd7-2 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd7-2"; | |
| }; | |
| gpd7-1 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd7-1"; | |
| }; | |
| gpd7-0 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd7-0"; | |
| }; | |
| gpd6-5 { | |
| samsung,pin-pud-pdn = <0x03>; | |
| samsung,pin-con-pdn = <0x01>; | |
| samsung,pins = "gpd6-5"; | |
| }; | |
| gpd6-4 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd6-4"; | |
| }; | |
| gpd6-3 { | |
| samsung,pin-pud-pdn = <0x03>; | |
| samsung,pin-con-pdn = <0x01>; | |
| samsung,pins = "gpd6-3"; | |
| }; | |
| gpd6-2 { | |
| samsung,pin-pud-pdn = <0x03>; | |
| samsung,pin-con-pdn = <0x01>; | |
| samsung,pins = "gpd6-2"; | |
| }; | |
| gpd6-1 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd6-1"; | |
| }; | |
| gpd6-0 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd6-0"; | |
| }; | |
| gpd5-3 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd5-3"; | |
| }; | |
| gpd5-2 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd5-2"; | |
| }; | |
| gpd5-1 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd5-1"; | |
| }; | |
| gpd5-0 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd5-0"; | |
| }; | |
| gpd4-4 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd4-4"; | |
| }; | |
| gpd4-3 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd4-3"; | |
| }; | |
| gpd4-2 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd4-2"; | |
| }; | |
| gpd4-1 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd4-1"; | |
| }; | |
| gpd4-0 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd4-0"; | |
| }; | |
| gpd2-7 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd2-7"; | |
| }; | |
| gpd2-6 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd2-6"; | |
| }; | |
| gpd2-5 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x00>; | |
| samsung,pins = "gpd2-5"; | |
| }; | |
| gpd2-4 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd2-4"; | |
| }; | |
| gpd2-3 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd2-3"; | |
| }; | |
| gpd2-2 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd2-2"; | |
| }; | |
| gpd2-1 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd2-1"; | |
| }; | |
| gpd2-0 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd2-0"; | |
| }; | |
| gpd1-5 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd1-5"; | |
| }; | |
| gpd1-4 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd1-4"; | |
| }; | |
| gpd1-3 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd1-3"; | |
| }; | |
| gpd1-2 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd1-2"; | |
| }; | |
| gpd1-1 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd1-1"; | |
| }; | |
| gpd1-0 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd1-0"; | |
| }; | |
| gpd0-3 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd0-3"; | |
| }; | |
| gpd0-2 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd0-2"; | |
| }; | |
| gpd0-1 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd0-1"; | |
| }; | |
| gpd0-0 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpd0-0"; | |
| }; | |
| gpc3-7 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpc3-7"; | |
| }; | |
| gpc3-6 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpc3-6"; | |
| }; | |
| gpc3-5 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpc3-5"; | |
| }; | |
| gpc3-4 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpc3-4"; | |
| }; | |
| gpc3-3 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpc3-3"; | |
| }; | |
| gpc3-2 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpc3-2"; | |
| }; | |
| gpc3-1 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpc3-1"; | |
| }; | |
| gpc3-0 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpc3-0"; | |
| }; | |
| gpc2-5 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpc2-5"; | |
| }; | |
| gpc2-4 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpc2-4"; | |
| }; | |
| gpc2-3 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpc2-3"; | |
| }; | |
| gpc2-2 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpc2-2"; | |
| }; | |
| gpc2-1 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpc2-1"; | |
| }; | |
| gpc2-0 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpc2-0"; | |
| }; | |
| gpc1-1 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpc1-1"; | |
| }; | |
| gpc1-0 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpc1-0"; | |
| }; | |
| gpc0-7 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpc0-7"; | |
| }; | |
| gpc0-6 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpc0-6"; | |
| }; | |
| gpc0-5 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpc0-5"; | |
| }; | |
| gpc0-4 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpc0-4"; | |
| }; | |
| gpc0-3 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpc0-3"; | |
| }; | |
| gpc0-2 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpc0-2"; | |
| }; | |
| gpc0-1 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpc0-1"; | |
| }; | |
| gpc0-0 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpc0-0"; | |
| }; | |
| gpb0-4 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x00>; | |
| samsung,pins = "gpb0-4"; | |
| }; | |
| gpb0-3 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpb0-3"; | |
| }; | |
| gpb0-2 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpb0-2"; | |
| }; | |
| gpb0-1 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpb0-1"; | |
| }; | |
| gpb0-0 { | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpb0-0"; | |
| }; | |
| }; | |
| initial-state { | |
| phandle = <0x03>; | |
| linux,phandle = <0x03>; | |
| gpd4-4 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpd4-4"; | |
| }; | |
| gpd4-3 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpd4-3"; | |
| }; | |
| gpd4-2 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpd4-2"; | |
| }; | |
| gpd4-1 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpd4-1"; | |
| }; | |
| gpd4-0 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpd4-0"; | |
| }; | |
| gpd2-7 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpd2-7"; | |
| }; | |
| gpd2-6 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpd2-6"; | |
| }; | |
| gpd2-4 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpd2-4"; | |
| }; | |
| gpd1-5 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpd1-5"; | |
| }; | |
| gpd1-4 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpd1-4"; | |
| }; | |
| gpd0-1 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpd0-1"; | |
| }; | |
| gpd0-0 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpd0-0"; | |
| }; | |
| }; | |
| fimc-is-hsi2c-off { | |
| phandle = <0x7b>; | |
| linux,phandle = <0x7b>; | |
| samsung,pin-drv = <0x03>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpb0-3\0gpb0-2"; | |
| }; | |
| fimc-is-ois-hsi2c-on { | |
| phandle = <0x7c>; | |
| linux,phandle = <0x7c>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpb0-3\0gpb0-2"; | |
| }; | |
| fimc-is-ois { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpc2-5\0gpc2-4"; | |
| }; | |
| fimc-is-comp-int { | |
| phandle = <0x4d>; | |
| linux,phandle = <0x4d>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x0f>; | |
| samsung,pins = "gpc0-0"; | |
| }; | |
| fimc-is-flash-is { | |
| phandle = <0x90>; | |
| linux,phandle = <0x90>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpc0-2\0gpc0-3"; | |
| }; | |
| fimc-is-flash-host { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpc0-2\0gpc0-3"; | |
| }; | |
| spi1-miso { | |
| phandle = <0x2b>; | |
| linux,phandle = <0x2b>; | |
| samsung,pin-drv = <0x03>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpd6-4"; | |
| }; | |
| spi1-mosi-sck-ssn { | |
| phandle = <0x2a>; | |
| linux,phandle = <0x2a>; | |
| samsung,pin-drv = <0x03>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpd6-2\0gpd6-3\0gpd6-5"; | |
| }; | |
| vibetonz_pwm { | |
| phandle = <0x54>; | |
| linux,phandle = <0x54>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpd2-5"; | |
| }; | |
| spdif-bus { | |
| phandle = <0xbc>; | |
| linux,phandle = <0xbc>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x04>; | |
| samsung,pins = "gpd4-3\0gpd4-4"; | |
| }; | |
| pcm1-bus { | |
| phandle = <0xbd>; | |
| linux,phandle = <0xbd>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x03>; | |
| samsung,pins = "gpd4-0\0gpd4-1\0gpd4-2\0gpd4-3\0gpd4-4"; | |
| }; | |
| i2s1-bus { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpd4-0\0gpd4-1\0gpd4-2\0gpd4-3\0gpd4-4"; | |
| }; | |
| fimc-is-spi-ssn1 { | |
| phandle = <0x4c>; | |
| linux,phandle = <0x4c>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpc3-5"; | |
| }; | |
| fimc-is-spi-ssn0 { | |
| phandle = <0x48>; | |
| linux,phandle = <0x48>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpc3-1"; | |
| }; | |
| fimc-is-spi-pin1 { | |
| phandle = <0x4b>; | |
| linux,phandle = <0x4b>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpc3-7\0gpc3-6\0gpc3-4"; | |
| }; | |
| fimc-is-spi-pin0 { | |
| phandle = <0x47>; | |
| linux,phandle = <0x47>; | |
| samsung,pin-drv = <0x03>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpc3-3\0gpc3-2\0gpc3-0"; | |
| }; | |
| fimc-is-flash { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpc0-3\0gpc0-2"; | |
| }; | |
| fimc_is_vision { | |
| phandle = <0xd9>; | |
| linux,phandle = <0xd9>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpf5-3\0gpf5-2"; | |
| }; | |
| fimc_is_i2c2 { | |
| phandle = <0xdc>; | |
| linux,phandle = <0xdc>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpc2-5\0gpc2-4"; | |
| }; | |
| fimc_is_i2c1 { | |
| phandle = <0xe1>; | |
| linux,phandle = <0xe1>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpc2-3\0gpc2-2"; | |
| }; | |
| fimc_is_host_gpio_i2c0 { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpc2-1\0gpc2-0"; | |
| }; | |
| fimc_is_i2c0 { | |
| phandle = <0xdb>; | |
| linux,phandle = <0xdb>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpc2-1\0gpc2-0"; | |
| }; | |
| fimc_is_mclk2_fn { | |
| phandle = <0xe2>; | |
| linux,phandle = <0xe2>; | |
| samsung,pin-drv = <0x02>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpd7-2"; | |
| }; | |
| fimc_is_mclk1_fn { | |
| phandle = <0xde>; | |
| linux,phandle = <0xde>; | |
| samsung,pin-drv = <0x02>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpd7-1"; | |
| }; | |
| fimc_is_mclk0_fn { | |
| phandle = <0xdd>; | |
| linux,phandle = <0xdd>; | |
| samsung,pin-drv = <0x02>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpd7-0"; | |
| }; | |
| fimc_is_mclk2_out { | |
| phandle = <0x93>; | |
| linux,phandle = <0x93>; | |
| samsung,pin-drv = <0x02>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpd7-2"; | |
| }; | |
| fimc_is_mclk2_in { | |
| samsung,pin-drv = <0x02>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpd7-2"; | |
| }; | |
| fimc_is_mclk1_out { | |
| phandle = <0x92>; | |
| linux,phandle = <0x92>; | |
| samsung,pin-drv = <0x02>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpd7-1"; | |
| }; | |
| fimc_is_mclk1_in { | |
| samsung,pin-drv = <0x02>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpd7-1"; | |
| }; | |
| fimc_is_mclk0_out { | |
| phandle = <0x91>; | |
| linux,phandle = <0x91>; | |
| samsung,pin-drv = <0x02>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpd7-0"; | |
| }; | |
| fimc_is_mclk0_in { | |
| samsung,pin-drv = <0x02>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpd7-0"; | |
| }; | |
| fimc-is-uart { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpc1-1\0gpc0-7"; | |
| }; | |
| hs-i2c5-bus { | |
| phandle = <0x6a>; | |
| linux,phandle = <0x6a>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpg3-3\0gpg3-2"; | |
| }; | |
| hs-i2c4-apm { | |
| phandle = <0x62>; | |
| linux,phandle = <0x62>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpg3-1\0gpg3-0"; | |
| }; | |
| hs-i2c4-bus { | |
| phandle = <0x61>; | |
| linux,phandle = <0x61>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpg3-1\0gpg3-0"; | |
| }; | |
| disp1_tesoff { | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpg0-0"; | |
| }; | |
| disp1_teson { | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpg0-0"; | |
| }; | |
| disp0_tesoff { | |
| phandle = <0xab>; | |
| linux,phandle = <0xab>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpg0-1"; | |
| }; | |
| disp0_teson { | |
| phandle = <0xaa>; | |
| linux,phandle = <0xaa>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpg0-1"; | |
| }; | |
| spi0-cs { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpd8-1"; | |
| }; | |
| spi0-cs-func { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpd8-1"; | |
| }; | |
| spi0-bus { | |
| phandle = <0x21>; | |
| linux,phandle = <0x21>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpd8-0\0gpd6-0\0gpd6-1"; | |
| }; | |
| spi1-cs { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpd6-3"; | |
| }; | |
| spi1-cs-func { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpd6-3"; | |
| }; | |
| spi1-bus { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpd6-2\0gpd6-4\0gpd6-5"; | |
| }; | |
| uart3-bus { | |
| phandle = <0x1b>; | |
| linux,phandle = <0x1b>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x03>; | |
| samsung,pins = "gpd5-1\0gpd5-0"; | |
| }; | |
| spi2-cs { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpd5-1"; | |
| }; | |
| spi2-cs-func { | |
| phandle = <0x32>; | |
| linux,phandle = <0x32>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpd5-1"; | |
| }; | |
| spi2-bus { | |
| phandle = <0x31>; | |
| linux,phandle = <0x31>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpd5-0\0gpd5-3"; | |
| }; | |
| hs-i2c8-bus { | |
| phandle = <0x77>; | |
| linux,phandle = <0x77>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x03>; | |
| samsung,pins = "gpd5-3\0gpd5-2"; | |
| }; | |
| hs-i2c9-bus { | |
| phandle = <0x79>; | |
| linux,phandle = <0x79>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x03>; | |
| samsung,pins = "gpd2-7\0gpd2-6"; | |
| }; | |
| hs-i2c1-bus { | |
| phandle = <0x52>; | |
| linux,phandle = <0x52>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpd2-3\0gpd2-2"; | |
| }; | |
| hs-i2c0-bus { | |
| phandle = <0x4e>; | |
| linux,phandle = <0x4e>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpd2-1\0gpd2-0"; | |
| }; | |
| uart1-bus { | |
| phandle = <0x19>; | |
| linux,phandle = <0x19>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpd1-3\0gpd1-2\0gpd1-1\0gpd1-0"; | |
| }; | |
| uart2-bus { | |
| phandle = <0x1a>; | |
| linux,phandle = <0x1a>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpd1-5\0gpd1-4"; | |
| }; | |
| hs-i2c3-bus { | |
| phandle = <0x5a>; | |
| linux,phandle = <0x5a>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x03>; | |
| samsung,pins = "gpd1-3\0gpd1-2"; | |
| }; | |
| uart0-bus { | |
| phandle = <0x18>; | |
| linux,phandle = <0x18>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpd0-3\0gpd0-2\0gpd0-1\0gpd0-0"; | |
| }; | |
| hs-i2c2-bus { | |
| phandle = <0x56>; | |
| linux,phandle = <0x56>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x03>; | |
| samsung,pins = "gpd0-3\0gpd0-2"; | |
| }; | |
| uart-isp-bus { | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x03>; | |
| samsung,pins = "gpc0-7\0gpc0-6\0gpc1-1\0gpc1-0"; | |
| }; | |
| hs-i2c11-bus { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpb0-3\0gpb0-2"; | |
| }; | |
| hs-i2c10-bus { | |
| phandle = <0x7a>; | |
| linux,phandle = <0x7a>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpb0-1\0gpb0-0"; | |
| }; | |
| gpg3 { | |
| phandle = <0x63>; | |
| linux,phandle = <0x63>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpg0 { | |
| phandle = <0xb2>; | |
| linux,phandle = <0xb2>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpd8 { | |
| phandle = <0x28>; | |
| linux,phandle = <0x28>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpd7 { | |
| phandle = <0xdf>; | |
| linux,phandle = <0xdf>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpd6 { | |
| phandle = <0x30>; | |
| linux,phandle = <0x30>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpd5 { | |
| phandle = <0x78>; | |
| linux,phandle = <0x78>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpd4 { | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpd2 { | |
| phandle = <0x4f>; | |
| linux,phandle = <0x4f>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpd1 { | |
| phandle = <0x5b>; | |
| linux,phandle = <0x5b>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpd0 { | |
| phandle = <0x57>; | |
| linux,phandle = <0x57>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpc3 { | |
| phandle = <0x4a>; | |
| linux,phandle = <0x4a>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpc2 { | |
| phandle = <0xda>; | |
| linux,phandle = <0xda>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpc1 { | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpc0 { | |
| phandle = <0xe0>; | |
| linux,phandle = <0xe0>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpb0 { | |
| phandle = <0x69>; | |
| linux,phandle = <0x69>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| }; | |
| pinctrl@114B0000 { | |
| pinctrl-0 = <0x02>; | |
| pinctrl-names = "sleep"; | |
| interrupts = <0x00 0x5c 0x00>; | |
| reg = <0x114b0000 0x1000>; | |
| compatible = "samsung,exynos7420-pinctrl"; | |
| sleep-state { | |
| phandle = <0x02>; | |
| linux,phandle = <0x02>; | |
| gpz1-3 { | |
| samsung,pin-pud-pdn = <0x03>; | |
| samsung,pin-con-pdn = <0x01>; | |
| samsung,pins = "gpz1-3"; | |
| }; | |
| gpz1-2 { | |
| samsung,pin-pud-pdn = <0x03>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpz1-2"; | |
| }; | |
| gpz1-1 { | |
| samsung,pin-pud-pdn = <0x03>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpz1-1"; | |
| }; | |
| gpz1-0 { | |
| samsung,pin-pud-pdn = <0x03>; | |
| samsung,pin-con-pdn = <0x01>; | |
| samsung,pins = "gpz1-0"; | |
| }; | |
| gpz0-6 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpz0-6"; | |
| }; | |
| gpz0-5 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpz0-5"; | |
| }; | |
| gpz0-4 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpz0-4"; | |
| }; | |
| gpz0-3 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpz0-3"; | |
| }; | |
| gpz0-2 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpz0-2"; | |
| }; | |
| gpz0-1 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpz0-1"; | |
| }; | |
| gpz0-0 { | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpz0-0"; | |
| }; | |
| }; | |
| uart-bt-input-sleep { | |
| phandle = <0x1e>; | |
| linux,phandle = <0x1e>; | |
| samsung,pin-pud-pdn = <0x03>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pins = "gpz1-2\0gpz1-1"; | |
| }; | |
| uart-bt-output-sleep { | |
| phandle = <0x1d>; | |
| linux,phandle = <0x1d>; | |
| samsung,pin-pud-pdn = <0x03>; | |
| samsung,pin-con-pdn = <0x01>; | |
| samsung,pins = "gpz1-3\0gpz1-0"; | |
| }; | |
| uart-bt-active { | |
| phandle = <0x1c>; | |
| linux,phandle = <0x1c>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpz1-3\0gpz1-2\0gpz1-1\0gpz1-0"; | |
| }; | |
| uart-aud-bus-lpm { | |
| phandle = <0x20>; | |
| linux,phandle = <0x20>; | |
| samsung,pin-pud-pdn = <0x03>; | |
| samsung,pin-con-pdn = <0x01>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-val = <0x01>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpz1-3\0gpz1-0"; | |
| }; | |
| uart-aud-bus-idle { | |
| phandle = <0x1f>; | |
| linux,phandle = <0x1f>; | |
| samsung,pin-pud-pdn = <0x03>; | |
| samsung,pin-con-pdn = <0x01>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-val = <0x01>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpz1-3\0gpz1-0"; | |
| }; | |
| uart-aud-bus { | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpz1-3\0gpz1-2\0gpz1-1\0gpz1-0"; | |
| }; | |
| pcm0-bus { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x03>; | |
| samsung,pins = "gpz1-0\0gpz1-1\0gpz1-2\0gpz1-3"; | |
| }; | |
| i2s0-bus-idle { | |
| phandle = <0xbb>; | |
| linux,phandle = <0xbb>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpz0-0\0gpz0-1\0gpz0-2\0gpz0-3\0gpz0-4\0gpz0-5\0gpz0-6"; | |
| }; | |
| i2s0-bus { | |
| phandle = <0xba>; | |
| linux,phandle = <0xba>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x02>; | |
| samsung,pins = "gpz0-0\0gpz0-1\0gpz0-2\0gpz0-3\0gpz0-4\0gpz0-5\0gpz0-6"; | |
| }; | |
| gpz1 { | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpz0 { | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| }; | |
| pinctrl@10580000 { | |
| interrupts = <0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x02 0x00 0x00 0x03 0x00 0x00 0x04 0x00 0x00 0x05 0x00 0x00 0x06 0x00 0x00 0x07 0x00 0x00 0x08 0x00 0x00 0x09 0x00 0x00 0x0a 0x00 0x00 0x0b 0x00 0x00 0x0c 0x00 0x00 0x0d 0x00 0x00 0x0e 0x00 0x00 0x0f 0x00>; | |
| reg = <0x10580000 0x1000>; | |
| compatible = "samsung,exynos7420-pinctrl"; | |
| sub-det { | |
| phandle = <0x60>; | |
| linux,phandle = <0x60>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpa3-0"; | |
| }; | |
| cfg-input { | |
| phandle = <0x5f>; | |
| linux,phandle = <0x5f>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpa0-0"; | |
| }; | |
| cfg-irq { | |
| phandle = <0x5e>; | |
| linux,phandle = <0x5e>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x0f>; | |
| samsung,pins = "gpa0-0"; | |
| }; | |
| max98505-ctl { | |
| phandle = <0x51>; | |
| linux,phandle = <0x51>; | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpa2-0"; | |
| }; | |
| codec-irq { | |
| phandle = <0x24>; | |
| linux,phandle = <0x24>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x0f>; | |
| samsung,pins = "gpa2-5"; | |
| }; | |
| btp-irqidle { | |
| phandle = <0x41>; | |
| linux,phandle = <0x41>; | |
| samsung,pin-drv = <0x03>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x0f>; | |
| samsung,pins = "gpa0-7"; | |
| }; | |
| btp-irqsleep { | |
| phandle = <0x40>; | |
| linux,phandle = <0x40>; | |
| samsung,pin-drv = <0x03>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpa0-7"; | |
| }; | |
| btp-irq { | |
| phandle = <0x3b>; | |
| linux,phandle = <0x3b>; | |
| samsung,pin-drv = <0x03>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpa0-7"; | |
| }; | |
| gpio_cp_dump_int { | |
| phandle = <0xf4>; | |
| linux,phandle = <0xf4>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x0f>; | |
| samsung,pins = "gpa1-3"; | |
| }; | |
| gpio_ipc_int2cp { | |
| phandle = <0xf2>; | |
| linux,phandle = <0xf2>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-val = <0x00>; | |
| samsung,pin-function = <0x01>; | |
| samsung,pins = "gpa1-1"; | |
| }; | |
| cp2ap_status { | |
| phandle = <0xf1>; | |
| linux,phandle = <0xf1>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x0f>; | |
| samsung,pins = "gpa1-0"; | |
| }; | |
| cp2ap_wakeup { | |
| phandle = <0xf0>; | |
| linux,phandle = <0xf0>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x0f>; | |
| samsung,pins = "gpa3-1"; | |
| }; | |
| phone_active { | |
| phandle = <0xed>; | |
| linux,phandle = <0xed>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x0f>; | |
| samsung,pins = "gpa2-7"; | |
| }; | |
| wciokb-irq { | |
| phandle = <0xe8>; | |
| linux,phandle = <0xe8>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpa1-7"; | |
| }; | |
| chg-irq { | |
| phandle = <0x53>; | |
| linux,phandle = <0x53>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpa1-4"; | |
| }; | |
| wpc-int { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpa2-4"; | |
| }; | |
| attn-input { | |
| phandle = <0x75>; | |
| linux,phandle = <0x75>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpa1-6"; | |
| }; | |
| attn-irq { | |
| phandle = <0x74>; | |
| linux,phandle = <0x74>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x0f>; | |
| samsung,pins = "gpa1-6"; | |
| }; | |
| ssp-host-wake-irq { | |
| samsung,pin-drv = <0x03>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x0f>; | |
| samsung,pins = "gpa3-2"; | |
| }; | |
| ssp-host-wake { | |
| phandle = <0xfb>; | |
| linux,phandle = <0xfb>; | |
| samsung,pin-drv = <0x03>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpa3-2"; | |
| }; | |
| ssp-host-req { | |
| phandle = <0x2c>; | |
| linux,phandle = <0x2c>; | |
| samsung,pin-drv = <0x03>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x0f>; | |
| samsung,pins = "gpa3-6"; | |
| }; | |
| pmic-irq { | |
| phandle = <0x64>; | |
| linux,phandle = <0x64>; | |
| samsung,pin-drv = <0x03>; | |
| samsung,pin-pud = <0x03>; | |
| samsung,pins = "gpa3-7"; | |
| }; | |
| certify-hall-irq { | |
| phandle = <0xd3>; | |
| linux,phandle = <0xd3>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x0f>; | |
| samsung,pins = "gpa0-4"; | |
| }; | |
| hall-irq { | |
| phandle = <0xd2>; | |
| linux,phandle = <0xd2>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x0f>; | |
| samsung,pins = "gpa0-1"; | |
| }; | |
| wakeup-interrupt-controller { | |
| samsung,eint-flt-conf; | |
| interrupts = <0x00 0x10 0x00>; | |
| interrupt-parent = <0x01>; | |
| compatible = "samsung,exynos4210-wakeup-eint"; | |
| }; | |
| pcie_wake { | |
| phandle = <0xc7>; | |
| linux,phandle = <0xc7>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpa3-3"; | |
| }; | |
| hdmi_cec { | |
| phandle = <0xb7>; | |
| linux,phandle = <0xb7>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x03>; | |
| samsung,pins = "gpa3-1"; | |
| }; | |
| hdmi_ext_hpd { | |
| phandle = <0xb6>; | |
| linux,phandle = <0xb6>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x0f>; | |
| samsung,pins = "gpa3-0"; | |
| }; | |
| hdmi_hdmi_hpd { | |
| phandle = <0xb5>; | |
| linux,phandle = <0xb5>; | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x03>; | |
| samsung,pins = "gpa3-0"; | |
| }; | |
| dwmmc2_cd_ext_irq { | |
| samsung,pin-drv = <0x00>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x0f>; | |
| samsung,pins = "gpa2-4"; | |
| }; | |
| wlan_host_wake { | |
| phandle = <0xca>; | |
| linux,phandle = <0xca>; | |
| samsung,pin-pud-pdn = <0x01>; | |
| samsung,pin-con-pdn = <0x03>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x0f>; | |
| samsung,pins = "gpa2-3"; | |
| }; | |
| bt-hostwake { | |
| phandle = <0xe3>; | |
| linux,phandle = <0xe3>; | |
| samsung,pin-pud-pdn = <0x00>; | |
| samsung,pin-con-pdn = <0x02>; | |
| samsung,pin-pud = <0x00>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpa2-1"; | |
| }; | |
| hrm-irqidle { | |
| phandle = <0x73>; | |
| linux,phandle = <0x73>; | |
| samsung,pin-drv = <0x03>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x0f>; | |
| samsung,pins = "gpa1-5"; | |
| }; | |
| hrm-irqsleep { | |
| phandle = <0x72>; | |
| linux,phandle = <0x72>; | |
| samsung,pin-drv = <0x03>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x0f>; | |
| samsung,pins = "gpa1-5"; | |
| }; | |
| hrm-irq { | |
| phandle = <0x71>; | |
| linux,phandle = <0x71>; | |
| samsung,pin-drv = <0x03>; | |
| samsung,pin-pud = <0x01>; | |
| samsung,pin-function = <0x00>; | |
| samsung,pins = "gpa1-5"; | |
| }; | |
| gpa3 { | |
| phandle = <0x2f>; | |
| linux,phandle = <0x2f>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpa2 { | |
| phandle = <0x22>; | |
| linux,phandle = <0x22>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpa1 { | |
| phandle = <0x55>; | |
| linux,phandle = <0x55>; | |
| interrupts = <0x00 0x08 0x00 0x00 0x09 0x00 0x00 0x0a 0x00 0x00 0x0b 0x00 0x00 0x0c 0x00 0x00 0x0d 0x00 0x00 0x0e 0x00 0x00 0x0f 0x00>; | |
| interrupt-parent = <0x01>; | |
| #interrupt-cells = <0x03>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpa0 { | |
| phandle = <0x43>; | |
| linux,phandle = <0x43>; | |
| interrupts = <0x00 0x00 0x00 0x00 0x01 0x00 0x00 0x02 0x00 0x00 0x03 0x00 0x00 0x04 0x00 0x00 0x05 0x00 0x00 0x06 0x00 0x00 0x07 0x00>; | |
| interrupt-parent = <0x01>; | |
| #interrupt-cells = <0x02>; | |
| interrupt-controller; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| }; | |
| }; |
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