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sigmaris/bl31.dump

Created February 17, 2020 13:47
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ATF compiled with GCC 9.2.0 suspend exception
Raw
bl31.dump
This file has been truncated, but you can view the full file.
build/rk3399/debug/bl31/bl31.elf: file format elf64-littleaarch64
build/rk3399/debug/bl31/bl31.elf
architecture: aarch64, flags 0x00000112:
EXEC_P, HAS_SYMS, D_PAGED
start address 0x0000000000040000
Program Header:
LOAD off 0x0000000000010000 vaddr 0x0000000000040000 paddr 0x0000000000040000 align 2**16
filesz 0x0000000000027072 memsz 0x0000000000057000 flags rwx
LOAD off 0x0000000000040000 vaddr 0x00000000ff3b0000 paddr 0x00000000ff3b0000 align 2**16
filesz 0x0000000000001f54 memsz 0x0000000000001f54 flags rwx
LOAD off 0x0000000000050000 vaddr 0x00000000ff8c0000 paddr 0x00000000ff8c0000 align 2**16
filesz 0x0000000000002000 memsz 0x0000000000003000 flags rwx
STACK off 0x0000000000000000 vaddr 0x0000000000000000 paddr 0x0000000000000000 align 2**4
filesz 0x0000000000000000 memsz 0x0000000000000000 flags rw-
private flags = 0:
Sections:
Idx Name Size VMA LMA File off Algn
0 .incbin_sram 00001000 00000000ff8c0000 00000000ff8c0000 00050000 2**12
CONTENTS, ALLOC, LOAD, READONLY, DATA
1 .text_sram 00001000 00000000ff8c1000 00000000ff8c1000 00051000 2**12
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .data_sram 00000000 00000000ff8c2000 00000000ff8c2000 00052000 2**12
CONTENTS
3 .stack_sram 00001000 00000000ff8c2000 00000000ff8c2000 00052000 2**12
ALLOC
4 .pmusram 00001f54 00000000ff3b0000 00000000ff3b0000 00040000 2**4
CONTENTS, ALLOC, LOAD, CODE
5 ro 00027000 0000000000040000 0000000000040000 00010000 2**16
CONTENTS, ALLOC, LOAD, CODE
6 .data 00000072 0000000000067000 0000000000067000 00037000 2**3
CONTENTS, ALLOC, LOAD, DATA
7 stacks 00003000 0000000000067080 0000000000067080 00037072 2**6
ALLOC
8 .bss 00017c95 000000000006a080 000000000006a080 00037072 2**6
ALLOC
9 xlat_table 00014000 0000000000082000 0000000000082000 00037072 2**12
ALLOC
10 coherent_ram 00001000 0000000000096000 0000000000096000 00037072 2**12
ALLOC
11 .debug_info 00054740 0000000000000000 0000000000000000 00052000 2**0
CONTENTS, READONLY, DEBUGGING
12 .debug_abbrev 0000b328 0000000000000000 0000000000000000 000a6740 2**0
CONTENTS, READONLY, DEBUGGING
13 .debug_aranges 00003360 0000000000000000 0000000000000000 000b1a70 2**4
CONTENTS, READONLY, DEBUGGING
14 .debug_line 00025b7d 0000000000000000 0000000000000000 000b4dd0 2**0
CONTENTS, READONLY, DEBUGGING
15 .debug_str 000093f4 0000000000000000 0000000000000000 000da94d 2**0
CONTENTS, READONLY, DEBUGGING
16 .comment 00000011 0000000000000000 0000000000000000 000e3d41 2**0
CONTENTS, READONLY
17 .debug_loc 00058f39 0000000000000000 0000000000000000 000e3d52 2**0
CONTENTS, READONLY, DEBUGGING
18 .debug_ranges 00012bd0 0000000000000000 0000000000000000 0013cc90 2**4
CONTENTS, READONLY, DEBUGGING
19 .debug_frame 00001010 0000000000000000 0000000000000000 0014f860 2**3
CONTENTS, READONLY, DEBUGGING
SYMBOL TABLE:
00000000ff8c0000 l d .incbin_sram 0000000000000000 .incbin_sram
00000000ff8c1000 l d .text_sram 0000000000000000 .text_sram
00000000ff8c2000 l d .data_sram 0000000000000000 .data_sram
00000000ff8c2000 l d .stack_sram 0000000000000000 .stack_sram
00000000ff3b0000 l d .pmusram 0000000000000000 .pmusram
0000000000040000 l d ro 0000000000000000 ro
0000000000067000 l d .data 0000000000000000 .data
0000000000067080 l d stacks 0000000000000000 stacks
000000000006a080 l d .bss 0000000000000000 .bss
0000000000082000 l d xlat_table 0000000000000000 xlat_table
0000000000096000 l d coherent_ram 0000000000000000 coherent_ram
0000000000000000 l d .debug_info 0000000000000000 .debug_info
0000000000000000 l d .debug_abbrev 0000000000000000 .debug_abbrev
0000000000000000 l d .debug_aranges 0000000000000000 .debug_aranges
0000000000000000 l d .debug_line 0000000000000000 .debug_line
0000000000000000 l d .debug_str 0000000000000000 .debug_str
0000000000000000 l d .comment 0000000000000000 .comment
0000000000000000 l d .debug_loc 0000000000000000 .debug_loc
0000000000000000 l d .debug_ranges 0000000000000000 .debug_ranges
0000000000000000 l d .debug_frame 0000000000000000 .debug_frame
0000000000000000 l df *ABS* 0000000000000000 pmu_fw.c
0000000000000000 l df *ABS* 0000000000000000 ./build/rk3399/debug/bl31/plat_helpers.o
00000000ff8c102c l .text_sram 0000000000000000 check_ddrc0_1_sref_enter
00000000ff8c1068 l .text_sram 0000000000000000 check_ddrc0_1_sref_exit
000000000005febc l ro 0000000000000000 handler_a72
000000000005fec8 l ro 0000000000000000 handler_end
0000000000050038 l ro 0000000000000000 clst_warmboot_end
0000000000050060 l ro 0000000000000000 boot_entry
0000000000050058 l ro 0000000000000000 wfe_loop
0000000000000000 l df *ABS* 0000000000000000 ./build/rk3399/debug/bl31/pmu_sram_cpus_on.o
00000000ff3b0000 l .pmusram 0000000000000000 ddr_resume
00000000ff3b0010 l .pmusram 0000000000000000 sys_resume
0000000000000000 l df *ABS* 0000000000000000 secure.c
0000000000000000 l df *ABS* 0000000000000000 soc.c
00000000000568f8 l F ro 0000000000000078 restore_pll.constprop.0
000000000006ea4c l O .bss 0000000000000158 slp_data
0000000000000000 l df *ABS* 0000000000000000 suspend.c
00000000ff3b00e4 l F .pmusram 0000000000000024 sram_regcpy
000000000005ba94 l F ro 0000000000000024 dram_regcpy
00000000ff3b0108 l F .pmusram 0000000000000030 sram_udelay
00000000ff3b0138 l F .pmusram 0000000000000048 rkclk_ddr_reset
00000000ff3b0180 l F .pmusram 0000000000000054 select_per_cs_training_index
00000000ff3b01d4 l F .pmusram 00000000000004f8 data_training.constprop.0
0000000000000000 l df *ABS* 0000000000000000 dram.c
0000000000000000 l df *ABS* 0000000000000000 ./build/rk3399/debug/bl31/bl31_entrypoint.o
0000000000000000 l df *ABS* 0000000000000000 gic_common.c
0000000000000000 l df *ABS* 0000000000000000 arm_gicv3_common.c
0000000000000000 l df *ABS* 0000000000000000 gic500.c
0000000000000000 l df *ABS* 0000000000000000 gicv3_main.c
0000000000050388 l F ro 000000000000000c gicr_wait_for_pending_write
0000000000000000 l df *ABS* 0000000000000000 gicv3_helpers.c
0000000000000000 l df *ABS* 0000000000000000 plat_gicv3.c
0000000000062b41 l O ro 0000000000000004 CSWTCH.12
0000000000000000 l df *ABS* 0000000000000000 rockchip_gicv3.c
00000000000516ec l F ro 0000000000000004 plat_rockchip_mpidr_to_core_pos
00000000000622f8 l O ro 0000000000000008 g01s_interrupt_props
0000000000000000 l df *ABS* 0000000000000000 cci.c
000000000006b098 l O .bss 0000000000000008 cci_base
000000000006dd70 l O .bss 0000000000000004 cci_num_slave_ports
000000000006b0a0 l O .bss 0000000000000008 cci_slave_if_map
000000000006dd74 l O .bss 0000000000000004 max_master_id
0000000000062c82 l O ro 0000000000000004 CSWTCH.22
0000000000000000 l df *ABS* 0000000000000000 delay_timer.c
000000000006b0a8 l O .bss 0000000000000008 timer_ops
0000000000000000 l df *ABS* 0000000000000000 generic_delay_timer.c
0000000000051acc l F ro 000000000000000c get_timer_value
000000000006b0b0 l O .bss 0000000000000010 ops
0000000000000000 l df *ABS* 0000000000000000 gpio.c
000000000006b0c0 l O .bss 0000000000000008 ops
0000000000000000 l df *ABS* 0000000000000000 bl31_plat_setup.c
000000000006b0c8 l O .bss 0000000000000058 bl32_ep_info
000000000006b120 l O .bss 0000000000000058 bl33_ep_info
000000000006b178 l O .bss 0000000000000030 console.1964
0000000000000000 l df *ABS* 0000000000000000 params_setup.c
0000000000051de4 l F ro 00000000000000d8 rk_aux_param_handler
000000000006ec88 l O .bss 0000000000010000 fdt_buffer
000000000007ec88 l O .bss 0000000000000001 suspend_apio
000000000006dd78 l O .bss 0000000000000050 suspend_gpio
0000000000067028 l O .data 0000000000000008 poweroff_gpio
0000000000067030 l O .data 0000000000000004 rk_uart_base
0000000000067034 l O .data 0000000000000004 rk_uart_baudrate
0000000000067038 l O .data 0000000000000008 rst_gpio
0000000000000000 l df *ABS* 0000000000000000 plat_pm.c
0000000000052338 l F ro 000000000000000c rockchip_system_reset
0000000000052344 l F ro 000000000000000c rockchip_system_poweroff
0000000000052368 l F ro 000000000000001c rockchip_pd_pwr_down_wfi
000000000006b1a8 l O .bss 0000000000000008 rockchip_sec_entrypoint
0000000000000000 l df *ABS* 0000000000000000 plat_topology.c
0000000000000000 l df *ABS* 0000000000000000 platform_common.c
0000000000062304 l O ro 0000000000000008 cci_map
0000000000000000 l df *ABS* 0000000000000000 rockchip_sip_svc.c
0000000000065138 l O ro 0000000000000020 __svc_desc_rockchip_sip_svc
0000000000000000 l df *ABS* 0000000000000000 plat_sip_calls.c
00000000000630b3 l O ro 000000000000001a __func__.1837
0000000000000000 l df *ABS* 0000000000000000 rk3399_gpio.c
0000000000052604 l F ro 00000000000000b8 gpio_get_clock
0000000000052730 l F ro 00000000000000f8 get_pull
0000000000052828 l F ro 000000000000012c set_pull
0000000000052954 l F ro 00000000000000a0 set_value
00000000000529f4 l F ro 000000000000008c get_value
0000000000052a80 l F ro 0000000000000098 set_direction
0000000000052b18 l F ro 0000000000000090 get_direction
000000000006de2c l O .bss 0000000000000190 store_grf_gpio
0000000000000000 l df *ABS* 0000000000000000 pmu.c
0000000000052d90 l F ro 0000000000000020 pmu_power_domain_st
0000000000052db0 l F ro 00000000000000cc pmu_power_domain_ctr
0000000000052e7c l F ro 00000000000000c4 clst_pwr_domain_suspend
0000000000052f40 l F ro 000000000000009c clst_pwr_domain_resume
0000000000052fdc l F ro 0000000000000108 pmu_bus_idle_req
00000000000530e4 l F ro 0000000000000138 pmu_set_power_domain
000000000005321c l F ro 000000000000015c cpus_power_domain_off
000000000007ec89 l O .bss 0000000000003000 store_sram
000000000006b1b0 l O .bss 0000000000002720 dist_ctx
000000000006dfbc l O .bss 0000000000000004 clk_ddrc_save
000000000006dfc0 l O .bss 0000000000000004 cpu_warm_boot_addr
000000000006dfc4 l O .bss 0000000000000004 gpio_2_4_clk_gate
000000000006dfc8 l O .bss 000000000000000c gpio_direction
000000000006dfd4 l O .bss 0000000000000030 iomux_status
000000000006e004 l O .bss 0000000000000004 pmu_powerdomain_state
000000000006e3f8 l O .bss 0000000000000030 pull_mode_status
000000000006d8d0 l O .bss 0000000000000058 rdist_ctx
000000000006e428 l O .bss 0000000000000590 store_cru
000000000006e9b8 l O .bss 0000000000000010 store_grf_ddrc_con
000000000006e9c8 l O .bss 0000000000000004 store_grf_io_vsel
000000000006e9cc l O .bss 0000000000000004 store_grf_soc_con0
000000000006e9d0 l O .bss 0000000000000004 store_grf_soc_con1
000000000006e9d4 l O .bss 0000000000000004 store_grf_soc_con2
000000000006e9d8 l O .bss 0000000000000004 store_grf_soc_con3
000000000006e9dc l O .bss 0000000000000004 store_grf_soc_con4
000000000006e9e0 l O .bss 0000000000000004 store_grf_soc_con7
000000000006e9e4 l O .bss 000000000000001c store_usbphy0
000000000006ea00 l O .bss 000000000000001c store_usbphy1
000000000006ea1c l O .bss 0000000000000008 store_wdt0
000000000006ea24 l O .bss 0000000000000008 store_wdt1
000000000006ea2c l O .bss 0000000000000018 uart_save
00000000000632b0 l O ro 0000000000000015 __func__.3889
00000000000632c5 l O ro 000000000000000f __func__.3899
00000000000632d4 l O ro 0000000000000011 __func__.4057
00000000000632e5 l O ro 0000000000000010 __func__.4115
00000000000632f5 l O ro 0000000000000015 __func__.4134
000000000006330a l O ro 0000000000000017 __func__.4155
0000000000063321 l O ro 0000000000000020 __func__.4337
0000000000063341 l O ro 000000000000001f __func__.4346
0000000000063360 l O ro 0000000000000017 __func__.4374
0000000000096054 l O coherent_ram 0000000000000018 core_pm_cfg_info
0000000000000000 l df *ABS* 0000000000000000 m0_ctl.c
0000000000000000 l df *ABS* 0000000000000000 pwm.c
000000000006ea44 l O .bss 0000000000000008 pwm_data
0000000000000000 l df *ABS* 0000000000000000 dfs.c
0000000000056d58 l F ro 0000000000000068 get_rdlat_adj
0000000000056dc0 l F ro 0000000000000068 get_wrlat_adj
0000000000056e28 l F ro 0000000000000074 get_pi_rdlat_adj
0000000000056e9c l F ro 00000000000000d8 gen_rk3399_set_odt
0000000000056f74 l F ro 000000000000003c to_get_clk_index
0000000000056fb0 l F ro 0000000000000050 get_pi_wrlat.isra.0.part.0
0000000000057000 l F ro 000000000000003c get_pi_todtoff_min.isra.0
000000000005703c l F ro 0000000000000030 get_pi_todtoff_max.isra.0
000000000005706c l F ro 00000000000000c8 get_pi_tdfi_phy_rdlat.isra.0
0000000000057134 l F ro 0000000000000038 get_pi_wrlat_adj.constprop.0
000000000005716c l F ro 0000000000002630 prepare_ddr_timing
000000000006eba4 l O .bss 0000000000000004 rddqs_delay_ps
000000000006eba8 l O .bss 0000000000000088 rk3399_dram_status
000000000006ec30 l O .bss 000000000000000c rk3399_suspend_status
000000000006ec3c l O .bss 0000000000000040 wrdqs_delay_val
000000000006239c l O ro 00000000000000fc dpll_rates_table
0000000000000000 l df *ABS* 0000000000000000 dram_spec_timing.c
000000000005a52c l F ro 000000000000004c get_max_die_capability
00000000000633d1 l O ro 000000000000009a ddr3_cl_cwl
0000000000062636 l O ro 000000000000002c ddr3_trc_tfaw
0000000000000000 l df *ABS* 0000000000000000 bl31_main.c
000000000006d928 l O .bss 0000000000000008 bl32_init
0000000000067054 l O .data 0000000000000004 next_image_type
00000000000635fd l O ro 000000000000001e __func__.2976
0000000000062290 l O ro 0000000000000010 psci_args.2951
0000000000000000 l df *ABS* 0000000000000000 interrupt_mgmt.c
000000000006d930 l O .bss 0000000000000060 intr_type_descs
0000000000000000 l df *ABS* 0000000000000000 bl31_context_mgmt.c
0000000000000000 l df *ABS* 0000000000000000 runtime_svc.c
000000000006375f l O ro 0000000000000011 __func__.1385
0000000000000000 l df *ABS* 0000000000000000 arm_arch_svc_setup.c
000000000005c138 l F ro 00000000000000c8 arm_arch_svc_smc_handler
0000000000065158 l O ro 0000000000000020 __svc_desc_arm_arch_svc
0000000000000000 l df *ABS* 0000000000000000 std_svc_setup.c
000000000005c200 l F ro 00000000000000bc std_svc_smc_handler
000000000005c2bc l F ro 0000000000000040 std_svc_setup
0000000000065178 l O ro 0000000000000020 __svc_desc_std_svc
0000000000000000 l df *ABS* 0000000000000000 context_mgmt.c
0000000000063898 l O ro 0000000000000011 __func__.2495
0000000000000000 l df *ABS* 0000000000000000 errata_report.c
00000000000622a0 l O ro 0000000000000018 errata_status_str.2554
0000000000000000 l df *ABS* 0000000000000000 psci_off.c
0000000000000000 l df *ABS* 0000000000000000 psci_on.c
0000000000000000 l df *ABS* 0000000000000000 psci_suspend.c
0000000000000000 l df *ABS* 0000000000000000 psci_common.c
000000000005cee4 l F ro 000000000000005c psci_set_req_local_pwr_state
0000000000081d09 l O .bss 000000000000000c psci_req_local_pwr_states
0000000000063e72 l O ro 0000000000000019 __func__.3216
00000000000622b8 l O ro 0000000000000018 psci_state_type_str.3230
0000000000000000 l df *ABS* 0000000000000000 psci_main.c
00000000000640d8 l O ro 0000000000000011 __func__.2994
0000000000000000 l df *ABS* 0000000000000000 psci_setup.c
000000000006a3a0 l O .bss 0000000000000cc0 psci_ns_context
0000000000000000 l df *ABS* 0000000000000000 psci_system_off.c
0000000000000000 l df *ABS* 0000000000000000 psci_mem_protect.c
0000000000000000 l df *ABS* 0000000000000000 bakery_lock_coherent.c
0000000000000000 l df *ABS* 0000000000000000 spe.c
000000000005e758 l F ro 0000000000000030 spe_drain_buffers_hook
0000000000000000 l df *ABS* 0000000000000000 bl_common.c
0000000000000000 l df *ABS* 0000000000000000 tf_log.c
0000000000067058 l O .data 0000000000000004 max_log_level
0000000000000000 l df *ABS* 0000000000000000 multi_console.c
0000000000000000 l df *ABS* 0000000000000000 plat_log_common.c
00000000000622d0 l O ro 0000000000000028 plat_prefix_str
0000000000000000 l df *ABS* 0000000000000000 plat_common.c
00000000000645b3 l O ro 0000000000000010 __func__.2717
0000000000000000 l df *ABS* 0000000000000000 backtrace.c
000000000005ebc0 l F ro 0000000000000040 is_address_readable
000000000005ec00 l F ro 0000000000000054 is_valid_object.constprop.0
0000000000000000 l df *ABS* 0000000000000000 desc_image_load.c
0000000000000000 l df *ABS* 0000000000000000 bl_aux_params.c
0000000000000000 l df *ABS* 0000000000000000 xlat_tables_common.c
000000000005ef04 l F ro 000000000000038c init_xlation_table_inner
0000000000082000 l O xlat_table 0000000000014000 xlat_tables
000000000006da08 l O .bss 0000000000000008 ap1_mask
000000000006da10 l O .bss 0000000000000008 execute_never_mask
000000000006da18 l O .bss 0000000000000340 mmap
000000000006ec84 l O .bss 0000000000000004 next_xlat
000000000006dd58 l O .bss 0000000000000008 xlat_max_pa
000000000006dd60 l O .bss 0000000000000008 xlat_max_va
0000000000000000 l df *ABS* 0000000000000000 xlat_tables.c
000000000006a380 l O .bss 0000000000000020 base_xlation_table
000000000006dd68 l O .bss 0000000000000008 tcr_ps_bits
00000000000625e0 l O ro 000000000000001c pa_range_bits_arr
0000000000000000 l df *ABS* 0000000000000000 plat_psci_common.c
0000000000000000 l df *ABS* 0000000000000000 ./build/rk3399/debug/bl31/16550_console.o
000000000005f938 l ro 0000000000000000 init_fail
000000000005f994 l ro 0000000000000000 register_fail
000000000005f95c l ro 0000000000000000 register_16550
000000000005fa24 l ro 0000000000000000 no_char
0000000000000000 l df *ABS* 0000000000000000 ./build/rk3399/debug/bl31/cortex_a53.o
0000000000000008 l *ABS* 0000000000000000 CPU_MIDR_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_EXTRA1_FUNC_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_EXTRA2_FUNC_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_E_HANDLER_FUNC_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_RESET_FUNC_SIZE
0000000000000010 l *ABS* 0000000000000000 CPU_PWR_DWN_OPS_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_ERRATA_FUNC_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_ERRATA_LOCK_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_ERRATA_PRINTED_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_REG_DUMP_SIZE
0000000000000000 l *ABS* 0000000000000000 CPU_MIDR
0000000000000008 l *ABS* 0000000000000000 CPU_RESET_FUNC
0000000000000010 l *ABS* 0000000000000000 CPU_EXTRA1_FUNC
0000000000000018 l *ABS* 0000000000000000 CPU_EXTRA2_FUNC
0000000000000020 l *ABS* 0000000000000000 CPU_E_HANDLER_FUNC
0000000000000028 l *ABS* 0000000000000000 CPU_PWR_DWN_OPS
0000000000000038 l *ABS* 0000000000000000 CPU_ERRATA_FUNC
0000000000000040 l *ABS* 0000000000000000 CPU_ERRATA_LOCK
0000000000000048 l *ABS* 0000000000000000 CPU_ERRATA_PRINTED
0000000000000050 l *ABS* 0000000000000000 CPU_REG_DUMP
0000000000000058 l *ABS* 0000000000000000 CPU_OPS_SIZE
000000000005fa90 l F ro 0000000000000014 cortex_a53_disable_dcache
000000000005faa4 l F ro 0000000000000018 cortex_a53_disable_smp
000000000005fabc l F ro 0000000000000008 check_errata_819472
000000000005fac4 l F ro 0000000000000008 check_errata_824069
000000000005facc l F ro 0000000000000008 check_errata_826319
000000000005fad4 l F ro 0000000000000008 check_errata_827319
000000000005fadc l F ro 000000000000001c a53_disable_non_temporal_hint
000000000005faf8 l F ro 0000000000000008 check_errata_disable_non_temporal_hint
000000000005fb00 l F ro 000000000000001c errata_a53_855873_wa
000000000005fb1c l F ro 0000000000000008 check_errata_855873
000000000005fb24 l F ro 0000000000000024 check_errata_835769
000000000005fb40 l ro 0000000000000000 errata_not_applies
000000000005fb44 l ro 0000000000000000 exit_check_errata_835769
000000000005fb48 l F ro 0000000000000024 check_errata_843419
000000000005fb68 l ro 0000000000000000 exit_check_errata_843419
000000000005fb6c l F ro 0000000000000030 cortex_a53_reset_func
000000000005fb9c l F ro 0000000000000018 cortex_a53_core_pwr_dwn
000000000005fbb4 l F ro 0000000000000024 cortex_a53_cluster_pwr_dwn
000000000005fbd8 l F ro 00000000000000e4 cortex_a53_errata_report
0000000000064be7 l ro 0000000000000000 cortex_a53_errata_819472_str
0000000000064c32 l ro 0000000000000000 cortex_a53_cpu_str
0000000000064bee l ro 0000000000000000 cortex_a53_errata_824069_str
0000000000064bf5 l ro 0000000000000000 cortex_a53_errata_826319_str
0000000000064bfc l ro 0000000000000000 cortex_a53_errata_827319_str
0000000000064c03 l ro 0000000000000000 cortex_a53_errata_835769_str
0000000000064c0a l ro 0000000000000000 cortex_a53_errata_disable_non_temporal_hint_str
0000000000064c24 l ro 0000000000000000 cortex_a53_errata_843419_str
0000000000064c2b l ro 0000000000000000 cortex_a53_errata_855873_str
0000000000064c3d l ro 0000000000000000 cortex_a53_regs
000000000005fcbc l F ro 0000000000000018 cortex_a53_cpu_reg_dump
000000000006705c l .data 0000000000000000 cortex_a53_errata_lock
0000000000067060 l .data 0000000000000000 cortex_a53_errata_reported
0000000000000000 l df *ABS* 0000000000000000 ./build/rk3399/debug/bl31/cortex_a72.o
0000000000000008 l *ABS* 0000000000000000 CPU_MIDR_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_EXTRA1_FUNC_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_EXTRA2_FUNC_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_E_HANDLER_FUNC_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_RESET_FUNC_SIZE
0000000000000010 l *ABS* 0000000000000000 CPU_PWR_DWN_OPS_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_ERRATA_FUNC_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_ERRATA_LOCK_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_ERRATA_PRINTED_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_REG_DUMP_SIZE
0000000000000000 l *ABS* 0000000000000000 CPU_MIDR
0000000000000008 l *ABS* 0000000000000000 CPU_RESET_FUNC
0000000000000010 l *ABS* 0000000000000000 CPU_EXTRA1_FUNC
0000000000000018 l *ABS* 0000000000000000 CPU_EXTRA2_FUNC
0000000000000020 l *ABS* 0000000000000000 CPU_E_HANDLER_FUNC
0000000000000028 l *ABS* 0000000000000000 CPU_PWR_DWN_OPS
0000000000000038 l *ABS* 0000000000000000 CPU_ERRATA_FUNC
0000000000000040 l *ABS* 0000000000000000 CPU_ERRATA_LOCK
0000000000000048 l *ABS* 0000000000000000 CPU_ERRATA_PRINTED
0000000000000050 l *ABS* 0000000000000000 CPU_REG_DUMP
0000000000000058 l *ABS* 0000000000000000 CPU_OPS_SIZE
000000000005fcd4 l F ro 0000000000000014 cortex_a72_disable_dcache
000000000005fce8 l F ro 0000000000000020 cortex_a72_disable_l2_prefetch
000000000005fd08 l F ro 0000000000000018 cortex_a72_disable_hw_prefetcher
000000000005fd20 l F ro 0000000000000010 cortex_a72_disable_smp
000000000005fd30 l F ro 0000000000000014 cortex_a72_disable_ext_debug
000000000005fd44 l F ro 0000000000000008 check_errata_859971
000000000005fd4c l F ro 0000000000000034 check_errata_cve_2017_5715
000000000005fd80 l F ro 0000000000000008 check_errata_cve_2018_3639
000000000005fd88 l F ro 0000000000000060 cortex_a72_reset_func
000000000005fde8 l F ro 0000000000000024 cortex_a72_core_pwr_dwn
000000000005fe0c l F ro 0000000000000030 cortex_a72_cluster_pwr_dwn
000000000005fe3c l F ro 0000000000000058 cortex_a72_errata_report
0000000000064c99 l ro 0000000000000000 cortex_a72_errata_859971_str
0000000000064cbc l ro 0000000000000000 cortex_a72_cpu_str
0000000000064ca0 l ro 0000000000000000 cortex_a72_errata_cve_2017_5715_str
0000000000064cae l ro 0000000000000000 cortex_a72_errata_cve_2018_3639_str
0000000000064cc7 l ro 0000000000000000 cortex_a72_regs
000000000005fe94 l F ro 0000000000000014 cortex_a72_cpu_reg_dump
0000000000067064 l .data 0000000000000000 cortex_a72_errata_lock
0000000000067068 l .data 0000000000000000 cortex_a72_errata_reported
0000000000000000 l df *ABS* 0000000000000000 ./build/rk3399/debug/bl31/crash_reporting.o
0000000000064cf0 l ro 0000000000000000 gicc_regs
0000000000064d12 l ro 0000000000000000 icc_regs
0000000000064d3e l ro 0000000000000000 gicd_pend_reg
0000000000064d7b l ro 0000000000000000 newline
0000000000064d7d l ro 0000000000000000 spacer
0000000000064d83 l ro 0000000000000000 cci_iface_regs
0000000000064db4 l ro 0000000000000000 print_spacer
0000000000064dc6 l ro 0000000000000000 gp_regs
0000000000064e35 l ro 0000000000000000 el3_sys_regs
0000000000064e92 l ro 0000000000000000 non_el3_sys_regs
0000000000064fde l ro 0000000000000000 aarch32_regs
0000000000064ff5 l ro 0000000000000000 panic_msg
0000000000065007 l ro 0000000000000000 excpt_msg
0000000000065027 l ro 0000000000000000 intr_excpt_msg
000000000005feec l F ro 000000000000004c size_controlled_print
000000000005fef4 l ro 0000000000000000 test_size_list
000000000005ff30 l ro 0000000000000000 exit_size_print
000000000005ff38 l F ro 000000000000000c print_alignment
000000000005ff44 l F ro 0000000000000018 str_in_crash_buf_print
000000000005ffd8 l F ro 0000000000000218 do_crash_reporting
00000000000601f0 l F ro 0000000000000008 crash_panic
0000000000060178 l ro 0000000000000000 print_gicv2
000000000006018c l ro 0000000000000000 print_gic_common
0000000000060198 l ro 0000000000000000 gicd_ispendr_loop
00000000000601c4 l ro 0000000000000000 exit_print_gic_regs
0000000000000000 l df *ABS* 0000000000000000 ./build/rk3399/debug/bl31/ea_delegate.o
0000000000000008 l *ABS* 0000000000000000 CPU_MIDR_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_EXTRA1_FUNC_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_EXTRA2_FUNC_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_E_HANDLER_FUNC_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_RESET_FUNC_SIZE
0000000000000010 l *ABS* 0000000000000000 CPU_PWR_DWN_OPS_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_ERRATA_FUNC_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_ERRATA_LOCK_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_ERRATA_PRINTED_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_REG_DUMP_SIZE
0000000000000000 l *ABS* 0000000000000000 CPU_MIDR
0000000000000008 l *ABS* 0000000000000000 CPU_RESET_FUNC
0000000000000010 l *ABS* 0000000000000000 CPU_EXTRA1_FUNC
0000000000000018 l *ABS* 0000000000000000 CPU_EXTRA2_FUNC
0000000000000020 l *ABS* 0000000000000000 CPU_E_HANDLER_FUNC
0000000000000028 l *ABS* 0000000000000000 CPU_PWR_DWN_OPS
0000000000000038 l *ABS* 0000000000000000 CPU_ERRATA_FUNC
0000000000000040 l *ABS* 0000000000000000 CPU_ERRATA_LOCK
0000000000000048 l *ABS* 0000000000000000 CPU_ERRATA_PRINTED
0000000000000050 l *ABS* 0000000000000000 CPU_REG_DUMP
0000000000000058 l *ABS* 0000000000000000 CPU_OPS_SIZE
0000000000060298 l F ro 000000000000009c ea_proceed
0000000000060290 l F ro 0000000000000004 delegate_sync_ea
0000000000060294 l F ro 0000000000000004 delegate_async_ea
0000000000000000 l df *ABS* 0000000000000000 ./build/rk3399/debug/bl31/runtime_exceptions.o
0000000000060334 l ro 0000000000000000 smc_handler32
0000000000060338 l ro 0000000000000000 smc_handler64
0000000000065cd8 l ro 0000000000000000 interrupt_exit_irq_aarch64
0000000000065d58 l ro 0000000000000000 interrupt_exit_fiq_aarch64
0000000000065ed8 l ro 0000000000000000 interrupt_exit_irq_aarch32
0000000000065f58 l ro 0000000000000000 interrupt_exit_fiq_aarch32
0000000000060334 l F ro 0000000000000094 smc_handler
00000000000603a8 l ro 0000000000000000 smc_prohibited
000000000006039c l ro 0000000000000000 smc_unknown
00000000000603bc l ro 0000000000000000 rt_svc_fw_critical_error
0000000000000000 l df *ABS* 0000000000000000 ./build/rk3399/debug/bl31/platform_mp_stack.o
0000000000067080 l stacks 0000000000000000 platform_normal_stacks
0000000000000006 l *ABS* 0000000000000000 TZ_COUNT
0000000000000000 l df *ABS* 0000000000000000 ./build/rk3399/debug/bl31/cpu_data.o
0000000000000000 l df *ABS* 0000000000000000 ./build/rk3399/debug/bl31/cpu_helpers.o
0000000000000008 l *ABS* 0000000000000000 CPU_MIDR_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_EXTRA1_FUNC_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_EXTRA2_FUNC_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_E_HANDLER_FUNC_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_RESET_FUNC_SIZE
0000000000000010 l *ABS* 0000000000000000 CPU_PWR_DWN_OPS_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_ERRATA_FUNC_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_ERRATA_LOCK_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_ERRATA_PRINTED_SIZE
0000000000000008 l *ABS* 0000000000000000 CPU_REG_DUMP_SIZE
0000000000000000 l *ABS* 0000000000000000 CPU_MIDR
0000000000000008 l *ABS* 0000000000000000 CPU_RESET_FUNC
0000000000000010 l *ABS* 0000000000000000 CPU_EXTRA1_FUNC
0000000000000018 l *ABS* 0000000000000000 CPU_EXTRA2_FUNC
0000000000000020 l *ABS* 0000000000000000 CPU_E_HANDLER_FUNC
0000000000000028 l *ABS* 0000000000000000 CPU_PWR_DWN_OPS
0000000000000038 l *ABS* 0000000000000000 CPU_ERRATA_FUNC
0000000000000040 l *ABS* 0000000000000000 CPU_ERRATA_LOCK
0000000000000048 l *ABS* 0000000000000000 CPU_ERRATA_PRINTED
0000000000000050 l *ABS* 0000000000000000 CPU_REG_DUMP
0000000000000058 l *ABS* 0000000000000000 CPU_OPS_SIZE
0000000000060518 l ro 0000000000000000 error_exit
0000000000000000 l df *ABS* 0000000000000000 ./build/rk3399/debug/bl31/spinlock.o
00000000000605c8 l ro 0000000000000000 l1
00000000000605cc l ro 0000000000000000 l2
0000000000000000 l df *ABS* 0000000000000000 ./build/rk3399/debug/bl31/psci_helpers.o
0000000000000000 l df *ABS* 0000000000000000 ./build/rk3399/debug/bl31/context.o
0000000000000000 l df *ABS* 0000000000000000 ./build/rk3399/debug/bl31/debug.o
00000000000650ad l ro 0000000000000000 assert_msg1
00000000000650bb l ro 0000000000000000 assert_msg2
0000000000060894 l ro 0000000000000000 _assert_loop
0000000000060878 l ro 0000000000000000 dec_print_loop
00000000000650c2 l ro 0000000000000000 panic_msg
0000000000060904 l ro 0000000000000000 panic_common
0000000000060928 l ro 0000000000000000 _panic_handler
0000000000000000 l df *ABS* 0000000000000000 ./build/rk3399/debug/bl31/cache_helpers.o
0000000000060964 l ro 0000000000000000 exit_loop_civac
0000000000060950 l ro 0000000000000000 loop_civac
000000000006099c l ro 0000000000000000 exit_loop_cvac
0000000000060988 l ro 0000000000000000 loop_cvac
00000000000609d4 l ro 0000000000000000 exit_loop_ivac
00000000000609c0 l ro 0000000000000000 loop_ivac
00000000000609d8 l F ro 000000000000007c do_dcsw_op
0000000000060a50 l ro 0000000000000000 exit
0000000000060a54 l ro 0000000000000000 dcsw_loop_table
00000000000609ec l ro 0000000000000000 loop1
0000000000060a38 l ro 0000000000000000 level_done
0000000000060a54 l ro 0000000000000000 loop2_isw
0000000000060a58 l ro 0000000000000000 loop3_isw
0000000000060a74 l ro 0000000000000000 loop2_cisw
0000000000060a78 l ro 0000000000000000 loop3_cisw
0000000000060a94 l ro 0000000000000000 loop2_csw
0000000000060a98 l ro 0000000000000000 loop3_csw
0000000000000000 l df *ABS* 0000000000000000 ./build/rk3399/debug/bl31/misc_helpers.o
0000000000060adc l F ro 0000000000000114 zeromem_dczva
0000000000000000 l df *ABS* 0000000000000000 ./build/rk3399/debug/bl31/platform_helpers.o
0000000000000000 l df *ABS* 0000000000000000 ./build/rk3399/debug/bl31/crash_console_helpers.o
000000000006706c l .data 0000000000000000 crash_console_spinlock
0000000000067071 l .data 0000000000000000 crash_console_triggered
0000000000067000 l .data 0000000000000000 crash_console_reg_stash
0000000000060c20 l ro 0000000000000000 skip_spinlock
0000000000060c3c l ro 0000000000000000 init_error
0000000000060c68 l ro 0000000000000000 putc_loop
0000000000060cb4 l ro 0000000000000000 putc_done
0000000000060cac l ro 0000000000000000 putc_continue
0000000000060ca0 l ro 0000000000000000 putc
0000000000060ce4 l ro 0000000000000000 flush_loop
0000000000060d0c l ro 0000000000000000 flush_done
0000000000060d04 l ro 0000000000000000 flush_continue
0000000000000000 l df *ABS* 0000000000000000 fdt_ro.c
0000000000060d20 l F ro 0000000000000008 fdt32_to_cpu
0000000000060d28 l F ro 0000000000000008 fdt64_to_cpu
0000000000060d30 l F ro 0000000000000064 nextprop_
0000000000060d94 l F ro 0000000000000068 fdt_get_property_by_offset_
0000000000061064 l F ro 00000000000000d4 fdt_get_property_namelen_
0000000000000000 l df *ABS* 0000000000000000 fdt_rw.c
0000000000061380 l F ro 0000000000000008 fdt32_to_cpu
0000000000061380 l F ro 0000000000000008 cpu_to_fdt32
0000000000061388 l F ro 0000000000000080 fdt_blocks_misordered_
0000000000061408 l F ro 00000000000000d0 fdt_packblocks_
0000000000000000 l df *ABS* 0000000000000000 fdt.c
000000000006168c l F ro 0000000000000008 fdt32_to_cpu
0000000000000000 l df *ABS* 0000000000000000 assert.c
0000000000000000 l df *ABS* 0000000000000000 memchr.c
0000000000000000 l df *ABS* 0000000000000000 memcmp.c
0000000000000000 l df *ABS* 0000000000000000 memcpy.c
0000000000000000 l df *ABS* 0000000000000000 memmove.c
0000000000000000 l df *ABS* 0000000000000000 memset.c
0000000000000000 l df *ABS* 0000000000000000 printf.c
0000000000061b30 l F ro 00000000000000d0 unsigned_num_print
0000000000000000 l df *ABS* 0000000000000000 putchar.c
0000000000000000 l df *ABS* 0000000000000000 strchr.c
0000000000000000 l df *ABS* 0000000000000000 strlen.c
0000000000000000 l df *ABS* 0000000000000000 strncmp.c
0000000000000000 l df *ABS* 0000000000000000 strrchr.c
0000000000000000 l df *ABS* 0000000000000000
0000000000000000 l df *ABS* 0000000000000000 ./build/rk3399/debug/bl31/wa_cve_2017_5715_mmu.o
0000000000066000 l F ro 0000000000000000 mmu_sync_exception_sp_el0
0000000000066080 l F ro 0000000000000000 mmu_irq_sp_el0
0000000000066100 l F ro 0000000000000000 mmu_fiq_sp_el0
0000000000066180 l F ro 0000000000000000 mmu_serror_sp_el0
0000000000066200 l F ro 0000000000000000 mmu_sync_exception_sp_elx
0000000000066280 l F ro 0000000000000000 mmu_irq_sp_elx
0000000000066300 l F ro 0000000000000000 mmu_fiq_sp_elx
0000000000066380 l F ro 0000000000000000 mmu_serror_sp_elx
0000000000066400 l F ro 0000000000000000 mmu_sync_exception_aarch64
0000000000066480 l F ro 0000000000000000 mmu_irq_aarch64
0000000000066500 l F ro 0000000000000000 mmu_fiq_aarch64
0000000000066580 l F ro 0000000000000000 mmu_serror_aarch64
0000000000066600 l F ro 0000000000000000 mmu_sync_exception_aarch32
0000000000066680 l F ro 0000000000000000 mmu_irq_aarch32
0000000000066700 l F ro 0000000000000000 mmu_fiq_aarch32
0000000000066780 l F ro 0000000000000000 mmu_serror_aarch32
0000000000000000 l df *ABS* 0000000000000000 cpu_data_array.c
0000000000040120 l F ro 000000000000000c __sram_func_set_ddrctl_pll_veneer
00000000ff3b0028 l F .pmusram 000000000000000c __bl31_warm_entrypoint_veneer
00000000ff3b0038 l F .pmusram 000000000000000c __sram_restore_veneer
00000000000500f4 g F ro 0000000000000014 gicd_read_nsacr
000000000006205c g F ro 000000000000002c putchar
000000000005c5c4 g F ro 00000000000000e8 cm_prepare_el3_exit
000000000005a33c g F ro 00000000000001f0 dram_init
000000000006171c g F ro 000000000000007c fdt_offset_ptr
0000000000051690 w F ro 000000000000005c plat_ic_get_pending_interrupt_type
0000000000051138 g F ro 0000000000000014 gicd_write_igrpmodr
000000000005c4d0 g F ro 0000000000000098 cm_el1_sysregs_context_restore
0000000000056628 g F ro 000000000000004c m0_wait_done
0000000000051f34 g F ro 0000000000000104 params_early_setup
000000000005dccc g F ro 0000000000000028 psci_migrate_info_up_cpu
0000000000097000 g coherent_ram 0000000000000000 __BL31_END__
0000000000056600 g F ro 0000000000000028 m0_stop
000000000005e9ac g F ro 0000000000000078 console_register
000000000005d97c g F ro 0000000000000138 psci_cpu_suspend
0000000000051ec8 g F ro 000000000000000c rockchip_get_uart_baudrate
0000000000097000 g coherent_ram 0000000000000000 __COHERENT_RAM_END__
00000000ff3b1240 g .pmusram 0000000000000000 __pmusram_incbin_end
0000000000060420 g F ro 0000000000000034 reset_handler
000000000005fa74 g F ro 000000000000001c console_16550_flush
0000000000065e00 g F ro 0000000000000000 sync_exception_aarch32
0000000000060ad4 g F ro 0000000000000008 zeromem
0000000000062680 g O ro 0000000000000020 version_string
00000000000608e4 g F ro 0000000000000008 asm_print_newline
0000000000065248 g ro 0000000000000000 __pubsub_psci_suspend_pwrdown_finish_end
000000000005d5b4 g F ro 00000000000000f4 psci_validate_entry_point
000000000005e7cc g F ro 00000000000000b8 print_entry_point_info
000000000005bf04 g F ro 0000000000000034 cm_get_context
0000000000059960 g F ro 00000000000000ac resume_low_power
00000000ff8c1090 g .text_sram 0000000000000000 __bl31_sram_text_real_end
0000000000062008 g F ro 0000000000000054 printf
000000000005a038 g F ro 00000000000001bc ddr_set_rate
0000000000050000 g F ro 0000000000000070 platform_cpu_warmboot
000000000006ddcc g O .bss 0000000000000060 store_gpio
000000000005d530 g F ro 0000000000000064 psci_release_pwr_domain_locks
000000000005cf40 g F ro 000000000000004c psci_validate_power_state
00000000000523dc g F ro 0000000000000018 plat_core_pos_by_mpidr
0000000000067000 g ro 0000000000000000 __RW_START__
000000000005f998 g F ro 000000000000004c console_16550_core_putc
00000000000524a0 g F ro 000000000000000c plat_cci_disable
0000000000052130 g F ro 000000000000000c rockchip_pwr_domain_on
00000000000536f8 g F ro 0000000000000030 rockchip_soc_hlvl_pwr_dm_on_finish
000000000005cdf8 g F ro 00000000000000ec psci_cpu_suspend_finish
0000000000053430 g F ro 0000000000000088 rk3399_flush_l2_b
0000000000061138 g F ro 000000000000006c fdt_getprop_namelen
00000000ff3b1248 g O .pmusram 0000000000000cf0 sdram_config
0000000000056770 g F ro 00000000000000b4 enable_pwms
0000000000060ff4 g F ro 0000000000000038 fdt_first_property_offset
000000000005f9e4 g F ro 000000000000001c console_16550_putc
000000000006083c g F ro 0000000000000060 asm_assert
0000000000051cb0 g F ro 0000000000000054 bl31_plat_get_next_image_ep_info
0000000000060ab4 g F ro 0000000000000010 dcsw_op_level1
0000000000056334 g F ro 000000000000008c rockchip_plat_mmu_el3
00000000000608ec g F ro 0000000000000044 do_panic
00000000ff8c1000 g .incbin_sram 0000000000000000 __sram_incbin_end
0000000000061ae0 g F ro 0000000000000034 memmove
0000000000081c89 g O .bss 0000000000000080 rt_svc_descs_indices
000000000005011c g F ro 0000000000000014 gicd_write_isenabler
0000000000052384 g F ro 000000000000001c plat_setup_psci_ops
00000000000538d0 g F ro 0000000000000084 resume_uart
00000000000568cc g F ro 000000000000002c secure_sgrf_ddr_rgn_init
0000000000065a00 g F ro 0000000000000000 sync_exception_sp_elx
0000000000050130 g F ro 0000000000000014 gicd_write_ispendr
0000000000065800 g F ro 0000000000000000 sync_exception_sp_el0
0000000000060658 g F ro 0000000000000010 psci_power_down_wfi
0000000000056824 g F ro 0000000000000018 secure_watchdog_gate
0000000000052480 g F ro 0000000000000014 plat_cci_init
00000000000507fc g F ro 00000000000000d0 gicv3_cpuif_disable
0000000000060624 g F ro 0000000000000034 psci_do_pwrup_cache_maintenance
000000000005dba8 g F ro 0000000000000058 psci_affinity_info
000000000006134c g F ro 0000000000000034 fdt_path_offset
00000000000565a4 g F ro 000000000000005c m0_start
00000000ff3b1000 g O .pmusram 0000000000000240 rk3399m0pmu_bin
000000000005eb3c w F ro 0000000000000030 plat_log_get_prefix
000000000005dc00 g F ro 00000000000000b4 psci_migrate
00000000000512dc g F ro 0000000000000088 gicv3_rdistif_base_addrs_probe
0000000000056ab8 g F ro 000000000000006c clk_gate_con_save
00000000ff8c2000 g .text_sram 0000000000000000 __bl31_sram_text_end
0000000000062158 g O ro 00000000000000a8 plat_rockchip_psci_pm_ops
0000000000062662 g O ro 000000000000001e build_message
000000000006ddc8 g O .bss 0000000000000004 suspend_gpio_cnt
00000000ff8c3000 g .stack_sram 0000000000000000 __bl31_sram_stack_end
00000000000607f0 g F ro 000000000000004c el3_exit
000000000005df64 g F ro 00000000000003e0 psci_setup
000000000005f6e8 g F ro 00000000000000d4 init_xlat_tables
000000000005eb6c w F ro 0000000000000008 bl31_plat_runtime_setup
0000000000067000 g .data 0000000000000000 __DATA_START__
000000000009600c g O coherent_ram 0000000000000048 psci_locks
0000000000060bf0 w F ro 0000000000000004 plat_disable_acp
00000000000516f0 w F ro 000000000000000c plat_rockchip_gic_driver_init
00000000000619d0 g F ro 000000000000005c fdt_move
000000000005d3ec g F ro 0000000000000034 psci_find_target_suspend_lvl
0000000000052c88 g F ro 00000000000000fc plat_rockchip_restore_gpio
00000000000501c0 g F ro 000000000000000c gicd_set_isenabler
000000000005df44 g F ro 0000000000000020 psci_arch_setup
000000000006058c g F ro 0000000000000034 check_wa_cve_2017_5715
00000000ff3b0058 g .pmusram 0000000000000000 __bl31_pmusram_text_start
000000000006233c g O ro 0000000000000060 ddr3_lat_adj
0000000000053dbc g F ro 000000000000006c wdt_register_restore
0000000000096000 g O coherent_ram 000000000000000c rockchip_pd_lock
00000000ff3b06cc g F .pmusram 0000000000000714 dmc_resume
0000000000060714 g F ro 0000000000000074 save_gp_pmcr_pauth_regs
000000000005e3a8 g F ro 0000000000000064 psci_system_reset
00000000000569bc g F ro 000000000000001c disable_nodvfs_plls
00000000000501cc g F ro 0000000000000014 gicd_set_ipriorityr
0000000000061ac0 g F ro 0000000000000020 memcpy
000000000005979c g F ro 0000000000000054 ddr_get_rate
00000000000511f4 g F ro 0000000000000020 gicr_set_igrpmodr0
000000000005d594 g F ro 0000000000000020 psci_validate_mpidr
000000000005dab4 g F ro 00000000000000bc psci_system_suspend
0000000000065b80 g F ro 0000000000000000 serror_sp_elx
000000000005c478 g F ro 000000000000002c cm_init_context_by_index
0000000000050504 g F ro 00000000000000d0 gicv3_distif_init
0000000000053e28 g F ro 000000000000161c rockchip_soc_sys_pwr_dm_suspend
0000000000065880 g F ro 0000000000000000 irq_sp_el0
0000000000060adc g F ro 0000000000000114 zero_normalmem
000000000005d140 g F ro 0000000000000048 psci_get_parent_pwr_domain_nodes
0000000000050394 g F ro 0000000000000170 gicv3_driver_init
0000000000051730 w F ro 0000000000000014 plat_rockchip_gic_cpuif_disable
0000000000065248 g O ro 0000000000000008 __cb_func_spe_drain_buffers_hookcm_entering_secure_world
000000000005eb74 w F ro 000000000000004c plat_ea_handler
0000000000055444 g F ro 0000000000000e58 rockchip_soc_sys_pwr_dm_resume
0000000000056b24 g F ro 0000000000000038 clk_gate_con_disable
000000000005171c w F ro 0000000000000014 plat_rockchip_gic_cpuif_enable
000000000005e344 g F ro 0000000000000064 psci_system_off
00000000ff3b0de0 g .pmusram 0000000000000000 __bl31_pmusram_text_end
0000000000065250 g ro 0000000000000000 __pubsub_cm_exited_secure_world_end
000000000005a230 g F ro 0000000000000078 ddr_prepare_for_sys_suspend
000000000005f57c g F ro 000000000000003c mmap_add
0000000000040138 g F ro 0000000000000080 bl31_warm_entrypoint
0000000000052474 g F ro 000000000000000c plat_get_syscnt_freq2
000000000005fee0 g F ro 000000000000000c plat_panic_handler
0000000000065138 g ro 0000000000000000 __RT_SVC_DESCS_START__
0000000000051758 g F ro 000000000000011c cci_init
0000000000060f0c g F ro 00000000000000e8 fdt_subnode_offset_namelen
000000000006a080 g stacks 0000000000000000 __STACKS_END__
00000000000512c0 g F ro 000000000000001c gicv3_rdistif_mark_core_asleep
0000000000065248 g ro 0000000000000000 __pubsub_psci_suspend_pwrdown_start_end
000000000005683c g F ro 0000000000000030 secure_timer_init
0000000000060968 g F ro 0000000000000038 clean_dcache_range
0000000000067040 g O .data 0000000000000014 gpio_port
0000000000052594 g F ro 0000000000000070 rockchip_plat_sip_handler
0000000000060454 g F ro 0000000000000038 prepare_cpu_pwr_dwn
0000000000056c04 g F ro 0000000000000014 pmu_sgrf_rst_hld
000000000005235c w F ro 000000000000000c rockchip_soc_sys_pd_pwr_dn_wfi
00000000ff3b0058 g F .pmusram 0000000000000014 secure_watchdog_ungate
0000000000060e24 g F ro 0000000000000040 fdt_num_mem_rsv
00000000ff8c0000 g O .incbin_sram 0000000000000310 rk3399m0_bin
0000000000060788 g F ro 0000000000000068 restore_gp_pmcr_pauth_regs
0000000000050384 g F ro 0000000000000004 gicv3_distif_post_restore
000000000005a1f4 g F ro 000000000000003c ddr_round_rate
000000000005d6a8 g F ro 00000000000000f0 psci_warmboot_entrypoint
00000000ff3b009c g F .pmusram 0000000000000014 pmu_sgrf_rst_hld_release
0000000000051234 g F ro 0000000000000018 gicr_set_isenabler0
000000000005127c g F ro 0000000000000044 gicv3_rdistif_mark_core_awake
0000000000051b68 g F ro 000000000000007c gpio_set_direction
0000000000065250 g ro 0000000000000000 __pubsub_cm_exited_normal_world_start
00000000000603e4 w F ro 0000000000000010 plat_set_my_stack
000000000005bf7c g F ro 0000000000000048 cm_set_context_by_index
0000000000065198 g ro 0000000000000000 __RT_SVC_DESCS_END__
00000000000534b8 g F ro 0000000000000108 rockchip_soc_cores_pwr_dm_on
00000000000618a0 g F ro 0000000000000040 fdt_check_node_offset_
00000000000511ac g F ro 0000000000000014 gicr_read_ipriorityr
00000000000523a0 g F ro 0000000000000030 plat_get_sec_entrypoint
00000000000608b4 g F ro 0000000000000030 asm_print_hex
0000000000051da4 g F ro 0000000000000040 bl31_plat_arch_setup
000000000005bdf8 g F ro 0000000000000090 bl31_main
000000000005f290 g F ro 000000000000005c print_mmap
000000000005204c g F ro 0000000000000098 rockchip_validate_power_state
0000000000052d84 g F ro 000000000000000c plat_rockchip_gpio_init
000000000006d990 g O .bss 0000000000000060 psci_cpu_pd_nodes
0000000000096100 g coherent_ram 0000000000000000 cpuson_flags
00000000ff8c1000 g .text_sram 0000000000000000 __bl31_sram_text_start
000000000006089c g F ro 0000000000000018 asm_print_str
0000000000060bf4 w F ro 0000000000000004 bl31_plat_enable_mmu
000000000005fa48 g F ro 000000000000002c console_16550_core_flush
000000000005c2fc g F ro 0000000000000004 cm_init
0000000000060ccc g F ro 0000000000000054 plat_crash_console_flush
0000000000065800 g ro 0000000000000000 runtime_exceptions
000000000006b068 g O .bss 0000000000000030 rdistif_base_addrs
000000000005017c g F ro 0000000000000014 gicd_write_nsacr
0000000000053cb8 g F ro 0000000000000034 cru_register_save
0000000000051920 g F ro 00000000000000ac cci_disable_snoop_dvm_reqs
0000000000053d6c g F ro 0000000000000050 wdt_register_save
00000000000511c0 g F ro 0000000000000014 gicr_write_ipriorityr
0000000000065250 g ro 0000000000000000 __pubsub_cm_exited_secure_world_start
000000000005d798 g F ro 0000000000000054 psci_spd_migrate_info
0000000000052244 g F ro 0000000000000078 rockchip_pwr_domain_on_finish
00000000000611a4 g F ro 000000000000004c fdt_getprop
0000000000060408 g F ro 0000000000000018 _cpu_data_by_index
000000000005d7ec g F ro 0000000000000130 psci_print_power_domain_map
0000000000066800 g ro 0000000000000000 __RO_END_UNALIGNED__
000000000005f884 g F ro 000000000000004c plat_get_target_pwr_state
000000000005ea30 g F ro 000000000000009c console_putc
0000000000050c30 g F ro 0000000000000268 gicv3_distif_save
0000000000050168 g F ro 0000000000000014 gicd_write_icfgr
0000000000060bfc w F ro 0000000000000004 plat_handle_el3_ea
0000000000056578 g F ro 000000000000002c m0_configure_execute_addr
0000000000062100 g F ro 0000000000000028 strrchr
0000000000053cec g F ro 0000000000000080 cru_register_restore
000000000005cfc4 g F ro 0000000000000094 psci_is_last_on_cpu
00000000000521bc g F ro 0000000000000088 rockchip_pwr_domain_suspend
0000000000060c00 g F ro 0000000000000048 plat_crash_console_init
00000000ff8c1000 g F .text_sram 0000000000000090 sram_func_set_ddrctl_pll
0000000000065e80 g F ro 0000000000000000 irq_aarch32
0000000000060930 g F ro 0000000000000038 flush_dcache_range
0000000000051874 g F ro 00000000000000ac cci_enable_snoop_dvm_reqs
0000000000051a84 g F ro 0000000000000048 timer_init
0000000000051d04 g F ro 0000000000000080 bl31_early_platform_setup2
00000000ff3b0000 g F .pmusram 0000000000000014 pmu_cpuson_entrypoint
0000000000056aa8 g F ro 0000000000000010 restore_abpll
000000000005fa00 g F ro 000000000000002c console_16550_core_getc
0000000000056cb0 g F ro 000000000000007c soc_global_soft_reset
000000000005ec54 g F ro 000000000000014c backtrace
0000000000067078 g stacks 0000000000000000 __RELA_END__
0000000000067078 g stacks 0000000000000000 __RELA_START__
00000000ff8c2000 g .data_sram 0000000000000000 __bl31_sram_data_start
0000000000050a8c g F ro 00000000000001a4 gicv3_rdistif_init_restore
0000000000065980 g F ro 0000000000000000 serror_sp_el0
0000000000061c00 g F ro 0000000000000408 vprintf
00000000ff8c2000 g .data_sram 0000000000000000 __bl31_sram_data_real_end
00000000000563c0 g F ro 0000000000000164 plat_rockchip_pmu_init
00000000000535c0 g F ro 0000000000000020 rockchip_soc_cores_pwr_dm_off
000000000005ff5c g F ro 0000000000000028 report_unhandled_exception
000000000005cb1c g F ro 0000000000000100 psci_cpu_on_finish
0000000000056bc4 g F ro 0000000000000040 set_pmu_rsthold
000000000005db70 g F ro 0000000000000038 psci_cpu_off
0000000000062128 g O ro 0000000000000030 rockchip_gic_data
000000000005fea8 g F ro 0000000000000024 plat_reset_handler
000000000005f880 g F ro 0000000000000004 enable_mmu_direct_el3
00000000000505d8 g F ro 0000000000000130 gicv3_rdistif_init
0000000000053728 g F ro 0000000000000004 rockchip_soc_cores_pwr_dm_resume
0000000000065250 g ro 0000000000000000 __pubsub_cm_entering_normal_world_end
00000000000604e0 g F ro 000000000000003c get_cpu_ops_ptr
0000000000040000 g F ro 0000000000000114 bl31_entrypoint
000000000005bf38 g F ro 0000000000000044 cm_get_context_by_index
0000000000066000 g ro 0000000000000000 wa_cve_2017_5715_mmu_vbar
000000000005c4a4 g F ro 000000000000002c cm_init_my_context
0000000000065d80 g F ro 0000000000000000 serror_aarch64
0000000000061a60 g F ro 000000000000002c memchr
00000000000603f4 g F ro 0000000000000014 init_cpu_data_ptr
00000000000522bc g F ro 000000000000007c rockchip_pwr_domain_suspend_finish
00000000000601f8 g F ro 000000000000007c enter_lower_el_sync_ea
000000000005f674 g F ro 0000000000000034 xlat_arch_current_el
0000000000053a48 g F ro 00000000000000d4 restore_usbphy
0000000000051400 g F ro 000000000000013c gicv3_secure_spis_config_props
0000000000052038 g F ro 0000000000000014 rockchip_get_sys_suspend_power_state
0000000000056d2c g F ro 000000000000002c plat_rockchip_soc_init
00000000000500e0 g F ro 0000000000000014 gicd_read_icfgr
0000000000051214 g F ro 0000000000000020 gicr_clr_igrpmodr0
00000000000500d0 g F ro 0000000000000010 gicd_read_ipriorityr
000000000005e744 g F ro 0000000000000014 spe_supported
000000000005c7cc g F ro 000000000000012c psci_do_cpu_off
000000000006ec80 g O .bss 0000000000000004 psci_caps
00000000000604c0 g F ro 0000000000000020 do_cpu_reg_dump
000000000005c300 g F ro 0000000000000178 cm_setup_context
0000000000040000 g ro 0000000000000000 __BL31_START__
0000000000065a80 g F ro 0000000000000000 irq_sp_elx
0000000000065900 g F ro 0000000000000000 fiq_sp_el0
00000000000620c8 g F ro 0000000000000038 strncmp
0000000000067072 g .data 0000000000000000 __DATA_END__
00000000000608b8 g ro 0000000000000000 asm_print_hex_bits
000000000005114c g F ro 0000000000000030 gicd_set_igrpmodr
0000000000065198 g ro 0000000000000000 __CPU_OPS_START__
0000000000051be4 g F ro 000000000000007c gpio_set_value
00000000000519cc g F ro 00000000000000b8 udelay
0000000000056524 g F ro 0000000000000054 m0_init
00000000ff3b1f54 g .pmusram 0000000000000000 __bl31_pmusram_data_end
00000000ff8c0310 g .incbin_sram 0000000000000000 __sram_incbin_real_end
00000000000618e0 g F ro 0000000000000040 fdt_check_prop_offset_
000000000005153c g F ro 0000000000000058 gicv3_ppi_sgi_config_defaults
00000000000609a0 g F ro 0000000000000038 inv_dcache_range
0000000000067070 g O .data 0000000000000001 console_state
00000000000535e0 g F ro 0000000000000030 rockchip_soc_hlvl_pwr_dm_off
00000000ff3b1240 g .pmusram 0000000000000000 __bl31_pmusram_data_start
000000000005eea4 g F ro 0000000000000060 bl_aux_params_parse
000000000005dde8 g F ro 000000000000015c psci_smc_handler
0000000000051744 w F ro 0000000000000014 plat_rockchip_gic_pcpu_init
0000000000051b24 g F ro 0000000000000044 generic_delay_timer_init
000000000005cc1c g F ro 00000000000001dc psci_cpu_suspend_start
0000000000053378 g F ro 00000000000000b8 pmu_power_domains_on
000000000005d058 g F ro 0000000000000058 psci_init_req_local_pwr_states
0000000000056c68 g F ro 0000000000000020 enable_nodvfs_plls
0000000000065250 g ro 0000000000000000 __pubsub_cm_entering_secure_world_end
0000000000051ad8 g F ro 000000000000004c generic_delay_timer_init_args
0000000000061a8c g F ro 0000000000000034 memcmp
00000000ff3b1f3c g O .pmusram 0000000000000018 dpll_data
000000000006051c g F ro 0000000000000010 cpu_get_rev_var
000000000005c8f8 g F ro 0000000000000224 psci_cpu_on_start
000000000005d3b0 g F ro 000000000000003c psci_find_max_off_lvl
0000000000061254 g F ro 00000000000000f8 fdt_path_offset_namelen
000000000006102c g F ro 0000000000000038 fdt_next_property_offset
0000000000051ef8 g F ro 0000000000000018 plat_get_rockchip_gpio_poweroff
00000000000501e0 g F ro 0000000000000040 gicd_set_icfgr
000000000005629c g F ro 0000000000000038 rockchip_soc_soft_reset
000000000009606c g O coherent_ram 0000000000000060 psci_non_cpu_pd_nodes
00000000000537e4 g F ro 0000000000000088 sram_restore
0000000000081d15 g .bss 0000000000000000 __BSS_END__
0000000000065248 g ro 0000000000000000 __CPU_OPS_END__
00000000000536a0 g F ro 0000000000000030 rockchip_soc_hlvl_pwr_dm_suspend
00000000000524ac g F ro 000000000000008c sip_smc_handler
000000000005d91c g F ro 0000000000000004 psci_do_pwrdown_sequence
00000000000605e8 g F ro 000000000000003c psci_do_pwrdown_cache_maintenance
0000000000051124 g F ro 0000000000000014 gicd_read_igrpmodr
000000000005386c g F ro 0000000000000064 suspend_uart
000000000005c568 g F ro 000000000000005c cm_set_next_eret_context
0000000000065248 g ro 0000000000000000 __pubsub_cm_entering_secure_world_start
00000000ff3b006c g F .pmusram 0000000000000030 sram_secure_timer_init
0000000000050094 g F ro 0000000000000014 gicd_read_isenabler
000000000005d920 g F ro 000000000000005c psci_cpu_on
000000000005f5b8 g F ro 00000000000000bc init_xlation_table
000000000005bd20 g F ro 00000000000000d8 bl31_prepare_next_image_entry
000000000005d420 g F ro 00000000000000a0 psci_validate_suspend_req
0000000000096000 g coherent_ram 0000000000000000 __COHERENT_RAM_START__
0000000000056c18 g F ro 0000000000000050 enable_dvfs_plls
000000000006ec7c g O .bss 0000000000000004 psci_plat_core_count
00000000000516fc w F ro 0000000000000020 plat_rockchip_gic_init
000000000005dd80 g F ro 0000000000000068 psci_features
0000000000065248 g ro 0000000000000000 __GOT_END__
0000000000052ba8 g F ro 00000000000000e0 plat_rockchip_save_gpio
00000000ff3b1000 g .pmusram 0000000000000000 __pmusram_incbin_start
0000000000061b14 g F ro 000000000000001c memset
000000000005f940 g F ro 0000000000000058 console_16550_register
0000000000059a0c g F ro 0000000000000504 dram_dfs_init
000000000005c70c g F ro 00000000000000c0 errata_print_msg
000000000005d0b0 g F ro 0000000000000090 psci_get_target_local_pwr_states
0000000000056970 g F ro 000000000000004c disable_dvfs_plls
000000000005372c g F ro 0000000000000030 rockchip_soc_hlvl_pwr_dm_resume
0000000000065250 g ro 0000000000000000 __pubsub_cm_exited_normal_world_end
0000000000051f28 g F ro 000000000000000c plat_get_rockchip_suspend_apio
0000000000060274 g F ro 000000000000001c enter_lower_el_async_ea
000000000006d9f0 g O .bss 0000000000000008 psci_plat_pm_ops
000000000005686c g F ro 0000000000000060 secure_sgrf_init
000000000005bd0c g F ro 0000000000000014 bl31_setup
00000000ff3b1f38 g O .pmusram 0000000000000004 cru_clksel_con6
0000000000065248 g ro 0000000000000000 __pubsub_psci_suspend_pwrdown_start_start
0000000000062230 g O ro 0000000000000060 plat_rk_mmap
00000000ff8c0000 g .incbin_sram 0000000000000000 __sram_incbin_start
000000000005124c g F ro 0000000000000030 gicr_set_icfgr1
0000000000065248 g ro 0000000000000000 __GOT_START__
000000000006e008 g O .bss 00000000000003f0 pmu_slpdata
0000000000056c88 g F ro 0000000000000028 soc_global_soft_reset_init
000000000005bcd4 g F ro 0000000000000038 get_arm_std_svc_args
0000000000065250 g ro 0000000000000000 __pubsub_cm_entering_normal_world_start
000000000005e5bc g F ro 0000000000000108 bakery_lock_get
000000000005e4d0 g F ro 0000000000000090 psci_mem_protect
00000000000614d8 g F ro 00000000000001b4 fdt_open_into
000000000005e6c4 g F ro 0000000000000080 bakery_lock_release
0000000000062200 g O ro 0000000000000030 rk3399_gpio_ops
00000000000569d8 g F ro 00000000000000d0 prepare_abpll_for_ddrctrl
000000000005bee0 g F ro 0000000000000024 get_interrupt_type_handler
00000000000523f4 g F ro 0000000000000080 plat_configure_mmu_el3
00000000000523d0 g F ro 000000000000000c plat_get_power_domain_tree_desc
0000000000050158 g F ro 0000000000000010 gicd_write_ipriorityr
0000000000056b5c g F ro 0000000000000068 clk_gate_con_restore
0000000000052350 w F ro 000000000000000c rockchip_soc_cores_pd_pwr_dn_wfi
000000000005dcf4 g F ro 000000000000008c psci_node_hw_state
0000000000059f10 g F ro 0000000000000128 dram_set_odt_pd
0000000000061694 g F ro 0000000000000088 fdt_check_header
0000000000050144 g F ro 0000000000000014 gicd_write_isactiver
0000000000060ac4 g F ro 0000000000000010 dcsw_op_level2
000000000006048c g F ro 0000000000000034 init_cpu_ops
000000000005eacc g F ro 0000000000000070 console_flush
0000000000065b00 g F ro 0000000000000000 fiq_sp_elx
0000000000067000 g ro 0000000000000000 __RO_END__
0000000000060e64 g F ro 00000000000000a8 fdt_get_name
0000000000065c00 g F ro 0000000000000000 sync_exception_aarch64
0000000000065d00 g F ro 0000000000000000 fiq_aarch64
0000000000050080 g F ro 0000000000000014 gicd_read_igroupr
000000000005ea24 g F ro 000000000000000c console_switch_state
0000000000051ed4 g F ro 000000000000000c rockchip_get_uart_clock
0000000000060554 g F ro 0000000000000038 print_errata_status
00000000000605e0 g F ro 0000000000000008 spin_unlock
00000000000526bc g F ro 0000000000000074 gpio_put_clock
000000000006a080 g .bss 0000000000000000 __BSS_START__
0000000000040000 g ro 0000000000000000 __RO_START__
00000000ff3b00b0 g F .pmusram 0000000000000034 restore_pmu_rsthold
0000000000063377 g O ro 0000000000000004 rockchip_power_domain_tree_desc
000000000005e788 g F ro 0000000000000044 spe_enable
0000000000060c48 g F ro 0000000000000084 plat_crash_console_putc
00000000ff8c0310 g .incbin_sram 0000000000000000 rk3399m0_bin_end
000000000006a080 g O .bss 0000000000000300 percpu_data
0000000000060540 g F ro 0000000000000014 cpu_rev_var_hs
0000000000061920 g F ro 00000000000000b0 fdt_next_node
00000000000505d4 w F ro 0000000000000004 gicv3_rdistif_on
00000000000605c0 g F ro 0000000000000020 spin_lock
000000000005e95c g F ro 0000000000000050 console_is_registered
00000000000508cc g F ro 000000000000003c gicv3_get_pending_interrupt_type
0000000000053b1c g F ro 00000000000000d8 grf_register_save
000000000005cf8c g F ro 0000000000000038 psci_query_sys_suspend_pwrstate
00000000ff8c2000 g .data_sram 0000000000000000 __bl31_sram_data_end
000000000005e884 g F ro 00000000000000d8 tf_log
000000000005a2a8 g F ro 0000000000000094 ddr_prepare_for_sys_resume
0000000000065248 g ro 0000000000000000 __pubsub_psci_cpu_on_finish_start
0000000000056674 g F ro 00000000000000fc disable_pwms
0000000000053bf4 g F ro 00000000000000c4 grf_register_restore
00000000000597f0 g F ro 0000000000000170 exit_low_power
000000000006052c g F ro 0000000000000014 cpu_rev_var_ls
000000000005be88 g F ro 0000000000000058 get_scr_el3_from_routing_model
0000000000097000 g coherent_ram 0000000000000000 __RW_END__
000000000005f6a8 g F ro 0000000000000040 xlat_arch_get_xn_desc
0000000000096120 g coherent_ram 0000000000000000 __COHERENT_RAM_END_UNALIGNED__
0000000000051d84 g F ro 0000000000000020 bl31_platform_setup
0000000000060dfc g F ro 0000000000000028 fdt_string
000000000005375c g F ro 0000000000000088 sram_save
000000000005fa2c g F ro 000000000000001c console_16550_getc
0000000000067080 g stacks 0000000000000000 __STACKS_START__
0000000000050e98 g F ro 000000000000028c gicv3_distif_init_restore
000000000005d228 g F ro 0000000000000188 psci_do_state_coordination
000000000005e40c g F ro 00000000000000c4 psci_system_reset2
000000000005f7bc g F ro 00000000000000c4 enable_mmu_el3
0000000000061798 g F ro 0000000000000108 fdt_next_tag
0000000000065f80 g F ro 0000000000000000 serror_aarch32
0000000000060bf8 w F ro 0000000000000004 plat_handle_double_fault
000000000005bab8 g F ro 000000000000021c dmc_suspend
0000000000050220 g F ro 00000000000000c4 arm_gicv3_distif_pre_save
0000000000065248 g ro 0000000000000000 __pubsub_psci_suspend_pwrdown_finish_start
0000000000051364 g F ro 000000000000009c gicv3_spis_config_defaults
000000000005117c g F ro 0000000000000030 gicd_clr_igrpmodr
000000000005fecc g F ro 0000000000000014 plat_my_core_pos
0000000000096118 g coherent_ram 0000000000000000 clst_warmboot_data
00000000000611f0 g F ro 0000000000000064 fdt_get_alias_namelen
0000000000051594 g F ro 00000000000000fc gicv3_secure_ppi_sgi_config_props
000000000005213c g F ro 0000000000000080 rockchip_pwr_domain_off
000000000005bfc4 g F ro 0000000000000174 runtime_svc_init
00000000000960d0 g coherent_ram 0000000000000000 cpuson_entry_point
00000000000500a8 g F ro 0000000000000014 gicd_read_ispendr
00000000000620ac g F ro 000000000000001c strlen
00000000000511d4 g F ro 0000000000000020 gicr_clr_igroupr0
0000000000065c80 g F ro 0000000000000000 irq_aarch64
000000000005dcb4 g F ro 0000000000000018 psci_migrate_info_type
0000000000051ebc g F ro 000000000000000c rockchip_get_uart_base
0000000000051ee0 g F ro 0000000000000018 plat_get_rockchip_gpio_reset
0000000000050380 g F ro 0000000000000004 gicv3_distif_pre_save
0000000000061a2c g F ro 0000000000000034 __assert
00000000ff3b1240 g O .pmusram 0000000000000008 pmu_slp_data
000000000005e560 g F ro 000000000000005c psci_mem_chk_range
000000000005ffac g F ro 000000000000002c el3_panic
0000000000050190 g F ro 0000000000000030 gicd_clr_igroupr
0000000000062498 g O ro 0000000000000090 lpddr3_lat_adj
0000000000062088 g F ro 0000000000000024 strchr
0000000000051f10 g F ro 0000000000000018 plat_get_rockchip_suspend_gpio
000000000006b060 g O .bss 0000000000000008 gicv3_driver_data
0000000000051c60 g F ro 0000000000000050 gpio_init
00000000ff8c2000 g .stack_sram 0000000000000000 __bl31_sram_stack_start
000000000005f8d0 g F ro 0000000000000070 console_16550_core_init
0000000000062528 g O ro 0000000000000080 lpddr4_lat_adj
00000000000536d0 g F ro 0000000000000028 rockchip_soc_cores_pwr_dm_on_finish
0000000000052494 g F ro 000000000000000c plat_cci_enable
0000000000052538 g F ro 000000000000005c ddr_smc_handler
000000000005d4c0 g F ro 0000000000000070 psci_acquire_pwr_domain_locks
0000000000065248 g ro 0000000000000000 __pubsub_psci_cpu_on_finish_end
0000000000060668 g F ro 00000000000000ac el1_sysregs_context_restore
000000000005eda0 g F ro 0000000000000104 bl31_params_parse_helper
000000000006da00 g O .bss 0000000000000008 console_list
000000000005d188 g F ro 00000000000000a0 psci_set_pwr_domains_to_run
0000000000050708 g F ro 00000000000000f4 gicv3_cpuif_enable
00000000000502e4 g F ro 000000000000009c arm_gicv3_distif_post_restore
00000000000562d4 g F ro 0000000000000060 rockchip_soc_system_off
0000000000050108 g F ro 0000000000000014 gicd_write_igroupr
000000000005ff84 g F ro 0000000000000028 report_unhandled_interrupt
0000000000053954 g F ro 00000000000000f4 save_usbphy
0000000000065f00 g F ro 0000000000000000 fiq_aarch32
000000000005a578 g F ro 000000000000151c dram_get_parameter
0000000000053610 g F ro 0000000000000090 rockchip_soc_cores_pwr_dm_suspend
00000000000603c8 w F ro 000000000000001c plat_get_my_stack
000000000005f2ec g F ro 0000000000000290 mmap_add_region
000000000005c6ac g F ro 0000000000000060 errata_needs_reporting
00000000000500bc g F ro 0000000000000014 gicd_read_isactiver
0000000000050908 g F ro 0000000000000184 gicv3_rdistif_save
000000000006d9f8 g O .bss 0000000000000008 psci_spd_pm
00000000000520e4 g F ro 000000000000004c rockchip_cpu_standby
00000000ff3b1240 g .pmusram 0000000000000000 rk3399m0pmu_bin_end
Disassembly of section .text_sram:
00000000ff8c1000 <sram_func_set_ddrctl_pll>:
ff8c1000: aa0003e8 mov x8, x0
ff8c1004: d53e1009 mrs x9, sctlr_el3
ff8c1008: 927ff92a and x10, x9, #0xfffffffffffffffe
ff8c100c: d51e100a msr sctlr_el3, x10
ff8c1010: d5033fdf isb
ff8c1014: d5033f9f dsb sy
ff8c1018: d2bfe625 mov x5, #0xff310000 // #4281401344
ff8c101c: b94024a0 ldr w0, [x5, #36]
ff8c1020: 32180000 orr w0, w0, #0x100
ff8c1024: 32140000 orr w0, w0, #0x1000
ff8c1028: b90024a0 str w0, [x5, #36]
00000000ff8c102c <check_ddrc0_1_sref_enter>:
ff8c102c: b94098a1 ldr w1, [x5, #152]
ff8c1030: 12000022 and w2, w1, #0x1
ff8c1034: 121e0023 and w3, w1, #0x4
ff8c1038: 2a030042 orr w2, w2, w3
ff8c103c: 7100145f cmp w2, #0x5
ff8c1040: 54ffff60 b.eq ff8c102c <check_ddrc0_1_sref_enter> // b.none
ff8c1044: d2bfeec5 mov x5, #0xff760000 // #4285923328
ff8c1048: 531c6d00 lsl w0, w8, #4
ff8c104c: 320c0400 orr w0, w0, #0x300000
ff8c1050: b90118a0 str w0, [x5, #280]
ff8c1054: d2bfe625 mov x5, #0xff310000 // #4281401344
ff8c1058: b94024a0 ldr w0, [x5, #36]
ff8c105c: 12177800 and w0, w0, #0xfffffeff
ff8c1060: 12137800 and w0, w0, #0xffffefff
ff8c1064: b90024a0 str w0, [x5, #36]
00000000ff8c1068 <check_ddrc0_1_sref_exit>:
ff8c1068: b94098a1 ldr w1, [x5, #152]
ff8c106c: 12000022 and w2, w1, #0x1
ff8c1070: 121e0023 and w3, w1, #0x4
ff8c1074: 2a030042 orr w2, w2, w3
ff8c1078: 7100005f cmp w2, #0x0
ff8c107c: 54ffff60 b.eq ff8c1068 <check_ddrc0_1_sref_exit> // b.none
ff8c1080: d51e1009 msr sctlr_el3, x9
ff8c1084: d5033fdf isb
ff8c1088: d5033f9f dsb sy
ff8c108c: d65f03c0 ret
00000000ff8c1090 <__bl31_sram_text_real_end>:
...
Disassembly of section .pmusram:
00000000ff3b0000 <pmu_cpuson_entrypoint>:
ff3b0000: 580000c2 ldr x2, ff3b0018 <sys_resume+0x8>
ff3b0004: 9100005f mov sp, x2
ff3b0008: 940001b1 bl ff3b06cc <dmc_resume>
ff3b000c: 9400000b bl ff3b0038 <__sram_restore_veneer>
00000000ff3b0010 <sys_resume>:
ff3b0010: 94000006 bl ff3b0028 <__bl31_warm_entrypoint_veneer>
ff3b0014: 00000000 .inst 0x00000000 ; undefined
ff3b0018: ff8c3000 .word 0xff8c3000
ff3b001c: 00000000 .word 0x00000000
ff3b0020: 1400000e b ff3b0058 <secure_watchdog_ungate>
ff3b0024: d503201f nop
00000000ff3b0028 <__bl31_warm_entrypoint_veneer>:
ff3b0028: 90806490 adrp x16, 40000 <bl31_entrypoint>
ff3b002c: 9104e210 add x16, x16, #0x138
ff3b0030: d61f0200 br x16
ff3b0034: 00000000 .inst 0x00000000 ; undefined
00000000ff3b0038 <__sram_restore_veneer>:
ff3b0038: f0806510 adrp x16, 53000 <pmu_bus_idle_req+0x24>
ff3b003c: 911f9210 add x16, x16, #0x7e4
ff3b0040: d61f0200 br x16
...
00000000ff3b0058 <secure_watchdog_ungate>:
ff3b0058: d29c0180 mov x0, #0xe00c // #57356
ff3b005c: 52a0a001 mov w1, #0x5000000 // #83886080
ff3b0060: f2bfe660 movk x0, #0xff33, lsl #16
ff3b0064: b9000001 str w1, [x0]
ff3b0068: d65f03c0 ret
00000000ff3b006c <sram_secure_timer_init>:
ff3b006c: d2901401 mov x1, #0x80a0 // #32928
ff3b0070: 12800000 mov w0, #0xffffffff // #-1
ff3b0074: f2bff0c1 movk x1, #0xff86, lsl #16
ff3b0078: b9000020 str w0, [x1]
ff3b007c: b9000420 str w0, [x1, #4]
ff3b0080: d2901600 mov x0, #0x80b0 // #32944
ff3b0084: f2bff0c0 movk x0, #0xff86, lsl #16
ff3b0088: 52800021 mov w1, #0x1 // #1
ff3b008c: b900001f str wzr, [x0]
ff3b0090: b900001f str wzr, [x0]
ff3b0094: b9000c01 str w1, [x0, #12]
ff3b0098: d65f03c0 ret
00000000ff3b009c <pmu_sgrf_rst_hld_release>:
ff3b009c: d2802480 mov x0, #0x124 // #292
ff3b00a0: 52a00801 mov w1, #0x400000 // #4194304
ff3b00a4: f2bfeea0 movk x0, #0xff75, lsl #16
ff3b00a8: b9000001 str w1, [x0]
ff3b00ac: d65f03c0 ret
00000000ff3b00b0 <restore_pmu_rsthold>:
ff3b00b0: b0000000 adrp x0, ff3b1000 <rk3399m0pmu_bin>
ff3b00b4: d2802402 mov x2, #0x120 // #288
ff3b00b8: 91090001 add x1, x0, #0x240
ff3b00bc: f2bfeea2 movk x2, #0xff75, lsl #16
ff3b00c0: b9424000 ldr w0, [x0, #576]
ff3b00c4: 32103c00 orr w0, w0, #0xffff0000
ff3b00c8: b9000040 str w0, [x2]
ff3b00cc: b9400420 ldr w0, [x1, #4]
ff3b00d0: d2802481 mov x1, #0x124 // #292
ff3b00d4: f2bfeea1 movk x1, #0xff75, lsl #16
ff3b00d8: 32103c00 orr w0, w0, #0xffff0000
ff3b00dc: b9000020 str w0, [x1]
ff3b00e0: d65f03c0 ret
00000000ff3b00e4 <sram_regcpy>:
ff3b00e4: cb010000 sub x0, x0, x1
ff3b00e8: 51000442 sub w2, w2, #0x1
ff3b00ec: 3100045f cmn w2, #0x1
ff3b00f0: 54000041 b.ne ff3b00f8 <sram_regcpy+0x14> // b.any
ff3b00f4: d65f03c0 ret
ff3b00f8: b9400023 ldr w3, [x1]
ff3b00fc: b8216803 str w3, [x0, x1]
ff3b0100: 91001021 add x1, x1, #0x4
ff3b0104: 17fffff9 b ff3b00e8 <sram_regcpy+0x4>
00000000ff3b0108 <sram_udelay>:
ff3b0108: d53be021 mrs x1, cntpct_el0
ff3b010c: 52800302 mov w2, #0x18 // #24
ff3b0110: 2a2103e1 mvn w1, w1
ff3b0114: 1b027c00 mul w0, w0, w2
ff3b0118: d53be022 mrs x2, cntpct_el0
ff3b011c: 2a2203e4 mvn w4, w2
ff3b0120: 0b020022 add w2, w1, w2
ff3b0124: 6b040023 subs w3, w1, w4
ff3b0128: 1a822062 csel w2, w3, w2, cs // cs = hs, nlast
ff3b012c: 6b00005f cmp w2, w0
ff3b0130: 54ffff49 b.ls ff3b0118 <sram_udelay+0x10> // b.plast
ff3b0134: d65f03c0 ret
00000000ff3b0138 <rkclk_ddr_reset>:
ff3b0138: 12000000 and w0, w0, #0x1
ff3b013c: 11001800 add w0, w0, #0x6
ff3b0140: 531e7400 lsl w0, w0, #2
ff3b0144: 51004003 sub w3, w0, #0x10
ff3b0148: 1ac32021 lsl w1, w1, w3
ff3b014c: 51003c03 sub w3, w0, #0xf
ff3b0150: 1ac32042 lsl w2, w2, w3
ff3b0154: 2a020021 orr w1, w1, w2
ff3b0158: 11000402 add w2, w0, #0x1
ff3b015c: 52800023 mov w3, #0x1 // #1
ff3b0160: 1ac02060 lsl w0, w3, w0
ff3b0164: 1ac22062 lsl w2, w3, w2
ff3b0168: 2a000040 orr w0, w2, w0
ff3b016c: 2a000021 orr w1, w1, w0
ff3b0170: d2808200 mov x0, #0x410 // #1040
ff3b0174: f2bfeec0 movk x0, #0xff76, lsl #16
ff3b0178: b9000001 str w1, [x0]
ff3b017c: d65f03c0 ret
00000000ff3b0180 <select_per_cs_training_index>:
ff3b0180: 11407c00 add w0, w0, #0x1f, lsl #12
ff3b0184: 52842a03 mov w3, #0x2150 // #8528
ff3b0188: 113d4000 add w0, w0, #0xf50
ff3b018c: 53114002 lsl w2, w0, #15
ff3b0190: 0b003c60 add w0, w3, w0, lsl #15
ff3b0194: b9400000 ldr w0, [x0]
ff3b0198: 368001c0 tbz w0, #16, ff3b01d0 <select_per_cs_training_index+0x50>
ff3b019c: 52840400 mov w0, #0x2020 // #8224
ff3b01a0: 52850404 mov w4, #0x2820 // #10272
ff3b01a4: 0b000043 add w3, w2, w0
ff3b01a8: 53081c21 lsl w1, w1, #24
ff3b01ac: 0b040042 add w2, w2, w4
ff3b01b0: 2a0303e4 mov w4, w3
ff3b01b4: 11080063 add w3, w3, #0x200
ff3b01b8: 6b02007f cmp w3, w2
ff3b01bc: b9400080 ldr w0, [x4]
ff3b01c0: 12077800 and w0, w0, #0xfeffffff
ff3b01c4: 2a010000 orr w0, w0, w1
ff3b01c8: b9000080 str w0, [x4]
ff3b01cc: 54ffff21 b.ne ff3b01b0 <select_per_cs_training_index+0x30> // b.any
ff3b01d0: d65f03c0 ret
00000000ff3b01d4 <data_training.constprop.0>:
ff3b01d4: 2a0003e1 mov w1, w0
ff3b01d8: d2800482 mov x2, #0x24 // #36
ff3b01dc: a9be7bfd stp x29, x30, [sp, #-32]!
ff3b01e0: aa0103e8 mov x8, x1
ff3b01e4: b0000000 adrp x0, ff3b1000 <rk3399m0pmu_bin>
ff3b01e8: 9b027c21 mul x1, x1, x2
ff3b01ec: 91092000 add x0, x0, #0x248
ff3b01f0: 910003fd mov x29, sp
ff3b01f4: a90153f3 stp x19, x20, [sp, #16]
ff3b01f8: 3861680b ldrb w11, [x0, x1]
ff3b01fc: 39413001 ldrb w1, [x0, #76]
ff3b0200: 71001c3f cmp w1, #0x7
ff3b0204: 540008a1 b.ne ff3b0318 <data_training.constprop.0+0x144> // b.any
ff3b0208: 7100057f cmp w11, #0x1
ff3b020c: 528000a9 mov w9, #0x5 // #5
ff3b0210: 528001e1 mov w1, #0xf // #15
ff3b0214: 1a810129 csel w9, w9, w1, eq // eq = none
ff3b0218: 11407d07 add w7, w8, #0x1f, lsl #12
ff3b021c: 5285cf81 mov w1, #0x2e7c // #11900
ff3b0220: 113d40e7 add w7, w7, #0xf50
ff3b0224: 531140e5 lsl w5, w7, #15
ff3b0228: 0b073c27 add w7, w1, w7, lsl #15
ff3b022c: b94000e1 ldr w1, [x7]
ff3b0230: 320a0021 orr w1, w1, #0x400000
ff3b0234: b90000e1 str w1, [x7]
ff3b0238: 39413000 ldrb w0, [x0, #76]
ff3b023c: 71001c1f cmp w0, #0x7
ff3b0240: 54000740 b.eq ff3b0328 <data_training.constprop.0+0x154> // b.none
ff3b0244: 7100181f cmp w0, #0x6
ff3b0248: 54000740 b.eq ff3b0330 <data_training.constprop.0+0x15c> // b.none
ff3b024c: 71000c1f cmp w0, #0x3
ff3b0250: 52801fea mov w10, #0xff // #255
ff3b0254: 528001c0 mov w0, #0xe // #14
ff3b0258: 1a80114a csel w10, w10, w0, ne // ne = any
ff3b025c: 3600084a tbz w10, #0, ff3b0364 <data_training.constprop.0+0x190>
ff3b0260: 52850a0d mov w13, #0x2850 // #10320
ff3b0264: 112640a6 add w6, w5, #0x990
ff3b0268: 0b0d00ad add w13, w5, w13
ff3b026c: 5280000c mov w12, #0x0 // #0
ff3b0270: 5280002e mov w14, #0x1 // #1
ff3b0274: 1acc21c0 lsl w0, w14, w12
ff3b0278: 6a09001f tst w0, w9
ff3b027c: 54000680 b.eq ff3b034c <data_training.constprop.0+0x178> // b.none
ff3b0280: 2a0803e0 mov w0, w8
ff3b0284: 2a0c03e1 mov w1, w12
ff3b0288: 97ffffbe bl ff3b0180 <select_per_cs_training_index>
ff3b028c: b94000c0 ldr w0, [x6]
ff3b0290: 1125c0a1 add w1, w5, #0x970
ff3b0294: 12a06022 mov w2, #0xfcfeffff // #-50397185
ff3b0298: 12167400 and w0, w0, #0xfffffcff
ff3b029c: 52854a03 mov w3, #0x2a50 // #10832
ff3b02a0: 32170000 orr w0, w0, #0x200
ff3b02a4: b90000c0 str w0, [x6]
ff3b02a8: 52858a04 mov w4, #0x2c50 // #11344
ff3b02ac: 0b0300a3 add w3, w5, w3
ff3b02b0: b9400020 ldr w0, [x1]
ff3b02b4: 0b0400a4 add w4, w5, w4
ff3b02b8: 52850411 mov w17, #0x2820 // #10272
ff3b02bc: 52850012 mov w18, #0x2800 // #10240
ff3b02c0: 0a020000 and w0, w0, w2
ff3b02c4: 112ae0a2 add w2, w5, #0xab8
ff3b02c8: 2a0c6000 orr w0, w0, w12, lsl #24
ff3b02cc: 32100000 orr w0, w0, #0x10000
ff3b02d0: b9000020 str w0, [x1]
ff3b02d4: b9400041 ldr w1, [x2]
ff3b02d8: b94001af ldr w15, [x13]
ff3b02dc: b9400070 ldr w16, [x3]
ff3b02e0: b9400080 ldr w0, [x4]
ff3b02e4: 53087c33 lsr w19, w1, #8
ff3b02e8: 0a412221 and w1, w17, w1, lsr #8
ff3b02ec: 531e7e10 lsr w16, w16, #30
ff3b02f0: 6b12003f cmp w1, w18
ff3b02f4: 2a4f7a0f orr w15, w16, w15, lsr #30
ff3b02f8: 2a4079e0 orr w0, w15, w0, lsr #30
ff3b02fc: 54000041 b.ne ff3b0304 <data_training.constprop.0+0x130> // b.any
ff3b0300: 34000200 cbz w0, ff3b0340 <data_training.constprop.0+0x16c>
ff3b0304: 362801b3 tbz w19, #5, ff3b0338 <data_training.constprop.0+0x164>
ff3b0308: 12800000 mov w0, #0xffffffff // #-1
ff3b030c: a94153f3 ldp x19, x20, [sp, #16]
ff3b0310: a8c27bfd ldp x29, x30, [sp], #32
ff3b0314: d65f03c0 ret
ff3b0318: 7100057f cmp w11, #0x1
ff3b031c: 52800069 mov w9, #0x3 // #3
ff3b0320: 1a9f1529 csinc w9, w9, wzr, ne // ne = any
ff3b0324: 17ffffbd b ff3b0218 <data_training.constprop.0+0x44>
ff3b0328: 528003ca mov w10, #0x1e // #30
ff3b032c: 17ffffcc b ff3b025c <data_training.constprop.0+0x88>
ff3b0330: 528000ea mov w10, #0x7 // #7
ff3b0334: 17ffffca b ff3b025c <data_training.constprop.0+0x88>
ff3b0338: 34fffce0 cbz w0, ff3b02d4 <data_training.constprop.0+0x100>
ff3b033c: 17fffff3 b ff3b0308 <data_training.constprop.0+0x134>
ff3b0340: 112af0a0 add w0, w5, #0xabc
ff3b0344: 5287ef81 mov w1, #0x3f7c // #16252
ff3b0348: b9000001 str w1, [x0]
ff3b034c: 1100058c add w12, w12, #0x1
ff3b0350: 7100119f cmp w12, #0x4
ff3b0354: 54fff901 b.ne ff3b0274 <data_training.constprop.0+0xa0> // b.any
ff3b0358: b94000c0 ldr w0, [x6]
ff3b035c: 12167400 and w0, w0, #0xfffffcff
ff3b0360: b90000c0 str w0, [x6]
ff3b0364: 529fdfee mov w14, #0xfeff // #65279
ff3b0368: 52841400 mov w0, #0x20a0 // #8352
ff3b036c: 1123c0a6 add w6, w5, #0x8f0
ff3b0370: 0b0000ad add w13, w5, w0
ff3b0374: 5280000c mov w12, #0x0 // #0
ff3b0378: 72bfff8e movk w14, #0xfffc, lsl #16
ff3b037c: 6b0c017f cmp w11, w12
ff3b0380: 540008c8 b.hi ff3b0498 <data_training.constprop.0+0x2c4> // b.pmore
ff3b0384: 52840411 mov w17, #0x2020 // #8224
ff3b0388: 52850412 mov w18, #0x2820 // #10272
ff3b038c: 0b1100a0 add w0, w5, w17
ff3b0390: 0b1200a3 add w3, w5, w18
ff3b0394: 2a0003e2 mov w2, w0
ff3b0398: b9400041 ldr w1, [x2]
ff3b039c: 32100021 orr w1, w1, #0x10000
ff3b03a0: b9000041 str w1, [x2]
ff3b03a4: 11037002 add w2, w0, #0xdc
ff3b03a8: 11080000 add w0, w0, #0x200
ff3b03ac: 6b00007f cmp w3, w0
ff3b03b0: b9400041 ldr w1, [x2]
ff3b03b4: 12003c21 and w1, w1, #0xffff
ff3b03b8: 32070021 orr w1, w1, #0x2000000
ff3b03bc: b9000041 str w1, [x2]
ff3b03c0: 54fffea1 b.ne ff3b0394 <data_training.constprop.0+0x1c0> // b.any
ff3b03c4: 110c80a0 add w0, w5, #0x320
ff3b03c8: 52841590 mov w16, #0x20ac // #8364
ff3b03cc: 1124a0ae add w14, w5, #0x928
ff3b03d0: 0b1000ad add w13, w5, w16
ff3b03d4: 5280000c mov w12, #0x0 // #0
ff3b03d8: b9400001 ldr w1, [x0]
ff3b03dc: 32180021 orr w1, w1, #0x100
ff3b03e0: b9000001 str w1, [x0]
ff3b03e4: b94000c0 ldr w0, [x6]
ff3b03e8: 12167400 and w0, w0, #0xfffffcff
ff3b03ec: b90000c0 str w0, [x6]
ff3b03f0: 112500a6 add w6, w5, #0x940
ff3b03f4: 6b0c017f cmp w11, w12
ff3b03f8: 54000a88 b.hi ff3b0548 <data_training.constprop.0+0x374> // b.pmore
ff3b03fc: b94000c0 ldr w0, [x6]
ff3b0400: 12067400 and w0, w0, #0xfcffffff
ff3b0404: b90000c0 str w0, [x6]
ff3b0408: 371813aa tbnz w10, #3, ff3b067c <data_training.constprop.0+0x4a8>
ff3b040c: 3620156a tbz w10, #4, ff3b06b8 <data_training.constprop.0+0x4e4>
ff3b0410: 1127c0a6 add w6, w5, #0x9f0
ff3b0414: 112b50ab add w11, w5, #0xad4
ff3b0418: 112790ac add w12, w5, #0x9e4
ff3b041c: 5280000a mov w10, #0x0 // #0
ff3b0420: 52800020 mov w0, #0x1 // #1
ff3b0424: 1aca2000 lsl w0, w0, w10
ff3b0428: 6a09001f tst w0, w9
ff3b042c: 540013a0 b.eq ff3b06a0 <data_training.constprop.0+0x4cc> // b.none
ff3b0430: 2a0803e0 mov w0, w8
ff3b0434: 2a0a03e1 mov w1, w10
ff3b0438: 97ffff52 bl ff3b0180 <select_per_cs_training_index>
ff3b043c: b9400160 ldr w0, [x11]
ff3b0440: 529fdfe1 mov w1, #0xfeff // #65279
ff3b0444: 52860803 mov w3, #0x3040 // #12352
ff3b0448: 12177800 and w0, w0, #0xfffffeff
ff3b044c: b9000160 str w0, [x11]
ff3b0450: 72bfff81 movk w1, #0xfffc, lsl #16
ff3b0454: b94000c0 ldr w0, [x6]
ff3b0458: 120e7400 and w0, w0, #0xfffcffff
ff3b045c: 320f0000 orr w0, w0, #0x20000
ff3b0460: b90000c0 str w0, [x6]
ff3b0464: b9400180 ldr w0, [x12]
ff3b0468: 0a010000 and w0, w0, w1
ff3b046c: 112ae0a1 add w1, w5, #0xab8
ff3b0470: 2a0a4000 orr w0, w0, w10, lsl #16
ff3b0474: 32180000 orr w0, w0, #0x100
ff3b0478: b9000180 str w0, [x12]
ff3b047c: b9400020 ldr w0, [x1]
ff3b0480: 53087c02 lsr w2, w0, #8
ff3b0484: 0a402060 and w0, w3, w0, lsr #8
ff3b0488: 71400c1f cmp w0, #0x3, lsl #12
ff3b048c: 54001040 b.eq ff3b0694 <data_training.constprop.0+0x4c0> // b.none
ff3b0490: 3637ff62 tbz w2, #6, ff3b047c <data_training.constprop.0+0x2a8>
ff3b0494: 17ffff9d b ff3b0308 <data_training.constprop.0+0x134>
ff3b0498: 2a0803e0 mov w0, w8
ff3b049c: 2a0c03e1 mov w1, w12
ff3b04a0: 97ffff38 bl ff3b0180 <select_per_cs_training_index>
ff3b04a4: b94000c0 ldr w0, [x6]
ff3b04a8: 1123b0a1 add w1, w5, #0x8ec
ff3b04ac: 52845413 mov w19, #0x22a0 // #8864
ff3b04b0: 12167400 and w0, w0, #0xfffffcff
ff3b04b4: 52849414 mov w20, #0x24a0 // #9376
ff3b04b8: 32170000 orr w0, w0, #0x200
ff3b04bc: b90000c0 str w0, [x6]
ff3b04c0: 5284d41e mov w30, #0x26a0 // #9888
ff3b04c4: 112ae0a2 add w2, w5, #0xab8
ff3b04c8: b9400020 ldr w0, [x1]
ff3b04cc: 0b1300a3 add w3, w5, w19
ff3b04d0: 0b1400a4 add w4, w5, w20
ff3b04d4: 0b1e00af add w15, w5, w30
ff3b04d8: 0a0e0000 and w0, w0, w14
ff3b04dc: 52848211 mov w17, #0x2410 // #9232
ff3b04e0: 2a0c4000 orr w0, w0, w12, lsl #16
ff3b04e4: 52848012 mov w18, #0x2400 // #9216
ff3b04e8: 32180000 orr w0, w0, #0x100
ff3b04ec: b9000020 str w0, [x1]
ff3b04f0: b9400041 ldr w1, [x2]
ff3b04f4: b94001a0 ldr w0, [x13]
ff3b04f8: b940007e ldr w30, [x3]
ff3b04fc: b9400090 ldr w16, [x4]
ff3b0500: 53087c33 lsr w19, w1, #8
ff3b0504: b94001f4 ldr w20, [x15]
ff3b0508: 2a1e0000 orr w0, w0, w30
ff3b050c: 0a412221 and w1, w17, w1, lsr #8
ff3b0510: 2a140210 orr w16, w16, w20
ff3b0514: 6b12003f cmp w1, w18
ff3b0518: 2a100000 orr w0, w0, w16
ff3b051c: 12140000 and w0, w0, #0x1000
ff3b0520: 54000041 b.ne ff3b0528 <data_training.constprop.0+0x354> // b.any
ff3b0524: 34000080 cbz w0, ff3b0534 <data_training.constprop.0+0x360>
ff3b0528: 3727ef13 tbnz w19, #4, ff3b0308 <data_training.constprop.0+0x134>
ff3b052c: 34fffe20 cbz w0, ff3b04f0 <data_training.constprop.0+0x31c>
ff3b0530: 17ffff76 b ff3b0308 <data_training.constprop.0+0x134>
ff3b0534: 112af0a0 add w0, w5, #0xabc
ff3b0538: 5287ef81 mov w1, #0x3f7c // #16252
ff3b053c: 1100058c add w12, w12, #0x1
ff3b0540: b9000001 str w1, [x0]
ff3b0544: 17ffff8e b ff3b037c <data_training.constprop.0+0x1a8>
ff3b0548: 2a0c03e1 mov w1, w12
ff3b054c: 2a0803e0 mov w0, w8
ff3b0550: 97ffff0c bl ff3b0180 <select_per_cs_training_index>
ff3b0554: 2a0e03e1 mov w1, w14
ff3b0558: 52845580 mov w0, #0x22ac // #8876
ff3b055c: 0b0000a3 add w3, w5, w0
ff3b0560: b94000c0 ldr w0, [x6]
ff3b0564: 12a06022 mov w2, #0xfcfeffff // #-50397185
ff3b0568: 52849584 mov w4, #0x24ac // #9388
ff3b056c: 5284d58f mov w15, #0x26ac // #9900
ff3b0570: 12067400 and w0, w0, #0xfcffffff
ff3b0574: 0b0400a4 add w4, w5, w4
ff3b0578: 32070000 orr w0, w0, #0x2000000
ff3b057c: b90000c0 str w0, [x6]
ff3b0580: 0b0f00af add w15, w5, w15
ff3b0584: 52844112 mov w18, #0x2208 // #8712
ff3b0588: b9400020 ldr w0, [x1]
ff3b058c: 5284401e mov w30, #0x2200 // #8704
ff3b0590: 0a020000 and w0, w0, w2
ff3b0594: 112ae0a2 add w2, w5, #0xab8
ff3b0598: 2a0c6000 orr w0, w0, w12, lsl #24
ff3b059c: 32100000 orr w0, w0, #0x10000
ff3b05a0: b9000020 str w0, [x1]
ff3b05a4: b9400041 ldr w1, [x2]
ff3b05a8: b94001a0 ldr w0, [x13]
ff3b05ac: b9400074 ldr w20, [x3]
ff3b05b0: b9400090 ldr w16, [x4]
ff3b05b4: 53087c33 lsr w19, w1, #8
ff3b05b8: b94001f1 ldr w17, [x15]
ff3b05bc: 2a140000 orr w0, w0, w20
ff3b05c0: 0a412241 and w1, w18, w1, lsr #8
ff3b05c4: 6b1e003f cmp w1, w30
ff3b05c8: 53167e31 lsr w17, w17, #22
ff3b05cc: 2a505a30 orr w16, w17, w16, lsr #22
ff3b05d0: 2a405a00 orr w0, w16, w0, lsr #22
ff3b05d4: 12000400 and w0, w0, #0x3
ff3b05d8: 54000041 b.ne ff3b05e0 <data_training.constprop.0+0x40c> // b.any
ff3b05dc: 34000080 cbz w0, ff3b05ec <data_training.constprop.0+0x418>
ff3b05e0: 371fe953 tbnz w19, #3, ff3b0308 <data_training.constprop.0+0x134>
ff3b05e4: 34fffe00 cbz w0, ff3b05a4 <data_training.constprop.0+0x3d0>
ff3b05e8: 17ffff48 b ff3b0308 <data_training.constprop.0+0x134>
ff3b05ec: 112af0a0 add w0, w5, #0xabc
ff3b05f0: 5287ef81 mov w1, #0x3f7c // #16252
ff3b05f4: 1100058c add w12, w12, #0x1
ff3b05f8: b9000001 str w1, [x0]
ff3b05fc: 17ffff7e b ff3b03f4 <data_training.constprop.0+0x220>
ff3b0600: 2a0803e0 mov w0, w8
ff3b0604: 2a0c03e1 mov w1, w12
ff3b0608: 97fffede bl ff3b0180 <select_per_cs_training_index>
ff3b060c: b94000c0 ldr w0, [x6]
ff3b0610: 52842082 mov w2, #0x2104 // #8452
ff3b0614: 52842003 mov w3, #0x2100 // #8448
ff3b0618: 120e7400 and w0, w0, #0xfffcffff
ff3b061c: 320f0000 orr w0, w0, #0x20000
ff3b0620: b90000c0 str w0, [x6]
ff3b0624: b94001a0 ldr w0, [x13]
ff3b0628: 0a0f0000 and w0, w0, w15
ff3b062c: 2a0c6000 orr w0, w0, w12, lsl #24
ff3b0630: 32180000 orr w0, w0, #0x100
ff3b0634: b90001a0 str w0, [x13]
ff3b0638: b94001c0 ldr w0, [x14]
ff3b063c: 53087c01 lsr w1, w0, #8
ff3b0640: 0a402040 and w0, w2, w0, lsr #8
ff3b0644: 6b03001f cmp w0, w3
ff3b0648: 54000060 b.eq ff3b0654 <data_training.constprop.0+0x480> // b.none
ff3b064c: 3617ff61 tbz w1, #2, ff3b0638 <data_training.constprop.0+0x464>
ff3b0650: 17ffff2e b ff3b0308 <data_training.constprop.0+0x134>
ff3b0654: 112af0a0 add w0, w5, #0xabc
ff3b0658: 1100058c add w12, w12, #0x1
ff3b065c: 5287ef81 mov w1, #0x3f7c // #16252
ff3b0660: b9000001 str w1, [x0]
ff3b0664: 6b0c017f cmp w11, w12
ff3b0668: 54fffcc8 b.hi ff3b0600 <data_training.constprop.0+0x42c> // b.pmore
ff3b066c: b94000c0 ldr w0, [x6]
ff3b0670: 120e7400 and w0, w0, #0xfffcffff
ff3b0674: b90000c0 str w0, [x6]
ff3b0678: 17ffff65 b ff3b040c <data_training.constprop.0+0x238>
ff3b067c: 529fdfef mov w15, #0xfeff // #65279
ff3b0680: 1124a0ad add w13, w5, #0x928
ff3b0684: 112ae0ae add w14, w5, #0xab8
ff3b0688: 5280000c mov w12, #0x0 // #0
ff3b068c: 72bf9fef movk w15, #0xfcff, lsl #16
ff3b0690: 17fffff5 b ff3b0664 <data_training.constprop.0+0x490>
ff3b0694: 112af0a0 add w0, w5, #0xabc
ff3b0698: 5287ef81 mov w1, #0x3f7c // #16252
ff3b069c: b9000001 str w1, [x0]
ff3b06a0: 1100054a add w10, w10, #0x1
ff3b06a4: 7100115f cmp w10, #0x4
ff3b06a8: 54ffebc1 b.ne ff3b0420 <data_training.constprop.0+0x24c> // b.any
ff3b06ac: b94000c0 ldr w0, [x6]
ff3b06b0: 120e7400 and w0, w0, #0xfffcffff
ff3b06b4: b90000c0 str w0, [x6]
ff3b06b8: b94000e0 ldr w0, [x7]
ff3b06bc: 12097800 and w0, w0, #0xffbfffff
ff3b06c0: b90000e0 str w0, [x7]
ff3b06c4: 52800000 mov w0, #0x0 // #0
ff3b06c8: 17ffff11 b ff3b030c <data_training.constprop.0+0x138>
00000000ff3b06cc <dmc_resume>:
ff3b06cc: a9ba7bfd stp x29, x30, [sp, #-96]!
ff3b06d0: d280a200 mov x0, #0x510 // #1296
ff3b06d4: f2bfeec0 movk x0, #0xff76, lsl #16
ff3b06d8: 910003fd mov x29, sp
ff3b06dc: a90153f3 stp x19, x20, [sp, #16]
ff3b06e0: 52800041 mov w1, #0x2 // #2
ff3b06e4: a9025bf5 stp x21, x22, [sp, #32]
ff3b06e8: a90363f7 stp x23, x24, [sp, #48]
ff3b06ec: a9046bf9 stp x25, x26, [sp, #64]
ff3b06f0: f9002bfb str x27, [sp, #80]
ff3b06f4: b9000001 str w1, [x0]
ff3b06f8: d2900080 mov x0, #0x8004 // #32772
ff3b06fc: f2bff080 movk x0, #0xff84, lsl #16
ff3b0700: 52800121 mov w1, #0x9 // #9
ff3b0704: b9000001 str w1, [x0]
ff3b0708: d2900001 mov x1, #0x8000 // #32768
ff3b070c: f2bff081 movk x1, #0xff84, lsl #16
ff3b0710: b9400020 ldr w0, [x1]
ff3b0714: 32000000 orr w0, w0, #0x1
ff3b0718: b9000020 str w0, [x1]
ff3b071c: d2900180 mov x0, #0x800c // #32780
ff3b0720: 52800ec1 mov w1, #0x76 // #118
ff3b0724: f2bff080 movk x0, #0xff84, lsl #16
ff3b0728: b9000001 str w1, [x0]
ff3b072c: 97fffe4b bl ff3b0058 <secure_watchdog_ungate>
ff3b0730: d2800b81 mov x1, #0x5c // #92
ff3b0734: 12800282 mov w2, #0xffffffeb // #-21
ff3b0738: f2bfe621 movk x1, #0xff31, lsl #16
ff3b073c: b9400020 ldr w0, [x1]
ff3b0740: 0a020000 and w0, w0, w2
ff3b0744: b9000020 str w0, [x1]
ff3b0748: 97fffe55 bl ff3b009c <pmu_sgrf_rst_hld_release>
ff3b074c: 97fffe59 bl ff3b00b0 <restore_pmu_rsthold>
ff3b0750: 97fffe47 bl ff3b006c <sram_secure_timer_init>
ff3b0754: b0000000 adrp x0, ff3b1000 <rk3399m0pmu_bin>
ff3b0758: d2802302 mov x2, #0x118 // #280
ff3b075c: 913ce001 add x1, x0, #0xf38
ff3b0760: f2bfeec2 movk x2, #0xff76, lsl #16
ff3b0764: b94f3800 ldr w0, [x0, #3896]
ff3b0768: d2800983 mov x3, #0x4c // #76
ff3b076c: f2bfeec3 movk x3, #0xff76, lsl #16
ff3b0770: d2800a04 mov x4, #0x50 // #80
ff3b0774: 32103c00 orr w0, w0, #0xffff0000
ff3b0778: b9000040 str w0, [x2]
ff3b077c: 52a06000 mov w0, #0x3000000 // #50331648
ff3b0780: b9000060 str w0, [x3]
ff3b0784: d2800802 mov x2, #0x40 // #64
ff3b0788: 91001020 add x0, x1, #0x4
ff3b078c: f2bfeec2 movk x2, #0xff76, lsl #16
ff3b0790: b9400421 ldr w1, [x1, #4]
ff3b0794: f2bfeec4 movk x4, #0xff76, lsl #16
ff3b0798: 32103c21 orr w1, w1, #0xffff0000
ff3b079c: b9000041 str w1, [x2]
ff3b07a0: b9400401 ldr w1, [x0, #4]
ff3b07a4: 32103c21 orr w1, w1, #0xffff0000
ff3b07a8: b9000441 str w1, [x2, #4]
ff3b07ac: d2800901 mov x1, #0x48 // #72
ff3b07b0: f2bfeec1 movk x1, #0xff76, lsl #16
ff3b07b4: b9400802 ldr w2, [x0, #8]
ff3b07b8: b9000022 str w2, [x1]
ff3b07bc: b9401002 ldr w2, [x0, #16]
ff3b07c0: 32103c42 orr w2, w2, #0xffff0000
ff3b07c4: b9000082 str w2, [x4]
ff3b07c8: b9401402 ldr w2, [x0, #20]
ff3b07cc: 32103c42 orr w2, w2, #0xffff0000
ff3b07d0: b9000482 str w2, [x4, #4]
ff3b07d4: b9400c00 ldr w0, [x0, #12]
ff3b07d8: 32103c00 orr w0, w0, #0xffff0000
ff3b07dc: b9000060 str w0, [x3]
ff3b07e0: b9400020 ldr w0, [x1]
ff3b07e4: 36ffffe0 tbz w0, #31, ff3b07e0 <dmc_resume+0x114>
ff3b07e8: d2800800 mov x0, #0x40 // #64
ff3b07ec: 52984001 mov w1, #0xc200 // #49664
ff3b07f0: f2bfe660 movk x0, #0xff33, lsl #16
ff3b07f4: b0000013 adrp x19, ff3b1000 <rk3399m0pmu_bin>
ff3b07f8: b0000016 adrp x22, ff3b1000 <rk3399m0pmu_bin>
ff3b07fc: d2802215 mov x21, #0x110 // #272
ff3b0800: 91092273 add x19, x19, #0x248
ff3b0804: 910a72d6 add x22, x22, #0x29c
ff3b0808: 72b84001 movk w1, #0xc200, lsl #16
ff3b080c: 52800014 mov w20, #0x0 // #0
ff3b0810: f2bff515 movk x21, #0xffa8, lsl #16
ff3b0814: b9000001 str w1, [x0]
ff3b0818: 52850005 mov w5, #0x2800 // #10240
ff3b081c: 52800006 mov w6, #0x0 // #0
ff3b0820: 72bff505 movk w5, #0xffa8, lsl #16
ff3b0824: 39413660 ldrb w0, [x19, #77]
ff3b0828: 6b06001f cmp w0, w6
ff3b082c: 54000528 b.hi ff3b08d0 <dmc_resume+0x204> // b.pmore
ff3b0830: 39400660 ldrb w0, [x19, #1]
ff3b0834: 34000040 cbz w0, ff3b083c <dmc_resume+0x170>
ff3b0838: 32000294 orr w20, w20, #0x1
ff3b083c: 39409660 ldrb w0, [x19, #37]
ff3b0840: 34000040 cbz w0, ff3b0848 <dmc_resume+0x17c>
ff3b0844: 321f0294 orr w20, w20, #0x2
ff3b0848: b94002a0 ldr w0, [x21]
ff3b084c: d2902201 mov x1, #0x8110 // #33040
ff3b0850: f2bff501 movk x1, #0xffa8, lsl #16
ff3b0854: 32100000 orr w0, w0, #0x10000
ff3b0858: b90002a0 str w0, [x21]
ff3b085c: b9400020 ldr w0, [x1]
ff3b0860: 32100000 orr w0, w0, #0x10000
ff3b0864: b9000020 str w0, [x1]
ff3b0868: 12000281 and w1, w20, #0x1
ff3b086c: 360000d4 tbz w20, #0, ff3b0884 <dmc_resume+0x1b8>
ff3b0870: d2800402 mov x2, #0x20 // #32
ff3b0874: f2bfe622 movk x2, #0xff31, lsl #16
ff3b0878: b9400040 ldr w0, [x2]
ff3b087c: 320d0000 orr w0, w0, #0x80000
ff3b0880: b9000040 str w0, [x2]
ff3b0884: 121f0286 and w6, w20, #0x2
ff3b0888: 36080f34 tbz w20, #1, ff3b0a6c <dmc_resume+0x3a0>
ff3b088c: d2800402 mov x2, #0x20 // #32
ff3b0890: f2bfe622 movk x2, #0xff31, lsl #16
ff3b0894: b9400040 ldr w0, [x2]
ff3b0898: 32090000 orr w0, w0, #0x800000
ff3b089c: b9000040 str w0, [x2]
ff3b08a0: 35000e81 cbnz w1, ff3b0a70 <dmc_resume+0x3a4>
ff3b08a4: d295de82 mov x2, #0xaef4 // #44788
ff3b08a8: f2bff502 movk x2, #0xffa8, lsl #16
ff3b08ac: b9400040 ldr w0, [x2]
ff3b08b0: 12067400 and w0, w0, #0xfcffffff
ff3b08b4: 32070000 orr w0, w0, #0x2000000
ff3b08b8: b9000040 str w0, [x2]
ff3b08bc: 35000e81 cbnz w1, ff3b0a8c <dmc_resume+0x3c0>
ff3b08c0: d2906586 mov x6, #0x832c // #33580
ff3b08c4: 52800cc5 mov w5, #0x66 // #102
ff3b08c8: f2bff506 movk x6, #0xffa8, lsl #16
ff3b08cc: 140000fa b ff3b0cb4 <dmc_resume+0x5e8>
ff3b08d0: 52800022 mov w2, #0x1 // #1
ff3b08d4: 2a0203e1 mov w1, w2
ff3b08d8: 2a0603e0 mov w0, w6
ff3b08dc: 97fffe17 bl ff3b0138 <rkclk_ddr_reset>
ff3b08e0: 52800140 mov w0, #0xa // #10
ff3b08e4: 97fffe09 bl ff3b0108 <sram_udelay>
ff3b08e8: 2a0603e0 mov w0, w6
ff3b08ec: 52800002 mov w2, #0x0 // #0
ff3b08f0: 52800021 mov w1, #0x1 // #1
ff3b08f4: 97fffe11 bl ff3b0138 <rkclk_ddr_reset>
ff3b08f8: 52800140 mov w0, #0xa // #10
ff3b08fc: 97fffe03 bl ff3b0108 <sram_udelay>
ff3b0900: 52800002 mov w2, #0x0 // #0
ff3b0904: 52800001 mov w1, #0x0 // #0
ff3b0908: 2a0603e0 mov w0, w6
ff3b090c: 97fffe0b bl ff3b0138 <rkclk_ddr_reset>
ff3b0910: 52800140 mov w0, #0xa // #10
ff3b0914: 97fffdfd bl ff3b0108 <sram_udelay>
ff3b0918: aa1603e1 mov x1, x22
ff3b091c: 52802962 mov w2, #0x14b // #331
ff3b0920: 1284ff60 mov w0, #0xffffd804 // #-10236
ff3b0924: 0b0000a0 add w0, w5, w0
ff3b0928: 97fffdef bl ff3b00e4 <sram_regcpy>
ff3b092c: 514008a4 sub w4, w5, #0x2, lsl #12
ff3b0930: 1284ffe1 mov w1, #0xffffd800 // #-10240
ff3b0934: 0b0100a7 add w7, w5, w1
ff3b0938: b9405260 ldr w0, [x19, #80]
ff3b093c: 52801902 mov w2, #0xc8 // #200
ff3b0940: b0000001 adrp x1, ff3b1000 <rk3399m0pmu_bin>
ff3b0944: 911f2021 add x1, x1, #0x7c8
ff3b0948: b90000e0 str w0, [x7]
ff3b094c: aa0403e0 mov x0, x4
ff3b0950: 97fffde5 bl ff3b00e4 <sram_regcpy>
ff3b0954: 1118e0a0 add w0, w5, #0x638
ff3b0958: 52800062 mov w2, #0x3 // #3
ff3b095c: b0000001 adrp x1, ff3b1000 <rk3399m0pmu_bin>
ff3b0960: 91395021 add x1, x1, #0xe54
ff3b0964: 97fffde0 bl ff3b00e4 <sram_regcpy>
ff3b0968: 1284dde2 mov w2, #0xffffd910 // #-9968
ff3b096c: 0b0200a1 add w1, w5, w2
ff3b0970: b9400020 ldr w0, [x1]
ff3b0974: 32100000 orr w0, w0, #0x10000
ff3b0978: b9000020 str w0, [x1]
ff3b097c: 111bd0a1 add w1, w5, #0x6f4
ff3b0980: b9400020 ldr w0, [x1]
ff3b0984: 12067400 and w0, w0, #0xfcffffff
ff3b0988: 32080000 orr w0, w0, #0x1000000
ff3b098c: b9000020 str w0, [x1]
ff3b0990: d5033ebf dmb st
ff3b0994: b9400080 ldr w0, [x4]
ff3b0998: 111980a2 add w2, w5, #0x660
ff3b099c: 111990a3 add w3, w5, #0x664
ff3b09a0: 1118f0a1 add w1, w5, #0x63c
ff3b09a4: 32000000 orr w0, w0, #0x1
ff3b09a8: b9000080 str w0, [x4]
ff3b09ac: 1119a0a4 add w4, w5, #0x668
ff3b09b0: b94000e0 ldr w0, [x7]
ff3b09b4: 32000000 orr w0, w0, #0x1
ff3b09b8: b90000e0 str w0, [x7]
ff3b09bc: 320083e7 mov w7, #0x10001 // #65537
ff3b09c0: b9400049 ldr w9, [x2]
ff3b09c4: b9400060 ldr w0, [x3]
ff3b09c8: b9400088 ldr w8, [x4]
ff3b09cc: 368000a9 tbz w9, #16, ff3b09e0 <dmc_resume+0x314>
ff3b09d0: 12008000 and w0, w0, #0x10001
ff3b09d4: 6b07001f cmp w0, w7
ff3b09d8: 54000041 b.ne ff3b09e0 <dmc_resume+0x314> // b.any
ff3b09dc: 37000068 tbnz w8, #0, ff3b09e8 <dmc_resume+0x31c>
ff3b09e0: b9400020 ldr w0, [x1]
ff3b09e4: 3607fee0 tbz w0, #0, ff3b09c0 <dmc_resume+0x2f4>
ff3b09e8: 111800a0 add w0, w5, #0x600
ff3b09ec: 528007e2 mov w2, #0x3f // #63
ff3b09f0: b0000001 adrp x1, ff3b1000 <rk3399m0pmu_bin>
ff3b09f4: 91387021 add x1, x1, #0xe1c
ff3b09f8: 97fffdbb bl ff3b00e4 <sram_regcpy>
ff3b09fc: 512000a4 sub w4, w5, #0x800
ff3b0a00: b0000007 adrp x7, ff3b1000 <rk3399m0pmu_bin>
ff3b0a04: 912ba0e7 add x7, x7, #0xae8
ff3b0a08: 2a0403e0 mov w0, w4
ff3b0a0c: aa0703e1 mov x1, x7
ff3b0a10: 52800b62 mov w2, #0x5b // #91
ff3b0a14: 97fffdb4 bl ff3b00e4 <sram_regcpy>
ff3b0a18: 11080084 add w4, w4, #0x200
ff3b0a1c: 6b0400bf cmp w5, w4
ff3b0a20: 54ffff41 b.ne ff3b0a08 <dmc_resume+0x33c> // b.any
ff3b0a24: 2a0503e0 mov w0, w5
ff3b0a28: 528004c2 mov w2, #0x26 // #38
ff3b0a2c: b0000001 adrp x1, ff3b1000 <rk3399m0pmu_bin>
ff3b0a30: 91315021 add x1, x1, #0xc54
ff3b0a34: 97fffdac bl ff3b00e4 <sram_regcpy>
ff3b0a38: 110800a0 add w0, w5, #0x200
ff3b0a3c: 528004c2 mov w2, #0x26 // #38
ff3b0a40: b0000001 adrp x1, ff3b1000 <rk3399m0pmu_bin>
ff3b0a44: 9133b021 add x1, x1, #0xcec
ff3b0a48: 97fffda7 bl ff3b00e4 <sram_regcpy>
ff3b0a4c: 528004c2 mov w2, #0x26 // #38
ff3b0a50: 111000a0 add w0, w5, #0x400
ff3b0a54: b0000001 adrp x1, ff3b1000 <rk3399m0pmu_bin>
ff3b0a58: 91361021 add x1, x1, #0xd84
ff3b0a5c: 97fffda2 bl ff3b00e4 <sram_regcpy>
ff3b0a60: 110004c6 add w6, w6, #0x1
ff3b0a64: 114020a5 add w5, w5, #0x8, lsl #12
ff3b0a68: 17ffff6f b ff3b0824 <dmc_resume+0x158>
ff3b0a6c: 340003e1 cbz w1, ff3b0ae8 <dmc_resume+0x41c>
ff3b0a70: d285de82 mov x2, #0x2ef4 // #12020
ff3b0a74: f2bff502 movk x2, #0xffa8, lsl #16
ff3b0a78: b9400040 ldr w0, [x2]
ff3b0a7c: 12067400 and w0, w0, #0xfcffffff
ff3b0a80: 32070000 orr w0, w0, #0x2000000
ff3b0a84: b9000040 str w0, [x2]
ff3b0a88: 35fff0e6 cbnz w6, ff3b08a4 <dmc_resume+0x1d8>
ff3b0a8c: d2806587 mov x7, #0x32c // #812
ff3b0a90: 52800cc5 mov w5, #0x66 // #102
ff3b0a94: f2bff507 movk x7, #0xffa8, lsl #16
ff3b0a98: b94000e0 ldr w0, [x7]
ff3b0a9c: 36180fa0 tbz w0, #3, ff3b0c90 <dmc_resume+0x5c4>
ff3b0aa0: b94002a0 ldr w0, [x21]
ff3b0aa4: b0000002 adrp x2, ff3b1000 <rk3399m0pmu_bin>
ff3b0aa8: d2851c83 mov x3, #0x28e4 // #10468
ff3b0aac: 913c6042 add x2, x2, #0xf18
ff3b0ab0: 120f7800 and w0, w0, #0xfffeffff
ff3b0ab4: b90002a0 str w0, [x21]
ff3b0ab8: d2841c80 mov x0, #0x20e4 // #8420
ff3b0abc: f2bff503 movk x3, #0xffa8, lsl #16
ff3b0ac0: f2bff500 movk x0, #0xffa8, lsl #16
ff3b0ac4: b9400001 ldr w1, [x0]
ff3b0ac8: b8404444 ldr w4, [x2], #4
ff3b0acc: 12044c21 and w1, w1, #0xf000ffff
ff3b0ad0: 2a040021 orr w1, w1, w4
ff3b0ad4: b9000001 str w1, [x0]
ff3b0ad8: 91080000 add x0, x0, #0x200
ff3b0adc: eb03001f cmp x0, x3
ff3b0ae0: 54ffff21 b.ne ff3b0ac4 <dmc_resume+0x3f8> // b.any
ff3b0ae4: 35ffeee6 cbnz w6, ff3b08c0 <dmc_resume+0x1f4>
ff3b0ae8: d288011b mov x27, #0x4008 // #16392
ff3b0aec: aa1303f9 mov x25, x19
ff3b0af0: f2bff51b movk x27, #0xffa8, lsl #16
ff3b0af4: 5280001a mov w26, #0x0 // #0
ff3b0af8: 52800037 mov w23, #0x1 // #1
ff3b0afc: 52800078 mov w24, #0x3 // #3
ff3b0b00: 39413660 ldrb w0, [x19, #77]
ff3b0b04: 6b1a001f cmp w0, w26
ff3b0b08: 54001028 b.hi ff3b0d0c <dmc_resume+0x640> // b.pmore
ff3b0b0c: 39400660 ldrb w0, [x19, #1]
ff3b0b10: 340002a0 cbz w0, ff3b0b64 <dmc_resume+0x498>
ff3b0b14: d2880200 mov x0, #0x4010 // #16400
ff3b0b18: b9400e61 ldr w1, [x19, #12]
ff3b0b1c: f2bff500 movk x0, #0xffa8, lsl #16
ff3b0b20: b9000001 str w1, [x0]
ff3b0b24: b9401261 ldr w1, [x19, #16]
ff3b0b28: b9000401 str w1, [x0, #4]
ff3b0b2c: b9401661 ldr w1, [x19, #20]
ff3b0b30: b9000801 str w1, [x0, #8]
ff3b0b34: b9401a61 ldr w1, [x19, #24]
ff3b0b38: b9000c01 str w1, [x0, #12]
ff3b0b3c: b9401e61 ldr w1, [x19, #28]
ff3b0b40: b9010001 str w1, [x0, #256]
ff3b0b44: 39400260 ldrb w0, [x19]
ff3b0b48: 7100041f cmp w0, #0x1
ff3b0b4c: 540000c1 b.ne ff3b0b64 <dmc_resume+0x498> // b.any
ff3b0b50: d2808a01 mov x1, #0x450 // #1104
ff3b0b54: f2bff501 movk x1, #0xffa8, lsl #16
ff3b0b58: b9400020 ldr w0, [x1]
ff3b0b5c: 320f0000 orr w0, w0, #0x20000
ff3b0b60: b9000020 str w0, [x1]
ff3b0b64: 39409660 ldrb w0, [x19, #37]
ff3b0b68: 340002a0 cbz w0, ff3b0bbc <dmc_resume+0x4f0>
ff3b0b6c: d2980200 mov x0, #0xc010 // #49168
ff3b0b70: b9403261 ldr w1, [x19, #48]
ff3b0b74: f2bff500 movk x0, #0xffa8, lsl #16
ff3b0b78: b9000001 str w1, [x0]
ff3b0b7c: b9403661 ldr w1, [x19, #52]
ff3b0b80: b9000401 str w1, [x0, #4]
ff3b0b84: b9403a61 ldr w1, [x19, #56]
ff3b0b88: b9000801 str w1, [x0, #8]
ff3b0b8c: b9403e61 ldr w1, [x19, #60]
ff3b0b90: b9000c01 str w1, [x0, #12]
ff3b0b94: b9404261 ldr w1, [x19, #64]
ff3b0b98: b9010001 str w1, [x0, #256]
ff3b0b9c: 39409260 ldrb w0, [x19, #36]
ff3b0ba0: 7100041f cmp w0, #0x1
ff3b0ba4: 540000c1 b.ne ff3b0bbc <dmc_resume+0x4f0> // b.any
ff3b0ba8: d2908a01 mov x1, #0x8450 // #33872
ff3b0bac: f2bff501 movk x1, #0xffa8, lsl #16
ff3b0bb0: b9400020 ldr w0, [x1]
ff3b0bb4: 320f0000 orr w0, w0, #0x20000
ff3b0bb8: b9000020 str w0, [x1]
ff3b0bbc: 39413a60 ldrb w0, [x19, #78]
ff3b0bc0: d29c0201 mov x1, #0xe010 // #57360
ff3b0bc4: f2bfe661 movk x1, #0xff33, lsl #16
ff3b0bc8: 53165400 lsl w0, w0, #10
ff3b0bcc: 32061000 orr w0, w0, #0x7c000000
ff3b0bd0: b9000020 str w0, [x1]
ff3b0bd4: d2802480 mov x0, #0x124 // #292
ff3b0bd8: 52803001 mov w1, #0x180 // #384
ff3b0bdc: f2bfeea0 movk x0, #0xff75, lsl #16
ff3b0be0: 72a03801 movk w1, #0x1c0, lsl #16
ff3b0be4: b9000001 str w1, [x0]
ff3b0be8: d280a201 mov x1, #0x510 // #1296
ff3b0bec: f2bfeec1 movk x1, #0xff76, lsl #16
ff3b0bf0: b9400020 ldr w0, [x1]
ff3b0bf4: 32000400 orr w0, w0, #0x3
ff3b0bf8: b9000020 str w0, [x1]
ff3b0bfc: d2803780 mov x0, #0x1bc // #444
ff3b0c00: 528000a1 mov w1, #0x5 // #5
ff3b0c04: f2bff500 movk x0, #0xffa8, lsl #16
ff3b0c08: 72a006a1 movk w1, #0x35, lsl #16
ff3b0c0c: b9400000 ldr w0, [x0]
ff3b0c10: 53107c00 lsr w0, w0, #16
ff3b0c14: 11000400 add w0, w0, #0x1
ff3b0c18: 12000014 and w20, w0, #0x1
ff3b0c1c: 531c0000 ubfiz w0, w0, #4, #1
ff3b0c20: 2a010000 orr w0, w0, w1
ff3b0c24: d2bfec41 mov x1, #0xff620000 // #4284612608
ff3b0c28: b9000020 str w0, [x1]
ff3b0c2c: d2800200 mov x0, #0x10 // #16
ff3b0c30: f2bfec40 movk x0, #0xff62, lsl #16
ff3b0c34: aa0003e1 mov x1, x0
ff3b0c38: b9400002 ldr w2, [x0]
ff3b0c3c: 3617ffe2 tbz w2, #2, ff3b0c38 <dmc_resume+0x56c>
ff3b0c40: d2bfec40 mov x0, #0xff620000 // #4284612608
ff3b0c44: 320f83e2 mov w2, #0x20002 // #131074
ff3b0c48: b9000002 str w2, [x0]
ff3b0c4c: b9400020 ldr w0, [x1]
ff3b0c50: 3607ffe0 tbz w0, #0, ff3b0c4c <dmc_resume+0x580>
ff3b0c54: 5285c016 mov w22, #0x2e00 // #11776
ff3b0c58: 53185e94 lsl w20, w20, #8
ff3b0c5c: 39413675 ldrb w21, [x19, #77]
ff3b0c60: 72bff516 movk w22, #0xffa8, lsl #16
ff3b0c64: 52800013 mov w19, #0x0 // #0
ff3b0c68: 12806037 mov w23, #0xfffffcfe // #-770
ff3b0c6c: 6b1302bf cmp w21, w19
ff3b0c70: 54000a48 b.hi ff3b0db8 <dmc_resume+0x6ec> // b.pmore
ff3b0c74: a94153f3 ldp x19, x20, [sp, #16]
ff3b0c78: a9425bf5 ldp x21, x22, [sp, #32]
ff3b0c7c: a94363f7 ldp x23, x24, [sp, #48]
ff3b0c80: a9446bf9 ldp x25, x26, [sp, #64]
ff3b0c84: f9402bfb ldr x27, [sp, #80]
ff3b0c88: a8c67bfd ldp x29, x30, [sp], #96
ff3b0c8c: d65f03c0 ret
ff3b0c90: 710004a5 subs w5, w5, #0x1
ff3b0c94: 54ffdc20 b.eq ff3b0818 <dmc_resume+0x14c> // b.none
ff3b0c98: 52800c80 mov w0, #0x64 // #100
ff3b0c9c: 97fffd1b bl ff3b0108 <sram_udelay>
ff3b0ca0: 17ffff7e b ff3b0a98 <dmc_resume+0x3cc>
ff3b0ca4: 710004a5 subs w5, w5, #0x1
ff3b0ca8: 54ffdb80 b.eq ff3b0818 <dmc_resume+0x14c> // b.none
ff3b0cac: 52800c80 mov w0, #0x64 // #100
ff3b0cb0: 97fffd16 bl ff3b0108 <sram_udelay>
ff3b0cb4: b94000c0 ldr w0, [x6]
ff3b0cb8: 361fff60 tbz w0, #3, ff3b0ca4 <dmc_resume+0x5d8>
ff3b0cbc: d2902201 mov x1, #0x8110 // #33040
ff3b0cc0: b0000002 adrp x2, ff3b1000 <rk3399m0pmu_bin>
ff3b0cc4: f2bff501 movk x1, #0xffa8, lsl #16
ff3b0cc8: d2951c83 mov x3, #0xa8e4 // #43236
ff3b0ccc: 913ca042 add x2, x2, #0xf28
ff3b0cd0: f2bff503 movk x3, #0xffa8, lsl #16
ff3b0cd4: b9400020 ldr w0, [x1]
ff3b0cd8: 120f7800 and w0, w0, #0xfffeffff
ff3b0cdc: b9000020 str w0, [x1]
ff3b0ce0: d2941c80 mov x0, #0xa0e4 // #41188
ff3b0ce4: f2bff500 movk x0, #0xffa8, lsl #16
ff3b0ce8: b9400001 ldr w1, [x0]
ff3b0cec: b8404444 ldr w4, [x2], #4
ff3b0cf0: 12044c21 and w1, w1, #0xf000ffff
ff3b0cf4: 2a040021 orr w1, w1, w4
ff3b0cf8: b9000001 str w1, [x0]
ff3b0cfc: 91080000 add x0, x0, #0x200
ff3b0d00: eb03001f cmp x0, x3
ff3b0d04: 54ffff21 b.ne ff3b0ce8 <dmc_resume+0x61c> // b.any
ff3b0d08: 17ffff78 b ff3b0ae8 <dmc_resume+0x41c>
ff3b0d0c: 39413260 ldrb w0, [x19, #76]
ff3b0d10: 7100181f cmp w0, #0x6
ff3b0d14: 54000061 b.ne ff3b0d20 <dmc_resume+0x654> // b.any
ff3b0d18: 52800140 mov w0, #0xa // #10
ff3b0d1c: 97fffcfb bl ff3b0108 <sram_udelay>
ff3b0d20: 2a1a03e0 mov w0, w26
ff3b0d24: 97fffd2c bl ff3b01d4 <data_training.constprop.0>
ff3b0d28: 35ffd780 cbnz w0, ff3b0818 <dmc_resume+0x14c>
ff3b0d2c: 39401b20 ldrb w0, [x25, #6]
ff3b0d30: 39400721 ldrb w1, [x25, #1]
ff3b0d34: 39400b22 ldrb w2, [x25, #2]
ff3b0d38: 0b000021 add w1, w1, w0
ff3b0d3c: 39400324 ldrb w4, [x25]
ff3b0d40: 0b020021 add w1, w1, w2
ff3b0d44: 39400f22 ldrb w2, [x25, #3]
ff3b0d48: b9400b23 ldr w3, [x25, #8]
ff3b0d4c: 7100049f cmp w4, #0x1
ff3b0d50: 0b020021 add w1, w1, w2
ff3b0d54: 51005021 sub w1, w1, #0x14
ff3b0d58: 1ac122e2 lsl w2, w23, w1
ff3b0d5c: 540002a9 b.ls ff3b0db0 <dmc_resume+0x6e4> // b.plast
ff3b0d60: 39401f24 ldrb w4, [x25, #7]
ff3b0d64: 4b040000 sub w0, w0, w4
ff3b0d68: 1ac02440 lsr w0, w2, w0
ff3b0d6c: 39401724 ldrb w4, [x25, #5]
ff3b0d70: 340000a4 cbz w4, ff3b0d84 <dmc_resume+0x6b8>
ff3b0d74: 0b000400 add w0, w0, w0, lsl #1
ff3b0d78: 1ac12301 lsl w1, w24, w1
ff3b0d7c: 53027c22 lsr w2, w1, #2
ff3b0d80: 53027c00 lsr w0, w0, #2
ff3b0d84: 53057c00 lsr w0, w0, #5
ff3b0d88: 2a031863 orr w3, w3, w3, lsl #6
ff3b0d8c: d3453041 ubfx x1, x2, #5, #8
ff3b0d90: b9000363 str w3, [x27]
ff3b0d94: 53181c00 ubfiz w0, w0, #8, #8
ff3b0d98: 1100075a add w26, w26, #0x1
ff3b0d9c: 2a010000 orr w0, w0, w1
ff3b0da0: 91009339 add x25, x25, #0x24
ff3b0da4: b9000760 str w0, [x27, #4]
ff3b0da8: 9140237b add x27, x27, #0x8, lsl #12
ff3b0dac: 17ffff55 b ff3b0b00 <dmc_resume+0x434>
ff3b0db0: 52800000 mov w0, #0x0 // #0
ff3b0db4: 17ffffee b ff3b0d6c <dmc_resume+0x6a0>
ff3b0db8: 0b133ec1 add w1, w22, w19, lsl #15
ff3b0dbc: b9400020 ldr w0, [x1]
ff3b0dc0: 0a170000 and w0, w0, w23
ff3b0dc4: 2a140000 orr w0, w0, w20
ff3b0dc8: b9000020 str w0, [x1]
ff3b0dcc: 2a1303e0 mov w0, w19
ff3b0dd0: 97fffd01 bl ff3b01d4 <data_training.constprop.0>
ff3b0dd4: 35fff500 cbnz w0, ff3b0c74 <dmc_resume+0x5a8>
ff3b0dd8: 11000673 add w19, w19, #0x1
ff3b0ddc: 17ffffa4 b ff3b0c6c <dmc_resume+0x5a0>
00000000ff3b0de0 <__bl31_pmusram_text_end>:
...
00000000ff3b1000 <rk3399m0pmu_bin>:
ff3b1000: 00000240 00000135 00000131 00000131 @...5...1...1...
...
ff3b102c: 00000131 00000000 00000000 00000131 1...........1...
ff3b103c: 00000131 00000000 00000000 00000000 1...............
...
ff3b10e8: 681a4b0e d0fc2a00 4a0d2101 438b6813 .K.h.*...!.J.h.C
ff3b10f8: 4b0a6013 2a10681a 2102d9fc 68134a09 .`.K.h.*...!.J.h
ff3b1108: 6013430b 681a4b05 d9fc2a19 4a052102 .C.`.K.h.*...!.J
ff3b1118: 438b6813 bf306013 46c0e7fd 47310078 .h.C.`0....Fx.1G
ff3b1128: 47310020 47310024 46c0e7fe f7ffb510 .1G$.1G...F....
ff3b1138: bd10ffd7 00000000 00000000 00000000 ................
...
00000000ff3b1240 <pmu_slp_data>:
...
00000000ff3b1248 <sdram_config>:
...
00000000ff3b1f38 <cru_clksel_con6>:
ff3b1f38: 00000000 ....
00000000ff3b1f3c <dpll_data>:
...
Disassembly of section ro:
0000000000040000 <bl31_entrypoint>:
40000: aa0003f4 mov x20, x0
40004: aa0103f5 mov x21, x1
40008: aa0203f6 mov x22, x2
4000c: aa0303f7 mov x23, x3
40010: 1012bf80 adr x0, 65800 <sync_exception_sp_el0>
40014: d51ec000 msr vbar_el3, x0
40018: d5033fdf isb
4001c: 94008101 bl 60420 <reset_handler>
40020: d2820141 mov x1, #0x100a // #4106
40024: d53e1000 mrs x0, sctlr_el3
40028: aa010000 orr x0, x0, x1
4002c: d51e1000 msr sctlr_el3, x0
40030: d5033fdf isb
40034: 940080f0 bl 603f4 <init_cpu_data_ptr>
40038: d2804700 mov x0, #0x238 // #568
4003c: d51e1100 msr scr_el3, x0
40040: d2900000 mov x0, #0x8000 // #32768
40044: f2a01020 movk x0, #0x81, lsl #16
40048: d51e1320 msr mdcr_el3, x0
4004c: d2801c00 mov x0, #0xe0 // #224
40050: d51b9c00 msr pmcr_el0, x0
40054: d50344ff msr daifclr, #0x4
40058: d2800000 mov x0, #0x0 // #0
4005c: d51e1140 msr cptr_el3, x0
40060: d5380400 mrs x0, id_aa64pfr0_el1
40064: d370cc00 ubfx x0, x0, #48, #4
40068: f100041f cmp x0, #0x1
4006c: 54000061 b.ne 40078 <bl31_entrypoint+0x78> // b.any
40070: d2a02000 mov x0, #0x1000000 // #16777216
40074: d51b42a0 msr dit, x0
40078: f0000120 adrp x0, 67000 <__RO_END__>
4007c: 91000000 add x0, x0, #0x0
40080: f00002a1 adrp x1, 97000 <__BL31_END__>
40084: 91000021 add x1, x1, #0x0
40088: cb000021 sub x1, x1, x0
4008c: 94008245 bl 609a0 <inv_dcache_range>
40090: d0000140 adrp x0, 6a000 <__STACKS_START__+0x2f80>
40094: 91020000 add x0, x0, #0x80
40098: b0000201 adrp x1, 81000 <store_sram+0x2377>
4009c: 91345421 add x1, x1, #0xd15
400a0: cb000021 sub x1, x1, x0
400a4: 9400828c bl 60ad4 <zeromem>
400a8: d00002a0 adrp x0, 96000 <rockchip_pd_lock>
400ac: 91000000 add x0, x0, #0x0
400b0: d00002a1 adrp x1, 96000 <rockchip_pd_lock>
400b4: 91048021 add x1, x1, #0x120
400b8: cb000021 sub x1, x1, x0
400bc: 94008286 bl 60ad4 <zeromem>
400c0: d50040bf msr spsel, #0x0
400c4: 940080c8 bl 603e4 <plat_set_my_stack>
400c8: aa1403e0 mov x0, x20
400cc: aa1503e1 mov x1, x21
400d0: aa1603e2 mov x2, x22
400d4: aa1703e3 mov x3, x23
400d8: 94006f0d bl 5bd0c <bl31_setup>
400dc: 94006f47 bl 5bdf8 <bl31_main>
400e0: f0000120 adrp x0, 67000 <__RO_END__>
400e4: 91000000 add x0, x0, #0x0
400e8: f0000121 adrp x1, 67000 <__RO_END__>
400ec: 9101c821 add x1, x1, #0x72
400f0: cb000021 sub x1, x1, x0
400f4: 9400821d bl 60968 <clean_dcache_range>
400f8: d0000140 adrp x0, 6a000 <__STACKS_START__+0x2f80>
400fc: 91020000 add x0, x0, #0x80
40100: b0000201 adrp x1, 81000 <store_sram+0x2377>
40104: 91345421 add x1, x1, #0xd15
40108: cb000021 sub x1, x1, x0
4010c: 94008217 bl 60968 <clean_dcache_range>
40110: 140081b8 b 607f0 <el3_exit>
40114: 00000000 .inst 0x00000000 ; undefined
40118: 14000008 b 40138 <bl31_warm_entrypoint>
4011c: d503201f nop
0000000000040120 <__sram_func_set_ddrctl_pll_veneer>:
40120: b07fc410 adrp x16, ff8c1000 <__sram_incbin_end>
40124: 91000210 add x16, x16, #0x0
40128: d61f0200 br x16
...
0000000000040138 <bl31_warm_entrypoint>:
40138: 1012b640 adr x0, 65800 <sync_exception_sp_el0>
4013c: d51ec000 msr vbar_el3, x0
40140: d5033fdf isb
40144: 940080b7 bl 60420 <reset_handler>
40148: d2820141 mov x1, #0x100a // #4106
4014c: d53e1000 mrs x0, sctlr_el3
40150: aa010000 orr x0, x0, x1
40154: d51e1000 msr sctlr_el3, x0
40158: d5033fdf isb
4015c: 940080a6 bl 603f4 <init_cpu_data_ptr>
40160: d2804700 mov x0, #0x238 // #568
40164: d51e1100 msr scr_el3, x0
40168: d2900000 mov x0, #0x8000 // #32768
4016c: f2a01020 movk x0, #0x81, lsl #16
40170: d51e1320 msr mdcr_el3, x0
40174: d2801c00 mov x0, #0xe0 // #224
40178: d51b9c00 msr pmcr_el0, x0
4017c: d50344ff msr daifclr, #0x4
40180: d2800000 mov x0, #0x0 // #0
40184: d51e1140 msr cptr_el3, x0
40188: d5380400 mrs x0, id_aa64pfr0_el1
4018c: d370cc00 ubfx x0, x0, #48, #4
40190: f100041f cmp x0, #0x1
40194: 54000061 b.ne 401a0 <bl31_warm_entrypoint+0x68> // b.any
40198: d2a02000 mov x0, #0x1000000 // #16777216
4019c: d51b42a0 msr dit, x0
401a0: d50040bf msr spsel, #0x0
401a4: 94008090 bl 603e4 <plat_set_my_stack>
401a8: d2800020 mov x0, #0x1 // #1
401ac: 94008292 bl 60bf4 <bl31_plat_enable_mmu>
401b0: 9400753e bl 5d6a8 <psci_warmboot_entrypoint>
401b4: 1400818f b 607f0 <el3_exit>
...
0000000000050000 <platform_cpu_warmboot>:
50000: d53800a0 mrs x0, mpidr_el1
50004: 92401c13 and x19, x0, #0xff
50008: 92781c14 and x20, x0, #0xff00
5000c: aa1403e0 mov x0, x20
50010: 10230844 adr x4, 96118 <clst_warmboot_data>
50014: d346fc05 lsr x5, x0, #6
50018: b8656883 ldr w3, [x4, x5]
5001c: b825689f str wzr, [x4, x5]
50020: 7102947f cmp w3, #0xa5
50024: 540000a1 b.ne 50038 <clst_warmboot_end> // b.any
50028: 18000246 ldr w6, 50070 <boot_entry+0x10>
5002c: 58000267 ldr x7, 50078 <boot_entry+0x18>
50030: d343fc02 lsr x2, x0, #3
50034: b82268e6 str w6, [x7, x2]
0000000000050038 <clst_warmboot_end>:
50038: 8b541a75 add x21, x19, x20, lsr #6
5003c: 10230624 adr x4, 96100 <cpuson_flags>
50040: 8b150884 add x4, x4, x21, lsl #2
50044: b9400081 ldr w1, [x4]
50048: 7103c03f cmp w1, #0xf0
5004c: 540000a0 b.eq 50060 <boot_entry> // b.none
50050: 713c003f cmp w1, #0xf00
50054: 54000060 b.eq 50060 <boot_entry> // b.none
0000000000050058 <wfe_loop>:
50058: d503205f wfe
5005c: 17ffffff b 50058 <wfe_loop>
0000000000050060 <boot_entry>:
50060: b900009f str wzr, [x4]
50064: 10230365 adr x5, 960d0 <cpuson_entry_point>
50068: f87578a2 ldr x2, [x5, x21, lsl #3]
5006c: d61f0040 br x2
50070: 03000100 .word 0x03000100
50074: 00000000 .inst 0x00000000 ; undefined
50078: ff76000c .word 0xff76000c
5007c: 00000000 .word 0x00000000
0000000000050080 <gicd_read_igroupr>:
50080: 53057c21 lsr w1, w1, #5
50084: 91020000 add x0, x0, #0x80
50088: d37e6821 ubfiz x1, x1, #2, #27
5008c: b8606820 ldr w0, [x1, x0]
50090: d65f03c0 ret
0000000000050094 <gicd_read_isenabler>:
50094: 53057c21 lsr w1, w1, #5
50098: 91040000 add x0, x0, #0x100
5009c: d37e6821 ubfiz x1, x1, #2, #27
500a0: b8606820 ldr w0, [x1, x0]
500a4: d65f03c0 ret
00000000000500a8 <gicd_read_ispendr>:
500a8: 53057c21 lsr w1, w1, #5
500ac: 91080000 add x0, x0, #0x200
500b0: d37e6821 ubfiz x1, x1, #2, #27
500b4: b8606820 ldr w0, [x1, x0]
500b8: d65f03c0 ret
00000000000500bc <gicd_read_isactiver>:
500bc: 53057c21 lsr w1, w1, #5
500c0: 910c0000 add x0, x0, #0x300
500c4: d37e6821 ubfiz x1, x1, #2, #27
500c8: b8606820 ldr w0, [x1, x0]
500cc: d65f03c0 ret
00000000000500d0 <gicd_read_ipriorityr>:
500d0: 927e7421 and x1, x1, #0xfffffffc
500d4: 91100000 add x0, x0, #0x400
500d8: b8606820 ldr w0, [x1, x0]
500dc: d65f03c0 ret
00000000000500e0 <gicd_read_icfgr>:
500e0: 53047c21 lsr w1, w1, #4
500e4: 91300000 add x0, x0, #0xc00
500e8: d37e6c21 ubfiz x1, x1, #2, #28
500ec: b8606820 ldr w0, [x1, x0]
500f0: d65f03c0 ret
00000000000500f4 <gicd_read_nsacr>:
500f4: 53047c21 lsr w1, w1, #4
500f8: 91380000 add x0, x0, #0xe00
500fc: d37e6c21 ubfiz x1, x1, #2, #28
50100: b8606820 ldr w0, [x1, x0]
50104: d65f03c0 ret
0000000000050108 <gicd_write_igroupr>:
50108: 53057c21 lsr w1, w1, #5
5010c: 91020000 add x0, x0, #0x80
50110: d37e6821 ubfiz x1, x1, #2, #27
50114: b8206822 str w2, [x1, x0]
50118: d65f03c0 ret
000000000005011c <gicd_write_isenabler>:
5011c: 53057c21 lsr w1, w1, #5
50120: 91040000 add x0, x0, #0x100
50124: d37e6821 ubfiz x1, x1, #2, #27
50128: b8206822 str w2, [x1, x0]
5012c: d65f03c0 ret
0000000000050130 <gicd_write_ispendr>:
50130: 53057c21 lsr w1, w1, #5
50134: 91080000 add x0, x0, #0x200
50138: d37e6821 ubfiz x1, x1, #2, #27
5013c: b8206822 str w2, [x1, x0]
50140: d65f03c0 ret
0000000000050144 <gicd_write_isactiver>:
50144: 53057c21 lsr w1, w1, #5
50148: 910c0000 add x0, x0, #0x300
5014c: d37e6821 ubfiz x1, x1, #2, #27
50150: b8206822 str w2, [x1, x0]
50154: d65f03c0 ret
0000000000050158 <gicd_write_ipriorityr>:
50158: 927e7421 and x1, x1, #0xfffffffc
5015c: 91100000 add x0, x0, #0x400
50160: b8206822 str w2, [x1, x0]
50164: d65f03c0 ret
0000000000050168 <gicd_write_icfgr>:
50168: 53047c21 lsr w1, w1, #4
5016c: 91300000 add x0, x0, #0xc00
50170: d37e6c21 ubfiz x1, x1, #2, #28
50174: b8206822 str w2, [x1, x0]
50178: d65f03c0 ret
000000000005017c <gicd_write_nsacr>:
5017c: 53047c21 lsr w1, w1, #4
50180: 91380000 add x0, x0, #0xe00
50184: d37e6c21 ubfiz x1, x1, #2, #28
50188: b8206822 str w2, [x1, x0]
5018c: d65f03c0 ret
0000000000050190 <gicd_clr_igroupr>:
50190: 2a0103e3 mov w3, w1
50194: aa0003e4 mov x4, x0
50198: a9bf7bfd stp x29, x30, [sp, #-16]!
5019c: 910003fd mov x29, sp
501a0: 97ffffb8 bl 50080 <gicd_read_igroupr>
501a4: a8c17bfd ldp x29, x30, [sp], #16
501a8: 52800021 mov w1, #0x1 // #1
501ac: 1ac32021 lsl w1, w1, w3
501b0: 0a210002 bic w2, w0, w1
501b4: 2a0303e1 mov w1, w3
501b8: aa0403e0 mov x0, x4
501bc: 17ffffd3 b 50108 <gicd_write_igroupr>
00000000000501c0 <gicd_set_isenabler>:
501c0: 52800022 mov w2, #0x1 // #1
501c4: 1ac12042 lsl w2, w2, w1
501c8: 17ffffd5 b 5011c <gicd_write_isenabler>
00000000000501cc <gicd_set_ipriorityr>:
501cc: 91100000 add x0, x0, #0x400
501d0: 2a0103e1 mov w1, w1
501d4: 12001c42 and w2, w2, #0xff
501d8: 38216802 strb w2, [x0, x1]
501dc: d65f03c0 ret
00000000000501e0 <gicd_set_icfgr>:
501e0: 531f0c26 ubfiz w6, w1, #1, #4
501e4: aa0003e5 mov x5, x0
501e8: 2a0103e4 mov w4, w1
501ec: a9bf7bfd stp x29, x30, [sp, #-16]!
501f0: 910003fd mov x29, sp
501f4: 97ffffbb bl 500e0 <gicd_read_icfgr>
501f8: 12000442 and w2, w2, #0x3
501fc: a8c17bfd ldp x29, x30, [sp], #16
50200: 52800063 mov w3, #0x3 // #3
50204: 1ac62063 lsl w3, w3, w6
50208: 0a230003 bic w3, w0, w3
5020c: 1ac62042 lsl w2, w2, w6
50210: 2a0403e1 mov w1, w4
50214: 2a030042 orr w2, w2, w3
50218: aa0503e0 mov x0, x5
5021c: 17ffffd3 b 50168 <gicd_write_icfgr>
0000000000050220 <arm_gicv3_distif_pre_save>:
50220: a9bf7bfd stp x29, x30, [sp, #-16]!
50224: f00000c1 adrp x1, 6b000 <psci_ns_context+0xc60>
50228: 910003fd mov x29, sp
5022c: f9403021 ldr x1, [x1, #96]
50230: b50000e1 cbnz x1, 5024c <arm_gicv3_distif_pre_save+0x2c>
50234: d0000082 adrp x2, 62000 <vprintf+0x400>
50238: 911a8042 add x2, x2, #0x6a0
5023c: 52800401 mov w1, #0x20 // #32
50240: d0000080 adrp x0, 62000 <vprintf+0x400>
50244: 911ac800 add x0, x0, #0x6b2
50248: 940045f9 bl 61a2c <__assert>
5024c: f9401022 ldr x2, [x1, #32]
50250: b40001c2 cbz x2, 50288 <arm_gicv3_distif_pre_save+0x68>
50254: b9401c24 ldr w4, [x1, #28]
50258: d2800001 mov x1, #0x0 // #0
5025c: 6b01009f cmp w4, w1
50260: 540001c8 b.hi 50298 <arm_gicv3_distif_pre_save+0x78> // b.pmore
50264: f8605840 ldr x0, [x2, w0, uxtw #3]
50268: 91005002 add x2, x0, #0x14
5026c: b9401401 ldr w1, [x0, #20]
50270: 32000021 orr w1, w1, #0x1
50274: b9001401 str w1, [x0, #20]
50278: b9400040 ldr w0, [x2]
5027c: 36ffffe0 tbz w0, #31, 50278 <arm_gicv3_distif_pre_save+0x58>
50280: a8c17bfd ldp x29, x30, [sp], #16
50284: d65f03c0 ret
50288: d0000082 adrp x2, 62000 <vprintf+0x400>
5028c: 52800421 mov w1, #0x21 // #33
50290: 911b6042 add x2, x2, #0x6d8
50294: 17ffffeb b 50240 <arm_gicv3_distif_pre_save+0x20>
50298: f8617843 ldr x3, [x2, x1, lsl #3]
5029c: b50000a3 cbnz x3, 502b0 <arm_gicv3_distif_pre_save+0x90>
502a0: d0000082 adrp x2, 62000 <vprintf+0x400>
502a4: 52800541 mov w1, #0x2a // #42
502a8: 911bf842 add x2, x2, #0x6fe
502ac: 17ffffe5 b 50240 <arm_gicv3_distif_pre_save+0x20>
502b0: b9401465 ldr w5, [x3, #20]
502b4: 371000a5 tbnz w5, #2, 502c8 <arm_gicv3_distif_pre_save+0xa8>
502b8: d0000082 adrp x2, 62000 <vprintf+0x400>
502bc: 52800561 mov w1, #0x2b // #43
502c0: 911c2042 add x2, x2, #0x708
502c4: 17ffffdf b 50240 <arm_gicv3_distif_pre_save+0x20>
502c8: b9401463 ldr w3, [x3, #20]
502cc: 91000421 add x1, x1, #0x1
502d0: 370ffc63 tbnz w3, #1, 5025c <arm_gicv3_distif_pre_save+0x3c>
502d4: d0000082 adrp x2, 62000 <vprintf+0x400>
502d8: 52800581 mov w1, #0x2c // #44
502dc: 911cc842 add x2, x2, #0x732
502e0: 17ffffd8 b 50240 <arm_gicv3_distif_pre_save+0x20>
00000000000502e4 <arm_gicv3_distif_post_restore>:
502e4: a9bf7bfd stp x29, x30, [sp, #-16]!
502e8: f00000c1 adrp x1, 6b000 <psci_ns_context+0xc60>
502ec: 910003fd mov x29, sp
502f0: f9403021 ldr x1, [x1, #96]
502f4: b50000e1 cbnz x1, 50310 <arm_gicv3_distif_post_restore+0x2c>
502f8: d0000082 adrp x2, 62000 <vprintf+0x400>
502fc: 911a8042 add x2, x2, #0x6a0
50300: 52800981 mov w1, #0x4c // #76
50304: d0000080 adrp x0, 62000 <vprintf+0x400>
50308: 911ac800 add x0, x0, #0x6b2
5030c: 940045c8 bl 61a2c <__assert>
50310: f9401021 ldr x1, [x1, #32]
50314: b50000a1 cbnz x1, 50328 <arm_gicv3_distif_post_restore+0x44>
50318: d0000082 adrp x2, 62000 <vprintf+0x400>
5031c: 528009a1 mov w1, #0x4d // #77
50320: 911b6042 add x2, x2, #0x6d8
50324: 17fffff8 b 50304 <arm_gicv3_distif_post_restore+0x20>
50328: f8605820 ldr x0, [x1, w0, uxtw #3]
5032c: b50000a0 cbnz x0, 50340 <arm_gicv3_distif_post_restore+0x5c>
50330: d0000082 adrp x2, 62000 <vprintf+0x400>
50334: 52800aa1 mov w1, #0x55 // #85
50338: 911bf842 add x2, x2, #0x6fe
5033c: 17fffff2 b 50304 <arm_gicv3_distif_post_restore+0x20>
50340: b9401401 ldr w1, [x0, #20]
50344: 91005002 add x2, x0, #0x14
50348: 36000181 tbz w1, #0, 50378 <arm_gicv3_distif_post_restore+0x94>
5034c: b9401401 ldr w1, [x0, #20]
50350: 37f800a1 tbnz w1, #31, 50364 <arm_gicv3_distif_post_restore+0x80>
50354: d0000082 adrp x2, 62000 <vprintf+0x400>
50358: 52800cc1 mov w1, #0x66 // #102
5035c: 911d7042 add x2, x2, #0x75c
50360: 17ffffe9 b 50304 <arm_gicv3_distif_post_restore+0x20>
50364: b9401401 ldr w1, [x0, #20]
50368: 121f7821 and w1, w1, #0xfffffffe
5036c: b9001401 str w1, [x0, #20]
50370: b9400040 ldr w0, [x2]
50374: 37ffffe0 tbnz w0, #31, 50370 <arm_gicv3_distif_post_restore+0x8c>
50378: a8c17bfd ldp x29, x30, [sp], #16
5037c: d65f03c0 ret
0000000000050380 <gicv3_distif_pre_save>:
50380: 17ffffa8 b 50220 <arm_gicv3_distif_pre_save>
0000000000050384 <gicv3_distif_post_restore>:
50384: 17ffffd8 b 502e4 <arm_gicv3_distif_post_restore>
0000000000050388 <gicr_wait_for_pending_write>:
50388: b9400001 ldr w1, [x0]
5038c: 371fffe1 tbnz w1, #3, 50388 <gicr_wait_for_pending_write>
50390: d65f03c0 ret
0000000000050394 <gicv3_driver_init>:
50394: a9bd7bfd stp x29, x30, [sp, #-48]!
50398: 910003fd mov x29, sp
5039c: a90153f3 stp x19, x20, [sp, #16]
503a0: f90013f5 str x21, [sp, #32]
503a4: b50000e0 cbnz x0, 503c0 <gicv3_driver_init+0x2c>
503a8: d0000082 adrp x2, 62000 <vprintf+0x400>
503ac: 911e2c42 add x2, x2, #0x78b
503b0: 52800801 mov w1, #0x40 // #64
503b4: d0000080 adrp x0, 62000 <vprintf+0x400>
503b8: 911e9000 add x0, x0, #0x7a4
503bc: 9400459c bl 61a2c <__assert>
503c0: f9400002 ldr x2, [x0]
503c4: aa0003f3 mov x19, x0
503c8: b50000a2 cbnz x2, 503dc <gicv3_driver_init+0x48>
503cc: d0000082 adrp x2, 62000 <vprintf+0x400>
503d0: 52800821 mov w1, #0x41 // #65
503d4: 911f1042 add x2, x2, #0x7c4
503d8: 17fffff7 b 503b4 <gicv3_driver_init+0x20>
503dc: b9401c01 ldr w1, [x0, #28]
503e0: 350000a1 cbnz w1, 503f4 <gicv3_driver_init+0x60>
503e4: d0000082 adrp x2, 62000 <vprintf+0x400>
503e8: 52800841 mov w1, #0x42 // #66
503ec: 911f9842 add x2, x2, #0x7e6
503f0: 17fffff1 b 503b4 <gicv3_driver_init+0x20>
503f4: f9401000 ldr x0, [x0, #32]
503f8: b50000a0 cbnz x0, 5040c <gicv3_driver_init+0x78>
503fc: d0000082 adrp x2, 62000 <vprintf+0x400>
50400: 52800861 mov w1, #0x43 // #67
50404: 91202842 add x2, x2, #0x80a
50408: 17ffffeb b 503b4 <gicv3_driver_init+0x20>
5040c: d5384243 mrs x3, currentel
50410: d3420c63 ubfx x3, x3, #2, #2
50414: f1000c7f cmp x3, #0x3
50418: 540000a0 b.eq 5042c <gicv3_driver_init+0x98> // b.none
5041c: d0000082 adrp x2, 62000 <vprintf+0x400>
50420: 528008a1 mov w1, #0x45 // #69
50424: 9120dc42 add x2, x2, #0x837
50428: 17ffffe3 b 503b4 <gicv3_driver_init+0x20>
5042c: b9401a63 ldr w3, [x19, #24]
50430: 340000e3 cbz w3, 5044c <gicv3_driver_init+0xb8>
50434: f9400a63 ldr x3, [x19, #16]
50438: b50000a3 cbnz x3, 5044c <gicv3_driver_init+0xb8>
5043c: d0000082 adrp x2, 62000 <vprintf+0x400>
50440: 528008e1 mov w1, #0x47 // #71
50444: 91210c42 add x2, x2, #0x843
50448: 17ffffdb b 503b4 <gicv3_driver_init+0x20>
5044c: d5380403 mrs x3, id_aa64pfr0_el1
50450: f2680c7f tst x3, #0xf000000
50454: 540000a1 b.ne 50468 <gicv3_driver_init+0xd4> // b.any
50458: d0000082 adrp x2, 62000 <vprintf+0x400>
5045c: 528009e1 mov w1, #0x4f // #79
50460: 91228c42 add x2, x2, #0x8a3
50464: 17ffffd4 b 503b4 <gicv3_driver_init+0x20>
50468: d29ffd03 mov x3, #0xffe8 // #65512
5046c: b8636843 ldr w3, [x2, x3]
50470: d3441c63 ubfx x3, x3, #4, #4
50474: 71000c7f cmp w3, #0x3
50478: 540000a0 b.eq 5048c <gicv3_driver_init+0xf8> // b.none
5047c: d0000082 adrp x2, 62000 <vprintf+0x400>
50480: 52800ae1 mov w1, #0x57 // #87
50484: 9123d042 add x2, x2, #0x8f4
50488: 17ffffcb b 503b4 <gicv3_driver_init+0x20>
5048c: b9400054 ldr w20, [x2]
50490: f9400662 ldr x2, [x19, #8]
50494: d3441294 ubfx x20, x20, #4, #1
50498: b40000e2 cbz x2, 504b4 <gicv3_driver_init+0x120>
5049c: f9401663 ldr x3, [x19, #40]
504a0: 9400038f bl 512dc <gicv3_rdistif_base_addrs_probe>
504a4: f9401260 ldr x0, [x19, #32]
504a8: b9401e61 ldr w1, [x19, #28]
504ac: d37df021 lsl x1, x1, #3
504b0: 94004120 bl 60930 <flush_dcache_range>
504b4: f00000d5 adrp x21, 6b000 <psci_ns_context+0xc60>
504b8: d2800101 mov x1, #0x8 // #8
504bc: 910182a0 add x0, x21, #0x60
504c0: f90032b3 str x19, [x21, #96]
504c4: 9400411b bl 60930 <flush_dcache_range>
504c8: f94032a0 ldr x0, [x21, #96]
504cc: d2800601 mov x1, #0x30 // #48
504d0: 94004118 bl 60930 <flush_dcache_range>
504d4: 7100029f cmp w20, #0x0
504d8: d0000080 adrp x0, 62000 <vprintf+0x400>
504dc: a94153f3 ldp x19, x20, [sp, #16]
504e0: 911e1c00 add x0, x0, #0x787
504e4: f94013f5 ldr x21, [sp, #32]
504e8: f0000081 adrp x1, 63000 <CSWTCH.22+0x37e>
504ec: a8c37bfd ldp x29, x30, [sp], #48
504f0: 911f7821 add x1, x1, #0x7de
504f4: 9a800021 csel x1, x1, x0, eq // eq = none
504f8: d0000080 adrp x0, 62000 <vprintf+0x400>
504fc: 91244800 add x0, x0, #0x912
50500: 140038e1 b 5e884 <tf_log>
0000000000050504 <gicv3_distif_init>:
50504: a9be7bfd stp x29, x30, [sp, #-32]!
50508: 910003fd mov x29, sp
5050c: f9000bf3 str x19, [sp, #16]
50510: f00000d3 adrp x19, 6b000 <psci_ns_context+0xc60>
50514: f9403260 ldr x0, [x19, #96]
50518: b50000e0 cbnz x0, 50534 <gicv3_distif_init+0x30>
5051c: d0000082 adrp x2, 62000 <vprintf+0x400>
50520: 91257842 add x2, x2, #0x95e
50524: 52801261 mov w1, #0x93 // #147
50528: d0000080 adrp x0, 62000 <vprintf+0x400>
5052c: 911e9000 add x0, x0, #0x7a4
50530: 9400453f bl 61a2c <__assert>
50534: f9400000 ldr x0, [x0]
50538: b50000a0 cbnz x0, 5054c <gicv3_distif_init+0x48>
5053c: d0000082 adrp x2, 62000 <vprintf+0x400>
50540: 52801281 mov w1, #0x94 // #148
50544: 9125e042 add x2, x2, #0x978
50548: 17fffff8 b 50528 <gicv3_distif_init+0x24>
5054c: d5384241 mrs x1, currentel
50550: d3420c21 ubfx x1, x1, #2, #2
50554: f1000c3f cmp x1, #0x3
50558: 540000a0 b.eq 5056c <gicv3_distif_init+0x68> // b.none
5055c: d0000082 adrp x2, 62000 <vprintf+0x400>
50560: 528012c1 mov w1, #0x96 // #150
50564: 9120dc42 add x2, x2, #0x837
50568: 17fffff0 b 50528 <gicv3_distif_init+0x24>
5056c: b9400001 ldr w1, [x0]
50570: 121d7021 and w1, w1, #0xfffffff8
50574: b9000001 str w1, [x0]
50578: b9400001 ldr w1, [x0]
5057c: 37ffffe1 tbnz w1, #31, 50578 <gicv3_distif_init+0x74>
50580: b9400001 ldr w1, [x0]
50584: 321c0421 orr w1, w1, #0x30
50588: b9000001 str w1, [x0]
5058c: b9400001 ldr w1, [x0]
50590: 37ffffe1 tbnz w1, #31, 5058c <gicv3_distif_init+0x88>
50594: 94000374 bl 51364 <gicv3_spis_config_defaults>
50598: f9403260 ldr x0, [x19, #96]
5059c: b9401802 ldr w2, [x0, #24]
505a0: f9400801 ldr x1, [x0, #16]
505a4: f9400000 ldr x0, [x0]
505a8: 94000396 bl 51400 <gicv3_secure_spis_config_props>
505ac: f9403261 ldr x1, [x19, #96]
505b0: f9400021 ldr x1, [x1]
505b4: b9400022 ldr w2, [x1]
505b8: 2a020000 orr w0, w0, w2
505bc: b9000020 str w0, [x1]
505c0: b9400020 ldr w0, [x1]
505c4: 37ffffe0 tbnz w0, #31, 505c0 <gicv3_distif_init+0xbc>
505c8: f9400bf3 ldr x19, [sp, #16]
505cc: a8c27bfd ldp x29, x30, [sp], #32
505d0: d65f03c0 ret
00000000000505d4 <gicv3_rdistif_on>:
505d4: d65f03c0 ret
00000000000505d8 <gicv3_rdistif_init>:
505d8: a9bd7bfd stp x29, x30, [sp, #-48]!
505dc: 910003fd mov x29, sp
505e0: a90153f3 stp x19, x20, [sp, #16]
505e4: f00000d3 adrp x19, 6b000 <psci_ns_context+0xc60>
505e8: f9403261 ldr x1, [x19, #96]
505ec: f90013f5 str x21, [sp, #32]
505f0: b50000e1 cbnz x1, 5060c <gicv3_rdistif_init+0x34>
505f4: d0000082 adrp x2, 62000 <vprintf+0x400>
505f8: 91257842 add x2, x2, #0x95e
505fc: 528017c1 mov w1, #0xbe // #190
50600: d0000080 adrp x0, 62000 <vprintf+0x400>
50604: 911e9000 add x0, x0, #0x7a4
50608: 94004509 bl 61a2c <__assert>
5060c: b9401c22 ldr w2, [x1, #28]
50610: 2a0003f4 mov w20, w0
50614: 6b00005f cmp w2, w0
50618: 540000a8 b.hi 5062c <gicv3_rdistif_init+0x54> // b.pmore
5061c: d0000082 adrp x2, 62000 <vprintf+0x400>
50620: 528017e1 mov w1, #0xbf // #191
50624: 91266c42 add x2, x2, #0x99b
50628: 17fffff6 b 50600 <gicv3_rdistif_init+0x28>
5062c: f9401022 ldr x2, [x1, #32]
50630: b50000a2 cbnz x2, 50644 <gicv3_rdistif_init+0x6c>
50634: d0000082 adrp x2, 62000 <vprintf+0x400>
50638: 52801801 mov w1, #0xc0 // #192
5063c: 91271442 add x2, x2, #0x9c5
50640: 17fffff0 b 50600 <gicv3_rdistif_init+0x28>
50644: f9400021 ldr x1, [x1]
50648: b50000a1 cbnz x1, 5065c <gicv3_rdistif_init+0x84>
5064c: d0000082 adrp x2, 62000 <vprintf+0x400>
50650: 52801821 mov w1, #0xc1 // #193
50654: 9125e042 add x2, x2, #0x978
50658: 17ffffea b 50600 <gicv3_rdistif_init+0x28>
5065c: b9400035 ldr w21, [x1]
50660: 372000b5 tbnz w21, #4, 50674 <gicv3_rdistif_init+0x9c>
50664: d0000082 adrp x2, 62000 <vprintf+0x400>
50668: 52801881 mov w1, #0xc4 // #196
5066c: 9127cc42 add x2, x2, #0x9f3
50670: 17ffffe4 b 50600 <gicv3_rdistif_init+0x28>
50674: d5384241 mrs x1, currentel
50678: d3420c21 ubfx x1, x1, #2, #2
5067c: f1000c3f cmp x1, #0x3
50680: 540000a0 b.eq 50694 <gicv3_rdistif_init+0xbc> // b.none
50684: d0000082 adrp x2, 62000 <vprintf+0x400>
50688: 528018c1 mov w1, #0xc6 // #198
5068c: 9120dc42 add x2, x2, #0x837
50690: 17ffffdc b 50600 <gicv3_rdistif_init+0x28>
50694: 97ffffd0 bl 505d4 <gicv3_rdistif_on>
50698: f9403260 ldr x0, [x19, #96]
5069c: f9401000 ldr x0, [x0, #32]
506a0: f8745814 ldr x20, [x0, w20, uxtw #3]
506a4: b50000b4 cbnz x20, 506b8 <gicv3_rdistif_init+0xe0>
506a8: d0000082 adrp x2, 62000 <vprintf+0x400>
506ac: 52801981 mov w1, #0xcc // #204
506b0: 91284442 add x2, x2, #0xa11
506b4: 17ffffd3 b 50600 <gicv3_rdistif_init+0x28>
506b8: aa1403e0 mov x0, x20
506bc: 940003a0 bl 5153c <gicv3_ppi_sgi_config_defaults>
506c0: f9403260 ldr x0, [x19, #96]
506c4: b9401802 ldr w2, [x0, #24]
506c8: f9400801 ldr x1, [x0, #16]
506cc: aa1403e0 mov x0, x20
506d0: 940003b1 bl 51594 <gicv3_secure_ppi_sgi_config_props>
506d4: 6a35001f bics wzr, w0, w21
506d8: 54000100 b.eq 506f8 <gicv3_rdistif_init+0x120> // b.none
506dc: f9403261 ldr x1, [x19, #96]
506e0: f9400021 ldr x1, [x1]
506e4: b9400022 ldr w2, [x1]
506e8: 2a020000 orr w0, w0, w2
506ec: b9000020 str w0, [x1]
506f0: b9400020 ldr w0, [x1]
506f4: 37ffffe0 tbnz w0, #31, 506f0 <gicv3_rdistif_init+0x118>
506f8: a94153f3 ldp x19, x20, [sp, #16]
506fc: f94013f5 ldr x21, [sp, #32]
50700: a8c37bfd ldp x29, x30, [sp], #48
50704: d65f03c0 ret
0000000000050708 <gicv3_cpuif_enable>:
50708: a9bf7bfd stp x29, x30, [sp, #-16]!
5070c: f00000c1 adrp x1, 6b000 <psci_ns_context+0xc60>
50710: 910003fd mov x29, sp
50714: f9403021 ldr x1, [x1, #96]
50718: b50000e1 cbnz x1, 50734 <gicv3_cpuif_enable+0x2c>
5071c: d0000082 adrp x2, 62000 <vprintf+0x400>
50720: 91257842 add x2, x2, #0x95e
50724: 52801e21 mov w1, #0xf1 // #241
50728: d0000080 adrp x0, 62000 <vprintf+0x400>
5072c: 911e9000 add x0, x0, #0x7a4
50730: 940044bf bl 61a2c <__assert>
50734: b9401c22 ldr w2, [x1, #28]
50738: 6b00005f cmp w2, w0
5073c: 540000a8 b.hi 50750 <gicv3_cpuif_enable+0x48> // b.pmore
50740: d0000082 adrp x2, 62000 <vprintf+0x400>
50744: 52801e41 mov w1, #0xf2 // #242
50748: 91266c42 add x2, x2, #0x99b
5074c: 17fffff7 b 50728 <gicv3_cpuif_enable+0x20>
50750: f9401022 ldr x2, [x1, #32]
50754: b50000a2 cbnz x2, 50768 <gicv3_cpuif_enable+0x60>
50758: d0000082 adrp x2, 62000 <vprintf+0x400>
5075c: 52801e61 mov w1, #0xf3 // #243
50760: 91271442 add x2, x2, #0x9c5
50764: 17fffff1 b 50728 <gicv3_cpuif_enable+0x20>
50768: d5384241 mrs x1, currentel
5076c: d3420c21 ubfx x1, x1, #2, #2
50770: f1000c3f cmp x1, #0x3
50774: 540000a0 b.eq 50788 <gicv3_cpuif_enable+0x80> // b.none
50778: d0000082 adrp x2, 62000 <vprintf+0x400>
5077c: 52801e81 mov w1, #0xf4 // #244
50780: 9120dc42 add x2, x2, #0x837
50784: 17ffffe9 b 50728 <gicv3_cpuif_enable+0x20>
50788: f8605840 ldr x0, [x2, w0, uxtw #3]
5078c: 940002bc bl 5127c <gicv3_rdistif_mark_core_awake>
50790: d53ecca0 mrs x0, s3_6_c12_c12_5
50794: b2400c00 orr x0, x0, #0xf
50798: d51ecca0 msr s3_6_c12_c12_5, x0
5079c: d53e1100 mrs x0, scr_el3
507a0: b2400001 orr x1, x0, #0x1
507a4: d51e1101 msr scr_el3, x1
507a8: d5033fdf isb
507ac: d53cc9a1 mrs x1, s3_4_c12_c9_5
507b0: b2400c21 orr x1, x1, #0xf
507b4: d51cc9a1 msr s3_4_c12_c9_5, x1
507b8: d2800021 mov x1, #0x1 // #1
507bc: d518cca1 msr s3_0_c12_c12_5, x1
507c0: d5033fdf isb
507c4: 927f7800 and x0, x0, #0xfffffffe
507c8: d51e1100 msr scr_el3, x0
507cc: d5033fdf isb
507d0: d518cca1 msr s3_0_c12_c12_5, x1
507d4: d5033fdf isb
507d8: d2801fe0 mov x0, #0xff // #255
507dc: d5184600 msr s3_0_c4_c6_0, x0
507e0: d518ccc1 msr s3_0_c12_c12_6, x1
507e4: d53ecce0 mrs x0, s3_6_c12_c12_7
507e8: b27f0000 orr x0, x0, #0x2
507ec: d51ecce0 msr s3_6_c12_c12_7, x0
507f0: d5033fdf isb
507f4: a8c17bfd ldp x29, x30, [sp], #16
507f8: d65f03c0 ret
00000000000507fc <gicv3_cpuif_disable>:
507fc: a9bf7bfd stp x29, x30, [sp, #-16]!
50800: f00000c2 adrp x2, 6b000 <psci_ns_context+0xc60>
50804: 910003fd mov x29, sp
50808: f9403041 ldr x1, [x2, #96]
5080c: b50000e1 cbnz x1, 50828 <gicv3_cpuif_disable+0x2c>
50810: d0000082 adrp x2, 62000 <vprintf+0x400>
50814: 91257842 add x2, x2, #0x95e
50818: 528025c1 mov w1, #0x12e // #302
5081c: d0000080 adrp x0, 62000 <vprintf+0x400>
50820: 911e9000 add x0, x0, #0x7a4
50824: 94004482 bl 61a2c <__assert>
50828: b9401c23 ldr w3, [x1, #28]
5082c: 6b00007f cmp w3, w0
50830: 540000a8 b.hi 50844 <gicv3_cpuif_disable+0x48> // b.pmore
50834: d0000082 adrp x2, 62000 <vprintf+0x400>
50838: 528025e1 mov w1, #0x12f // #303
5083c: 91266c42 add x2, x2, #0x99b
50840: 17fffff7 b 5081c <gicv3_cpuif_disable+0x20>
50844: f9401021 ldr x1, [x1, #32]
50848: b50000a1 cbnz x1, 5085c <gicv3_cpuif_disable+0x60>
5084c: d0000082 adrp x2, 62000 <vprintf+0x400>
50850: 52802601 mov w1, #0x130 // #304
50854: 91271442 add x2, x2, #0x9c5
50858: 17fffff1 b 5081c <gicv3_cpuif_disable+0x20>
5085c: d5384241 mrs x1, currentel
50860: d3420c21 ubfx x1, x1, #2, #2
50864: f1000c3f cmp x1, #0x3
50868: 540000a0 b.eq 5087c <gicv3_cpuif_disable+0x80> // b.none
5086c: d0000082 adrp x2, 62000 <vprintf+0x400>
50870: 52802641 mov w1, #0x132 // #306
50874: 9120dc42 add x2, x2, #0x837
50878: 17ffffe9 b 5081c <gicv3_cpuif_disable+0x20>
5087c: d53ecca1 mrs x1, s3_6_c12_c12_5
50880: b27f0421 orr x1, x1, #0x6
50884: d51ecca1 msr s3_6_c12_c12_5, x1
50888: d538ccc1 mrs x1, s3_0_c12_c12_6
5088c: 927f7821 and x1, x1, #0xfffffffe
50890: d518ccc1 msr s3_0_c12_c12_6, x1
50894: d53ecce1 mrs x1, s3_6_c12_c12_7
50898: 927e7421 and x1, x1, #0xfffffffc
5089c: d51ecce1 msr s3_6_c12_c12_7, x1
508a0: d5033fdf isb
508a4: f9403041 ldr x1, [x2, #96]
508a8: f9401021 ldr x1, [x1, #32]
508ac: f8605820 ldr x0, [x1, w0, uxtw #3]
508b0: b50000a0 cbnz x0, 508c4 <gicv3_cpuif_disable+0xc8>
508b4: d0000082 adrp x2, 62000 <vprintf+0x400>
508b8: 528028c1 mov w1, #0x146 // #326
508bc: 91284442 add x2, x2, #0xa11
508c0: 17ffffd7 b 5081c <gicv3_cpuif_disable+0x20>
508c4: a8c17bfd ldp x29, x30, [sp], #16
508c8: 1400027e b 512c0 <gicv3_rdistif_mark_core_asleep>
00000000000508cc <gicv3_get_pending_interrupt_type>:
508cc: d5384240 mrs x0, currentel
508d0: d3420c00 ubfx x0, x0, #2, #2
508d4: f1000c1f cmp x0, #0x3
508d8: 54000120 b.eq 508fc <gicv3_get_pending_interrupt_type+0x30> // b.none
508dc: a9bf7bfd stp x29, x30, [sp, #-16]!
508e0: d0000082 adrp x2, 62000 <vprintf+0x400>
508e4: d0000080 adrp x0, 62000 <vprintf+0x400>
508e8: 910003fd mov x29, sp
508ec: 9120dc42 add x2, x2, #0x837
508f0: 911e9000 add x0, x0, #0x7a4
508f4: 52802d41 mov w1, #0x16a // #362
508f8: 9400444d bl 61a2c <__assert>
508fc: d538c840 mrs x0, s3_0_c12_c8_2
50900: 12005c00 and w0, w0, #0xffffff
50904: d65f03c0 ret
0000000000050908 <gicv3_rdistif_save>:
50908: a9bd7bfd stp x29, x30, [sp, #-48]!
5090c: 910003fd mov x29, sp
50910: a9025bf5 stp x21, x22, [sp, #32]
50914: 2a0003f5 mov w21, w0
50918: f00000c0 adrp x0, 6b000 <psci_ns_context+0xc60>
5091c: a90153f3 stp x19, x20, [sp, #16]
50920: f9403000 ldr x0, [x0, #96]
50924: b50000e0 cbnz x0, 50940 <gicv3_rdistif_save+0x38>
50928: d0000082 adrp x2, 62000 <vprintf+0x400>
5092c: 91257842 add x2, x2, #0x95e
50930: 52803e01 mov w1, #0x1f0 // #496
50934: d0000080 adrp x0, 62000 <vprintf+0x400>
50938: 911e9000 add x0, x0, #0x7a4
5093c: 9400443c bl 61a2c <__assert>
50940: aa0103f3 mov x19, x1
50944: b9401c01 ldr w1, [x0, #28]
50948: 6b15003f cmp w1, w21
5094c: 540000a8 b.hi 50960 <gicv3_rdistif_save+0x58> // b.pmore
50950: d0000082 adrp x2, 62000 <vprintf+0x400>
50954: 52803e21 mov w1, #0x1f1 // #497
50958: 91266c42 add x2, x2, #0x99b
5095c: 17fffff6 b 50934 <gicv3_rdistif_save+0x2c>
50960: f9401001 ldr x1, [x0, #32]
50964: b50000a1 cbnz x1, 50978 <gicv3_rdistif_save+0x70>
50968: d0000082 adrp x2, 62000 <vprintf+0x400>
5096c: 52803e41 mov w1, #0x1f2 // #498
50970: 91271442 add x2, x2, #0x9c5
50974: 17fffff0 b 50934 <gicv3_rdistif_save+0x2c>
50978: d5384240 mrs x0, currentel
5097c: d3420c00 ubfx x0, x0, #2, #2
50980: f1000c1f cmp x0, #0x3
50984: 540000a0 b.eq 50998 <gicv3_rdistif_save+0x90> // b.none
50988: d0000082 adrp x2, 62000 <vprintf+0x400>
5098c: 52803e61 mov w1, #0x1f3 // #499
50990: 9120dc42 add x2, x2, #0x837
50994: 17ffffe8 b 50934 <gicv3_rdistif_save+0x2c>
50998: b50000b3 cbnz x19, 509ac <gicv3_rdistif_save+0xa4>
5099c: d0000082 adrp x2, 62000 <vprintf+0x400>
509a0: 52803e81 mov w1, #0x1f4 // #500
509a4: 91288442 add x2, x2, #0xa21
509a8: 17ffffe3 b 50934 <gicv3_rdistif_save+0x2c>
509ac: f8755834 ldr x20, [x1, w21, uxtw #3]
509b0: 52800016 mov w22, #0x0 // #0
509b4: aa1403e0 mov x0, x20
509b8: 97fffe74 bl 50388 <gicr_wait_for_pending_write>
509bc: b9400280 ldr w0, [x20]
509c0: b9001260 str w0, [x19, #16]
509c4: f9403a80 ldr x0, [x20, #112]
509c8: f9000260 str x0, [x19]
509cc: f9403e80 ldr x0, [x20, #120]
509d0: f9000660 str x0, [x19, #8]
509d4: d2801000 mov x0, #0x80 // #128
509d8: f2a00020 movk x0, #0x1, lsl #16
509dc: b8606a80 ldr w0, [x20, x0]
509e0: b9001660 str w0, [x19, #20]
509e4: d2802000 mov x0, #0x100 // #256
509e8: f2a00020 movk x0, #0x1, lsl #16
509ec: b8606a80 ldr w0, [x20, x0]
509f0: b9001a60 str w0, [x19, #24]
509f4: d2804000 mov x0, #0x200 // #512
509f8: f2a00020 movk x0, #0x1, lsl #16
509fc: b8606a80 ldr w0, [x20, x0]
50a00: b9001e60 str w0, [x19, #28]
50a04: d2806000 mov x0, #0x300 // #768
50a08: f2a00020 movk x0, #0x1, lsl #16
50a0c: b8606a80 ldr w0, [x20, x0]
50a10: b9002260 str w0, [x19, #32]
50a14: d2818000 mov x0, #0xc00 // #3072
50a18: f2a00020 movk x0, #0x1, lsl #16
50a1c: b8606a80 ldr w0, [x20, x0]
50a20: b9004660 str w0, [x19, #68]
50a24: d2818080 mov x0, #0xc04 // #3076
50a28: f2a00020 movk x0, #0x1, lsl #16
50a2c: b8606a80 ldr w0, [x20, x0]
50a30: b9004a60 str w0, [x19, #72]
50a34: d281a000 mov x0, #0xd00 // #3328
50a38: f2a00020 movk x0, #0x1, lsl #16
50a3c: b8606a80 ldr w0, [x20, x0]
50a40: b9004e60 str w0, [x19, #76]
50a44: d281c000 mov x0, #0xe00 // #3584
50a48: f2a00020 movk x0, #0x1, lsl #16
50a4c: b8606a80 ldr w0, [x20, x0]
50a50: b9005260 str w0, [x19, #80]
50a54: 2a1603e1 mov w1, w22
50a58: aa1403e0 mov x0, x20
50a5c: 940001d4 bl 511ac <gicr_read_ipriorityr>
50a60: 927e76c1 and x1, x22, #0xfffffffc
50a64: 110012d6 add w22, w22, #0x4
50a68: 8b010261 add x1, x19, x1
50a6c: 710082df cmp w22, #0x20
50a70: b9002420 str w0, [x1, #36]
50a74: 54ffff01 b.ne 50a54 <gicv3_rdistif_save+0x14c> // b.any
50a78: 2a1503e0 mov w0, w21
50a7c: a94153f3 ldp x19, x20, [sp, #16]
50a80: a9425bf5 ldp x21, x22, [sp, #32]
50a84: a8c37bfd ldp x29, x30, [sp], #48
50a88: 17fffe3e b 50380 <gicv3_distif_pre_save>
0000000000050a8c <gicv3_rdistif_init_restore>:
50a8c: a9bd7bfd stp x29, x30, [sp, #-48]!
50a90: 910003fd mov x29, sp
50a94: a90153f3 stp x19, x20, [sp, #16]
50a98: aa0103f4 mov x20, x1
50a9c: f00000c1 adrp x1, 6b000 <psci_ns_context+0xc60>
50aa0: f90013f5 str x21, [sp, #32]
50aa4: f9403021 ldr x1, [x1, #96]
50aa8: b50000e1 cbnz x1, 50ac4 <gicv3_rdistif_init_restore+0x38>
50aac: d0000082 adrp x2, 62000 <vprintf+0x400>
50ab0: 91257842 add x2, x2, #0x95e
50ab4: 528044e1 mov w1, #0x227 // #551
50ab8: d0000080 adrp x0, 62000 <vprintf+0x400>
50abc: 911e9000 add x0, x0, #0x7a4
50ac0: 940043db bl 61a2c <__assert>
50ac4: b9401c22 ldr w2, [x1, #28]
50ac8: 2a0003f5 mov w21, w0
50acc: 6b00005f cmp w2, w0
50ad0: 540000a8 b.hi 50ae4 <gicv3_rdistif_init_restore+0x58> // b.pmore
50ad4: d0000082 adrp x2, 62000 <vprintf+0x400>
50ad8: 52804501 mov w1, #0x228 // #552
50adc: 91266c42 add x2, x2, #0x99b
50ae0: 17fffff6 b 50ab8 <gicv3_rdistif_init_restore+0x2c>
50ae4: f9401022 ldr x2, [x1, #32]
50ae8: b50000a2 cbnz x2, 50afc <gicv3_rdistif_init_restore+0x70>
50aec: d0000082 adrp x2, 62000 <vprintf+0x400>
50af0: 52804521 mov w1, #0x229 // #553
50af4: 91271442 add x2, x2, #0x9c5
50af8: 17fffff0 b 50ab8 <gicv3_rdistif_init_restore+0x2c>
50afc: d5384241 mrs x1, currentel
50b00: d3420c21 ubfx x1, x1, #2, #2
50b04: f1000c3f cmp x1, #0x3
50b08: 540000a0 b.eq 50b1c <gicv3_rdistif_init_restore+0x90> // b.none
50b0c: d0000082 adrp x2, 62000 <vprintf+0x400>
50b10: 52804541 mov w1, #0x22a // #554
50b14: 9120dc42 add x2, x2, #0x837
50b18: 17ffffe8 b 50ab8 <gicv3_rdistif_init_restore+0x2c>
50b1c: b50000b4 cbnz x20, 50b30 <gicv3_rdistif_init_restore+0xa4>
50b20: d0000082 adrp x2, 62000 <vprintf+0x400>
50b24: 52804561 mov w1, #0x22b // #555
50b28: 91288442 add x2, x2, #0xa21
50b2c: 17ffffe3 b 50ab8 <gicv3_rdistif_init_restore+0x2c>
50b30: f8755853 ldr x19, [x2, w21, uxtw #3]
50b34: 97fffea8 bl 505d4 <gicv3_rdistif_on>
50b38: 2a1503e0 mov w0, w21
50b3c: 97fffe12 bl 50384 <gicv3_distif_post_restore>
50b40: d2803000 mov x0, #0x180 // #384
50b44: 12800001 mov w1, #0xffffffff // #-1
50b48: f2a00020 movk x0, #0x1, lsl #16
50b4c: 52800015 mov w21, #0x0 // #0
50b50: b8206a61 str w1, [x19, x0]
50b54: aa1303e0 mov x0, x19
50b58: 97fffe0c bl 50388 <gicr_wait_for_pending_write>
50b5c: b9401280 ldr w0, [x20, #16]
50b60: 121f7800 and w0, w0, #0xfffffffe
50b64: b9000260 str w0, [x19]
50b68: f9400280 ldr x0, [x20]
50b6c: b9401681 ldr w1, [x20, #20]
50b70: f9003a60 str x0, [x19, #112]
50b74: f9400680 ldr x0, [x20, #8]
50b78: f9003e60 str x0, [x19, #120]
50b7c: d2801000 mov x0, #0x80 // #128
50b80: f2a00020 movk x0, #0x1, lsl #16
50b84: b8206a61 str w1, [x19, x0]
50b88: 927e76a0 and x0, x21, #0xfffffffc
50b8c: 2a1503e1 mov w1, w21
50b90: 8b000280 add x0, x20, x0
50b94: 110012b5 add w21, w21, #0x4
50b98: b9402402 ldr w2, [x0, #36]
50b9c: aa1303e0 mov x0, x19
50ba0: 94000188 bl 511c0 <gicr_write_ipriorityr>
50ba4: 710082bf cmp w21, #0x20
50ba8: 54ffff01 b.ne 50b88 <gicv3_rdistif_init_restore+0xfc> // b.any
50bac: d2818000 mov x0, #0xc00 // #3072
50bb0: b9404681 ldr w1, [x20, #68]
50bb4: f2a00020 movk x0, #0x1, lsl #16
50bb8: b8206a61 str w1, [x19, x0]
50bbc: 91001000 add x0, x0, #0x4
50bc0: b9404a81 ldr w1, [x20, #72]
50bc4: b8206a61 str w1, [x19, x0]
50bc8: 9103f000 add x0, x0, #0xfc
50bcc: b9404e81 ldr w1, [x20, #76]
50bd0: b8206a61 str w1, [x19, x0]
50bd4: 91040000 add x0, x0, #0x100
50bd8: b9405281 ldr w1, [x20, #80]
50bdc: b8206a61 str w1, [x19, x0]
50be0: d2804000 mov x0, #0x200 // #512
50be4: f2a00020 movk x0, #0x1, lsl #16
50be8: b9401e81 ldr w1, [x20, #28]
50bec: b8206a61 str w1, [x19, x0]
50bf0: 91040000 add x0, x0, #0x100
50bf4: b9402281 ldr w1, [x20, #32]
50bf8: b8206a61 str w1, [x19, x0]
50bfc: b9400260 ldr w0, [x19]
50c00: 37ffffe0 tbnz w0, #31, 50bfc <gicv3_rdistif_init_restore+0x170>
50c04: d2802000 mov x0, #0x100 // #256
50c08: b9401a81 ldr w1, [x20, #24]
50c0c: f2a00020 movk x0, #0x1, lsl #16
50c10: f94013f5 ldr x21, [sp, #32]
50c14: b8206a61 str w1, [x19, x0]
50c18: b9401280 ldr w0, [x20, #16]
50c1c: b9000260 str w0, [x19]
50c20: aa1303e0 mov x0, x19
50c24: a94153f3 ldp x19, x20, [sp, #16]
50c28: a8c37bfd ldp x29, x30, [sp], #48
50c2c: 17fffdd7 b 50388 <gicr_wait_for_pending_write>
0000000000050c30 <gicv3_distif_save>:
50c30: a9bd7bfd stp x29, x30, [sp, #-48]!
50c34: 910003fd mov x29, sp
50c38: a9025bf5 stp x21, x22, [sp, #32]
50c3c: aa0003f5 mov x21, x0
50c40: f00000c0 adrp x0, 6b000 <psci_ns_context+0xc60>
50c44: a90153f3 stp x19, x20, [sp, #16]
50c48: f9403000 ldr x0, [x0, #96]
50c4c: b50000e0 cbnz x0, 50c68 <gicv3_distif_save+0x38>
50c50: d0000082 adrp x2, 62000 <vprintf+0x400>
50c54: 91257842 add x2, x2, #0x95e
50c58: 52804f01 mov w1, #0x278 // #632
50c5c: d0000080 adrp x0, 62000 <vprintf+0x400>
50c60: 911e9000 add x0, x0, #0x7a4
50c64: 94004372 bl 61a2c <__assert>
50c68: f9400014 ldr x20, [x0]
50c6c: b50000b4 cbnz x20, 50c80 <gicv3_distif_save+0x50>
50c70: d0000082 adrp x2, 62000 <vprintf+0x400>
50c74: 52804f21 mov w1, #0x279 // #633
50c78: 9125e042 add x2, x2, #0x978
50c7c: 17fffff8 b 50c5c <gicv3_distif_save+0x2c>
50c80: d5384240 mrs x0, currentel
50c84: d3420c00 ubfx x0, x0, #2, #2
50c88: f1000c1f cmp x0, #0x3
50c8c: 540000a0 b.eq 50ca0 <gicv3_distif_save+0x70> // b.none
50c90: d0000082 adrp x2, 62000 <vprintf+0x400>
50c94: 52804f41 mov w1, #0x27a // #634
50c98: 9120dc42 add x2, x2, #0x837
50c9c: 17fffff0 b 50c5c <gicv3_distif_save+0x2c>
50ca0: b50000b5 cbnz x21, 50cb4 <gicv3_distif_save+0x84>
50ca4: d0000082 adrp x2, 62000 <vprintf+0x400>
50ca8: 52804f61 mov w1, #0x27b // #635
50cac: 91288842 add x2, x2, #0xa22
50cb0: 17ffffeb b 50c5c <gicv3_distif_save+0x2c>
50cb4: b9400693 ldr w19, [x20, #4]
50cb8: 52807f80 mov w0, #0x3fc // #1020
50cbc: 531b1273 ubfiz w19, w19, #5, #5
50cc0: 11008273 add w19, w19, #0x20
50cc4: 710ff27f cmp w19, #0x3fc
50cc8: 1a809273 csel w19, w19, w0, ls // ls = plast
50ccc: b9400280 ldr w0, [x20]
50cd0: 37ffffe0 tbnz w0, #31, 50ccc <gicv3_distif_save+0x9c>
50cd4: b9400280 ldr w0, [x20]
50cd8: 52800416 mov w22, #0x20 // #32
50cdc: b91ee2a0 str w0, [x21, #7904]
50ce0: 6b16027f cmp w19, w22
50ce4: 54000428 b.hi 50d68 <gicv3_distif_save+0x138> // b.pmore
50ce8: 52800416 mov w22, #0x20 // #32
50cec: 6b16027f cmp w19, w22
50cf0: 540004e8 b.hi 50d8c <gicv3_distif_save+0x15c> // b.pmore
50cf4: 52800416 mov w22, #0x20 // #32
50cf8: 6b16027f cmp w19, w22
50cfc: 540005a8 b.hi 50db0 <gicv3_distif_save+0x180> // b.pmore
50d00: 52800416 mov w22, #0x20 // #32
50d04: 6b16027f cmp w19, w22
50d08: 54000668 b.hi 50dd4 <gicv3_distif_save+0x1a4> // b.pmore
50d0c: 52800416 mov w22, #0x20 // #32
50d10: 6b16027f cmp w19, w22
50d14: 54000728 b.hi 50df8 <gicv3_distif_save+0x1c8> // b.pmore
50d18: 52800416 mov w22, #0x20 // #32
50d1c: 6b16027f cmp w19, w22
50d20: 540007e8 b.hi 50e1c <gicv3_distif_save+0x1ec> // b.pmore
50d24: 52800416 mov w22, #0x20 // #32
50d28: 6b16027f cmp w19, w22
50d2c: 540008a8 b.hi 50e40 <gicv3_distif_save+0x210> // b.pmore
50d30: 52800416 mov w22, #0x20 // #32
50d34: 6b16027f cmp w19, w22
50d38: 54000968 b.hi 50e64 <gicv3_distif_save+0x234> // b.pmore
50d3c: 92801fe0 mov x0, #0xffffffffffffff00 // #-256
50d40: d28c2001 mov x1, #0x6100 // #24832
50d44: 8b010294 add x20, x20, x1
50d48: 8b334c13 add x19, x0, w19, uxtw #3
50d4c: d2800000 mov x0, #0x0 // #0
50d50: eb00027f cmp x19, x0
50d54: 540009a1 b.ne 50e88 <gicv3_distif_save+0x258> // b.any
50d58: a94153f3 ldp x19, x20, [sp, #16]
50d5c: a9425bf5 ldp x21, x22, [sp, #32]
50d60: a8c37bfd ldp x29, x30, [sp], #48
50d64: d65f03c0 ret
50d68: 2a1603e1 mov w1, w22
50d6c: aa1403e0 mov x0, x20
50d70: 97fffcc4 bl 50080 <gicd_read_igroupr>
50d74: 510082c1 sub w1, w22, #0x20
50d78: 110082d6 add w22, w22, #0x20
50d7c: 53057c21 lsr w1, w1, #5
50d80: 8b010aa1 add x1, x21, x1, lsl #2
50d84: b91ee420 str w0, [x1, #7908]
50d88: 17ffffd6 b 50ce0 <gicv3_distif_save+0xb0>
50d8c: 2a1603e1 mov w1, w22
50d90: aa1403e0 mov x0, x20
50d94: 97fffcc0 bl 50094 <gicd_read_isenabler>
50d98: 510082c1 sub w1, w22, #0x20
50d9c: 110082d6 add w22, w22, #0x20
50da0: 53057c21 lsr w1, w1, #5
50da4: 911f6021 add x1, x1, #0x7d8
50da8: b8217aa0 str w0, [x21, x1, lsl #2]
50dac: 17ffffd0 b 50cec <gicv3_distif_save+0xbc>
50db0: 2a1603e1 mov w1, w22
50db4: aa1403e0 mov x0, x20
50db8: 97fffcbc bl 500a8 <gicd_read_ispendr>
50dbc: 510082c1 sub w1, w22, #0x20
50dc0: 110082d6 add w22, w22, #0x20
50dc4: 53057c21 lsr w1, w1, #5
50dc8: 8b010aa1 add x1, x21, x1, lsl #2
50dcc: b91fdc20 str w0, [x1, #8156]
50dd0: 17ffffca b 50cf8 <gicv3_distif_save+0xc8>
50dd4: 2a1603e1 mov w1, w22
50dd8: aa1403e0 mov x0, x20
50ddc: 97fffcb8 bl 500bc <gicd_read_isactiver>
50de0: 510082c1 sub w1, w22, #0x20
50de4: 110082d6 add w22, w22, #0x20
50de8: 53057c21 lsr w1, w1, #5
50dec: 8b010aa1 add x1, x21, x1, lsl #2
50df0: b9205820 str w0, [x1, #8280]
50df4: 17ffffc4 b 50d04 <gicv3_distif_save+0xd4>
50df8: 2a1603e1 mov w1, w22
50dfc: aa1403e0 mov x0, x20
50e00: 97fffcb4 bl 500d0 <gicd_read_ipriorityr>
50e04: 510082c1 sub w1, w22, #0x20
50e08: 110012d6 add w22, w22, #0x4
50e0c: 927e7421 and x1, x1, #0xfffffffc
50e10: 8b0102a1 add x1, x21, x1
50e14: b920d420 str w0, [x1, #8404]
50e18: 17ffffbe b 50d10 <gicv3_distif_save+0xe0>
50e1c: 2a1603e1 mov w1, w22
50e20: aa1403e0 mov x0, x20
50e24: 97fffcaf bl 500e0 <gicd_read_icfgr>
50e28: 510082c1 sub w1, w22, #0x20
50e2c: 110042d6 add w22, w22, #0x10
50e30: 53047c21 lsr w1, w1, #4
50e34: 9124b021 add x1, x1, #0x92c
50e38: b8217aa0 str w0, [x21, x1, lsl #2]
50e3c: 17ffffb8 b 50d1c <gicv3_distif_save+0xec>
50e40: 2a1603e1 mov w1, w22
50e44: aa1403e0 mov x0, x20
50e48: 940000b7 bl 51124 <gicd_read_igrpmodr>
50e4c: 510082c1 sub w1, w22, #0x20
50e50: 110082d6 add w22, w22, #0x20
50e54: 53057c21 lsr w1, w1, #5
50e58: 8b010aa1 add x1, x21, x1, lsl #2
50e5c: b925a820 str w0, [x1, #9640]
50e60: 17ffffb2 b 50d28 <gicv3_distif_save+0xf8>
50e64: 2a1603e1 mov w1, w22
50e68: aa1403e0 mov x0, x20
50e6c: 97fffca2 bl 500f4 <gicd_read_nsacr>
50e70: 510082c1 sub w1, w22, #0x20
50e74: 110042d6 add w22, w22, #0x10
50e78: 53047c21 lsr w1, w1, #4
50e7c: 8b010aa1 add x1, x21, x1, lsl #2
50e80: b9262420 str w0, [x1, #9764]
50e84: 17ffffac b 50d34 <gicv3_distif_save+0x104>
50e88: f8606a81 ldr x1, [x20, x0]
50e8c: f8206aa1 str x1, [x21, x0]
50e90: 91002000 add x0, x0, #0x8
50e94: 17ffffaf b 50d50 <gicv3_distif_save+0x120>
0000000000050e98 <gicv3_distif_init_restore>:
50e98: a9bd7bfd stp x29, x30, [sp, #-48]!
50e9c: 910003fd mov x29, sp
50ea0: a9025bf5 stp x21, x22, [sp, #32]
50ea4: aa0003f5 mov x21, x0
50ea8: f00000c0 adrp x0, 6b000 <psci_ns_context+0xc60>
50eac: a90153f3 stp x19, x20, [sp, #16]
50eb0: f9403000 ldr x0, [x0, #96]
50eb4: b50000e0 cbnz x0, 50ed0 <gicv3_distif_init_restore+0x38>
50eb8: d0000082 adrp x2, 62000 <vprintf+0x400>
50ebc: 91257842 add x2, x2, #0x95e
50ec0: 52805741 mov w1, #0x2ba // #698
50ec4: d0000080 adrp x0, 62000 <vprintf+0x400>
50ec8: 911e9000 add x0, x0, #0x7a4
50ecc: 940042d8 bl 61a2c <__assert>
50ed0: f9400013 ldr x19, [x0]
50ed4: b50000b3 cbnz x19, 50ee8 <gicv3_distif_init_restore+0x50>
50ed8: d0000082 adrp x2, 62000 <vprintf+0x400>
50edc: 52805761 mov w1, #0x2bb // #699
50ee0: 9125e042 add x2, x2, #0x978
50ee4: 17fffff8 b 50ec4 <gicv3_distif_init_restore+0x2c>
50ee8: d5384240 mrs x0, currentel
50eec: d3420c00 ubfx x0, x0, #2, #2
50ef0: f1000c1f cmp x0, #0x3
50ef4: 540000a0 b.eq 50f08 <gicv3_distif_init_restore+0x70> // b.none
50ef8: d0000082 adrp x2, 62000 <vprintf+0x400>
50efc: 52805781 mov w1, #0x2bc // #700
50f00: 9120dc42 add x2, x2, #0x837
50f04: 17fffff0 b 50ec4 <gicv3_distif_init_restore+0x2c>
50f08: b50000b5 cbnz x21, 50f1c <gicv3_distif_init_restore+0x84>
50f0c: d0000082 adrp x2, 62000 <vprintf+0x400>
50f10: 528057a1 mov w1, #0x2bd // #701
50f14: 91288842 add x2, x2, #0xa22
50f18: 17ffffeb b 50ec4 <gicv3_distif_init_restore+0x2c>
50f1c: b9400260 ldr w0, [x19]
50f20: 121d7000 and w0, w0, #0xfffffff8
50f24: b9000260 str w0, [x19]
50f28: b9400260 ldr w0, [x19]
50f2c: 37ffffe0 tbnz w0, #31, 50f28 <gicv3_distif_init_restore+0x90>
50f30: b9400260 ldr w0, [x19]
50f34: 321c0400 orr w0, w0, #0x30
50f38: b9000260 str w0, [x19]
50f3c: b9400260 ldr w0, [x19]
50f40: 37ffffe0 tbnz w0, #31, 50f3c <gicv3_distif_init_restore+0xa4>
50f44: b9400674 ldr w20, [x19, #4]
50f48: 52807f80 mov w0, #0x3fc // #1020
50f4c: 52800416 mov w22, #0x20 // #32
50f50: 531b1294 ubfiz w20, w20, #5, #5
50f54: 11008294 add w20, w20, #0x20
50f58: 710ff29f cmp w20, #0x3fc
50f5c: 1a809294 csel w20, w20, w0, ls // ls = plast
50f60: 6b16029f cmp w20, w22
50f64: 54000488 b.hi 50ff4 <gicv3_distif_init_restore+0x15c> // b.pmore
50f68: 52800416 mov w22, #0x20 // #32
50f6c: 6b16029f cmp w20, w22
50f70: 54000548 b.hi 51018 <gicv3_distif_init_restore+0x180> // b.pmore
50f74: 52800416 mov w22, #0x20 // #32
50f78: 6b16029f cmp w20, w22
50f7c: 54000608 b.hi 5103c <gicv3_distif_init_restore+0x1a4> // b.pmore
50f80: 52800416 mov w22, #0x20 // #32
50f84: 6b16029f cmp w20, w22
50f88: 540006c8 b.hi 51060 <gicv3_distif_init_restore+0x1c8> // b.pmore
50f8c: 52800416 mov w22, #0x20 // #32
50f90: 6b16029f cmp w20, w22
50f94: 54000788 b.hi 51084 <gicv3_distif_init_restore+0x1ec> // b.pmore
50f98: d28c2000 mov x0, #0x6100 // #24832
50f9c: 8b000261 add x1, x19, x0
50fa0: d2800000 mov x0, #0x0 // #0
50fa4: 11008002 add w2, w0, #0x20
50fa8: 6b02029f cmp w20, w2
50fac: 540007e8 b.hi 510a8 <gicv3_distif_init_restore+0x210> // b.pmore
50fb0: 52800416 mov w22, #0x20 // #32
50fb4: 6b16029f cmp w20, w22
50fb8: 54000808 b.hi 510b8 <gicv3_distif_init_restore+0x220> // b.pmore
50fbc: 52800416 mov w22, #0x20 // #32
50fc0: 6b16029f cmp w20, w22
50fc4: 540008c8 b.hi 510dc <gicv3_distif_init_restore+0x244> // b.pmore
50fc8: 52800416 mov w22, #0x20 // #32
50fcc: 6b16029f cmp w20, w22
50fd0: 54000988 b.hi 51100 <gicv3_distif_init_restore+0x268> // b.pmore
50fd4: b95ee2a0 ldr w0, [x21, #7904]
50fd8: b9000260 str w0, [x19]
50fdc: b9400260 ldr w0, [x19]
50fe0: 37ffffe0 tbnz w0, #31, 50fdc <gicv3_distif_init_restore+0x144>
50fe4: a94153f3 ldp x19, x20, [sp, #16]
50fe8: a9425bf5 ldp x21, x22, [sp, #32]
50fec: a8c37bfd ldp x29, x30, [sp], #48
50ff0: d65f03c0 ret
50ff4: 510082c0 sub w0, w22, #0x20
50ff8: 2a1603e1 mov w1, w22
50ffc: 110082d6 add w22, w22, #0x20
51000: 53057c00 lsr w0, w0, #5
51004: 8b000aa0 add x0, x21, x0, lsl #2
51008: b95ee402 ldr w2, [x0, #7908]
5100c: aa1303e0 mov x0, x19
51010: 97fffc3e bl 50108 <gicd_write_igroupr>
51014: 17ffffd3 b 50f60 <gicv3_distif_init_restore+0xc8>
51018: 510082c0 sub w0, w22, #0x20
5101c: 2a1603e1 mov w1, w22
51020: 927e7400 and x0, x0, #0xfffffffc
51024: 110012d6 add w22, w22, #0x4
51028: 8b0002a0 add x0, x21, x0
5102c: b960d402 ldr w2, [x0, #8404]
51030: aa1303e0 mov x0, x19
51034: 97fffc49 bl 50158 <gicd_write_ipriorityr>
51038: 17ffffcd b 50f6c <gicv3_distif_init_restore+0xd4>
5103c: 510082c0 sub w0, w22, #0x20
51040: 2a1603e1 mov w1, w22
51044: 110042d6 add w22, w22, #0x10
51048: 53047c00 lsr w0, w0, #4
5104c: 9124b000 add x0, x0, #0x92c
51050: b8607aa2 ldr w2, [x21, x0, lsl #2]
51054: aa1303e0 mov x0, x19
51058: 97fffc44 bl 50168 <gicd_write_icfgr>
5105c: 17ffffc7 b 50f78 <gicv3_distif_init_restore+0xe0>
51060: 510082c0 sub w0, w22, #0x20
51064: 2a1603e1 mov w1, w22
51068: 110082d6 add w22, w22, #0x20
5106c: 53057c00 lsr w0, w0, #5
51070: 8b000aa0 add x0, x21, x0, lsl #2
51074: b965a802 ldr w2, [x0, #9640]
51078: aa1303e0 mov x0, x19
5107c: 9400002f bl 51138 <gicd_write_igrpmodr>
51080: 17ffffc1 b 50f84 <gicv3_distif_init_restore+0xec>
51084: 510082c0 sub w0, w22, #0x20
51088: 2a1603e1 mov w1, w22
5108c: 110042d6 add w22, w22, #0x10
51090: 53047c00 lsr w0, w0, #4
51094: 8b000aa0 add x0, x21, x0, lsl #2
51098: b9662402 ldr w2, [x0, #9764]
5109c: aa1303e0 mov x0, x19
510a0: 97fffc37 bl 5017c <gicd_write_nsacr>
510a4: 17ffffbb b 50f90 <gicv3_distif_init_restore+0xf8>
510a8: f8607aa2 ldr x2, [x21, x0, lsl #3]
510ac: 91000400 add x0, x0, #0x1
510b0: f8008422 str x2, [x1], #8
510b4: 17ffffbc b 50fa4 <gicv3_distif_init_restore+0x10c>
510b8: 510082c0 sub w0, w22, #0x20
510bc: 2a1603e1 mov w1, w22
510c0: 110082d6 add w22, w22, #0x20
510c4: 53057c00 lsr w0, w0, #5
510c8: 911f6000 add x0, x0, #0x7d8
510cc: b8607aa2 ldr w2, [x21, x0, lsl #2]
510d0: aa1303e0 mov x0, x19
510d4: 97fffc12 bl 5011c <gicd_write_isenabler>
510d8: 17ffffb7 b 50fb4 <gicv3_distif_init_restore+0x11c>
510dc: 510082c0 sub w0, w22, #0x20
510e0: 2a1603e1 mov w1, w22
510e4: 110082d6 add w22, w22, #0x20
510e8: 53057c00 lsr w0, w0, #5
510ec: 8b000aa0 add x0, x21, x0, lsl #2
510f0: b95fdc02 ldr w2, [x0, #8156]
510f4: aa1303e0 mov x0, x19
510f8: 97fffc0e bl 50130 <gicd_write_ispendr>
510fc: 17ffffb1 b 50fc0 <gicv3_distif_init_restore+0x128>
51100: 510082c0 sub w0, w22, #0x20
51104: 2a1603e1 mov w1, w22
51108: 110082d6 add w22, w22, #0x20
5110c: 53057c00 lsr w0, w0, #5
51110: 8b000aa0 add x0, x21, x0, lsl #2
51114: b9605802 ldr w2, [x0, #8280]
51118: aa1303e0 mov x0, x19
5111c: 97fffc0a bl 50144 <gicd_write_isactiver>
51120: 17ffffab b 50fcc <gicv3_distif_init_restore+0x134>
0000000000051124 <gicd_read_igrpmodr>:
51124: 53057c21 lsr w1, w1, #5
51128: 91340000 add x0, x0, #0xd00
5112c: d37e6821 ubfiz x1, x1, #2, #27
51130: b8606820 ldr w0, [x1, x0]
51134: d65f03c0 ret
0000000000051138 <gicd_write_igrpmodr>:
51138: 53057c21 lsr w1, w1, #5
5113c: 91340000 add x0, x0, #0xd00
51140: d37e6821 ubfiz x1, x1, #2, #27
51144: b8206822 str w2, [x1, x0]
51148: d65f03c0 ret
000000000005114c <gicd_set_igrpmodr>:
5114c: 2a0103e3 mov w3, w1
51150: aa0003e4 mov x4, x0
51154: a9bf7bfd stp x29, x30, [sp, #-16]!
51158: 910003fd mov x29, sp
5115c: 97fffff2 bl 51124 <gicd_read_igrpmodr>
51160: a8c17bfd ldp x29, x30, [sp], #16
51164: 52800021 mov w1, #0x1 // #1
51168: 1ac32021 lsl w1, w1, w3
5116c: 2a000022 orr w2, w1, w0
51170: 2a0303e1 mov w1, w3
51174: aa0403e0 mov x0, x4
51178: 17fffff0 b 51138 <gicd_write_igrpmodr>
000000000005117c <gicd_clr_igrpmodr>:
5117c: 2a0103e3 mov w3, w1
51180: aa0003e4 mov x4, x0
51184: a9bf7bfd stp x29, x30, [sp, #-16]!
51188: 910003fd mov x29, sp
5118c: 97ffffe6 bl 51124 <gicd_read_igrpmodr>
51190: a8c17bfd ldp x29, x30, [sp], #16
51194: 52800021 mov w1, #0x1 // #1
51198: 1ac32021 lsl w1, w1, w3
5119c: 0a210002 bic w2, w0, w1
511a0: 2a0303e1 mov w1, w3
511a4: aa0403e0 mov x0, x4
511a8: 17ffffe4 b 51138 <gicd_write_igrpmodr>
00000000000511ac <gicr_read_ipriorityr>:
511ac: 91404000 add x0, x0, #0x10, lsl #12
511b0: 927e7421 and x1, x1, #0xfffffffc
511b4: 91100000 add x0, x0, #0x400
511b8: b8606820 ldr w0, [x1, x0]
511bc: d65f03c0 ret
00000000000511c0 <gicr_write_ipriorityr>:
511c0: 91404000 add x0, x0, #0x10, lsl #12
511c4: 927e7421 and x1, x1, #0xfffffffc
511c8: 91100000 add x0, x0, #0x400
511cc: b8206822 str w2, [x1, x0]
511d0: d65f03c0 ret
00000000000511d4 <gicr_clr_igroupr0>:
511d4: d2801003 mov x3, #0x80 // #128
511d8: 52800022 mov w2, #0x1 // #1
511dc: f2a00023 movk x3, #0x1, lsl #16
511e0: 1ac12042 lsl w2, w2, w1
511e4: b8636804 ldr w4, [x0, x3]
511e8: 0a220082 bic w2, w4, w2
511ec: b8236802 str w2, [x0, x3]
511f0: d65f03c0 ret
00000000000511f4 <gicr_set_igrpmodr0>:
511f4: d281a003 mov x3, #0xd00 // #3328
511f8: 52800022 mov w2, #0x1 // #1
511fc: f2a00023 movk x3, #0x1, lsl #16
51200: 1ac12042 lsl w2, w2, w1
51204: b8636804 ldr w4, [x0, x3]
51208: 2a040042 orr w2, w2, w4
5120c: b8236802 str w2, [x0, x3]
51210: d65f03c0 ret
0000000000051214 <gicr_clr_igrpmodr0>:
51214: d281a003 mov x3, #0xd00 // #3328
51218: 52800022 mov w2, #0x1 // #1
5121c: f2a00023 movk x3, #0x1, lsl #16
51220: 1ac12042 lsl w2, w2, w1
51224: b8636804 ldr w4, [x0, x3]
51228: 0a220082 bic w2, w4, w2
5122c: b8236802 str w2, [x0, x3]
51230: d65f03c0 ret
0000000000051234 <gicr_set_isenabler0>:
51234: 52800022 mov w2, #0x1 // #1
51238: 1ac12042 lsl w2, w2, w1
5123c: d2802001 mov x1, #0x100 // #256
51240: f2a00021 movk x1, #0x1, lsl #16
51244: b8216802 str w2, [x0, x1]
51248: d65f03c0 ret
000000000005124c <gicr_set_icfgr1>:
5124c: d2818084 mov x4, #0xc04 // #3076
51250: 531f0c21 ubfiz w1, w1, #1, #4
51254: f2a00024 movk x4, #0x1, lsl #16
51258: 12000442 and w2, w2, #0x3
5125c: 52800063 mov w3, #0x3 // #3
51260: b8646805 ldr w5, [x0, x4]
51264: 1ac12063 lsl w3, w3, w1
51268: 1ac12042 lsl w2, w2, w1
5126c: 0a2300a3 bic w3, w5, w3
51270: 2a030042 orr w2, w2, w3
51274: b8246802 str w2, [x0, x4]
51278: d65f03c0 ret
000000000005127c <gicv3_rdistif_mark_core_awake>:
5127c: b9401401 ldr w1, [x0, #20]
51280: 37100121 tbnz w1, #2, 512a4 <gicv3_rdistif_mark_core_awake+0x28>
51284: a9bf7bfd stp x29, x30, [sp, #-16]!
51288: b0000082 adrp x2, 62000 <vprintf+0x400>
5128c: b0000080 adrp x0, 62000 <vprintf+0x400>
51290: 910003fd mov x29, sp
51294: 9128cc42 add x2, x2, #0xa33
51298: 91299400 add x0, x0, #0xa65
5129c: 528023a1 mov w1, #0x11d // #285
512a0: 940041e3 bl 61a2c <__assert>
512a4: b9401401 ldr w1, [x0, #20]
512a8: 91005002 add x2, x0, #0x14
512ac: 121e7821 and w1, w1, #0xfffffffd
512b0: b9001401 str w1, [x0, #20]
512b4: b9400040 ldr w0, [x2]
512b8: 3717ffe0 tbnz w0, #2, 512b4 <gicv3_rdistif_mark_core_awake+0x38>
512bc: d65f03c0 ret
00000000000512c0 <gicv3_rdistif_mark_core_asleep>:
512c0: b9401401 ldr w1, [x0, #20]
512c4: 91005002 add x2, x0, #0x14
512c8: 321f0021 orr w1, w1, #0x2
512cc: b9001401 str w1, [x0, #20]
512d0: b9400040 ldr w0, [x2]
512d4: 3617ffe0 tbz w0, #2, 512d0 <gicv3_rdistif_mark_core_asleep+0x10>
512d8: d65f03c0 ret
00000000000512dc <gicv3_rdistif_base_addrs_probe>:
512dc: a9bc7bfd stp x29, x30, [sp, #-64]!
512e0: 910003fd mov x29, sp
512e4: a90153f3 stp x19, x20, [sp, #16]
512e8: a9025bf5 stp x21, x22, [sp, #32]
512ec: f9001bf7 str x23, [sp, #48]
512f0: b50000e0 cbnz x0, 5130c <gicv3_rdistif_base_addrs_probe+0x30>
512f4: b0000082 adrp x2, 62000 <vprintf+0x400>
512f8: b0000080 adrp x0, 62000 <vprintf+0x400>
512fc: 91276042 add x2, x2, #0x9d8
51300: 91299400 add x0, x0, #0xa65
51304: 528028c1 mov w1, #0x146 // #326
51308: 940041c9 bl 61a2c <__assert>
5130c: aa0003f5 mov x21, x0
51310: 2a0103f7 mov w23, w1
51314: aa0203f3 mov x19, x2
51318: aa0303f6 mov x22, x3
5131c: f9400674 ldr x20, [x19, #8]
51320: b40001f6 cbz x22, 5135c <gicv3_rdistif_base_addrs_probe+0x80>
51324: d360de81 ubfx x1, x20, #32, #24
51328: d378fe80 lsr x0, x20, #56
5132c: aa008020 orr x0, x1, x0, lsl #32
51330: d63f02c0 blr x22
51334: 6b17001f cmp w0, w23
51338: 54000042 b.cs 51340 <gicv3_rdistif_base_addrs_probe+0x64> // b.hs, b.nlast
5133c: f8205ab3 str x19, [x21, w0, uxtw #3]
51340: 91408273 add x19, x19, #0x20, lsl #12
51344: 3627fed4 tbz w20, #4, 5131c <gicv3_rdistif_base_addrs_probe+0x40>
51348: a94153f3 ldp x19, x20, [sp, #16]
5134c: a9425bf5 ldp x21, x22, [sp, #32]
51350: f9401bf7 ldr x23, [sp, #48]
51354: a8c47bfd ldp x29, x30, [sp], #64
51358: d65f03c0 ret
5135c: 53085e80 ubfx w0, w20, #8, #16
51360: 17fffff5 b 51334 <gicv3_rdistif_base_addrs_probe+0x58>
0000000000051364 <gicv3_spis_config_defaults>:
51364: a9bd7bfd stp x29, x30, [sp, #-48]!
51368: 910003fd mov x29, sp
5136c: a90153f3 stp x19, x20, [sp, #16]
51370: aa0003f4 mov x20, x0
51374: b9400413 ldr w19, [x0, #4]
51378: f90013f5 str x21, [sp, #32]
5137c: 52800415 mov w21, #0x20 // #32
51380: 531b1273 ubfiz w19, w19, #5, #5
51384: 11008273 add w19, w19, #0x20
51388: 6b1302bf cmp w21, w19
5138c: 54000163 b.cc 513b8 <gicv3_spis_config_defaults+0x54> // b.lo, b.ul, b.last
51390: 52800415 mov w21, #0x20 // #32
51394: 6b1302bf cmp w21, w19
51398: 540001c3 b.cc 513d0 <gicv3_spis_config_defaults+0x6c> // b.lo, b.ul, b.last
5139c: 52800415 mov w21, #0x20 // #32
513a0: 6b1302bf cmp w21, w19
513a4: 54000223 b.cc 513e8 <gicv3_spis_config_defaults+0x84> // b.lo, b.ul, b.last
513a8: a94153f3 ldp x19, x20, [sp, #16]
513ac: f94013f5 ldr x21, [sp, #32]
513b0: a8c37bfd ldp x29, x30, [sp], #48
513b4: d65f03c0 ret
513b8: 2a1503e1 mov w1, w21
513bc: aa1403e0 mov x0, x20
513c0: 12800002 mov w2, #0xffffffff // #-1
513c4: 110082b5 add w21, w21, #0x20
513c8: 97fffb50 bl 50108 <gicd_write_igroupr>
513cc: 17ffffef b 51388 <gicv3_spis_config_defaults+0x24>
513d0: 2a1503e1 mov w1, w21
513d4: aa1403e0 mov x0, x20
513d8: 3201c3e2 mov w2, #0x80808080 // #-2139062144
513dc: 110012b5 add w21, w21, #0x4
513e0: 97fffb5e bl 50158 <gicd_write_ipriorityr>
513e4: 17ffffec b 51394 <gicv3_spis_config_defaults+0x30>
513e8: 2a1503e1 mov w1, w21
513ec: aa1403e0 mov x0, x20
513f0: 52800002 mov w2, #0x0 // #0
513f4: 110042b5 add w21, w21, #0x10
513f8: 97fffb5c bl 50168 <gicd_write_icfgr>
513fc: 17ffffe9 b 513a0 <gicv3_spis_config_defaults+0x3c>
0000000000051400 <gicv3_secure_spis_config_props>:
51400: a9bc7bfd stp x29, x30, [sp, #-64]!
51404: 910003fd mov x29, sp
51408: a90153f3 stp x19, x20, [sp, #16]
5140c: 2a0203f4 mov w20, w2
51410: a9025bf5 stp x21, x22, [sp, #32]
51414: f9001bf7 str x23, [sp, #48]
51418: 34000122 cbz w2, 5143c <gicv3_secure_spis_config_props+0x3c>
5141c: aa0103f3 mov x19, x1
51420: b40001a1 cbz x1, 51454 <gicv3_secure_spis_config_props+0x54>
51424: aa0003f5 mov x21, x0
51428: 8b224836 add x22, x1, w2, uxtw #2
5142c: 91401817 add x23, x0, #0x6, lsl #12
51430: 52800014 mov w20, #0x0 // #0
51434: eb1302df cmp x22, x19
51438: 540001a1 b.ne 5146c <gicv3_secure_spis_config_props+0x6c> // b.any
5143c: 2a1403e0 mov w0, w20
51440: a94153f3 ldp x19, x20, [sp, #16]
51444: a9425bf5 ldp x21, x22, [sp, #32]
51448: f9401bf7 ldr x23, [sp, #48]
5144c: a8c47bfd ldp x29, x30, [sp], #64
51450: d65f03c0 ret
51454: b0000082 adrp x2, 62000 <vprintf+0x400>
51458: 912a2042 add x2, x2, #0xa88
5145c: 528031c1 mov w1, #0x18e // #398
51460: b0000080 adrp x0, 62000 <vprintf+0x400>
51464: 91299400 add x0, x0, #0xa65
51468: 94004171 bl 61a2c <__assert>
5146c: 79400261 ldrh w1, [x19]
51470: 12002421 and w1, w1, #0x3ff
51474: 71007c3f cmp w1, #0x1f
51478: 540005e9 b.ls 51534 <gicv3_secure_spis_config_props+0x134> // b.plast
5147c: aa1503e0 mov x0, x21
51480: 97fffb44 bl 50190 <gicd_clr_igroupr>
51484: 39400a60 ldrb w0, [x19, #2]
51488: 121e0402 and w2, w0, #0xc
5148c: 361800a0 tbz w0, #3, 514a0 <gicv3_secure_spis_config_props+0xa0>
51490: b0000082 adrp x2, 62000 <vprintf+0x400>
51494: 52803341 mov w1, #0x19a // #410
51498: 912a8042 add x2, x2, #0xaa0
5149c: 17fffff1 b 51460 <gicv3_secure_spis_config_props+0x60>
514a0: 79400261 ldrh w1, [x19]
514a4: aa1503e0 mov x0, x21
514a8: 12002421 and w1, w1, #0x3ff
514ac: 35000362 cbnz w2, 51518 <gicv3_secure_spis_config_props+0x118>
514b0: 321e0294 orr w20, w20, #0x4
514b4: 97ffff26 bl 5114c <gicd_set_igrpmodr>
514b8: 39400a62 ldrb w2, [x19, #2]
514bc: aa1503e0 mov x0, x21
514c0: 79400261 ldrh w1, [x19]
514c4: d3441442 ubfx x2, x2, #4, #2
514c8: 12002421 and w1, w1, #0x3ff
514cc: 97fffb45 bl 501e0 <gicd_set_icfgr>
514d0: b9400262 ldr w2, [x19]
514d4: aa1503e0 mov x0, x21
514d8: 79400261 ldrh w1, [x19]
514dc: d34a4442 ubfx x2, x2, #10, #8
514e0: 12002421 and w1, w1, #0x3ff
514e4: 97fffb3a bl 501cc <gicd_set_ipriorityr>
514e8: d53800a0 mrs x0, mpidr_el1
514ec: 79400261 ldrh w1, [x19]
514f0: 92405c00 and x0, x0, #0xffffff
514f4: 12002421 and w1, w1, #0x3ff
514f8: 71007c3f cmp w1, #0x1f
514fc: 54000148 b.hi 51524 <gicv3_secure_spis_config_props+0x124> // b.pmore
51500: b0000082 adrp x2, 62000 <vprintf+0x400>
51504: b0000080 adrp x0, 62000 <vprintf+0x400>
51508: 912bd042 add x2, x2, #0xaf4
5150c: 912c1400 add x0, x0, #0xb05
51510: 528011e1 mov w1, #0x8f // #143
51514: 17ffffd5 b 51468 <gicv3_secure_spis_config_props+0x68>
51518: 32000294 orr w20, w20, #0x1
5151c: 97ffff18 bl 5117c <gicd_clr_igrpmodr>
51520: 17ffffe6 b 514b8 <gicv3_secure_spis_config_props+0xb8>
51524: d37d2422 ubfiz x2, x1, #3, #10
51528: f8376840 str x0, [x2, x23]
5152c: aa1503e0 mov x0, x21
51530: 97fffb24 bl 501c0 <gicd_set_isenabler>
51534: 91001273 add x19, x19, #0x4
51538: 17ffffbf b 51434 <gicv3_secure_spis_config_props+0x34>
000000000005153c <gicv3_ppi_sgi_config_defaults>:
5153c: d2803001 mov x1, #0x180 // #384
51540: 12800002 mov w2, #0xffffffff // #-1
51544: f2a00021 movk x1, #0x1, lsl #16
51548: b8216802 str w2, [x0, x1]
5154c: b9400001 ldr w1, [x0]
51550: 371fffe1 tbnz w1, #3, 5154c <gicv3_ppi_sgi_config_defaults+0x10>
51554: d2801001 mov x1, #0x80 // #128
51558: 12800002 mov w2, #0xffffffff // #-1
5155c: f2a00021 movk x1, #0x1, lsl #16
51560: 3201c3e3 mov w3, #0x80808080 // #-2139062144
51564: b8216802 str w2, [x0, x1]
51568: 91404001 add x1, x0, #0x10, lsl #12
5156c: 91404002 add x2, x0, #0x10, lsl #12
51570: 91100021 add x1, x1, #0x400
51574: 91108042 add x2, x2, #0x420
51578: b8004423 str w3, [x1], #4
5157c: eb02003f cmp x1, x2
51580: 54ffffc1 b.ne 51578 <gicv3_ppi_sgi_config_defaults+0x3c> // b.any
51584: d2818081 mov x1, #0xc04 // #3076
51588: f2a00021 movk x1, #0x1, lsl #16
5158c: b821681f str wzr, [x0, x1]
51590: d65f03c0 ret
0000000000051594 <gicv3_secure_ppi_sgi_config_props>:
51594: 340007a2 cbz w2, 51688 <gicv3_secure_ppi_sgi_config_props+0xf4>
51598: a9bf7bfd stp x29, x30, [sp, #-16]!
5159c: aa0103e6 mov x6, x1
515a0: 910003fd mov x29, sp
515a4: b4000141 cbz x1, 515cc <gicv3_secure_ppi_sgi_config_props+0x38>
515a8: 91404009 add x9, x0, #0x10, lsl #12
515ac: 8b224828 add x8, x1, w2, uxtw #2
515b0: 91100129 add x9, x9, #0x400
515b4: 52800007 mov w7, #0x0 // #0
515b8: eb06011f cmp x8, x6
515bc: 54000141 b.ne 515e4 <gicv3_secure_ppi_sgi_config_props+0x50> // b.any
515c0: 2a0703e0 mov w0, w7
515c4: a8c17bfd ldp x29, x30, [sp], #16
515c8: d65f03c0 ret
515cc: b0000082 adrp x2, 62000 <vprintf+0x400>
515d0: b0000080 adrp x0, 62000 <vprintf+0x400>
515d4: 912a2042 add x2, x2, #0xa88
515d8: 91299400 add x0, x0, #0xa65
515dc: 52803c41 mov w1, #0x1e2 // #482
515e0: 94004113 bl 61a2c <__assert>
515e4: 794000c1 ldrh w1, [x6]
515e8: 12002421 and w1, w1, #0x3ff
515ec: 71007c3f cmp w1, #0x1f
515f0: 54000428 b.hi 51674 <gicv3_secure_ppi_sgi_config_props+0xe0> // b.pmore
515f4: 97fffef8 bl 511d4 <gicr_clr_igroupr0>
515f8: 394008c1 ldrb w1, [x6, #2]
515fc: 121e0422 and w2, w1, #0xc
51600: 361800e1 tbz w1, #3, 5161c <gicv3_secure_ppi_sgi_config_props+0x88>
51604: b0000082 adrp x2, 62000 <vprintf+0x400>
51608: b0000080 adrp x0, 62000 <vprintf+0x400>
5160c: 912a8042 add x2, x2, #0xaa0
51610: 91299400 add x0, x0, #0xa65
51614: 52803dc1 mov w1, #0x1ee // #494
51618: 94004105 bl 61a2c <__assert>
5161c: 794000c1 ldrh w1, [x6]
51620: 12002421 and w1, w1, #0x3ff
51624: 350002c2 cbnz w2, 5167c <gicv3_secure_ppi_sgi_config_props+0xe8>
51628: 97fffef3 bl 511f4 <gicr_set_igrpmodr0>
5162c: 321e00e7 orr w7, w7, #0x4
51630: 794000c1 ldrh w1, [x6]
51634: b94000c2 ldr w2, [x6]
51638: 92402421 and x1, x1, #0x3ff
5163c: d34a4442 ubfx x2, x2, #10, #8
51640: 38296822 strb w2, [x1, x9]
51644: 794000c1 ldrh w1, [x6]
51648: 12002421 and w1, w1, #0x3ff
5164c: 110fc022 add w2, w1, #0x3f0
51650: 12002442 and w2, w2, #0x3ff
51654: 71003c5f cmp w2, #0xf
51658: 54000088 b.hi 51668 <gicv3_secure_ppi_sgi_config_props+0xd4> // b.pmore
5165c: 394008c2 ldrb w2, [x6, #2]
51660: d3441442 ubfx x2, x2, #4, #2
51664: 97fffefa bl 5124c <gicr_set_icfgr1>
51668: 794000c1 ldrh w1, [x6]
5166c: 12002421 and w1, w1, #0x3ff
51670: 97fffef1 bl 51234 <gicr_set_isenabler0>
51674: 910010c6 add x6, x6, #0x4
51678: 17ffffd0 b 515b8 <gicv3_secure_ppi_sgi_config_props+0x24>
5167c: 97fffee6 bl 51214 <gicr_clr_igrpmodr0>
51680: 320000e7 orr w7, w7, #0x1
51684: 17ffffeb b 51630 <gicv3_secure_ppi_sgi_config_props+0x9c>
51688: 2a0203e0 mov w0, w2
5168c: d65f03c0 ret
0000000000051690 <plat_ic_get_pending_interrupt_type>:
51690: a9bf7bfd stp x29, x30, [sp, #-16]!
51694: 910003fd mov x29, sp
51698: d5384240 mrs x0, currentel
5169c: d3420c00 ubfx x0, x0, #2, #2
516a0: f1000c1f cmp x0, #0x3
516a4: 540000e0 b.eq 516c0 <plat_ic_get_pending_interrupt_type+0x30> // b.none
516a8: b0000082 adrp x2, 62000 <vprintf+0x400>
516ac: b0000080 adrp x0, 62000 <vprintf+0x400>
516b0: 9120dc42 add x2, x2, #0x837
516b4: 912ca000 add x0, x0, #0xb28
516b8: 52800a21 mov w1, #0x51 // #81
516bc: 940040dc bl 61a2c <__assert>
516c0: 97fffc83 bl 508cc <gicv3_get_pending_interrupt_type>
516c4: 510ff000 sub w0, w0, #0x3fc
516c8: 71000c1f cmp w0, #0x3
516cc: 540000c8 b.hi 516e4 <plat_ic_get_pending_interrupt_type+0x54> // b.pmore
516d0: b0000081 adrp x1, 62000 <vprintf+0x400>
516d4: 912d0421 add x1, x1, #0xb41
516d8: 38604820 ldrb w0, [x1, w0, uxtw]
516dc: a8c17bfd ldp x29, x30, [sp], #16
516e0: d65f03c0 ret
516e4: 52800020 mov w0, #0x1 // #1
516e8: 17fffffd b 516dc <plat_ic_get_pending_interrupt_type+0x4c>
00000000000516ec <plat_rockchip_mpidr_to_core_pos>:
516ec: 1400033c b 523dc <plat_core_pos_by_mpidr>
00000000000516f0 <plat_rockchip_gic_driver_init>:
516f0: b0000080 adrp x0, 62000 <vprintf+0x400>
516f4: 9104a000 add x0, x0, #0x128
516f8: 17fffb27 b 50394 <gicv3_driver_init>
00000000000516fc <plat_rockchip_gic_init>:
516fc: a9bf7bfd stp x29, x30, [sp, #-16]!
51700: 910003fd mov x29, sp
51704: 97fffb80 bl 50504 <gicv3_distif_init>
51708: 940039f1 bl 5fecc <plat_my_core_pos>
5170c: 97fffbb3 bl 505d8 <gicv3_rdistif_init>
51710: 940039ef bl 5fecc <plat_my_core_pos>
51714: a8c17bfd ldp x29, x30, [sp], #16
51718: 17fffbfc b 50708 <gicv3_cpuif_enable>
000000000005171c <plat_rockchip_gic_cpuif_enable>:
5171c: a9bf7bfd stp x29, x30, [sp, #-16]!
51720: 910003fd mov x29, sp
51724: 940039ea bl 5fecc <plat_my_core_pos>
51728: a8c17bfd ldp x29, x30, [sp], #16
5172c: 17fffbf7 b 50708 <gicv3_cpuif_enable>
0000000000051730 <plat_rockchip_gic_cpuif_disable>:
51730: a9bf7bfd stp x29, x30, [sp, #-16]!
51734: 910003fd mov x29, sp
51738: 940039e5 bl 5fecc <plat_my_core_pos>
5173c: a8c17bfd ldp x29, x30, [sp], #16
51740: 17fffc2f b 507fc <gicv3_cpuif_disable>
0000000000051744 <plat_rockchip_gic_pcpu_init>:
51744: a9bf7bfd stp x29, x30, [sp, #-16]!
51748: 910003fd mov x29, sp
5174c: 940039e0 bl 5fecc <plat_my_core_pos>
51750: a8c17bfd ldp x29, x30, [sp], #16
51754: 17fffba1 b 505d8 <gicv3_rdistif_init>
0000000000051758 <cci_init>:
51758: a9bf7bfd stp x29, x30, [sp, #-16]!
5175c: 910003fd mov x29, sp
51760: b50000e1 cbnz x1, 5177c <cci_init+0x24>
51764: b0000082 adrp x2, 62000 <vprintf+0x400>
51768: 912d1442 add x2, x2, #0xb45
5176c: 52800e41 mov w1, #0x72 // #114
51770: b0000080 adrp x0, 62000 <vprintf+0x400>
51774: 912d4400 add x0, x0, #0xb51
51778: 940040ad bl 61a2c <__assert>
5177c: b50000a0 cbnz x0, 51790 <cci_init+0x38>
51780: b0000082 adrp x2, 62000 <vprintf+0x400>
51784: 52800e61 mov w1, #0x73 // #115
51788: 91264042 add x2, x2, #0x990
5178c: 17fffff9 b 51770 <cci_init+0x18>
51790: d00000c3 adrp x3, 6b000 <psci_ns_context+0xc60>
51794: 51000442 sub w2, w2, #0x1
51798: 900000e4 adrp x4, 6d000 <dist_ctx+0x1e50>
5179c: f9004c60 str x0, [x3, #152]
517a0: d00000c3 adrp x3, 6b000 <psci_ns_context+0xc60>
517a4: f9005061 str x1, [x3, #160]
517a8: 900000e3 adrp x3, 6d000 <dist_ctx+0x1e50>
517ac: b90d7462 str w2, [x3, #3444]
517b0: b94fe003 ldr w3, [x0, #4064]
517b4: b94fe400 ldr w0, [x0, #4068]
517b8: 12001c63 and w3, w3, #0xff
517bc: 53180c00 ubfiz w0, w0, #8, #4
517c0: 2a030000 orr w0, w0, w3
517c4: 51108000 sub w0, w0, #0x420
517c8: 71000c1f cmp w0, #0x3
517cc: 540000e9 b.ls 517e8 <cci_init+0x90> // b.plast
517d0: 12800000 mov w0, #0xffffffff // #-1
517d4: b90d7080 str w0, [x4, #3440]
517d8: b0000082 adrp x2, 62000 <vprintf+0x400>
517dc: 52801001 mov w1, #0x80 // #128
517e0: 912d9c42 add x2, x2, #0xb67
517e4: 17ffffe3 b 51770 <cci_init+0x18>
517e8: b0000083 adrp x3, 62000 <vprintf+0x400>
517ec: 91320863 add x3, x3, #0xc82
517f0: 38e04865 ldrsb w5, [x3, w0, uxtw]
517f4: b90d7085 str w5, [x4, #3440]
517f8: 37ffff05 tbnz w5, #31, 517d8 <cci_init+0x80>
517fc: 52800003 mov w3, #0x0 // #0
51800: 52800004 mov w4, #0x0 // #0
51804: 52800026 mov w6, #0x1 // #1
51808: b8645820 ldr w0, [x1, w4, uxtw #2]
5180c: 37f80220 tbnz w0, #31, 51850 <cci_init+0xf8>
51810: 6b0000bf cmp w5, w0
51814: 5400010c b.gt 51834 <cci_init+0xdc>
51818: b0000080 adrp x0, 62000 <vprintf+0x400>
5181c: 912e0000 add x0, x0, #0xb80
51820: 94003419 bl 5e884 <tf_log>
51824: b0000082 adrp x2, 62000 <vprintf+0x400>
51828: 52801041 mov w1, #0x82 // #130
5182c: 91302042 add x2, x2, #0xc08
51830: 17ffffd0 b 51770 <cci_init+0x18>
51834: 1ac02467 lsr w7, w3, w0
51838: 36000087 tbz w7, #0, 51848 <cci_init+0xf0>
5183c: b0000080 adrp x0, 62000 <vprintf+0x400>
51840: 912e8000 add x0, x0, #0xba0
51844: 17fffff7 b 51820 <cci_init+0xc8>
51848: 1ac020c0 lsl w0, w6, w0
5184c: 2a000063 orr w3, w3, w0
51850: 11000484 add w4, w4, #0x1
51854: 6b04005f cmp w2, w4
51858: 54fffd82 b.cs 51808 <cci_init+0xb0> // b.hs, b.nlast
5185c: 35000083 cbnz w3, 5186c <cci_init+0x114>
51860: b0000080 adrp x0, 62000 <vprintf+0x400>
51864: 912f6000 add x0, x0, #0xbd8
51868: 17ffffee b 51820 <cci_init+0xc8>
5186c: a8c17bfd ldp x29, x30, [sp], #16
51870: d65f03c0 ret
0000000000051874 <cci_enable_snoop_dvm_reqs>:
51874: a9bf7bfd stp x29, x30, [sp, #-16]!
51878: d00000c1 adrp x1, 6b000 <psci_ns_context+0xc60>
5187c: 900000e2 adrp x2, 6d000 <dist_ctx+0x1e50>
51880: 910003fd mov x29, sp
51884: f9405021 ldr x1, [x1, #160]
51888: b94d7442 ldr w2, [x2, #3444]
5188c: b8605821 ldr w1, [x1, w0, uxtw #2]
51890: 6b00005f cmp w2, w0
51894: 540000e2 b.cs 518b0 <cci_enable_snoop_dvm_reqs+0x3c> // b.hs, b.nlast
51898: b0000082 adrp x2, 62000 <vprintf+0x400>
5189c: 91307842 add x2, x2, #0xc1e
518a0: 52801121 mov w1, #0x89 // #137
518a4: b0000080 adrp x0, 62000 <vprintf+0x400>
518a8: 912d4400 add x0, x0, #0xb51
518ac: 94004060 bl 61a2c <__assert>
518b0: 900000e0 adrp x0, 6d000 <dist_ctx+0x1e50>
518b4: b94d7000 ldr w0, [x0, #3440]
518b8: 6b01001f cmp w0, w1
518bc: 5400004d b.le 518c4 <cci_enable_snoop_dvm_reqs+0x50>
518c0: 36f800a1 tbz w1, #31, 518d4 <cci_enable_snoop_dvm_reqs+0x60>
518c4: b0000082 adrp x2, 62000 <vprintf+0x400>
518c8: 52801141 mov w1, #0x8a // #138
518cc: 9130e442 add x2, x2, #0xc39
518d0: 17fffff5 b 518a4 <cci_enable_snoop_dvm_reqs+0x30>
518d4: d00000c0 adrp x0, 6b000 <psci_ns_context+0xc60>
518d8: f9404c02 ldr x2, [x0, #152]
518dc: b50000a2 cbnz x2, 518f0 <cci_enable_snoop_dvm_reqs+0x7c>
518e0: b0000082 adrp x2, 62000 <vprintf+0x400>
518e4: 52801161 mov w1, #0x8b // #139
518e8: 9131cc42 add x2, x2, #0xc73
518ec: 17ffffee b 518a4 <cci_enable_snoop_dvm_reqs+0x30>
518f0: 93407c21 sxtw x1, w1
518f4: 52800063 mov w3, #0x3 // #3
518f8: 91000421 add x1, x1, #0x1
518fc: d374cc21 lsl x1, x1, #12
51900: b8226823 str w3, [x1, x2]
51904: d5033b9f dsb ish
51908: f9404c00 ldr x0, [x0, #152]
5190c: 91003000 add x0, x0, #0xc
51910: b9400001 ldr w1, [x0]
51914: 3707ffe1 tbnz w1, #0, 51910 <cci_enable_snoop_dvm_reqs+0x9c>
51918: a8c17bfd ldp x29, x30, [sp], #16
5191c: d65f03c0 ret
0000000000051920 <cci_disable_snoop_dvm_reqs>:
51920: a9bf7bfd stp x29, x30, [sp, #-16]!
51924: d00000c1 adrp x1, 6b000 <psci_ns_context+0xc60>
51928: 900000e2 adrp x2, 6d000 <dist_ctx+0x1e50>
5192c: 910003fd mov x29, sp
51930: f9405021 ldr x1, [x1, #160]
51934: b94d7442 ldr w2, [x2, #3444]
51938: b8605821 ldr w1, [x1, w0, uxtw #2]
5193c: 6b00005f cmp w2, w0
51940: 540000e2 b.cs 5195c <cci_disable_snoop_dvm_reqs+0x3c> // b.hs, b.nlast
51944: b0000082 adrp x2, 62000 <vprintf+0x400>
51948: 91307842 add x2, x2, #0xc1e
5194c: 52801481 mov w1, #0xa4 // #164
51950: b0000080 adrp x0, 62000 <vprintf+0x400>
51954: 912d4400 add x0, x0, #0xb51
51958: 94004035 bl 61a2c <__assert>
5195c: 900000e0 adrp x0, 6d000 <dist_ctx+0x1e50>
51960: b94d7000 ldr w0, [x0, #3440]
51964: 6b01001f cmp w0, w1
51968: 5400004d b.le 51970 <cci_disable_snoop_dvm_reqs+0x50>
5196c: 36f800a1 tbz w1, #31, 51980 <cci_disable_snoop_dvm_reqs+0x60>
51970: b0000082 adrp x2, 62000 <vprintf+0x400>
51974: 528014a1 mov w1, #0xa5 // #165
51978: 9130e442 add x2, x2, #0xc39
5197c: 17fffff5 b 51950 <cci_disable_snoop_dvm_reqs+0x30>
51980: d00000c0 adrp x0, 6b000 <psci_ns_context+0xc60>
51984: f9404c02 ldr x2, [x0, #152]
51988: b50000a2 cbnz x2, 5199c <cci_disable_snoop_dvm_reqs+0x7c>
5198c: b0000082 adrp x2, 62000 <vprintf+0x400>
51990: 528014c1 mov w1, #0xa6 // #166
51994: 9131cc42 add x2, x2, #0xc73
51998: 17ffffee b 51950 <cci_disable_snoop_dvm_reqs+0x30>
5199c: 93407c21 sxtw x1, w1
519a0: 12800063 mov w3, #0xfffffffc // #-4
519a4: 91000421 add x1, x1, #0x1
519a8: d374cc21 lsl x1, x1, #12
519ac: b8226823 str w3, [x1, x2]
519b0: d5033b9f dsb ish
519b4: f9404c00 ldr x0, [x0, #152]
519b8: 91003000 add x0, x0, #0xc
519bc: b9400001 ldr w1, [x0]
519c0: 3707ffe1 tbnz w1, #0, 519bc <cci_disable_snoop_dvm_reqs+0x9c>
519c4: a8c17bfd ldp x29, x30, [sp], #16
519c8: d65f03c0 ret
00000000000519cc <udelay>:
519cc: a9bd7bfd stp x29, x30, [sp, #-48]!
519d0: 910003fd mov x29, sp
519d4: a9025bf5 stp x21, x22, [sp, #32]
519d8: d00000d6 adrp x22, 6b000 <psci_ns_context+0xc60>
519dc: a90153f3 stp x19, x20, [sp, #16]
519e0: 2a0003f3 mov w19, w0
519e4: f94056c0 ldr x0, [x22, #168]
519e8: b40000e0 cbz x0, 51a04 <udelay+0x38>
519ec: b9400801 ldr w1, [x0, #8]
519f0: 340000a1 cbz w1, 51a04 <udelay+0x38>
519f4: b9400c01 ldr w1, [x0, #12]
519f8: 34000061 cbz w1, 51a04 <udelay+0x38>
519fc: f9400000 ldr x0, [x0]
51a00: b50000e0 cbnz x0, 51a1c <udelay+0x50>
51a04: b0000082 adrp x2, 62000 <vprintf+0x400>
51a08: 91321842 add x2, x2, #0xc86
51a0c: 52800321 mov w1, #0x19 // #25
51a10: b0000080 adrp x0, 62000 <vprintf+0x400>
51a14: 9133fc00 add x0, x0, #0xcff
51a18: 94004005 bl 61a2c <__assert>
51a1c: d63f0000 blr x0
51a20: 2a0003f4 mov w20, w0
51a24: f94056c2 ldr x2, [x22, #168]
51a28: aa1603f5 mov x21, x22
51a2c: 29410841 ldp w1, w2, [x2, #8]
51a30: d1000420 sub x0, x1, #0x1
51a34: 9ba20273 umaddl x19, w19, w2, x0
51a38: 12807d20 mov w0, #0xfffffc16 // #-1002
51a3c: 9ac10a73 udiv x19, x19, x1
51a40: 91000673 add x19, x19, #0x1
51a44: eb00027f cmp x19, x0
51a48: 540000a9 b.ls 51a5c <udelay+0x90> // b.plast
51a4c: b0000082 adrp x2, 62000 <vprintf+0x400>
51a50: 528005e1 mov w1, #0x2f // #47
51a54: 91348442 add x2, x2, #0xd21
51a58: 17ffffee b 51a10 <udelay+0x44>
51a5c: f94056a0 ldr x0, [x21, #168]
51a60: f9400000 ldr x0, [x0]
51a64: d63f0000 blr x0
51a68: 4b000281 sub w1, w20, w0
51a6c: eb13003f cmp x1, x19
51a70: 54ffff63 b.cc 51a5c <udelay+0x90> // b.lo, b.ul, b.last
51a74: a94153f3 ldp x19, x20, [sp, #16]
51a78: a9425bf5 ldp x21, x22, [sp, #32]
51a7c: a8c37bfd ldp x29, x30, [sp], #48
51a80: d65f03c0 ret
0000000000051a84 <timer_init>:
51a84: b40000e0 cbz x0, 51aa0 <timer_init+0x1c>
51a88: b9400801 ldr w1, [x0, #8]
51a8c: 340000a1 cbz w1, 51aa0 <timer_init+0x1c>
51a90: b9400c01 ldr w1, [x0, #12]
51a94: 34000061 cbz w1, 51aa0 <timer_init+0x1c>
51a98: f9400001 ldr x1, [x0]
51a9c: b5000121 cbnz x1, 51ac0 <timer_init+0x3c>
51aa0: a9bf7bfd stp x29, x30, [sp, #-16]!
51aa4: b0000082 adrp x2, 62000 <vprintf+0x400>
51aa8: b0000080 adrp x0, 62000 <vprintf+0x400>
51aac: 910003fd mov x29, sp
51ab0: 91351042 add x2, x2, #0xd44
51ab4: 9133fc00 add x0, x0, #0xcff
51ab8: 52800981 mov w1, #0x4c // #76
51abc: 94003fdc bl 61a2c <__assert>
51ac0: d00000c1 adrp x1, 6b000 <psci_ns_context+0xc60>
51ac4: f9005420 str x0, [x1, #168]
51ac8: d65f03c0 ret
0000000000051acc <get_timer_value>:
51acc: d53be020 mrs x0, cntpct_el0
51ad0: 2a2003e0 mvn w0, w0
51ad4: d65f03c0 ret
0000000000051ad8 <generic_delay_timer_init_args>:
51ad8: a9be7bfd stp x29, x30, [sp, #-32]!
51adc: d00000c2 adrp x2, 6b000 <psci_ns_context+0xc60>
51ae0: 910003fd mov x29, sp
51ae4: a90153f3 stp x19, x20, [sp, #16]
51ae8: 2a0003f3 mov w19, w0
51aec: 2a0103f4 mov w20, w1
51af0: 9102c040 add x0, x2, #0xb0
51af4: 90000001 adrp x1, 51000 <gicv3_distif_init_restore+0x168>
51af8: 912b3021 add x1, x1, #0xacc
51afc: f9005841 str x1, [x2, #176]
51b00: 29015013 stp w19, w20, [x0, #8]
51b04: 97ffffe0 bl 51a84 <timer_init>
51b08: 2a1403e2 mov w2, w20
51b0c: 2a1303e1 mov w1, w19
51b10: a94153f3 ldp x19, x20, [sp, #16]
51b14: b0000080 adrp x0, 62000 <vprintf+0x400>
51b18: a8c27bfd ldp x29, x30, [sp], #32
51b1c: 9136d400 add x0, x0, #0xdb5
51b20: 14003359 b 5e884 <tf_log>
0000000000051b24 <generic_delay_timer_init>:
51b24: a9bf7bfd stp x29, x30, [sp, #-16]!
51b28: 910003fd mov x29, sp
51b2c: 94000252 bl 52474 <plat_get_syscnt_freq2>
51b30: 2a0003e1 mov w1, w0
51b34: 52884800 mov w0, #0x4240 // #16960
51b38: 528000c3 mov w3, #0x6 // #6
51b3c: 72a001e0 movk w0, #0xf, lsl #16
51b40: 52800142 mov w2, #0xa // #10
51b44: 1ac20824 udiv w4, w1, w2
51b48: 1b028485 msub w5, w4, w2, w1
51b4c: 350000a5 cbnz w5, 51b60 <generic_delay_timer_init+0x3c>
51b50: 1ac20800 udiv w0, w0, w2
51b54: 2a0403e1 mov w1, w4
51b58: 71000463 subs w3, w3, #0x1
51b5c: 54ffff41 b.ne 51b44 <generic_delay_timer_init+0x20> // b.any
51b60: a8c17bfd ldp x29, x30, [sp], #16
51b64: 17ffffdd b 51ad8 <generic_delay_timer_init_args>
0000000000051b68 <gpio_set_direction>:
51b68: a9bf7bfd stp x29, x30, [sp, #-16]!
51b6c: d00000c4 adrp x4, 6b000 <psci_ns_context+0xc60>
51b70: 910003fd mov x29, sp
51b74: f9406084 ldr x4, [x4, #192]
51b78: b50000e4 cbnz x4, 51b94 <gpio_set_direction+0x2c>
51b7c: b0000082 adrp x2, 62000 <vprintf+0x400>
51b80: 9137b842 add x2, x2, #0xdee
51b84: 52800421 mov w1, #0x21 // #33
51b88: b0000080 adrp x0, 62000 <vprintf+0x400>
51b8c: 9137c800 add x0, x0, #0xdf2
51b90: 94003fa7 bl 61a2c <__assert>
51b94: f9400484 ldr x4, [x4, #8]
51b98: b50000a4 cbnz x4, 51bac <gpio_set_direction+0x44>
51b9c: b0000082 adrp x2, 62000 <vprintf+0x400>
51ba0: 52800441 mov w1, #0x22 // #34
51ba4: 9138a042 add x2, x2, #0xe28
51ba8: 17fffff8 b 51b88 <gpio_set_direction+0x20>
51bac: 7100043f cmp w1, #0x1
51bb0: 540000a9 b.ls 51bc4 <gpio_set_direction+0x5c> // b.plast
51bb4: b0000082 adrp x2, 62000 <vprintf+0x400>
51bb8: 52800461 mov w1, #0x23 // #35
51bbc: 91390042 add x2, x2, #0xe40
51bc0: 17fffff2 b 51b88 <gpio_set_direction+0x20>
51bc4: 36f800a0 tbz w0, #31, 51bd8 <gpio_set_direction+0x70>
51bc8: b0000082 adrp x2, 62000 <vprintf+0x400>
51bcc: 52800481 mov w1, #0x24 // #36
51bd0: 91387842 add x2, x2, #0xe1e
51bd4: 17ffffed b 51b88 <gpio_set_direction+0x20>
51bd8: a8c17bfd ldp x29, x30, [sp], #16
51bdc: aa0403f0 mov x16, x4
51be0: d61f0200 br x16
0000000000051be4 <gpio_set_value>:
51be4: a9bf7bfd stp x29, x30, [sp, #-16]!
51be8: d00000c4 adrp x4, 6b000 <psci_ns_context+0xc60>
51bec: 910003fd mov x29, sp
51bf0: f9406084 ldr x4, [x4, #192]
51bf4: b50000e4 cbnz x4, 51c10 <gpio_set_value+0x2c>
51bf8: b0000082 adrp x2, 62000 <vprintf+0x400>
51bfc: 9137b842 add x2, x2, #0xdee
51c00: 52800681 mov w1, #0x34 // #52
51c04: b0000080 adrp x0, 62000 <vprintf+0x400>
51c08: 9137c800 add x0, x0, #0xdf2
51c0c: 94003f88 bl 61a2c <__assert>
51c10: f9400c84 ldr x4, [x4, #24]
51c14: b50000a4 cbnz x4, 51c28 <gpio_set_value+0x44>
51c18: b0000082 adrp x2, 62000 <vprintf+0x400>
51c1c: 528006a1 mov w1, #0x35 // #53
51c20: 9139e842 add x2, x2, #0xe7a
51c24: 17fffff8 b 51c04 <gpio_set_value+0x20>
51c28: 7100043f cmp w1, #0x1
51c2c: 540000a9 b.ls 51c40 <gpio_set_value+0x5c> // b.plast
51c30: b0000082 adrp x2, 62000 <vprintf+0x400>
51c34: 528006c1 mov w1, #0x36 // #54
51c38: 913a3842 add x2, x2, #0xe8e
51c3c: 17fffff2 b 51c04 <gpio_set_value+0x20>
51c40: 36f800a0 tbz w0, #31, 51c54 <gpio_set_value+0x70>
51c44: b0000082 adrp x2, 62000 <vprintf+0x400>
51c48: 528006e1 mov w1, #0x37 // #55
51c4c: 91387842 add x2, x2, #0xe1e
51c50: 17ffffed b 51c04 <gpio_set_value+0x20>
51c54: a8c17bfd ldp x29, x30, [sp], #16
51c58: aa0403f0 mov x16, x4
51c5c: d61f0200 br x16
0000000000051c60 <gpio_init>:
51c60: b4000120 cbz x0, 51c84 <gpio_init+0x24>
51c64: f9400001 ldr x1, [x0]
51c68: b40000e1 cbz x1, 51c84 <gpio_init+0x24>
51c6c: f9400401 ldr x1, [x0, #8]
51c70: b40000a1 cbz x1, 51c84 <gpio_init+0x24>
51c74: f9400801 ldr x1, [x0, #16]
51c78: b4000061 cbz x1, 51c84 <gpio_init+0x24>
51c7c: f9400c01 ldr x1, [x0, #24]
51c80: b5000121 cbnz x1, 51ca4 <gpio_init+0x44>
51c84: a9bf7bfd stp x29, x30, [sp, #-16]!
51c88: b0000082 adrp x2, 62000 <vprintf+0x400>
51c8c: b0000080 adrp x0, 62000 <vprintf+0x400>
51c90: 910003fd mov x29, sp
51c94: 913b1842 add x2, x2, #0xec6
51c98: 9137c800 add x0, x0, #0xdf2
51c9c: 52800ac1 mov w1, #0x56 // #86
51ca0: 94003f63 bl 61a2c <__assert>
51ca4: d00000c1 adrp x1, 6b000 <psci_ns_context+0xc60>
51ca8: f9006020 str x0, [x1, #192]
51cac: d65f03c0 ret
0000000000051cb0 <bl31_plat_get_next_image_ep_info>:
51cb0: 7100041f cmp w0, #0x1
51cb4: d00000c1 adrp x1, 6b000 <psci_ns_context+0xc60>
51cb8: d00000c2 adrp x2, 6b000 <psci_ns_context+0xc60>
51cbc: 91048020 add x0, x1, #0x120
51cc0: 91032042 add x2, x2, #0xc8
51cc4: 9a820000 csel x0, x0, x2, eq // eq = none
51cc8: 39400001 ldrb w1, [x0]
51ccc: 7100043f cmp w1, #0x1
51cd0: 54000120 b.eq 51cf4 <bl31_plat_get_next_image_ep_info+0x44> // b.none
51cd4: a9bf7bfd stp x29, x30, [sp, #-16]!
51cd8: b0000082 adrp x2, 62000 <vprintf+0x400>
51cdc: b0000080 adrp x0, 62000 <vprintf+0x400>
51ce0: 910003fd mov x29, sp
51ce4: 913d3c42 add x2, x2, #0xf4f
51ce8: 913dcc00 add x0, x0, #0xf73
51cec: 52800461 mov w1, #0x23 // #35
51cf0: 94003f4f bl 61a2c <__assert>
51cf4: f9400401 ldr x1, [x0, #8]
51cf8: f100003f cmp x1, #0x0
51cfc: 9a9f1000 csel x0, x0, xzr, ne // ne = any
51d00: d65f03c0 ret
0000000000051d04 <bl31_early_platform_setup2>:
51d04: a9bd7bfd stp x29, x30, [sp, #-48]!
51d08: 910003fd mov x29, sp
51d0c: a90153f3 stp x19, x20, [sp, #16]
51d10: aa0003f3 mov x19, x0
51d14: aa0103e0 mov x0, x1
51d18: f90013f5 str x21, [sp, #32]
51d1c: 94000086 bl 51f34 <params_early_setup>
51d20: 94000067 bl 51ebc <rockchip_get_uart_base>
51d24: 34000180 cbz w0, 51d54 <bl31_early_platform_setup2+0x50>
51d28: 94000065 bl 51ebc <rockchip_get_uart_base>
51d2c: 2a0003f4 mov w20, w0
51d30: 94000069 bl 51ed4 <rockchip_get_uart_clock>
51d34: 2a0003f5 mov w21, w0
51d38: 94000064 bl 51ec8 <rockchip_get_uart_baudrate>
51d3c: 2a0003e2 mov w2, w0
51d40: d00000c3 adrp x3, 6b000 <psci_ns_context+0xc60>
51d44: 2a1503e1 mov w1, w21
51d48: 9105e063 add x3, x3, #0x178
51d4c: 2a1403e0 mov w0, w20
51d50: 940036fc bl 5f940 <console_16550_register>
51d54: b0000080 adrp x0, 62000 <vprintf+0x400>
51d58: 913e6800 add x0, x0, #0xf9a
51d5c: 940032ca bl 5e884 <tf_log>
51d60: aa1303e0 mov x0, x19
51d64: d00000c2 adrp x2, 6b000 <psci_ns_context+0xc60>
51d68: a94153f3 ldp x19, x20, [sp, #16]
51d6c: 91048042 add x2, x2, #0x120
51d70: f94013f5 ldr x21, [sp, #32]
51d74: d00000c1 adrp x1, 6b000 <psci_ns_context+0xc60>
51d78: a8c37bfd ldp x29, x30, [sp], #48
51d7c: 91032021 add x1, x1, #0xc8
51d80: 14003408 b 5eda0 <bl31_params_parse_helper>
0000000000051d84 <bl31_platform_setup>:
51d84: a9bf7bfd stp x29, x30, [sp, #-16]!
51d88: 910003fd mov x29, sp
51d8c: 97ffff66 bl 51b24 <generic_delay_timer_init>
51d90: 940013e7 bl 56d2c <plat_rockchip_soc_init>
51d94: 97fffe57 bl 516f0 <plat_rockchip_gic_driver_init>
51d98: 97fffe59 bl 516fc <plat_rockchip_gic_init>
51d9c: a8c17bfd ldp x29, x30, [sp], #16
51da0: 14001188 b 563c0 <plat_rockchip_pmu_init>
0000000000051da4 <bl31_plat_arch_setup>:
51da4: a9bf7bfd stp x29, x30, [sp, #-16]!
51da8: 910003fd mov x29, sp
51dac: 940001b5 bl 52480 <plat_cci_init>
51db0: 940001b9 bl 52494 <plat_cci_enable>
51db4: a8c17bfd ldp x29, x30, [sp], #16
51db8: f0ffff62 adrp x2, 40000 <bl31_entrypoint>
51dbc: d0000225 adrp x5, 97000 <__BL31_END__>
51dc0: 91000042 add x2, x2, #0x0
51dc4: 910000a5 add x5, x5, #0x0
51dc8: aa0203e0 mov x0, x2
51dcc: cb0200a1 sub x1, x5, x2
51dd0: b0000224 adrp x4, 96000 <rockchip_pd_lock>
51dd4: d00000a3 adrp x3, 67000 <__RO_END__>
51dd8: 91000084 add x4, x4, #0x0
51ddc: 91000063 add x3, x3, #0x0
51de0: 14000185 b 523f4 <plat_configure_mmu_el3>
0000000000051de4 <rk_aux_param_handler>:
51de4: f9400001 ldr x1, [x0]
51de8: d1000421 sub x1, x1, #0x1
51dec: f1000c3f cmp x1, #0x3
51df0: 54000628 b.hi 51eb4 <rk_aux_param_handler+0xd0> // b.pmore
51df4: 71000c3f cmp w1, #0x3
51df8: 540005e8 b.hi 51eb4 <rk_aux_param_handler+0xd0> // b.pmore
51dfc: b0000082 adrp x2, 62000 <vprintf+0x400>
51e00: 910c0042 add x2, x2, #0x300
51e04: 38614841 ldrb w1, [x2, w1, uxtw]
51e08: 10000062 adr x2, 51e14 <rk_aux_param_handler+0x30>
51e0c: 8b218841 add x1, x2, w1, sxtb #2
51e10: d61f0020 br x1
51e14: d00000a1 adrp x1, 67000 <__RO_END__>
51e18: b9401003 ldr w3, [x0, #16]
51e1c: 9100e022 add x2, x1, #0x38
51e20: b9003823 str w3, [x1, #56]
51e24: b9401400 ldr w0, [x0, #20]
51e28: b9000440 str w0, [x2, #4]
51e2c: 52800020 mov w0, #0x1 // #1
51e30: d65f03c0 ret
51e34: d00000a1 adrp x1, 67000 <__RO_END__>
51e38: b9401003 ldr w3, [x0, #16]
51e3c: 9100a022 add x2, x1, #0x28
51e40: b9002823 str w3, [x1, #40]
51e44: 17fffff8 b 51e24 <rk_aux_param_handler+0x40>
51e48: 900000e2 adrp x2, 6d000 <dist_ctx+0x1e50>
51e4c: b94dc841 ldr w1, [x2, #3528]
51e50: 7100243f cmp w1, #0x9
51e54: 54000129 b.ls 51e78 <rk_aux_param_handler+0x94> // b.plast
51e58: a9bf7bfd stp x29, x30, [sp, #-16]!
51e5c: b0000080 adrp x0, 62000 <vprintf+0x400>
51e60: 913e9c00 add x0, x0, #0xfa7
51e64: 910003fd mov x29, sp
51e68: 94003287 bl 5e884 <tf_log>
51e6c: 52800020 mov w0, #0x1 // #1
51e70: a8c17bfd ldp x29, x30, [sp], #16
51e74: d65f03c0 ret
51e78: 11000423 add w3, w1, #0x1
51e7c: d37d7c21 ubfiz x1, x1, #3, #32
51e80: b90dc843 str w3, [x2, #3528]
51e84: 900000e2 adrp x2, 6d000 <dist_ctx+0x1e50>
51e88: 9135e042 add x2, x2, #0xd78
51e8c: b9401004 ldr w4, [x0, #16]
51e90: 8b010043 add x3, x2, x1
51e94: b8216844 str w4, [x2, x1]
51e98: b9401400 ldr w0, [x0, #20]
51e9c: b9000460 str w0, [x3, #4]
51ea0: 17ffffe3 b 51e2c <rk_aux_param_handler+0x48>
51ea4: 39404001 ldrb w1, [x0, #16]
51ea8: b0000160 adrp x0, 7e000 <fdt_buffer+0xf378>
51eac: 39322001 strb w1, [x0, #3208]
51eb0: 17ffffdf b 51e2c <rk_aux_param_handler+0x48>
51eb4: 52800000 mov w0, #0x0 // #0
51eb8: d65f03c0 ret
0000000000051ebc <rockchip_get_uart_base>:
51ebc: d00000a0 adrp x0, 67000 <__RO_END__>
51ec0: b9403000 ldr w0, [x0, #48]
51ec4: d65f03c0 ret
0000000000051ec8 <rockchip_get_uart_baudrate>:
51ec8: d00000a0 adrp x0, 67000 <__RO_END__>
51ecc: b9403400 ldr w0, [x0, #52]
51ed0: d65f03c0 ret
0000000000051ed4 <rockchip_get_uart_clock>:
51ed4: 5286c000 mov w0, #0x3600 // #13824
51ed8: 72a02dc0 movk w0, #0x16e, lsl #16
51edc: d65f03c0 ret
0000000000051ee0 <plat_get_rockchip_gpio_reset>:
51ee0: d00000a0 adrp x0, 67000 <__RO_END__>
51ee4: 9100e000 add x0, x0, #0x38
51ee8: b9400401 ldr w1, [x0, #4]
51eec: 3100043f cmn w1, #0x1
51ef0: 9a9f1000 csel x0, x0, xzr, ne // ne = any
51ef4: d65f03c0 ret
0000000000051ef8 <plat_get_rockchip_gpio_poweroff>:
51ef8: d00000a0 adrp x0, 67000 <__RO_END__>
51efc: 9100a000 add x0, x0, #0x28
51f00: b9400401 ldr w1, [x0, #4]
51f04: 3100043f cmn w1, #0x1
51f08: 9a9f1000 csel x0, x0, xzr, ne // ne = any
51f0c: d65f03c0 ret
0000000000051f10 <plat_get_rockchip_suspend_gpio>:
51f10: 900000e1 adrp x1, 6d000 <dist_ctx+0x1e50>
51f14: b94dc821 ldr w1, [x1, #3528]
51f18: b9000001 str w1, [x0]
51f1c: 900000e0 adrp x0, 6d000 <dist_ctx+0x1e50>
51f20: 9135e000 add x0, x0, #0xd78
51f24: d65f03c0 ret
0000000000051f28 <plat_get_rockchip_suspend_apio>:
51f28: b0000160 adrp x0, 7e000 <fdt_buffer+0xf378>
51f2c: 91322000 add x0, x0, #0xc88
51f30: d65f03c0 ret
0000000000051f34 <params_early_setup>:
51f34: a9bd7bfd stp x29, x30, [sp, #-48]!
51f38: 52a00022 mov w2, #0x10000 // #65536
51f3c: 910003fd mov x29, sp
51f40: a90153f3 stp x19, x20, [sp, #16]
51f44: b00000f3 adrp x19, 6e000 <iomux_status+0x2c>
51f48: 91322273 add x19, x19, #0xc88
51f4c: aa0003f4 mov x20, x0
51f50: aa1303e1 mov x1, x19
51f54: 94003d61 bl 614d8 <fdt_open_into>
51f58: 37f80660 tbnz w0, #31, 52024 <params_early_setup+0xf0>
51f5c: b0000081 adrp x1, 62000 <vprintf+0x400>
51f60: 913f5421 add x1, x1, #0xfd5
51f64: aa1303e0 mov x0, x19
51f68: 94003cf9 bl 6134c <fdt_path_offset>
51f6c: 2a0003e1 mov w1, w0
51f70: 37f80420 tbnz w0, #31, 51ff4 <params_early_setup+0xc0>
51f74: aa1303e0 mov x0, x19
51f78: 9100b3e3 add x3, sp, #0x2c
51f7c: b0000082 adrp x2, 62000 <vprintf+0x400>
51f80: 913f7442 add x2, x2, #0xfdd
51f84: 94003c88 bl 611a4 <fdt_getprop>
51f88: aa0003f3 mov x19, x0
51f8c: b4000340 cbz x0, 51ff4 <params_early_setup+0xc0>
51f90: aa0003e1 mov x1, x0
51f94: d28000c2 mov x2, #0x6 // #6
51f98: b0000080 adrp x0, 62000 <vprintf+0x400>
51f9c: 913fa400 add x0, x0, #0xfe9
51fa0: 9400404a bl 620c8 <strncmp>
51fa4: 35000280 cbnz w0, 51ff4 <params_early_setup+0xc0>
51fa8: 39401a61 ldrb w1, [x19, #6]
51fac: 5100c021 sub w1, w1, #0x30
51fb0: 71000c3f cmp w1, #0x3
51fb4: 54000208 b.hi 51ff4 <params_early_setup+0xc0> // b.pmore
51fb8: d00000a0 adrp x0, 67000 <__RO_END__>
51fbc: 53103c21 lsl w1, w1, #16
51fc0: 517a0021 sub w1, w1, #0xe80, lsl #12
51fc4: b9003001 str w1, [x0, #48]
51fc8: aa1303e0 mov x0, x19
51fcc: 52800741 mov w1, #0x3a // #58
51fd0: 9400402e bl 62088 <strchr>
51fd4: b4000100 cbz x0, 51ff4 <params_early_setup+0xc0>
51fd8: 91000400 add x0, x0, #0x1
51fdc: 52800001 mov w1, #0x0 // #0
51fe0: 52800144 mov w4, #0xa // #10
51fe4: 39400002 ldrb w2, [x0]
51fe8: 350000c2 cbnz w2, 52000 <params_early_setup+0xcc>
51fec: d00000a0 adrp x0, 67000 <__RO_END__>
51ff0: b9003401 str w1, [x0, #52]
51ff4: a94153f3 ldp x19, x20, [sp, #16]
51ff8: a8c37bfd ldp x29, x30, [sp], #48
51ffc: d65f03c0 ret
52000: 5101b843 sub w3, w2, #0x6e
52004: 7101945f cmp w2, #0x65
52008: 12001c63 and w3, w3, #0xff
5200c: 7a411860 ccmp w3, #0x1, #0x0, ne // ne = any
52010: 54fffee9 b.ls 51fec <params_early_setup+0xb8> // b.plast
52014: 1b040821 madd w1, w1, w4, w2
52018: 91000400 add x0, x0, #0x1
5201c: 5100c021 sub w1, w1, #0x30
52020: 17fffff1 b 51fe4 <params_early_setup+0xb0>
52024: aa1403e0 mov x0, x20
52028: f0ffffe1 adrp x1, 51000 <gicv3_distif_init_restore+0x168>
5202c: 91379021 add x1, x1, #0xde4
52030: 9400339d bl 5eea4 <bl_aux_params_parse>
52034: 17fffff0 b 51ff4 <params_early_setup+0xc0>
0000000000052038 <rockchip_get_sys_suspend_power_state>:
52038: 52800041 mov w1, #0x2 // #2
5203c: 39000001 strb w1, [x0]
52040: 39000401 strb w1, [x0, #1]
52044: 39000801 strb w1, [x0, #2]
52048: d65f03c0 ret
000000000005204c <rockchip_validate_power_state>:
5204c: 2a0003e3 mov w3, w0
52050: d3504060 ubfx x0, x3, #16, #1
52054: d3586462 ubfx x2, x3, #24, #2
52058: b5000121 cbnz x1, 5207c <rockchip_validate_power_state+0x30>
5205c: a9bf7bfd stp x29, x30, [sp, #-16]!
52060: 90000082 adrp x2, 62000 <vprintf+0x400>
52064: 90000080 adrp x0, 62000 <vprintf+0x400>
52068: 910003fd mov x29, sp
5206c: 913fc042 add x2, x2, #0xff0
52070: 913fe800 add x0, x0, #0xffa
52074: 52801161 mov w1, #0x8b // #139
52078: 94003e6d bl 61a2c <__assert>
5207c: 71000c5f cmp w2, #0x3
52080: 54000100 b.eq 520a0 <rockchip_validate_power_state+0x54> // b.none
52084: 35000120 cbnz w0, 520a8 <rockchip_validate_power_state+0x5c>
52088: 350000c2 cbnz w2, 520a0 <rockchip_validate_power_state+0x54>
5208c: 52800020 mov w0, #0x1 // #1
52090: 39000020 strb w0, [x1]
52094: 72003c7f tst w3, #0xffff
52098: 52800000 mov w0, #0x0 // #0
5209c: 54000040 b.eq 520a4 <rockchip_validate_power_state+0x58> // b.none
520a0: 12800020 mov w0, #0xfffffffe // #-2
520a4: d65f03c0 ret
520a8: 52800040 mov w0, #0x2 // #2
520ac: 39000020 strb w0, [x1]
520b0: 340000a2 cbz w2, 520c4 <rockchip_validate_power_state+0x78>
520b4: 39000420 strb w0, [x1, #1]
520b8: 7100085f cmp w2, #0x2
520bc: 54000041 b.ne 520c4 <rockchip_validate_power_state+0x78> // b.any
520c0: 39000822 strb w2, [x1, #2]
520c4: 11000442 add w2, w2, #0x1
520c8: 52800020 mov w0, #0x1 // #1
520cc: 93407c42 sxtw x2, w2
520d0: 71000c5f cmp w2, #0x3
520d4: 54fffe00 b.eq 52094 <rockchip_validate_power_state+0x48> // b.none
520d8: 38226820 strb w0, [x1, x2]
520dc: 91000442 add x2, x2, #0x1
520e0: 17fffffc b 520d0 <rockchip_validate_power_state+0x84>
00000000000520e4 <rockchip_cpu_standby>:
520e4: 12001c00 and w0, w0, #0xff
520e8: 7100041f cmp w0, #0x1
520ec: 54000120 b.eq 52110 <rockchip_cpu_standby+0x2c> // b.none
520f0: a9bf7bfd stp x29, x30, [sp, #-16]!
520f4: b0000082 adrp x2, 63000 <CSWTCH.22+0x37e>
520f8: 90000080 adrp x0, 62000 <vprintf+0x400>
520fc: 910003fd mov x29, sp
52100: 91006442 add x2, x2, #0x19
52104: 913fe800 add x0, x0, #0xffa
52108: 52801761 mov w1, #0xbb // #187
5210c: 94003e48 bl 61a2c <__assert>
52110: d53e1100 mrs x0, scr_el3
52114: b27f0001 orr x1, x0, #0x2
52118: d51e1101 msr scr_el3, x1
5211c: d5033fdf isb
52120: d5033f9f dsb sy
52124: d503207f wfi
52128: d51e1100 msr scr_el3, x0
5212c: d65f03c0 ret
0000000000052130 <rockchip_pwr_domain_on>:
52130: b00000c1 adrp x1, 6b000 <psci_ns_context+0xc60>
52134: f940d421 ldr x1, [x1, #424]
52138: 140004e0 b 534b8 <rockchip_soc_cores_pwr_dm_on>
000000000005213c <rockchip_pwr_domain_off>:
5213c: a9be7bfd stp x29, x30, [sp, #-32]!
52140: 910003fd mov x29, sp
52144: f9000bf3 str x19, [sp, #16]
52148: aa0003f3 mov x19, x0
5214c: 39400000 ldrb w0, [x0]
52150: 7100081f cmp w0, #0x2
52154: 540000e0 b.eq 52170 <rockchip_pwr_domain_off+0x34> // b.none
52158: b0000082 adrp x2, 63000 <CSWTCH.22+0x37e>
5215c: 90000080 adrp x0, 62000 <vprintf+0x400>
52160: 9100e442 add x2, x2, #0x39
52164: 913fe800 add x0, x0, #0xffa
52168: 52801bc1 mov w1, #0xde // #222
5216c: 94003e30 bl 61a2c <__assert>
52170: 97fffd70 bl 51730 <plat_rockchip_gic_cpuif_disable>
52174: 39400660 ldrb w0, [x19, #1]
52178: 7100081f cmp w0, #0x2
5217c: 54000041 b.ne 52184 <rockchip_pwr_domain_off+0x48> // b.any
52180: 940000c8 bl 524a0 <plat_cci_disable>
52184: 9400050f bl 535c0 <rockchip_soc_cores_pwr_dm_off>
52188: 39400661 ldrb w1, [x19, #1]
5218c: 52800020 mov w0, #0x1 // #1
52190: 94000514 bl 535e0 <rockchip_soc_hlvl_pwr_dm_off>
52194: 3100041f cmn w0, #0x1
52198: 540000c0 b.eq 521b0 <rockchip_pwr_domain_off+0x74> // b.none
5219c: 39400a61 ldrb w1, [x19, #2]
521a0: 52800040 mov w0, #0x2 // #2
521a4: f9400bf3 ldr x19, [sp, #16]
521a8: a8c27bfd ldp x29, x30, [sp], #32
521ac: 1400050d b 535e0 <rockchip_soc_hlvl_pwr_dm_off>
521b0: f9400bf3 ldr x19, [sp, #16]
521b4: a8c27bfd ldp x29, x30, [sp], #32
521b8: d65f03c0 ret
00000000000521bc <rockchip_pwr_domain_suspend>:
521bc: a9be7bfd stp x29, x30, [sp, #-32]!
521c0: 910003fd mov x29, sp
521c4: f9000bf3 str x19, [sp, #16]
521c8: aa0003f3 mov x19, x0
521cc: 39400000 ldrb w0, [x0]
521d0: 7100081f cmp w0, #0x2
521d4: 54000321 b.ne 52238 <rockchip_pwr_domain_suspend+0x7c> // b.any
521d8: 97fffd56 bl 51730 <plat_rockchip_gic_cpuif_disable>
521dc: 39400a60 ldrb w0, [x19, #2]
521e0: 7100081f cmp w0, #0x2
521e4: 54000261 b.ne 52230 <rockchip_pwr_domain_suspend+0x74> // b.any
521e8: 94000710 bl 53e28 <rockchip_soc_sys_pwr_dm_suspend>
521ec: 39400660 ldrb w0, [x19, #1]
521f0: 7100081f cmp w0, #0x2
521f4: 54000041 b.ne 521fc <rockchip_pwr_domain_suspend+0x40> // b.any
521f8: 940000aa bl 524a0 <plat_cci_disable>
521fc: 39400a60 ldrb w0, [x19, #2]
52200: 7100081f cmp w0, #0x2
52204: 540001a0 b.eq 52238 <rockchip_pwr_domain_suspend+0x7c> // b.none
52208: 39400661 ldrb w1, [x19, #1]
5220c: 52800020 mov w0, #0x1 // #1
52210: 94000524 bl 536a0 <rockchip_soc_hlvl_pwr_dm_suspend>
52214: 3100041f cmn w0, #0x1
52218: 54000100 b.eq 52238 <rockchip_pwr_domain_suspend+0x7c> // b.none
5221c: 39400a61 ldrb w1, [x19, #2]
52220: 52800040 mov w0, #0x2 // #2
52224: f9400bf3 ldr x19, [sp, #16]
52228: a8c27bfd ldp x29, x30, [sp], #32
5222c: 1400051d b 536a0 <rockchip_soc_hlvl_pwr_dm_suspend>
52230: 940004f8 bl 53610 <rockchip_soc_cores_pwr_dm_suspend>
52234: 17ffffee b 521ec <rockchip_pwr_domain_suspend+0x30>
52238: f9400bf3 ldr x19, [sp, #16]
5223c: a8c27bfd ldp x29, x30, [sp], #32
52240: d65f03c0 ret
0000000000052244 <rockchip_pwr_domain_on_finish>:
52244: a9be7bfd stp x29, x30, [sp, #-32]!
52248: 910003fd mov x29, sp
5224c: a90153f3 stp x19, x20, [sp, #16]
52250: 39400014 ldrb w20, [x0]
52254: 71000a9f cmp w20, #0x2
52258: 54000261 b.ne 522a4 <rockchip_pwr_domain_on_finish+0x60> // b.any
5225c: 39400401 ldrb w1, [x0, #1]
52260: aa0003f3 mov x19, x0
52264: 52800020 mov w0, #0x1 // #1
52268: 94000524 bl 536f8 <rockchip_soc_hlvl_pwr_dm_on_finish>
5226c: 3100041f cmn w0, #0x1
52270: 54000080 b.eq 52280 <rockchip_pwr_domain_on_finish+0x3c> // b.none
52274: 39400a61 ldrb w1, [x19, #2]
52278: 2a1403e0 mov w0, w20
5227c: 9400051f bl 536f8 <rockchip_soc_hlvl_pwr_dm_on_finish>
52280: 94000514 bl 536d0 <rockchip_soc_cores_pwr_dm_on_finish>
52284: 39400660 ldrb w0, [x19, #1]
52288: 7100081f cmp w0, #0x2
5228c: 54000041 b.ne 52294 <rockchip_pwr_domain_on_finish+0x50> // b.any
52290: 94000081 bl 52494 <plat_cci_enable>
52294: 97fffd2c bl 51744 <plat_rockchip_gic_pcpu_init>
52298: a94153f3 ldp x19, x20, [sp, #16]
5229c: a8c27bfd ldp x29, x30, [sp], #32
522a0: 17fffd1f b 5171c <plat_rockchip_gic_cpuif_enable>
522a4: b0000082 adrp x2, 63000 <CSWTCH.22+0x37e>
522a8: 90000080 adrp x0, 62000 <vprintf+0x400>
522ac: 9100e442 add x2, x2, #0x39
522b0: 913fe800 add x0, x0, #0xffa
522b4: 528023c1 mov w1, #0x11e // #286
522b8: 94003ddd bl 61a2c <__assert>
00000000000522bc <rockchip_pwr_domain_suspend_finish>:
522bc: a9be7bfd stp x29, x30, [sp, #-32]!
522c0: 910003fd mov x29, sp
522c4: a90153f3 stp x19, x20, [sp, #16]
522c8: 39400014 ldrb w20, [x0]
522cc: 71000a9f cmp w20, #0x2
522d0: 540002e1 b.ne 5232c <rockchip_pwr_domain_suspend_finish+0x70> // b.any
522d4: aa0003f3 mov x19, x0
522d8: 39400800 ldrb w0, [x0, #2]
522dc: 7100081f cmp w0, #0x2
522e0: 54000180 b.eq 52310 <rockchip_pwr_domain_suspend_finish+0x54> // b.none
522e4: 39400661 ldrb w1, [x19, #1]
522e8: 52800020 mov w0, #0x1 // #1
522ec: 94000510 bl 5372c <rockchip_soc_hlvl_pwr_dm_resume>
522f0: 3100041f cmn w0, #0x1
522f4: 54000080 b.eq 52304 <rockchip_pwr_domain_suspend_finish+0x48> // b.none
522f8: 39400a61 ldrb w1, [x19, #2]
522fc: 2a1403e0 mov w0, w20
52300: 9400050b bl 5372c <rockchip_soc_hlvl_pwr_dm_resume>
52304: 94000509 bl 53728 <rockchip_soc_cores_pwr_dm_resume>
52308: 97fffd05 bl 5171c <plat_rockchip_gic_cpuif_enable>
5230c: 14000002 b 52314 <rockchip_pwr_domain_suspend_finish+0x58>
52310: 94000c4d bl 55444 <rockchip_soc_sys_pwr_dm_resume>
52314: 39400660 ldrb w0, [x19, #1]
52318: 7100081f cmp w0, #0x2
5231c: 54000081 b.ne 5232c <rockchip_pwr_domain_suspend_finish+0x70> // b.any
52320: a94153f3 ldp x19, x20, [sp, #16]
52324: a8c27bfd ldp x29, x30, [sp], #32
52328: 1400005b b 52494 <plat_cci_enable>
5232c: a94153f3 ldp x19, x20, [sp, #16]
52330: a8c27bfd ldp x29, x30, [sp], #32
52334: d65f03c0 ret
0000000000052338 <rockchip_system_reset>:
52338: a9bf7bfd stp x29, x30, [sp, #-16]!
5233c: 910003fd mov x29, sp
52340: 94000fd7 bl 5629c <rockchip_soc_soft_reset>
0000000000052344 <rockchip_system_poweroff>:
52344: a9bf7bfd stp x29, x30, [sp, #-16]!
52348: 910003fd mov x29, sp
5234c: 94000fe2 bl 562d4 <rockchip_soc_system_off>
0000000000052350 <rockchip_soc_cores_pd_pwr_dn_wfi>:
52350: a9bf7bfd stp x29, x30, [sp, #-16]!
52354: 910003fd mov x29, sp
52358: 940038c0 bl 60658 <psci_power_down_wfi>
000000000005235c <rockchip_soc_sys_pd_pwr_dn_wfi>:
5235c: a9bf7bfd stp x29, x30, [sp, #-16]!
52360: 910003fd mov x29, sp
52364: 940038bd bl 60658 <psci_power_down_wfi>
0000000000052368 <rockchip_pd_pwr_down_wfi>:
52368: a9bf7bfd stp x29, x30, [sp, #-16]!
5236c: 910003fd mov x29, sp
52370: 39400801 ldrb w1, [x0, #2]
52374: 7100083f cmp w1, #0x2
52378: 54000041 b.ne 52380 <rockchip_pd_pwr_down_wfi+0x18> // b.any
5237c: 97fffff8 bl 5235c <rockchip_soc_sys_pd_pwr_dn_wfi>
52380: 97fffff4 bl 52350 <rockchip_soc_cores_pd_pwr_dn_wfi>
0000000000052384 <plat_setup_psci_ops>:
52384: 90000082 adrp x2, 62000 <vprintf+0x400>
52388: 91056042 add x2, x2, #0x158
5238c: f9000022 str x2, [x1]
52390: b00000c1 adrp x1, 6b000 <psci_ns_context+0xc60>
52394: f900d420 str x0, [x1, #424]
52398: 52800000 mov w0, #0x0 // #0
5239c: d65f03c0 ret
00000000000523a0 <plat_get_sec_entrypoint>:
523a0: b00000c0 adrp x0, 6b000 <psci_ns_context+0xc60>
523a4: f940d400 ldr x0, [x0, #424]
523a8: b5000120 cbnz x0, 523cc <plat_get_sec_entrypoint+0x2c>
523ac: a9bf7bfd stp x29, x30, [sp, #-16]!
523b0: b0000082 adrp x2, 63000 <CSWTCH.22+0x37e>
523b4: 90000080 adrp x0, 62000 <vprintf+0x400>
523b8: 910003fd mov x29, sp
523bc: 9101bc42 add x2, x2, #0x6f
523c0: 913fe800 add x0, x0, #0xffa
523c4: 52803361 mov w1, #0x19b // #411
523c8: 94003d99 bl 61a2c <__assert>
523cc: d65f03c0 ret
00000000000523d0 <plat_get_power_domain_tree_desc>:
523d0: b0000080 adrp x0, 63000 <CSWTCH.22+0x37e>
523d4: 910ddc00 add x0, x0, #0x377
523d8: d65f03c0 ret
00000000000523dc <plat_core_pos_by_mpidr>:
523dc: 53067c01 lsr w1, w0, #6
523e0: 121e1c21 and w1, w1, #0x3fc
523e4: 0b200020 add w0, w1, w0, uxtb
523e8: 7100141f cmp w0, #0x5
523ec: 5a9f9000 csinv w0, w0, wzr, ls // ls = plast
523f0: d65f03c0 ret
00000000000523f4 <plat_configure_mmu_el3>:
523f4: a9bd7bfd stp x29, x30, [sp, #-48]!
523f8: 910003fd mov x29, sp
523fc: a90153f3 stp x19, x20, [sp, #16]
52400: aa0403f3 mov x19, x4
52404: aa0203f4 mov x20, x2
52408: aa0103e2 mov x2, x1
5240c: aa0003e1 mov x1, x0
52410: a9025bf5 stp x21, x22, [sp, #32]
52414: aa0503f5 mov x21, x5
52418: aa0303f6 mov x22, x3
5241c: 52800143 mov w3, #0xa // #10
52420: 940033b3 bl 5f2ec <mmap_add_region>
52424: cb1402c2 sub x2, x22, x20
52428: aa1403e1 mov x1, x20
5242c: aa1403e0 mov x0, x20
52430: 52800043 mov w3, #0x2 // #2
52434: 940033ae bl 5f2ec <mmap_add_region>
52438: cb1302a2 sub x2, x21, x19
5243c: aa1303e1 mov x1, x19
52440: 52800103 mov w3, #0x8 // #8
52444: aa1303e0 mov x0, x19
52448: 940033a9 bl 5f2ec <mmap_add_region>
5244c: 90000080 adrp x0, 62000 <vprintf+0x400>
52450: 9108c000 add x0, x0, #0x230
52454: 9400344a bl 5f57c <mmap_add>
52458: 94000fb7 bl 56334 <rockchip_plat_mmu_el3>
5245c: 940034a3 bl 5f6e8 <init_xlat_tables>
52460: a94153f3 ldp x19, x20, [sp, #16]
52464: 52800000 mov w0, #0x0 // #0
52468: a9425bf5 ldp x21, x22, [sp, #32]
5246c: a8c37bfd ldp x29, x30, [sp], #48
52470: 140034d3 b 5f7bc <enable_mmu_el3>
0000000000052474 <plat_get_syscnt_freq2>:
52474: 5286c000 mov w0, #0x3600 // #13824
52478: 72a02dc0 movk w0, #0x16e, lsl #16
5247c: d65f03c0 ret
0000000000052480 <plat_cci_init>:
52480: 52800042 mov w2, #0x2 // #2
52484: 90000081 adrp x1, 62000 <vprintf+0x400>
52488: d2bff600 mov x0, #0xffb00000 // #4289724416
5248c: 910c1021 add x1, x1, #0x304
52490: 17fffcb2 b 51758 <cci_init>
0000000000052494 <plat_cci_enable>:
52494: d53800a0 mrs x0, mpidr_el1
52498: 53083c00 ubfx w0, w0, #8, #8
5249c: 17fffcf6 b 51874 <cci_enable_snoop_dvm_reqs>
00000000000524a0 <plat_cci_disable>:
524a0: d53800a0 mrs x0, mpidr_el1
524a4: 53083c00 ubfx w0, w0, #8, #8
524a8: 17fffd1e b 51920 <cci_disable_snoop_dvm_reqs>
00000000000524ac <sip_smc_handler>:
524ac: aa0603e8 mov x8, x6
524b0: 370000a7 tbnz w7, #0, 524c4 <sip_smc_handler+0x18>
524b4: 92800000 mov x0, #0xffffffffffffffff // #-1
524b8: f9000100 str x0, [x8]
524bc: aa0803e0 mov x0, x8
524c0: d65f03c0 ret
524c4: 529fe02a mov w10, #0xff01 // #65281
524c8: 72b0400a movk w10, #0x8200, lsl #16
524cc: 6b0a001f cmp w0, w10
524d0: 54000140 b.eq 524f8 <sip_smc_handler+0x4c> // b.none
524d4: 1100094a add w10, w10, #0x2
524d8: 6b0a001f cmp w0, w10
524dc: 54000260 b.eq 52528 <sip_smc_handler+0x7c> // b.none
524e0: 529fe00a mov w10, #0xff00 // #65280
524e4: 72b0400a movk w10, #0x8200, lsl #16
524e8: 6b0a001f cmp w0, w10
524ec: 54000241 b.ne 52534 <sip_smc_handler+0x88> // b.any
524f0: d2800060 mov x0, #0x3 // #3
524f4: 17fffff1 b 524b8 <sip_smc_handler+0xc>
524f8: d28e9dc0 mov x0, #0x74ee // #29934
524fc: f2ae4f60 movk x0, #0x727b, lsl #16
52500: f9000cc0 str x0, [x6, #24]
52504: d281b6e0 mov x0, #0xdb7 // #3511
52508: f2b111e0 movk x0, #0x888f, lsl #16
5250c: f90008c0 str x0, [x6, #16]
52510: d28627c0 mov x0, #0x313e // #12606
52514: f2a23cc0 movk x0, #0x11e6, lsl #16
52518: f90004c0 str x0, [x6, #8]
5251c: d298fc40 mov x0, #0xc7e2 // #51170
52520: f2bd0de0 movk x0, #0xe86f, lsl #16
52524: 17ffffe5 b 524b8 <sip_smc_handler+0xc>
52528: d2800020 mov x0, #0x1 // #1
5252c: a90000df stp xzr, x0, [x6]
52530: 17ffffe3 b 524bc <sip_smc_handler+0x10>
52534: 14000018 b 52594 <rockchip_plat_sip_handler>
0000000000052538 <ddr_smc_handler>:
52538: d1000444 sub x4, x2, #0x1
5253c: f1001c9f cmp x4, #0x7
52540: 54000268 b.hi 5258c <ddr_smc_handler+0x54> // b.pmore
52544: 71001c9f cmp w4, #0x7
52548: 54000228 b.hi 5258c <ddr_smc_handler+0x54> // b.pmore
5254c: 90000082 adrp x2, 62000 <vprintf+0x400>
52550: 910c3042 add x2, x2, #0x30c
52554: 38644842 ldrb w2, [x2, w4, uxtw]
52558: 10000064 adr x4, 52564 <ddr_smc_handler+0x2c>
5255c: 8b228882 add x2, x4, w2, sxtb #2
52560: d61f0040 br x2
52564: 14001eb5 b 5a038 <ddr_set_rate>
52568: 14001f23 b 5a1f4 <ddr_round_rate>
5256c: 14001c8c b 5979c <ddr_get_rate>
52570: a9bf7bfd stp x29, x30, [sp, #-16]!
52574: 2a0303e2 mov w2, w3
52578: 910003fd mov x29, sp
5257c: 94001e65 bl 59f10 <dram_set_odt_pd>
52580: 52800000 mov w0, #0x0 // #0
52584: a8c17bfd ldp x29, x30, [sp], #16
52588: d65f03c0 ret
5258c: 52800000 mov w0, #0x0 // #0
52590: d65f03c0 ret
0000000000052594 <rockchip_plat_sip_handler>:
52594: a9be7bfd stp x29, x30, [sp, #-32]!
52598: 2a0003e5 mov w5, w0
5259c: aa0103e0 mov x0, x1
525a0: 910003fd mov x29, sp
525a4: f9000bf3 str x19, [sp, #16]
525a8: aa0203e1 mov x1, x2
525ac: aa0303e2 mov x2, x3
525b0: aa0403e3 mov x3, x4
525b4: 52800104 mov w4, #0x8 // #8
525b8: aa0603f3 mov x19, x6
525bc: 72b04004 movk w4, #0x8200, lsl #16
525c0: 6b0400bf cmp w5, w4
525c4: 54000101 b.ne 525e4 <rockchip_plat_sip_handler+0x50> // b.any
525c8: 97ffffdc bl 52538 <ddr_smc_handler>
525cc: 2a0003e0 mov w0, w0
525d0: f9000260 str x0, [x19]
525d4: aa1303e0 mov x0, x19
525d8: f9400bf3 ldr x19, [sp, #16]
525dc: a8c27bfd ldp x29, x30, [sp], #32
525e0: d65f03c0 ret
525e4: 2a0503e2 mov w2, w5
525e8: b0000081 adrp x1, 63000 <CSWTCH.22+0x37e>
525ec: b0000080 adrp x0, 63000 <CSWTCH.22+0x37e>
525f0: 9102cc21 add x1, x1, #0xb3
525f4: 91026000 add x0, x0, #0x98
525f8: 940030a3 bl 5e884 <tf_log>
525fc: 92800000 mov x0, #0xffffffffffffffff // #-1
52600: 17fffff4 b 525d0 <rockchip_plat_sip_handler+0x3c>
0000000000052604 <gpio_get_clock>:
52604: 71027c1f cmp w0, #0x9f
52608: 54000129 b.ls 5262c <gpio_get_clock+0x28> // b.plast
5260c: a9bf7bfd stp x29, x30, [sp, #-16]!
52610: b0000082 adrp x2, 63000 <CSWTCH.22+0x37e>
52614: b0000080 adrp x0, 63000 <CSWTCH.22+0x37e>
52618: 910003fd mov x29, sp
5261c: 91033442 add x2, x2, #0xcd
52620: 91035800 add x0, x0, #0xd6
52624: 52800921 mov w1, #0x49 // #73
52628: 94003d01 bl 61a2c <__assert>
5262c: 53057c01 lsr w1, w0, #5
52630: 7100103f cmp w1, #0x4
52634: 54000408 b.hi 526b4 <gpio_get_clock+0xb0> // b.pmore
52638: 90000080 adrp x0, 62000 <vprintf+0x400>
5263c: 910c5000 add x0, x0, #0x314
52640: 38614800 ldrb w0, [x0, w1, uxtw]
52644: 10000061 adr x1, 52650 <gpio_get_clock+0x4c>
52648: 8b208820 add x0, x1, w0, sxtb #2
5264c: d61f0000 br x0
52650: d2802081 mov x1, #0x104 // #260
52654: f2bfeea1 movk x1, #0xff75, lsl #16
52658: b9400020 ldr w0, [x1]
5265c: 52a00102 mov w2, #0x80000 // #524288
52660: d3430c00 ubfx x0, x0, #3, #1
52664: 14000006 b 5267c <gpio_get_clock+0x78>
52668: d2802081 mov x1, #0x104 // #260
5266c: f2bfeea1 movk x1, #0xff75, lsl #16
52670: b9400020 ldr w0, [x1]
52674: 52a00202 mov w2, #0x100000 // #1048576
52678: d3441000 ubfx x0, x0, #4, #1
5267c: b9000022 str w2, [x1]
52680: d65f03c0 ret
52684: d2806f81 mov x1, #0x37c // #892
52688: f2bfeec1 movk x1, #0xff76, lsl #16
5268c: 17fffff3 b 52658 <gpio_get_clock+0x54>
52690: d2806f81 mov x1, #0x37c // #892
52694: f2bfeec1 movk x1, #0xff76, lsl #16
52698: 17fffff6 b 52670 <gpio_get_clock+0x6c>
5269c: d2806f81 mov x1, #0x37c // #892
526a0: 52a00402 mov w2, #0x200000 // #2097152
526a4: f2bfeec1 movk x1, #0xff76, lsl #16
526a8: b9400020 ldr w0, [x1]
526ac: d3451400 ubfx x0, x0, #5, #1
526b0: 17fffff3 b 5267c <gpio_get_clock+0x78>
526b4: 52800000 mov w0, #0x0 // #0
526b8: d65f03c0 ret
00000000000526bc <gpio_put_clock>:
526bc: 53057c02 lsr w2, w0, #5
526c0: 71027c1f cmp w0, #0x9f
526c4: 54000188 b.hi 526f4 <gpio_put_clock+0x38> // b.pmore
526c8: 90000080 adrp x0, 62000 <vprintf+0x400>
526cc: 910c7000 add x0, x0, #0x31c
526d0: 38624800 ldrb w0, [x0, w2, uxtw]
526d4: 10000062 adr x2, 526e0 <gpio_put_clock+0x24>
526d8: 8b208840 add x0, x2, w0, sxtb #2
526dc: d61f0000 br x0
526e0: 531d7021 lsl w1, w1, #3
526e4: 320d0021 orr w1, w1, #0x80000
526e8: d2802080 mov x0, #0x104 // #260
526ec: f2bfeea0 movk x0, #0xff75, lsl #16
526f0: b9000001 str w1, [x0]
526f4: d65f03c0 ret
526f8: 531c6c21 lsl w1, w1, #4
526fc: 320c0021 orr w1, w1, #0x100000
52700: 17fffffa b 526e8 <gpio_put_clock+0x2c>
52704: 531d7021 lsl w1, w1, #3
52708: 320d0021 orr w1, w1, #0x80000
5270c: d2806f80 mov x0, #0x37c // #892
52710: f2bfeec0 movk x0, #0xff76, lsl #16
52714: 17fffff7 b 526f0 <gpio_put_clock+0x34>
52718: 531c6c21 lsl w1, w1, #4
5271c: 320c0021 orr w1, w1, #0x100000
52720: 17fffffb b 5270c <gpio_put_clock+0x50>
52724: 531b6821 lsl w1, w1, #5
52728: 320b0021 orr w1, w1, #0x200000
5272c: 17fffff8 b 5270c <gpio_put_clock+0x50>
0000000000052730 <get_pull>:
52730: a9bd7bfd stp x29, x30, [sp, #-48]!
52734: 6b0003e1 negs w1, w0
52738: 12001003 and w3, w0, #0x1f
5273c: 910003fd mov x29, sp
52740: 12001021 and w1, w1, #0x1f
52744: 5a814461 csneg w1, w3, w1, mi // mi = first
52748: a90153f3 stp x19, x20, [sp, #16]
5274c: 52800413 mov w19, #0x20 // #32
52750: 6b0103e2 negs w2, w1
52754: a9025bf5 stp x21, x22, [sp, #32]
52758: 52800115 mov w21, #0x8 // #8
5275c: 12000842 and w2, w2, #0x7
52760: 1ad30c13 sdiv w19, w0, w19
52764: 1ad50c35 sdiv w21, w1, w21
52768: 12000821 and w1, w1, #0x7
5276c: 5a824434 csneg w20, w1, w2, mi // mi = first
52770: 7100127f cmp w19, #0x4
52774: 7a439aa2 ccmp w21, #0x3, #0x2, ls // ls = plast
52778: 540000e9 b.ls 52794 <get_pull+0x64> // b.plast
5277c: b0000082 adrp x2, 63000 <CSWTCH.22+0x37e>
52780: b0000080 adrp x0, 63000 <CSWTCH.22+0x37e>
52784: 91041842 add x2, x2, #0x106
52788: 91035800 add x0, x0, #0xd6
5278c: 528014e1 mov w1, #0xa7 // #167
52790: 94003ca7 bl 61a2c <__assert>
52794: 2a0003f6 mov w22, w0
52798: 97ffff9b bl 52604 <gpio_get_clock>
5279c: 531f7a82 lsl w2, w20, #1
527a0: 2a0003e1 mov w1, w0
527a4: 7100067f cmp w19, #0x1
527a8: 54000368 b.hi 52814 <get_pull+0xe4> // b.pmore
527ac: 52840083 mov w3, #0x2004 // #8196
527b0: 72a1fe63 movk w3, #0xff3, lsl #16
527b4: 0b030263 add w3, w19, w3
527b8: 2a1603e0 mov w0, w22
527bc: 0b030aa3 add w3, w21, w3, lsl #2
527c0: 531e7463 lsl w3, w3, #2
527c4: b9400063 ldr w3, [x3]
527c8: 1ac22463 lsr w3, w3, w2
527cc: 12000463 and w3, w3, #0x3
527d0: 97ffffbb bl 526bc <gpio_put_clock>
527d4: 7100027f cmp w19, #0x0
527d8: 7a410aa2 ccmp w21, #0x1, #0x2, eq // eq = none
527dc: 54000089 b.ls 527ec <get_pull+0xbc> // b.plast
527e0: 71000a7f cmp w19, #0x2
527e4: 7a410aa0 ccmp w21, #0x1, #0x0, eq // eq = none
527e8: 540000c9 b.ls 52800 <get_pull+0xd0> // b.plast
527ec: 71000c7f cmp w3, #0x3
527f0: 54000180 b.eq 52820 <get_pull+0xf0> // b.none
527f4: 7100047f cmp w3, #0x1
527f8: 1a9f17e3 cset w3, eq // eq = none
527fc: 531f7863 lsl w3, w3, #1
52800: 2a0303e0 mov w0, w3
52804: a94153f3 ldp x19, x20, [sp, #16]
52808: a9425bf5 ldp x21, x22, [sp, #32]
5280c: a8c37bfd ldp x29, x30, [sp], #48
52810: d65f03c0 ret
52814: 528fc043 mov w3, #0x7e02 // #32258
52818: 72a1fee3 movk w3, #0xff7, lsl #16
5281c: 17ffffe6 b 527b4 <get_pull+0x84>
52820: 52800023 mov w3, #0x1 // #1
52824: 17fffff7 b 52800 <get_pull+0xd0>
0000000000052828 <set_pull>:
52828: a9bc7bfd stp x29, x30, [sp, #-64]!
5282c: 910003fd mov x29, sp
52830: a90153f3 stp x19, x20, [sp, #16]
52834: 2a0103f3 mov w19, w1
52838: 6b0003e1 negs w1, w0
5283c: 12001014 and w20, w0, #0x1f
52840: 12001021 and w1, w1, #0x1f
52844: 5a814681 csneg w1, w20, w1, mi // mi = first
52848: a9025bf5 stp x21, x22, [sp, #32]
5284c: 52800415 mov w21, #0x20 // #32
52850: 52800116 mov w22, #0x8 // #8
52854: 6b0103f4 negs w20, w1
52858: 1ad50c15 sdiv w21, w0, w21
5285c: 12000a94 and w20, w20, #0x7
52860: f9001bf7 str x23, [sp, #48]
52864: 1ad60c36 sdiv w22, w1, w22
52868: 12000821 and w1, w1, #0x7
5286c: 5a944434 csneg w20, w1, w20, mi // mi = first
52870: 710012bf cmp w21, #0x4
52874: 7a439ac2 ccmp w22, #0x3, #0x2, ls // ls = plast
52878: 540000e9 b.ls 52894 <set_pull+0x6c> // b.plast
5287c: b0000082 adrp x2, 63000 <CSWTCH.22+0x37e>
52880: b0000080 adrp x0, 63000 <CSWTCH.22+0x37e>
52884: 91041842 add x2, x2, #0x106
52888: 91035800 add x0, x0, #0xd6
5288c: 52801a21 mov w1, #0xd1 // #209
52890: 94003c67 bl 61a2c <__assert>
52894: 2a0003f7 mov w23, w0
52898: 97ffff5b bl 52604 <gpio_get_clock>
5289c: 710002bf cmp w21, #0x0
528a0: 2a0003e1 mov w1, w0
528a4: 7a410ac2 ccmp w22, #0x1, #0x2, eq // eq = none
528a8: 54000369 b.ls 52914 <set_pull+0xec> // b.plast
528ac: 71000abf cmp w21, #0x2
528b0: 7a410ac0 ccmp w22, #0x1, #0x0, eq // eq = none
528b4: 54000388 b.hi 52924 <set_pull+0xfc> // b.pmore
528b8: 710006bf cmp w21, #0x1
528bc: 540003a8 b.hi 52930 <set_pull+0x108> // b.pmore
528c0: 531f7a94 lsl w20, w20, #1
528c4: 52800062 mov w2, #0x3 // #3
528c8: 11004280 add w0, w20, #0x10
528cc: 1ad42273 lsl w19, w19, w20
528d0: 1ac02042 lsl w2, w2, w0
528d4: 2a130053 orr w19, w2, w19
528d8: 52840082 mov w2, #0x2004 // #8196
528dc: 72a1fe62 movk w2, #0xff3, lsl #16
528e0: 0b0202b5 add w21, w21, w2
528e4: 2a1703e0 mov w0, w23
528e8: f9401bf7 ldr x23, [sp, #48]
528ec: 0b150ad6 add w22, w22, w21, lsl #2
528f0: 531e76d6 lsl w22, w22, #2
528f4: b90002d3 str w19, [x22]
528f8: a94153f3 ldp x19, x20, [sp, #16]
528fc: a9425bf5 ldp x21, x22, [sp, #32]
52900: a8c47bfd ldp x29, x30, [sp], #64
52904: 17ffff6e b 526bc <gpio_put_clock>
52908: 71000a7f cmp w19, #0x2
5290c: 1a9f17f3 cset w19, eq // eq = none
52910: 17ffffea b 528b8 <set_pull+0x90>
52914: 7100067f cmp w19, #0x1
52918: 54ffff81 b.ne 52908 <set_pull+0xe0> // b.any
5291c: 52800073 mov w19, #0x3 // #3
52920: 17ffffe8 b 528c0 <set_pull+0x98>
52924: 7100067f cmp w19, #0x1
52928: 54ffff01 b.ne 52908 <set_pull+0xe0> // b.any
5292c: 52800073 mov w19, #0x3 // #3
52930: 531f7a94 lsl w20, w20, #1
52934: 52800062 mov w2, #0x3 // #3
52938: 11004280 add w0, w20, #0x10
5293c: 1ad42273 lsl w19, w19, w20
52940: 1ac02042 lsl w2, w2, w0
52944: 2a130053 orr w19, w2, w19
52948: 528fc042 mov w2, #0x7e02 // #32258
5294c: 72a1fee2 movk w2, #0xff7, lsl #16
52950: 17ffffe4 b 528e0 <set_pull+0xb8>
0000000000052954 <set_value>:
52954: a9bd7bfd stp x29, x30, [sp, #-48]!
52958: 12001002 and w2, w0, #0x1f
5295c: 910003fd mov x29, sp
52960: a9025bf5 stp x21, x22, [sp, #32]
52964: 52800415 mov w21, #0x20 // #32
52968: 1ad50c15 sdiv w21, w0, w21
5296c: a90153f3 stp x19, x20, [sp, #16]
52970: 6b0003f4 negs w20, w0
52974: 12001294 and w20, w20, #0x1f
52978: 5a944454 csneg w20, w2, w20, mi // mi = first
5297c: 710012bf cmp w21, #0x4
52980: 7a5f9a82 ccmp w20, #0x1f, #0x2, ls // ls = plast
52984: 540000e9 b.ls 529a0 <set_value+0x4c> // b.plast
52988: b0000082 adrp x2, 63000 <CSWTCH.22+0x37e>
5298c: b0000080 adrp x0, 63000 <CSWTCH.22+0x37e>
52990: 91047c42 add x2, x2, #0x11f
52994: 91035800 add x0, x0, #0xd6
52998: 52802681 mov w1, #0x134 // #308
5299c: 94003c24 bl 61a2c <__assert>
529a0: 2a0103f6 mov w22, w1
529a4: 2a0003f3 mov w19, w0
529a8: 97ffff17 bl 52604 <gpio_get_clock>
529ac: b00000a2 adrp x2, 67000 <__RO_END__>
529b0: 91010042 add x2, x2, #0x40
529b4: 710002df cmp w22, #0x0
529b8: 1a9f07e3 cset w3, ne // ne = any
529bc: b8755844 ldr w4, [x2, w21, uxtw #2]
529c0: 52800022 mov w2, #0x1 // #1
529c4: 1ad42042 lsl w2, w2, w20
529c8: 1ad42074 lsl w20, w3, w20
529cc: a9425bf5 ldp x21, x22, [sp, #32]
529d0: b9400081 ldr w1, [x4]
529d4: 0a220022 bic w2, w1, w2
529d8: 2a0003e1 mov w1, w0
529dc: 2a140042 orr w2, w2, w20
529e0: 2a1303e0 mov w0, w19
529e4: a94153f3 ldp x19, x20, [sp, #16]
529e8: b9000082 str w2, [x4]
529ec: a8c37bfd ldp x29, x30, [sp], #48
529f0: 17ffff33 b 526bc <gpio_put_clock>
00000000000529f4 <get_value>:
529f4: a9bd7bfd stp x29, x30, [sp, #-48]!
529f8: 12001001 and w1, w0, #0x1f
529fc: 910003fd mov x29, sp
52a00: f90013f5 str x21, [sp, #32]
52a04: 52800415 mov w21, #0x20 // #32
52a08: a90153f3 stp x19, x20, [sp, #16]
52a0c: 6b0003f4 negs w20, w0
52a10: 12001294 and w20, w20, #0x1f
52a14: 1ad50c15 sdiv w21, w0, w21
52a18: 5a944434 csneg w20, w1, w20, mi // mi = first
52a1c: 710012bf cmp w21, #0x4
52a20: 7a5f9a82 ccmp w20, #0x1f, #0x2, ls // ls = plast
52a24: 540000e9 b.ls 52a40 <get_value+0x4c> // b.plast
52a28: b0000082 adrp x2, 63000 <CSWTCH.22+0x37e>
52a2c: b0000080 adrp x0, 63000 <CSWTCH.22+0x37e>
52a30: 91047c42 add x2, x2, #0x11f
52a34: 91035800 add x0, x0, #0xd6
52a38: 528024a1 mov w1, #0x125 // #293
52a3c: 94003bfc bl 61a2c <__assert>
52a40: 2a0003f3 mov w19, w0
52a44: 97fffef0 bl 52604 <gpio_get_clock>
52a48: b00000a2 adrp x2, 67000 <__RO_END__>
52a4c: 91010042 add x2, x2, #0x40
52a50: 2a0003e1 mov w1, w0
52a54: 2a1303e0 mov w0, w19
52a58: b8755842 ldr w2, [x2, w21, uxtw #2]
52a5c: 11014042 add w2, w2, #0x50
52a60: b9400043 ldr w3, [x2]
52a64: 97ffff16 bl 526bc <gpio_put_clock>
52a68: 1ad42460 lsr w0, w3, w20
52a6c: 12000000 and w0, w0, #0x1
52a70: a94153f3 ldp x19, x20, [sp, #16]
52a74: f94013f5 ldr x21, [sp, #32]
52a78: a8c37bfd ldp x29, x30, [sp], #48
52a7c: d65f03c0 ret
0000000000052a80 <set_direction>:
52a80: a9bd7bfd stp x29, x30, [sp, #-48]!
52a84: 910003fd mov x29, sp
52a88: a9025bf5 stp x21, x22, [sp, #32]
52a8c: 52800415 mov w21, #0x20 // #32
52a90: 2a0103f6 mov w22, w1
52a94: 1ad50c15 sdiv w21, w0, w21
52a98: a90153f3 stp x19, x20, [sp, #16]
52a9c: 6b0003f4 negs w20, w0
52aa0: 12001001 and w1, w0, #0x1f
52aa4: 12001294 and w20, w20, #0x1f
52aa8: 5a944434 csneg w20, w1, w20, mi // mi = first
52aac: 710012bf cmp w21, #0x4
52ab0: 7a5f9a82 ccmp w20, #0x1f, #0x2, ls // ls = plast
52ab4: 540000e9 b.ls 52ad0 <set_direction+0x50> // b.plast
52ab8: b0000082 adrp x2, 63000 <CSWTCH.22+0x37e>
52abc: b0000080 adrp x0, 63000 <CSWTCH.22+0x37e>
52ac0: 91047c42 add x2, x2, #0x11f
52ac4: 91035800 add x0, x0, #0xd6
52ac8: 52801f01 mov w1, #0xf8 // #248
52acc: 94003bd8 bl 61a2c <__assert>
52ad0: 2a0003f3 mov w19, w0
52ad4: 97fffecc bl 52604 <gpio_get_clock>
52ad8: b00000a2 adrp x2, 67000 <__RO_END__>
52adc: 91010042 add x2, x2, #0x40
52ae0: 710002df cmp w22, #0x0
52ae4: b8755843 ldr w3, [x2, w21, uxtw #2]
52ae8: 1a9f17e2 cset w2, eq // eq = none
52aec: a9425bf5 ldp x21, x22, [sp, #32]
52af0: 11001063 add w3, w3, #0x4
52af4: 1ad42054 lsl w20, w2, w20
52af8: b9400061 ldr w1, [x3]
52afc: 2a010294 orr w20, w20, w1
52b00: b9000074 str w20, [x3]
52b04: 2a0003e1 mov w1, w0
52b08: 2a1303e0 mov w0, w19
52b0c: a94153f3 ldp x19, x20, [sp, #16]
52b10: a8c37bfd ldp x29, x30, [sp], #48
52b14: 17fffeea b 526bc <gpio_put_clock>
0000000000052b18 <get_direction>:
52b18: a9bd7bfd stp x29, x30, [sp, #-48]!
52b1c: 12001001 and w1, w0, #0x1f
52b20: 910003fd mov x29, sp
52b24: f90013f5 str x21, [sp, #32]
52b28: 52800415 mov w21, #0x20 // #32
52b2c: a90153f3 stp x19, x20, [sp, #16]
52b30: 6b0003f4 negs w20, w0
52b34: 12001294 and w20, w20, #0x1f
52b38: 1ad50c15 sdiv w21, w0, w21
52b3c: 5a944434 csneg w20, w1, w20, mi // mi = first
52b40: 710012bf cmp w21, #0x4
52b44: 7a5f9a82 ccmp w20, #0x1f, #0x2, ls // ls = plast
52b48: 540000e9 b.ls 52b64 <get_direction+0x4c> // b.plast
52b4c: b0000082 adrp x2, 63000 <CSWTCH.22+0x37e>
52b50: b0000080 adrp x0, 63000 <CSWTCH.22+0x37e>
52b54: 91047c42 add x2, x2, #0x11f
52b58: 91035800 add x0, x0, #0xd6
52b5c: 528021a1 mov w1, #0x10d // #269
52b60: 94003bb3 bl 61a2c <__assert>
52b64: 2a0003f3 mov w19, w0
52b68: 97fffea7 bl 52604 <gpio_get_clock>
52b6c: b00000a2 adrp x2, 67000 <__RO_END__>
52b70: 91010042 add x2, x2, #0x40
52b74: 2a0003e1 mov w1, w0
52b78: 2a1303e0 mov w0, w19
52b7c: b8755842 ldr w2, [x2, w21, uxtw #2]
52b80: 11001042 add w2, w2, #0x4
52b84: b9400043 ldr w3, [x2]
52b88: 97fffecd bl 526bc <gpio_put_clock>
52b8c: 1ad42474 lsr w20, w3, w20
52b90: 2a3403e0 mvn w0, w20
52b94: 12000000 and w0, w0, #0x1
52b98: a94153f3 ldp x19, x20, [sp, #16]
52b9c: f94013f5 ldr x21, [sp, #32]
52ba0: a8c37bfd ldp x29, x30, [sp], #48
52ba4: d65f03c0 ret
0000000000052ba8 <plat_rockchip_save_gpio>:
52ba8: d2806f80 mov x0, #0x37c // #892
52bac: 52a00701 mov w1, #0x380000 // #3670016
52bb0: f2bfeec0 movk x0, #0xff76, lsl #16
52bb4: b00000a4 adrp x4, 67000 <__RO_END__>
52bb8: 91010084 add x4, x4, #0x40
52bbc: d2800042 mov x2, #0x2 // #2
52bc0: b9400003 ldr w3, [x0]
52bc4: b9000001 str w1, [x0]
52bc8: f00000c0 adrp x0, 6d000 <dist_ctx+0x1e50>
52bcc: 91373000 add x0, x0, #0xdcc
52bd0: b8627881 ldr w1, [x4, x2, lsl #2]
52bd4: 91000442 add x2, x2, #0x1
52bd8: f100145f cmp x2, #0x5
52bdc: 91008000 add x0, x0, #0x20
52be0: 2a0103e5 mov w5, w1
52be4: b94000a5 ldr w5, [x5]
52be8: b81e0005 stur w5, [x0, #-32]
52bec: 11001025 add w5, w1, #0x4
52bf0: b94000a5 ldr w5, [x5]
52bf4: b81e4005 stur w5, [x0, #-28]
52bf8: 1100c025 add w5, w1, #0x30
52bfc: b94000a5 ldr w5, [x5]
52c00: b81e8005 stur w5, [x0, #-24]
52c04: 1100d025 add w5, w1, #0x34
52c08: b94000a5 ldr w5, [x5]
52c0c: b81ec005 stur w5, [x0, #-20]
52c10: 1100e025 add w5, w1, #0x38
52c14: b94000a5 ldr w5, [x5]
52c18: b81f0005 stur w5, [x0, #-16]
52c1c: 1100f025 add w5, w1, #0x3c
52c20: b94000a5 ldr w5, [x5]
52c24: b81f4005 stur w5, [x0, #-12]
52c28: 11012025 add w5, w1, #0x48
52c2c: 11018021 add w1, w1, #0x60
52c30: b94000a5 ldr w5, [x5]
52c34: b81f8005 stur w5, [x0, #-8]
52c38: b9400021 ldr w1, [x1]
52c3c: b81fc001 stur w1, [x0, #-4]
52c40: 54fffc81 b.ne 52bd0 <plat_rockchip_save_gpio+0x28> // b.any
52c44: d2806f81 mov x1, #0x37c // #892
52c48: 32103c60 orr w0, w3, #0xffff0000
52c4c: f2bfeec1 movk x1, #0xff76, lsl #16
52c50: d29c3202 mov x2, #0xe190 // #57744
52c54: f2bfeee2 movk x2, #0xff77, lsl #16
52c58: b9000020 str w0, [x1]
52c5c: d29c0000 mov x0, #0xe000 // #57344
52c60: f00000c1 adrp x1, 6d000 <dist_ctx+0x1e50>
52c64: 9138b021 add x1, x1, #0xe2c
52c68: f2bfeee0 movk x0, #0xff77, lsl #16
52c6c: cb000021 sub x1, x1, x0
52c70: b9400003 ldr w3, [x0]
52c74: b8216803 str w3, [x0, x1]
52c78: 91001000 add x0, x0, #0x4
52c7c: eb02001f cmp x0, x2
52c80: 54ffff81 b.ne 52c70 <plat_rockchip_save_gpio+0xc8> // b.any
52c84: d65f03c0 ret
0000000000052c88 <plat_rockchip_restore_gpio>:
52c88: d29c0000 mov x0, #0xe000 // #57344
52c8c: f00000c1 adrp x1, 6d000 <dist_ctx+0x1e50>
52c90: 9138b021 add x1, x1, #0xe2c
52c94: f2bfeee0 movk x0, #0xff77, lsl #16
52c98: d29c3203 mov x3, #0xe190 // #57744
52c9c: cb000021 sub x1, x1, x0
52ca0: f2bfeee3 movk x3, #0xff77, lsl #16
52ca4: b8616802 ldr w2, [x0, x1]
52ca8: 32103c42 orr w2, w2, #0xffff0000
52cac: b8004402 str w2, [x0], #4
52cb0: eb03001f cmp x0, x3
52cb4: 54ffff81 b.ne 52ca4 <plat_rockchip_restore_gpio+0x1c> // b.any
52cb8: d2806f80 mov x0, #0x37c // #892
52cbc: 52a00701 mov w1, #0x380000 // #3670016
52cc0: f2bfeec0 movk x0, #0xff76, lsl #16
52cc4: 52800043 mov w3, #0x2 // #2
52cc8: b9400002 ldr w2, [x0]
52ccc: b9000001 str w1, [x0]
52cd0: b00000a1 adrp x1, 67000 <__RO_END__>
52cd4: f00000c0 adrp x0, 6d000 <dist_ctx+0x1e50>
52cd8: 91010021 add x1, x1, #0x40
52cdc: 91373000 add x0, x0, #0xdcc
52ce0: b9400824 ldr w4, [x1, #8]
52ce4: 11000463 add w3, w3, #0x1
52ce8: b9400005 ldr w5, [x0]
52cec: 7100147f cmp w3, #0x5
52cf0: 91008000 add x0, x0, #0x20
52cf4: 91001021 add x1, x1, #0x4
52cf8: b9000085 str w5, [x4]
52cfc: b9400424 ldr w4, [x1, #4]
52d00: b85e4005 ldur w5, [x0, #-28]
52d04: 11001084 add w4, w4, #0x4
52d08: b9000085 str w5, [x4]
52d0c: b9400424 ldr w4, [x1, #4]
52d10: b85e8005 ldur w5, [x0, #-24]
52d14: 1100c084 add w4, w4, #0x30
52d18: b9000085 str w5, [x4]
52d1c: b9400424 ldr w4, [x1, #4]
52d20: b85ec005 ldur w5, [x0, #-20]
52d24: 1100d084 add w4, w4, #0x34
52d28: b9000085 str w5, [x4]
52d2c: b9400424 ldr w4, [x1, #4]
52d30: b85f0005 ldur w5, [x0, #-16]
52d34: 1100e084 add w4, w4, #0x38
52d38: b9000085 str w5, [x4]
52d3c: b9400424 ldr w4, [x1, #4]
52d40: b85f4005 ldur w5, [x0, #-12]
52d44: 1100f084 add w4, w4, #0x3c
52d48: b9000085 str w5, [x4]
52d4c: b9400424 ldr w4, [x1, #4]
52d50: b85f8005 ldur w5, [x0, #-8]
52d54: 11012084 add w4, w4, #0x48
52d58: b9000085 str w5, [x4]
52d5c: b9400424 ldr w4, [x1, #4]
52d60: b85fc005 ldur w5, [x0, #-4]
52d64: 11018084 add w4, w4, #0x60
52d68: b9000085 str w5, [x4]
52d6c: 54fffba1 b.ne 52ce0 <plat_rockchip_restore_gpio+0x58> // b.any
52d70: d2806f81 mov x1, #0x37c // #892
52d74: 32103c40 orr w0, w2, #0xffff0000
52d78: f2bfeec1 movk x1, #0xff76, lsl #16
52d7c: b9000020 str w0, [x1]
52d80: d65f03c0 ret
0000000000052d84 <plat_rockchip_gpio_init>:
52d84: 90000080 adrp x0, 62000 <vprintf+0x400>
52d88: 91080000 add x0, x0, #0x200
52d8c: 17fffbb5 b 51c60 <gpio_init>
0000000000052d90 <pmu_power_domain_st>:
52d90: d2800301 mov x1, #0x18 // #24
52d94: f2bfe621 movk x1, #0xff31, lsl #16
52d98: b9400022 ldr w2, [x1]
52d9c: d2800021 mov x1, #0x1 // #1
52da0: 9ac02021 lsl x1, x1, x0
52da4: 6a01005f tst w2, w1
52da8: 1a9f07e0 cset w0, ne // ne = any
52dac: d65f03c0 ret
0000000000052db0 <pmu_power_domain_ctr>:
52db0: a9bd7bfd stp x29, x30, [sp, #-48]!
52db4: 910003fd mov x29, sp
52db8: a9025bf5 stp x21, x22, [sp, #32]
52dbc: 90000235 adrp x21, 96000 <rockchip_pd_lock>
52dc0: 910002b5 add x21, x21, #0x0
52dc4: a90153f3 stp x19, x20, [sp, #16]
52dc8: 2a0103f4 mov w20, w1
52dcc: 2a0003f3 mov w19, w0
52dd0: aa1503e0 mov x0, x21
52dd4: 94002dfa bl 5e5bc <bakery_lock_get>
52dd8: d2800280 mov x0, #0x14 // #20
52ddc: d2800022 mov x2, #0x1 // #1
52de0: f2bfe620 movk x0, #0xff31, lsl #16
52de4: 9ad32042 lsl x2, x2, x19
52de8: 7100069f cmp w20, #0x1
52dec: b9400001 ldr w1, [x0]
52df0: 2a020023 orr w3, w1, w2
52df4: 0a220022 bic w2, w1, w2
52df8: 1a831042 csel w2, w2, w3, ne // ne = any
52dfc: b9000002 str w2, [x0]
52e00: d5033f9f dsb sy
52e04: 5284e236 mov w22, #0x2711 // #10001
52e08: 2a1303e0 mov w0, w19
52e0c: 97ffffe1 bl 52d90 <pmu_power_domain_st>
52e10: 6b14001f cmp w0, w20
52e14: 54000060 b.eq 52e20 <pmu_power_domain_ctr+0x70> // b.none
52e18: 710006d6 subs w22, w22, #0x1
52e1c: 540002a1 b.ne 52e70 <pmu_power_domain_ctr+0xc0> // b.any
52e20: 2a1303e0 mov w0, w19
52e24: 52800016 mov w22, #0x0 // #0
52e28: 97ffffda bl 52d90 <pmu_power_domain_st>
52e2c: 6b14001f cmp w0, w20
52e30: 54000120 b.eq 52e54 <pmu_power_domain_ctr+0xa4> // b.none
52e34: 128002b6 mov w22, #0xffffffea // #-22
52e38: 2a1403e3 mov w3, w20
52e3c: 2a1303e2 mov w2, w19
52e40: b0000081 adrp x1, 63000 <CSWTCH.22+0x37e>
52e44: b0000080 adrp x0, 63000 <CSWTCH.22+0x37e>
52e48: 910ac021 add x1, x1, #0x2b0
52e4c: 9104e000 add x0, x0, #0x138
52e50: 94002e8d bl 5e884 <tf_log>
52e54: aa1503e0 mov x0, x21
52e58: 94002e1b bl 5e6c4 <bakery_lock_release>
52e5c: 2a1603e0 mov w0, w22
52e60: a94153f3 ldp x19, x20, [sp, #16]
52e64: a9425bf5 ldp x21, x22, [sp, #32]
52e68: a8c37bfd ldp x29, x30, [sp], #48
52e6c: d65f03c0 ret
52e70: 52800020 mov w0, #0x1 // #1
52e74: 97fffad6 bl 519cc <udelay>
52e78: 17ffffe4 b 52e08 <pmu_power_domain_ctr+0x58>
0000000000052e7c <clst_pwr_domain_suspend>:
52e7c: a9be7bfd stp x29, x30, [sp, #-32]!
52e80: 910003fd mov x29, sp
52e84: f9000bf3 str x19, [sp, #16]
52e88: 12001c13 and w19, w0, #0xff
52e8c: 94003410 bl 5fecc <plat_my_core_pos>
52e90: 7100141f cmp w0, #0x5
52e94: 540000e9 b.ls 52eb0 <clst_pwr_domain_suspend+0x34> // b.plast
52e98: b0000082 adrp x2, 63000 <CSWTCH.22+0x37e>
52e9c: b0000080 adrp x0, 63000 <CSWTCH.22+0x37e>
52ea0: 91053442 add x2, x2, #0x14d
52ea4: 9105a800 add x0, x0, #0x16a
52ea8: 528046e1 mov w1, #0x237 // #567
52eac: 94003ae0 bl 61a2c <__assert>
52eb0: 71000a7f cmp w19, #0x2
52eb4: 54000401 b.ne 52f34 <clst_pwr_domain_suspend+0xb8> // b.any
52eb8: d2800305 mov x5, #0x18 // #24
52ebc: 7100101f cmp w0, #0x4
52ec0: 52800602 mov w2, #0x30 // #48
52ec4: f2bfe625 movk x5, #0xff31, lsl #16
52ec8: 528001e1 mov w1, #0xf // #15
52ecc: 1a823021 csel w1, w1, w2, cc // cc = lo, ul, last
52ed0: d2800022 mov x2, #0x1 // #1
52ed4: 1a9f37e3 cset w3, cs // cs = hs, nlast
52ed8: 9ac02042 lsl x2, x2, x0
52edc: b94000a0 ldr w0, [x5]
52ee0: 0a220022 bic w2, w1, w2
52ee4: 0a000020 and w0, w1, w0
52ee8: 6b00005f cmp w2, w0
52eec: 54000241 b.ne 52f34 <clst_pwr_domain_suspend+0xb8> // b.any
52ef0: 52800180 mov w0, #0xc // #12
52ef4: 52a06004 mov w4, #0x3000000 // #50331648
52ef8: 72bfeec0 movk w0, #0xff76, lsl #16
52efc: 528014a6 mov w6, #0xa5 // #165
52f00: 0b031400 add w0, w0, w3, lsl #5
52f04: b9000004 str w4, [x0]
52f08: 90000224 adrp x4, 96000 <rockchip_pd_lock>
52f0c: 91046084 add x4, x4, #0x118
52f10: b8237886 str w6, [x4, x3, lsl #2]
52f14: b94000a5 ldr w5, [x5]
52f18: 0a050021 and w1, w1, w5
52f1c: 6b01005f cmp w2, w1
52f20: 540000a0 b.eq 52f34 <clst_pwr_domain_suspend+0xb8> // b.none
52f24: 52802001 mov w1, #0x100 // #256
52f28: 72a06001 movk w1, #0x300, lsl #16
52f2c: b9000001 str w1, [x0]
52f30: b823789f str wzr, [x4, x3, lsl #2]
52f34: f9400bf3 ldr x19, [sp, #16]
52f38: a8c27bfd ldp x29, x30, [sp], #32
52f3c: d65f03c0 ret
0000000000052f40 <clst_pwr_domain_resume>:
52f40: a9be7bfd stp x29, x30, [sp, #-32]!
52f44: 910003fd mov x29, sp
52f48: f9000bf3 str x19, [sp, #16]
52f4c: 12001c13 and w19, w0, #0xff
52f50: 940033df bl 5fecc <plat_my_core_pos>
52f54: 7100141f cmp w0, #0x5
52f58: 540000e9 b.ls 52f74 <clst_pwr_domain_resume+0x34> // b.plast
52f5c: b0000082 adrp x2, 63000 <CSWTCH.22+0x37e>
52f60: b0000080 adrp x0, 63000 <CSWTCH.22+0x37e>
52f64: 91053442 add x2, x2, #0x14d
52f68: 9105a800 add x0, x0, #0x16a
52f6c: 52804c61 mov w1, #0x263 // #611
52f70: 94003aaf bl 61a2c <__assert>
52f74: 71000a7f cmp w19, #0x2
52f78: 540002e1 b.ne 52fd4 <clst_pwr_domain_resume+0x94> // b.any
52f7c: 71000c1f cmp w0, #0x3
52f80: 52800401 mov w1, #0x20 // #32
52f84: 1a9f8021 csel w1, w1, wzr, hi // hi = pmore
52f88: 2a0003e2 mov w2, w0
52f8c: 51627c21 sub w1, w1, #0x89f, lsl #12
52f90: 52800000 mov w0, #0x0 // #0
52f94: 513fd021 sub w1, w1, #0xff4
52f98: b9400023 ldr w3, [x1]
52f9c: 53087c63 lsr w3, w3, #8
52fa0: 7100047f cmp w3, #0x1
52fa4: 54000120 b.eq 52fc8 <clst_pwr_domain_resume+0x88> // b.none
52fa8: 71000c5f cmp w2, #0x3
52fac: b0000081 adrp x1, 63000 <CSWTCH.22+0x37e>
52fb0: 1a9f97e2 cset w2, hi // hi = pmore
52fb4: 910c2821 add x1, x1, #0x30a
52fb8: b0000080 adrp x0, 63000 <CSWTCH.22+0x37e>
52fbc: 91064400 add x0, x0, #0x191
52fc0: 94002e31 bl 5e884 <tf_log>
52fc4: 12800000 mov w0, #0xffffffff // #-1
52fc8: f9400bf3 ldr x19, [sp, #16]
52fcc: a8c27bfd ldp x29, x30, [sp], #32
52fd0: d65f03c0 ret
52fd4: 52800000 mov w0, #0x0 // #0
52fd8: 17fffffc b 52fc8 <clst_pwr_domain_resume+0x88>
0000000000052fdc <pmu_bus_idle_req>:
52fdc: a9bb7bfd stp x29, x30, [sp, #-80]!
52fe0: 910003fd mov x29, sp
52fe4: a90153f3 stp x19, x20, [sp, #16]
52fe8: 2a0103f3 mov w19, w1
52fec: d2800021 mov x1, #0x1 // #1
52ff0: 9ac02020 lsl x0, x1, x0
52ff4: d2800c01 mov x1, #0x60 // #96
52ff8: f2bfe621 movk x1, #0xff31, lsl #16
52ffc: 7100027f cmp w19, #0x0
53000: 1a800273 csel w19, w19, w0, eq // eq = none
53004: a9025bf5 stp x21, x22, [sp, #32]
53008: b9400022 ldr w2, [x1]
5300c: a90363f7 stp x23, x24, [sp, #48]
53010: 2a0003f7 mov w23, w0
53014: d2800c98 mov x24, #0x64 // #100
53018: 0a200040 bic w0, w2, w0
5301c: f90023f9 str x25, [sp, #64]
53020: d2800d19 mov x25, #0x68 // #104
53024: 2a130000 orr w0, w0, w19
53028: 52807d16 mov w22, #0x3e8 // #1000
5302c: f2bfe638 movk x24, #0xff31, lsl #16
53030: f2bfe639 movk x25, #0xff31, lsl #16
53034: b9000020 str w0, [x1]
53038: b9400315 ldr w21, [x24]
5303c: b9400334 ldr w20, [x25]
53040: 0a1502f5 and w21, w23, w21
53044: 6b15027f cmp w19, w21
53048: 0a1402f4 and w20, w23, w20
5304c: 7a540260 ccmp w19, w20, #0x0, eq // eq = none
53050: 540000a0 b.eq 53064 <pmu_bus_idle_req+0x88> // b.none
53054: 52800020 mov w0, #0x1 // #1
53058: 97fffa5d bl 519cc <udelay>
5305c: 710006d6 subs w22, w22, #0x1
53060: 54fffec1 b.ne 53038 <pmu_bus_idle_req+0x5c> // b.any
53064: 6b15027f cmp w19, w21
53068: 7a540260 ccmp w19, w20, #0x0, eq // eq = none
5306c: 54000300 b.eq 530cc <pmu_bus_idle_req+0xf0> // b.none
53070: d2800c80 mov x0, #0x64 // #100
53074: 90000096 adrp x22, 63000 <CSWTCH.22+0x37e>
53078: f2bfe620 movk x0, #0xff31, lsl #16
5307c: 910b52d6 add x22, x22, #0x2d4
53080: 90000093 adrp x19, 63000 <CSWTCH.22+0x37e>
53084: 9106de73 add x19, x19, #0x1b7
53088: b9400002 ldr w2, [x0]
5308c: 2a1503e3 mov w3, w21
53090: aa1603e1 mov x1, x22
53094: aa1303e0 mov x0, x19
53098: 94002dfb bl 5e884 <tf_log>
5309c: d2800d00 mov x0, #0x68 // #104
530a0: 2a1403e3 mov w3, w20
530a4: f2bfe620 movk x0, #0xff31, lsl #16
530a8: aa1603e1 mov x1, x22
530ac: a9425bf5 ldp x21, x22, [sp, #32]
530b0: b9400002 ldr w2, [x0]
530b4: aa1303e0 mov x0, x19
530b8: a94153f3 ldp x19, x20, [sp, #16]
530bc: a94363f7 ldp x23, x24, [sp, #48]
530c0: f94023f9 ldr x25, [sp, #64]
530c4: a8c57bfd ldp x29, x30, [sp], #80
530c8: 14002def b 5e884 <tf_log>
530cc: a94153f3 ldp x19, x20, [sp, #16]
530d0: a9425bf5 ldp x21, x22, [sp, #32]
530d4: a94363f7 ldp x23, x24, [sp, #48]
530d8: f94023f9 ldr x25, [sp, #64]
530dc: a8c57bfd ldp x29, x30, [sp], #80
530e0: d65f03c0 ret
00000000000530e4 <pmu_set_power_domain>:
530e4: a9bd7bfd stp x29, x30, [sp, #-48]!
530e8: 910003fd mov x29, sp
530ec: a90153f3 stp x19, x20, [sp, #16]
530f0: 2a0103f3 mov w19, w1
530f4: 2a0003f4 mov w20, w0
530f8: 97ffff26 bl 52d90 <pmu_power_domain_st>
530fc: 6b13001f cmp w0, w19
53100: 540002e0 b.eq 5315c <pmu_set_power_domain+0x78> // b.none
53104: 35000093 cbnz w19, 53114 <pmu_set_power_domain+0x30>
53108: 2a1403e0 mov w0, w20
5310c: 52800001 mov w1, #0x0 // #0
53110: 97ffff28 bl 52db0 <pmu_power_domain_ctr>
53114: 7100067f cmp w19, #0x1
53118: 51002a82 sub w2, w20, #0xa
5311c: 1a9f17e1 cset w1, eq // eq = none
53120: 7100545f cmp w2, #0x15
53124: 54000128 b.hi 53148 <pmu_set_power_domain+0x64> // b.pmore
53128: f0000060 adrp x0, 62000 <vprintf+0x400>
5312c: 910c9000 add x0, x0, #0x324
53130: 38624800 ldrb w0, [x0, w2, uxtw]
53134: 10000062 adr x2, 53140 <pmu_set_power_domain+0x5c>
53138: 8b208840 add x0, x2, w0, sxtb #2
5313c: d61f0000 br x0
53140: 52800000 mov w0, #0x0 // #0
53144: 97ffffa6 bl 52fdc <pmu_bus_idle_req>
53148: 7100067f cmp w19, #0x1
5314c: 54000081 b.ne 5315c <pmu_set_power_domain+0x78> // b.any
53150: 2a1303e1 mov w1, w19
53154: 2a1403e0 mov w0, w20
53158: 97ffff16 bl 52db0 <pmu_power_domain_ctr>
5315c: 52800000 mov w0, #0x0 // #0
53160: a94153f3 ldp x19, x20, [sp, #16]
53164: a8c37bfd ldp x29, x30, [sp], #48
53168: d65f03c0 ret
5316c: 52800220 mov w0, #0x11 // #17
53170: 17fffff5 b 53144 <pmu_set_power_domain+0x60>
53174: 52800120 mov w0, #0x9 // #9
53178: 17fffff3 b 53144 <pmu_set_power_domain+0x60>
5317c: 52800140 mov w0, #0xa // #10
53180: 17fffff1 b 53144 <pmu_set_power_domain+0x60>
53184: 528000e0 mov w0, #0x7 // #7
53188: b9002fe1 str w1, [sp, #44]
5318c: 97ffff94 bl 52fdc <pmu_bus_idle_req>
53190: b9402fe1 ldr w1, [sp, #44]
53194: 52800100 mov w0, #0x8 // #8
53198: 17ffffeb b 53144 <pmu_set_power_domain+0x60>
5319c: 52800160 mov w0, #0xb // #11
531a0: 17ffffe9 b 53144 <pmu_set_power_domain+0x60>
531a4: 528002e0 mov w0, #0x17 // #23
531a8: 17ffffe7 b 53144 <pmu_set_power_domain+0x60>
531ac: 528001e0 mov w0, #0xf // #15
531b0: b9002fe1 str w1, [sp, #44]
531b4: 97ffff8a bl 52fdc <pmu_bus_idle_req>
531b8: b9402fe1 ldr w1, [sp, #44]
531bc: 52800200 mov w0, #0x10 // #16
531c0: 17ffffe1 b 53144 <pmu_set_power_domain+0x60>
531c4: 52800380 mov w0, #0x1c // #28
531c8: 17ffffdf b 53144 <pmu_set_power_domain+0x60>
531cc: 52800300 mov w0, #0x18 // #24
531d0: 17ffffdd b 53144 <pmu_set_power_domain+0x60>
531d4: 528002c0 mov w0, #0x16 // #22
531d8: 17ffffdb b 53144 <pmu_set_power_domain+0x60>
531dc: 528003a0 mov w0, #0x1d // #29
531e0: 17ffffd9 b 53144 <pmu_set_power_domain+0x60>
531e4: 52800360 mov w0, #0x1b // #27
531e8: 17ffffd7 b 53144 <pmu_set_power_domain+0x60>
531ec: 528000a0 mov w0, #0x5 // #5
531f0: 17ffffd5 b 53144 <pmu_set_power_domain+0x60>
531f4: 52800060 mov w0, #0x3 // #3
531f8: 17ffffd3 b 53144 <pmu_set_power_domain+0x60>
531fc: 52800080 mov w0, #0x4 // #4
53200: 17ffffd1 b 53144 <pmu_set_power_domain+0x60>
53204: 528000c0 mov w0, #0x6 // #6
53208: 17ffffcf b 53144 <pmu_set_power_domain+0x60>
5320c: 52800180 mov w0, #0xc // #12
53210: 17ffffcd b 53144 <pmu_set_power_domain+0x60>
53214: 52800040 mov w0, #0x2 // #2
53218: 17ffffcb b 53144 <pmu_set_power_domain+0x60>
000000000005321c <cpus_power_domain_off>:
5321c: a9bb7bfd stp x29, x30, [sp, #-80]!
53220: 910003fd mov x29, sp
53224: a90153f3 stp x19, x20, [sp, #16]
53228: 2a0003f3 mov w19, w0
5322c: 2a0103f4 mov w20, w1
53230: a9025bf5 stp x21, x22, [sp, #32]
53234: a90363f7 stp x23, x24, [sp, #48]
53238: f90023f9 str x25, [sp, #64]
5323c: 97fffed5 bl 52d90 <pmu_power_domain_st>
53240: 7100041f cmp w0, #0x1
53244: 540007a0 b.eq 53338 <cpus_power_domain_off+0x11c> // b.none
53248: 350007d4 cbnz w20, 53340 <cpus_power_domain_off+0x124>
5324c: 71000e7f cmp w19, #0x3
53250: 52800235 mov w21, #0x11 // #17
53254: 54000128 b.hi 53278 <cpus_power_domain_off+0x5c> // b.pmore
53258: 11000a64 add w4, w19, #0x2
5325c: 2a1303f7 mov w23, w19
53260: 1ac422b5 lsl w21, w21, w4
53264: d2800f98 mov x24, #0x7c // #124
53268: 52803eb6 mov w22, #0x1f5 // #501
5326c: f2bfe638 movk x24, #0xff31, lsl #16
53270: aa1803f9 mov x25, x24
53274: 14000008 b 53294 <cpus_power_domain_off+0x78>
53278: 11002264 add w4, w19, #0x8
5327c: 51001277 sub w23, w19, #0x4
53280: 52800034 mov w20, #0x1 // #1
53284: 1ac422b5 lsl w21, w21, w4
53288: 17fffff7 b 53264 <cpus_power_domain_off+0x48>
5328c: 52800020 mov w0, #0x1 // #1
53290: 97fff9cf bl 519cc <udelay>
53294: b9400300 ldr w0, [x24]
53298: 6a15001f tst w0, w21
5329c: 54000061 b.ne 532a8 <cpus_power_domain_off+0x8c> // b.any
532a0: 710006d6 subs w22, w22, #0x1
532a4: 54ffff41 b.ne 5328c <cpus_power_domain_off+0x70> // b.any
532a8: b9400320 ldr w0, [x25]
532ac: 6a0002bf tst w21, w0
532b0: 540001a0 b.eq 532e4 <cpus_power_domain_off+0xc8> // b.none
532b4: 531e7660 lsl w0, w19, #2
532b8: 7100167f cmp w19, #0x5
532bc: 5173bc00 sub w0, w0, #0xcef, lsl #12
532c0: 513d0000 sub w0, w0, #0xf40
532c4: b900001f str wzr, [x0]
532c8: 540002c9 b.ls 53320 <cpus_power_domain_off+0x104> // b.plast
532cc: 90000082 adrp x2, 63000 <CSWTCH.22+0x37e>
532d0: 90000080 adrp x0, 63000 <CSWTCH.22+0x37e>
532d4: 91053442 add x2, x2, #0x14d
532d8: 9105a800 add x0, x0, #0x16a
532dc: 52803c41 mov w1, #0x1e2 // #482
532e0: 940039d3 bl 61a2c <__assert>
532e4: 2a1503e4 mov w4, w21
532e8: 2a1703e3 mov w3, w23
532ec: 2a1403e2 mov w2, w20
532f0: 90000081 adrp x1, 63000 <CSWTCH.22+0x37e>
532f4: 90000080 adrp x0, 63000 <CSWTCH.22+0x37e>
532f8: 910b1421 add x1, x1, #0x2c5
532fc: 91071800 add x0, x0, #0x1c6
53300: 94002d61 bl 5e884 <tf_log>
53304: 128002a0 mov w0, #0xffffffea // #-22
53308: a94153f3 ldp x19, x20, [sp, #16]
5330c: a9425bf5 ldp x21, x22, [sp, #32]
53310: a94363f7 ldp x23, x24, [sp, #48]
53314: f94023f9 ldr x25, [sp, #64]
53318: a8c57bfd ldp x29, x30, [sp], #80
5331c: d65f03c0 ret
53320: f0000200 adrp x0, 96000 <rockchip_pd_lock>
53324: 91015000 add x0, x0, #0x54
53328: 52800021 mov w1, #0x1 // #1
5332c: b833581f str wzr, [x0, w19, uxtw #2]
53330: 2a1303e0 mov w0, w19
53334: 97fffe9f bl 52db0 <pmu_power_domain_ctr>
53338: 52800000 mov w0, #0x0 // #0
5333c: 17fffff3 b 53308 <cpus_power_domain_off+0xec>
53340: 7100167f cmp w19, #0x5
53344: 54fffc48 b.hi 532cc <cpus_power_domain_off+0xb0> // b.pmore
53348: f0000200 adrp x0, 96000 <rockchip_pd_lock>
5334c: 91015000 add x0, x0, #0x54
53350: 71000a9f cmp w20, #0x2
53354: b8335814 str w20, [x0, w19, uxtw #2]
53358: 531e7673 lsl w19, w19, #2
5335c: 5173be73 sub w19, w19, #0xcef, lsl #12
53360: 52800060 mov w0, #0x3 // #3
53364: 513d0273 sub w19, w19, #0xf40
53368: 1a9f0400 csinc w0, w0, wzr, eq // eq = none
5336c: b9000260 str w0, [x19]
53370: d5033f9f dsb sy
53374: 17fffff1 b 53338 <cpus_power_domain_off+0x11c>
0000000000053378 <pmu_power_domains_on>:
53378: a9bf7bfd stp x29, x30, [sp, #-16]!
5337c: 910003fd mov x29, sp
53380: 94000de9 bl 56b24 <clk_gate_con_disable>
53384: 52800001 mov w1, #0x0 // #0
53388: 52800220 mov w0, #0x11 // #17
5338c: 97ffff56 bl 530e4 <pmu_set_power_domain>
53390: 52800001 mov w1, #0x0 // #0
53394: 52800200 mov w0, #0x10 // #16
53398: 97ffff53 bl 530e4 <pmu_set_power_domain>
5339c: 52800001 mov w1, #0x0 // #0
533a0: 52800240 mov w0, #0x12 // #18
533a4: 97ffff50 bl 530e4 <pmu_set_power_domain>
533a8: 52800001 mov w1, #0x0 // #0
533ac: 52800260 mov w0, #0x13 // #19
533b0: 97ffff4d bl 530e4 <pmu_set_power_domain>
533b4: 52800001 mov w1, #0x0 // #0
533b8: 52800380 mov w0, #0x1c // #28
533bc: 97ffff4a bl 530e4 <pmu_set_power_domain>
533c0: 52800001 mov w1, #0x0 // #0
533c4: 52800320 mov w0, #0x19 // #25
533c8: 97ffff47 bl 530e4 <pmu_set_power_domain>
533cc: 52800001 mov w1, #0x0 // #0
533d0: 528003e0 mov w0, #0x1f // #31
533d4: 97ffff44 bl 530e4 <pmu_set_power_domain>
533d8: 52800001 mov w1, #0x0 // #0
533dc: 52800300 mov w0, #0x18 // #24
533e0: 97ffff41 bl 530e4 <pmu_set_power_domain>
533e4: 52800001 mov w1, #0x0 // #0
533e8: 528002e0 mov w0, #0x17 // #23
533ec: 97ffff3e bl 530e4 <pmu_set_power_domain>
533f0: 52800001 mov w1, #0x0 // #0
533f4: 528002c0 mov w0, #0x16 // #22
533f8: 97ffff3b bl 530e4 <pmu_set_power_domain>
533fc: 52800001 mov w1, #0x0 // #0
53400: 52800280 mov w0, #0x14 // #20
53404: 97ffff38 bl 530e4 <pmu_set_power_domain>
53408: 52800001 mov w1, #0x0 // #0
5340c: 52800120 mov w0, #0x9 // #9
53410: 97ffff35 bl 530e4 <pmu_set_power_domain>
53414: 52800001 mov w1, #0x0 // #0
53418: 52800100 mov w0, #0x8 // #8
5341c: 97ffff32 bl 530e4 <pmu_set_power_domain>
53420: a8c17bfd ldp x29, x30, [sp], #16
53424: 52800001 mov w1, #0x0 // #0
53428: 528001e0 mov w0, #0xf // #15
5342c: 17ffff2e b 530e4 <pmu_set_power_domain>
0000000000053430 <rk3399_flush_l2_b>:
53430: d2800481 mov x1, #0x24 // #36
53434: a9bd7bfd stp x29, x30, [sp, #-48]!
53438: f2bfe621 movk x1, #0xff31, lsl #16
5343c: 910003fd mov x29, sp
53440: b9400020 ldr w0, [x1]
53444: a90153f3 stp x19, x20, [sp, #16]
53448: 32020000 orr w0, w0, #0x40000000
5344c: f90013f5 str x21, [sp, #32]
53450: b9000020 str w0, [x1]
53454: d5033f9f dsb sy
53458: d2800f95 mov x21, #0x7c // #124
5345c: 90000094 adrp x20, 63000 <CSWTCH.22+0x37e>
53460: 91077e94 add x20, x20, #0x1df
53464: 52800013 mov w19, #0x0 // #0
53468: f2bfe635 movk x21, #0xff31, lsl #16
5346c: b94002a0 ldr w0, [x21]
53470: 36500140 tbz w0, #10, 53498 <rk3399_flush_l2_b+0x68>
53474: d2800481 mov x1, #0x24 // #36
53478: f2bfe621 movk x1, #0xff31, lsl #16
5347c: a94153f3 ldp x19, x20, [sp, #16]
53480: b9400020 ldr w0, [x1]
53484: f94013f5 ldr x21, [sp, #32]
53488: 12017800 and w0, w0, #0xbfffffff
5348c: b9000020 str w0, [x1]
53490: a8c37bfd ldp x29, x30, [sp], #48
53494: d65f03c0 ret
53498: 11000673 add w19, w19, #0x1
5349c: 52800140 mov w0, #0xa // #10
534a0: 97fff94b bl 519cc <udelay>
534a4: 710fa27f cmp w19, #0x3e8
534a8: 54fffe21 b.ne 5346c <rk3399_flush_l2_b+0x3c> // b.any
534ac: aa1403e0 mov x0, x20
534b0: 94002cf5 bl 5e884 <tf_log>
534b4: 17ffffee b 5346c <rk3399_flush_l2_b+0x3c>
00000000000534b8 <rockchip_soc_cores_pwr_dm_on>:
534b8: a9be7bfd stp x29, x30, [sp, #-32]!
534bc: 910003fd mov x29, sp
534c0: a90153f3 stp x19, x20, [sp, #16]
534c4: aa0103f4 mov x20, x1
534c8: 97fffbc5 bl 523dc <plat_core_pos_by_mpidr>
534cc: 7100141f cmp w0, #0x5
534d0: 540000e9 b.ls 534ec <rockchip_soc_cores_pwr_dm_on+0x34> // b.plast
534d4: 90000082 adrp x2, 63000 <CSWTCH.22+0x37e>
534d8: 91053442 add x2, x2, #0x14d
534dc: 52805141 mov w1, #0x28a // #650
534e0: 90000080 adrp x0, 63000 <CSWTCH.22+0x37e>
534e4: 9105a800 add x0, x0, #0x16a
534e8: 94003951 bl 61a2c <__assert>
534ec: 2a0003e2 mov w2, w0
534f0: f0000203 adrp x3, 96000 <rockchip_pd_lock>
534f4: 91040063 add x3, x3, #0x100
534f8: 2a0003f3 mov w19, w0
534fc: b8627861 ldr w1, [x3, x2, lsl #2]
53500: 340000a1 cbz w1, 53514 <rockchip_soc_cores_pwr_dm_on+0x5c>
53504: 90000082 adrp x2, 63000 <CSWTCH.22+0x37e>
53508: 52805161 mov w1, #0x28b // #651
5350c: 91084442 add x2, x2, #0x211
53510: 17fffff4 b 534e0 <rockchip_soc_cores_pwr_dm_on+0x28>
53514: 5281e001 mov w1, #0xf00 // #3840
53518: b8227861 str w1, [x3, x2, lsl #2]
5351c: f0000203 adrp x3, 96000 <rockchip_pd_lock>
53520: 91034063 add x3, x3, #0xd0
53524: f8227874 str x20, [x3, x2, lsl #3]
53528: d5033f9f dsb sy
5352c: f0000201 adrp x1, 96000 <rockchip_pd_lock>
53530: 91015021 add x1, x1, #0x54
53534: b8627821 ldr w1, [x1, x2, lsl #2]
53538: 35000241 cbnz w1, 53580 <rockchip_soc_cores_pwr_dm_on+0xc8>
5353c: 531e7403 lsl w3, w0, #2
53540: 5173bc63 sub w3, w3, #0xcef, lsl #12
53544: 513d0063 sub w3, w3, #0xf40
53548: b900007f str wzr, [x3]
5354c: 97fffe11 bl 52d90 <pmu_power_domain_st>
53550: 350000a0 cbnz w0, 53564 <rockchip_soc_cores_pwr_dm_on+0xac>
53554: b900007f str wzr, [x3]
53558: 2a1303e0 mov w0, w19
5355c: 52800021 mov w1, #0x1 // #1
53560: 97fffe14 bl 52db0 <pmu_power_domain_ctr>
53564: 2a1303e0 mov w0, w19
53568: 52800001 mov w1, #0x0 // #0
5356c: 97fffe11 bl 52db0 <pmu_power_domain_ctr>
53570: 52800000 mov w0, #0x0 // #0
53574: a94153f3 ldp x19, x20, [sp, #16]
53578: a8c27bfd ldp x29, x30, [sp], #32
5357c: d65f03c0 ret
53580: 97fffe04 bl 52d90 <pmu_power_domain_st>
53584: 35000100 cbnz w0, 535a4 <rockchip_soc_cores_pwr_dm_on+0xec>
53588: 2a1303e2 mov w2, w19
5358c: 90000081 adrp x1, 63000 <CSWTCH.22+0x37e>
53590: 90000080 adrp x0, 63000 <CSWTCH.22+0x37e>
53594: 910bd421 add x1, x1, #0x2f5
53598: 9108ac00 add x0, x0, #0x22b
5359c: 94002cba bl 5e884 <tf_log>
535a0: 17fffff4 b 53570 <rockchip_soc_cores_pwr_dm_on+0xb8>
535a4: 531e7673 lsl w19, w19, #2
535a8: 52800100 mov w0, #0x8 // #8
535ac: 5173be73 sub w19, w19, #0xcef, lsl #12
535b0: 513d0273 sub w19, w19, #0xf40
535b4: b9000260 str w0, [x19]
535b8: d5033f9f dsb sy
535bc: 17ffffed b 53570 <rockchip_soc_cores_pwr_dm_on+0xb8>
00000000000535c0 <rockchip_soc_cores_pwr_dm_off>:
535c0: a9bf7bfd stp x29, x30, [sp, #-16]!
535c4: 910003fd mov x29, sp
535c8: 94003241 bl 5fecc <plat_my_core_pos>
535cc: 52800021 mov w1, #0x1 // #1
535d0: 97ffff13 bl 5321c <cpus_power_domain_off>
535d4: 52800000 mov w0, #0x0 // #0
535d8: a8c17bfd ldp x29, x30, [sp], #16
535dc: d65f03c0 ret
00000000000535e0 <rockchip_soc_hlvl_pwr_dm_off>:
535e0: 7100041f cmp w0, #0x1
535e4: 54000121 b.ne 53608 <rockchip_soc_hlvl_pwr_dm_off+0x28> // b.any
535e8: 12001c21 and w1, w1, #0xff
535ec: a9bf7bfd stp x29, x30, [sp, #-16]!
535f0: 2a0103e0 mov w0, w1
535f4: 910003fd mov x29, sp
535f8: 97fffe21 bl 52e7c <clst_pwr_domain_suspend>
535fc: 52800000 mov w0, #0x0 // #0
53600: a8c17bfd ldp x29, x30, [sp], #16
53604: d65f03c0 ret
53608: 52800000 mov w0, #0x0 // #0
5360c: d65f03c0 ret
0000000000053610 <rockchip_soc_cores_pwr_dm_suspend>:
53610: a9be7bfd stp x29, x30, [sp, #-32]!
53614: 910003fd mov x29, sp
53618: a90153f3 stp x19, x20, [sp, #16]
5361c: 9400322c bl 5fecc <plat_my_core_pos>
53620: 7100141f cmp w0, #0x5
53624: 540000e9 b.ls 53640 <rockchip_soc_cores_pwr_dm_suspend+0x30> // b.plast
53628: 90000082 adrp x2, 63000 <CSWTCH.22+0x37e>
5362c: 91053442 add x2, x2, #0x14d
53630: 52805581 mov w1, #0x2ac // #684
53634: 90000080 adrp x0, 63000 <CSWTCH.22+0x37e>
53638: 9105a800 add x0, x0, #0x16a
5363c: 940038fc bl 61a2c <__assert>
53640: 2a0003f3 mov w19, w0
53644: f0000200 adrp x0, 96000 <rockchip_pd_lock>
53648: 2a1303f4 mov w20, w19
5364c: 91040000 add x0, x0, #0x100
53650: b8747801 ldr w1, [x0, x20, lsl #2]
53654: 340000a1 cbz w1, 53668 <rockchip_soc_cores_pwr_dm_suspend+0x58>
53658: 90000082 adrp x2, 63000 <CSWTCH.22+0x37e>
5365c: 528055a1 mov w1, #0x2ad // #685
53660: 91084442 add x2, x2, #0x211
53664: 17fffff4 b 53634 <rockchip_soc_cores_pwr_dm_suspend+0x24>
53668: 52801e01 mov w1, #0xf0 // #240
5366c: b8347801 str w1, [x0, x20, lsl #2]
53670: 97fffb4c bl 523a0 <plat_get_sec_entrypoint>
53674: f0000201 adrp x1, 96000 <rockchip_pd_lock>
53678: 91034021 add x1, x1, #0xd0
5367c: f8347820 str x0, [x1, x20, lsl #3]
53680: d5033f9f dsb sy
53684: 52800041 mov w1, #0x2 // #2
53688: 2a1303e0 mov w0, w19
5368c: 97fffee4 bl 5321c <cpus_power_domain_off>
53690: 52800000 mov w0, #0x0 // #0
53694: a94153f3 ldp x19, x20, [sp, #16]
53698: a8c27bfd ldp x29, x30, [sp], #32
5369c: d65f03c0 ret
00000000000536a0 <rockchip_soc_hlvl_pwr_dm_suspend>:
536a0: 7100041f cmp w0, #0x1
536a4: 54000121 b.ne 536c8 <rockchip_soc_hlvl_pwr_dm_suspend+0x28> // b.any
536a8: 12001c21 and w1, w1, #0xff
536ac: a9bf7bfd stp x29, x30, [sp, #-16]!
536b0: 2a0103e0 mov w0, w1
536b4: 910003fd mov x29, sp
536b8: 97fffdf1 bl 52e7c <clst_pwr_domain_suspend>
536bc: 52800000 mov w0, #0x0 // #0
536c0: a8c17bfd ldp x29, x30, [sp], #16
536c4: d65f03c0 ret
536c8: 52800000 mov w0, #0x0 // #0
536cc: d65f03c0 ret
00000000000536d0 <rockchip_soc_cores_pwr_dm_on_finish>:
536d0: a9bf7bfd stp x29, x30, [sp, #-16]!
536d4: 910003fd mov x29, sp
536d8: 940031fd bl 5fecc <plat_my_core_pos>
536dc: 531e7400 lsl w0, w0, #2
536e0: 5173bc00 sub w0, w0, #0xcef, lsl #12
536e4: 513d0000 sub w0, w0, #0xf40
536e8: b900001f str wzr, [x0]
536ec: 52800000 mov w0, #0x0 // #0
536f0: a8c17bfd ldp x29, x30, [sp], #16
536f4: d65f03c0 ret
00000000000536f8 <rockchip_soc_hlvl_pwr_dm_on_finish>:
536f8: 7100041f cmp w0, #0x1
536fc: 54000121 b.ne 53720 <rockchip_soc_hlvl_pwr_dm_on_finish+0x28> // b.any
53700: 12001c21 and w1, w1, #0xff
53704: a9bf7bfd stp x29, x30, [sp, #-16]!
53708: 2a0103e0 mov w0, w1
5370c: 910003fd mov x29, sp
53710: 97fffe0c bl 52f40 <clst_pwr_domain_resume>
53714: 52800000 mov w0, #0x0 // #0
53718: a8c17bfd ldp x29, x30, [sp], #16
5371c: d65f03c0 ret
53720: 52800000 mov w0, #0x0 // #0
53724: d65f03c0 ret
0000000000053728 <rockchip_soc_cores_pwr_dm_resume>:
53728: 17ffffea b 536d0 <rockchip_soc_cores_pwr_dm_on_finish>
000000000005372c <rockchip_soc_hlvl_pwr_dm_resume>:
5372c: 7100041f cmp w0, #0x1
53730: 54000121 b.ne 53754 <rockchip_soc_hlvl_pwr_dm_resume+0x28> // b.any
53734: 12001c21 and w1, w1, #0xff
53738: a9bf7bfd stp x29, x30, [sp, #-16]!
5373c: 2a0103e0 mov w0, w1
53740: 910003fd mov x29, sp
53744: 97fffdff bl 52f40 <clst_pwr_domain_resume>
53748: 52800000 mov w0, #0x0 // #0
5374c: a8c17bfd ldp x29, x30, [sp], #16
53750: d65f03c0 ret
53754: 52800000 mov w0, #0x0 // #0
53758: d65f03c0 ret
000000000005375c <sram_save>:
5375c: a9bd7bfd stp x29, x30, [sp, #-48]!
53760: d07fc361 adrp x1, ff8c1000 <__sram_incbin_end>
53764: 91000021 add x1, x1, #0x0
53768: 910003fd mov x29, sp
5376c: a90153f3 stp x19, x20, [sp, #16]
53770: d07fc373 adrp x19, ff8c1000 <__sram_incbin_end>
53774: 91024273 add x19, x19, #0x90
53778: cb010273 sub x19, x19, x1
5377c: f07fc360 adrp x0, ff8c2000 <__bl31_sram_text_end>
53780: 91000000 add x0, x0, #0x0
53784: a9025bf5 stp x21, x22, [sp, #32]
53788: f07fc376 adrp x22, ff8c2000 <__bl31_sram_text_end>
5378c: f0000155 adrp x21, 7e000 <fdt_buffer+0xf378>
53790: 910002d6 add x22, x22, #0x0
53794: 913226b5 add x21, x21, #0xc89
53798: cb160014 sub x20, x0, x22
5379c: aa1303e2 mov x2, x19
537a0: aa1503e0 mov x0, x21
537a4: 940038c7 bl 61ac0 <memcpy>
537a8: aa1403e2 mov x2, x20
537ac: aa1603e1 mov x1, x22
537b0: 8b1302a0 add x0, x21, x19
537b4: 940038c3 bl 61ac0 <memcpy>
537b8: 8b140260 add x0, x19, x20
537bc: b07fc361 adrp x1, ff8c0000 <rk3399m0_bin>
537c0: 8b0002a0 add x0, x21, x0
537c4: 91000021 add x1, x1, #0x0
537c8: a94153f3 ldp x19, x20, [sp, #16]
537cc: b07fc362 adrp x2, ff8c0000 <rk3399m0_bin>
537d0: a9425bf5 ldp x21, x22, [sp, #32]
537d4: 910c4042 add x2, x2, #0x310
537d8: a8c37bfd ldp x29, x30, [sp], #48
537dc: cb010042 sub x2, x2, x1
537e0: 140038b8 b 61ac0 <memcpy>
00000000000537e4 <sram_restore>:
537e4: a9bd7bfd stp x29, x30, [sp, #-48]!
537e8: d07fc360 adrp x0, ff8c1000 <__sram_incbin_end>
537ec: 91000000 add x0, x0, #0x0
537f0: 910003fd mov x29, sp
537f4: a90153f3 stp x19, x20, [sp, #16]
537f8: d07fc373 adrp x19, ff8c1000 <__sram_incbin_end>
537fc: 91024273 add x19, x19, #0x90
53800: cb000273 sub x19, x19, x0
53804: f07fc361 adrp x1, ff8c2000 <__bl31_sram_text_end>
53808: 91000021 add x1, x1, #0x0
5380c: a9025bf5 stp x21, x22, [sp, #32]
53810: f07fc376 adrp x22, ff8c2000 <__bl31_sram_text_end>
53814: f0000155 adrp x21, 7e000 <fdt_buffer+0xf378>
53818: 910002d6 add x22, x22, #0x0
5381c: 913226b5 add x21, x21, #0xc89
53820: cb160034 sub x20, x1, x22
53824: aa1303e2 mov x2, x19
53828: aa1503e1 mov x1, x21
5382c: 940038a5 bl 61ac0 <memcpy>
53830: 8b1302a1 add x1, x21, x19
53834: aa1403e2 mov x2, x20
53838: aa1603e0 mov x0, x22
5383c: 940038a1 bl 61ac0 <memcpy>
53840: 8b140261 add x1, x19, x20
53844: b07fc360 adrp x0, ff8c0000 <rk3399m0_bin>
53848: 8b0102a1 add x1, x21, x1
5384c: 91000000 add x0, x0, #0x0
53850: a94153f3 ldp x19, x20, [sp, #16]
53854: b07fc362 adrp x2, ff8c0000 <rk3399m0_bin>
53858: a9425bf5 ldp x21, x22, [sp, #32]
5385c: 910c4042 add x2, x2, #0x310
53860: a8c37bfd ldp x29, x30, [sp], #48
53864: cb000042 sub x2, x2, x0
53868: 14003896 b 61ac0 <memcpy>
000000000005386c <suspend_uart>:
5386c: a9bf7bfd stp x29, x30, [sp, #-16]!
53870: 910003fd mov x29, sp
53874: 97fff992 bl 51ebc <rockchip_get_uart_base>
53878: 34000280 cbz w0, 538c8 <suspend_uart+0x5c>
5387c: 11003002 add w2, w0, #0xc
53880: 11001004 add w4, w0, #0x4
53884: f00000c5 adrp x5, 6e000 <iomux_status+0x2c>
53888: 9128b0a1 add x1, x5, #0xa2c
5388c: b9400043 ldr w3, [x2]
53890: b9400086 ldr w6, [x4]
53894: b9000826 str w6, [x1, #8]
53898: 11004006 add w6, w0, #0x10
5389c: 2a0003e0 mov w0, w0
538a0: b9001423 str w3, [x1, #20]
538a4: b94000c6 ldr w6, [x6]
538a8: b9001026 str w6, [x1, #16]
538ac: 32190066 orr w6, w3, #0x80
538b0: b9000046 str w6, [x2]
538b4: b9400000 ldr w0, [x0]
538b8: b90a2ca0 str w0, [x5, #2604]
538bc: b9400080 ldr w0, [x4]
538c0: b9000043 str w3, [x2]
538c4: b9000420 str w0, [x1, #4]
538c8: a8c17bfd ldp x29, x30, [sp], #16
538cc: d65f03c0 ret
00000000000538d0 <resume_uart>:
538d0: a9bf7bfd stp x29, x30, [sp, #-16]!
538d4: 910003fd mov x29, sp
538d8: 97fff979 bl 51ebc <rockchip_get_uart_base>
538dc: 34000380 cbz w0, 5394c <resume_uart+0x7c>
538e0: 11022001 add w1, w0, #0x88
538e4: 528000e2 mov w2, #0x7 // #7
538e8: 11004003 add w3, w0, #0x10
538ec: 52800204 mov w4, #0x10 // #16
538f0: b9000022 str w2, [x1]
538f4: 11003002 add w2, w0, #0xc
538f8: b9400041 ldr w1, [x2]
538fc: b9000064 str w4, [x3]
53900: f00000c4 adrp x4, 6e000 <iomux_status+0x2c>
53904: 32190021 orr w1, w1, #0x80
53908: b9000041 str w1, [x2]
5390c: b94a2c85 ldr w5, [x4, #2604]
53910: 9128b081 add x1, x4, #0xa2c
53914: 2a0003e4 mov w4, w0
53918: b9000085 str w5, [x4]
5391c: 11001004 add w4, w0, #0x4
53920: b9400425 ldr w5, [x1, #4]
53924: 11002000 add w0, w0, #0x8
53928: b9000085 str w5, [x4]
5392c: b9401425 ldr w5, [x1, #20]
53930: b9000045 str w5, [x2]
53934: b9400822 ldr w2, [x1, #8]
53938: b9000082 str w2, [x4]
5393c: 52800022 mov w2, #0x1 // #1
53940: b9000002 str w2, [x0]
53944: b9401020 ldr w0, [x1, #16]
53948: b9000060 str w0, [x3]
5394c: a8c17bfd ldp x29, x30, [sp], #16
53950: d65f03c0 ret
0000000000053954 <save_usbphy>:
53954: d2889000 mov x0, #0x4480 // #17536
53958: f00000c1 adrp x1, 6e000 <iomux_status+0x2c>
5395c: f2bfeee0 movk x0, #0xff77, lsl #16
53960: b9400002 ldr w2, [x0]
53964: 91279020 add x0, x1, #0x9e4
53968: b909e422 str w2, [x1, #2532]
5396c: d2889101 mov x1, #0x4488 // #17544
53970: f2bfeee1 movk x1, #0xff77, lsl #16
53974: b9400021 ldr w1, [x1]
53978: b9000401 str w1, [x0, #4]
5397c: d2889181 mov x1, #0x448c // #17548
53980: f2bfeee1 movk x1, #0xff77, lsl #16
53984: b9400021 ldr w1, [x1]
53988: b9000801 str w1, [x0, #8]
5398c: d2889601 mov x1, #0x44b0 // #17584
53990: f2bfeee1 movk x1, #0xff77, lsl #16
53994: b9400021 ldr w1, [x1]
53998: b9000c01 str w1, [x0, #12]
5399c: d2889681 mov x1, #0x44b4 // #17588
539a0: f2bfeee1 movk x1, #0xff77, lsl #16
539a4: b9400021 ldr w1, [x1]
539a8: b9001001 str w1, [x0, #16]
539ac: d2889781 mov x1, #0x44bc // #17596
539b0: f2bfeee1 movk x1, #0xff77, lsl #16
539b4: b9400021 ldr w1, [x1]
539b8: b9001401 str w1, [x0, #20]
539bc: d2889801 mov x1, #0x44c0 // #17600
539c0: f2bfeee1 movk x1, #0xff77, lsl #16
539c4: b9400021 ldr w1, [x1]
539c8: b9001801 str w1, [x0, #24]
539cc: d288a000 mov x0, #0x4500 // #17664
539d0: f2bfeee0 movk x0, #0xff77, lsl #16
539d4: f00000c1 adrp x1, 6e000 <iomux_status+0x2c>
539d8: b9400002 ldr w2, [x0]
539dc: 91280020 add x0, x1, #0xa00
539e0: b90a0022 str w2, [x1, #2560]
539e4: d288a101 mov x1, #0x4508 // #17672
539e8: f2bfeee1 movk x1, #0xff77, lsl #16
539ec: b9400021 ldr w1, [x1]
539f0: b9000401 str w1, [x0, #4]
539f4: d288a181 mov x1, #0x450c // #17676
539f8: f2bfeee1 movk x1, #0xff77, lsl #16
539fc: b9400021 ldr w1, [x1]
53a00: b9000801 str w1, [x0, #8]
53a04: d288a601 mov x1, #0x4530 // #17712
53a08: f2bfeee1 movk x1, #0xff77, lsl #16
53a0c: b9400021 ldr w1, [x1]
53a10: b9000c01 str w1, [x0, #12]
53a14: d288a681 mov x1, #0x4534 // #17716
53a18: f2bfeee1 movk x1, #0xff77, lsl #16
53a1c: b9400021 ldr w1, [x1]
53a20: b9001001 str w1, [x0, #16]
53a24: d288a781 mov x1, #0x453c // #17724
53a28: f2bfeee1 movk x1, #0xff77, lsl #16
53a2c: b9400021 ldr w1, [x1]
53a30: b9001401 str w1, [x0, #20]
53a34: d288a801 mov x1, #0x4540 // #17728
53a38: f2bfeee1 movk x1, #0xff77, lsl #16
53a3c: b9400021 ldr w1, [x1]
53a40: b9001801 str w1, [x0, #24]
53a44: d65f03c0 ret
0000000000053a48 <restore_usbphy>:
53a48: f00000c1 adrp x1, 6e000 <iomux_status+0x2c>
53a4c: d2889002 mov x2, #0x4480 // #17536
53a50: f2bfeee2 movk x2, #0xff77, lsl #16
53a54: 91279020 add x0, x1, #0x9e4
53a58: b949e421 ldr w1, [x1, #2532]
53a5c: 32103c21 orr w1, w1, #0xffff0000
53a60: b9000041 str w1, [x2]
53a64: b9400401 ldr w1, [x0, #4]
53a68: 32103c21 orr w1, w1, #0xffff0000
53a6c: b9000841 str w1, [x2, #8]
53a70: b9400801 ldr w1, [x0, #8]
53a74: 32103c21 orr w1, w1, #0xffff0000
53a78: b9000c41 str w1, [x2, #12]
53a7c: b9400c01 ldr w1, [x0, #12]
53a80: 32103c21 orr w1, w1, #0xffff0000
53a84: b9003041 str w1, [x2, #48]
53a88: b9401001 ldr w1, [x0, #16]
53a8c: 32103c21 orr w1, w1, #0xffff0000
53a90: b9003441 str w1, [x2, #52]
53a94: b9401401 ldr w1, [x0, #20]
53a98: 32103c21 orr w1, w1, #0xffff0000
53a9c: b9003c41 str w1, [x2, #60]
53aa0: d2889801 mov x1, #0x44c0 // #17600
53aa4: b9401800 ldr w0, [x0, #24]
53aa8: f2bfeee1 movk x1, #0xff77, lsl #16
53aac: 32103c00 orr w0, w0, #0xffff0000
53ab0: b9000020 str w0, [x1]
53ab4: f00000c1 adrp x1, 6e000 <iomux_status+0x2c>
53ab8: 91280020 add x0, x1, #0xa00
53abc: b94a0021 ldr w1, [x1, #2560]
53ac0: 32103c21 orr w1, w1, #0xffff0000
53ac4: b9008041 str w1, [x2, #128]
53ac8: b9400401 ldr w1, [x0, #4]
53acc: 32103c21 orr w1, w1, #0xffff0000
53ad0: b9008841 str w1, [x2, #136]
53ad4: b9400801 ldr w1, [x0, #8]
53ad8: 32103c21 orr w1, w1, #0xffff0000
53adc: b9008c41 str w1, [x2, #140]
53ae0: b9400c01 ldr w1, [x0, #12]
53ae4: 32103c21 orr w1, w1, #0xffff0000
53ae8: b900b041 str w1, [x2, #176]
53aec: b9401001 ldr w1, [x0, #16]
53af0: 32103c21 orr w1, w1, #0xffff0000
53af4: b900b441 str w1, [x2, #180]
53af8: b9401401 ldr w1, [x0, #20]
53afc: 32103c21 orr w1, w1, #0xffff0000
53b00: b900bc41 str w1, [x2, #188]
53b04: d288a801 mov x1, #0x4540 // #17728
53b08: b9401800 ldr w0, [x0, #24]
53b0c: f2bfeee1 movk x1, #0xff77, lsl #16
53b10: 32103c00 orr w0, w0, #0xffff0000
53b14: b9000020 str w0, [x1]
53b18: d65f03c0 ret
0000000000053b1c <grf_register_save>:
53b1c: d29c4000 mov x0, #0xe200 // #57856
53b20: f2bfeee0 movk x0, #0xff77, lsl #16
53b24: b9400001 ldr w1, [x0]
53b28: f00000c0 adrp x0, 6e000 <iomux_status+0x2c>
53b2c: b909cc01 str w1, [x0, #2508]
53b30: d29c4080 mov x0, #0xe204 // #57860
53b34: f2bfeee0 movk x0, #0xff77, lsl #16
53b38: b9400001 ldr w1, [x0]
53b3c: f00000c0 adrp x0, 6e000 <iomux_status+0x2c>
53b40: b909d001 str w1, [x0, #2512]
53b44: d29c4100 mov x0, #0xe208 // #57864
53b48: f2bfeee0 movk x0, #0xff77, lsl #16
53b4c: b9400001 ldr w1, [x0]
53b50: f00000c0 adrp x0, 6e000 <iomux_status+0x2c>
53b54: b909d401 str w1, [x0, #2516]
53b58: d29c4180 mov x0, #0xe20c // #57868
53b5c: f2bfeee0 movk x0, #0xff77, lsl #16
53b60: b9400001 ldr w1, [x0]
53b64: f00000c0 adrp x0, 6e000 <iomux_status+0x2c>
53b68: b909d801 str w1, [x0, #2520]
53b6c: d29c4200 mov x0, #0xe210 // #57872
53b70: f2bfeee0 movk x0, #0xff77, lsl #16
53b74: b9400001 ldr w1, [x0]
53b78: f00000c0 adrp x0, 6e000 <iomux_status+0x2c>
53b7c: b909dc01 str w1, [x0, #2524]
53b80: d29c4380 mov x0, #0xe21c // #57884
53b84: f2bfeee0 movk x0, #0xff77, lsl #16
53b88: b9400001 ldr w1, [x0]
53b8c: f00000c0 adrp x0, 6e000 <iomux_status+0x2c>
53b90: b909e001 str w1, [x0, #2528]
53b94: d29c7000 mov x0, #0xe380 // #58240
53b98: f2bfeee0 movk x0, #0xff77, lsl #16
53b9c: f00000c1 adrp x1, 6e000 <iomux_status+0x2c>
53ba0: b9400002 ldr w2, [x0]
53ba4: 9126e020 add x0, x1, #0x9b8
53ba8: b909b822 str w2, [x1, #2488]
53bac: d29c7081 mov x1, #0xe384 // #58244
53bb0: f2bfeee1 movk x1, #0xff77, lsl #16
53bb4: b9400021 ldr w1, [x1]
53bb8: b9000401 str w1, [x0, #4]
53bbc: d29c7101 mov x1, #0xe388 // #58248
53bc0: f2bfeee1 movk x1, #0xff77, lsl #16
53bc4: b9400021 ldr w1, [x1]
53bc8: b9000801 str w1, [x0, #8]
53bcc: d29c7181 mov x1, #0xe38c // #58252
53bd0: f2bfeee1 movk x1, #0xff77, lsl #16
53bd4: b9400021 ldr w1, [x1]
53bd8: b9000c01 str w1, [x0, #12]
53bdc: d29cc800 mov x0, #0xe640 // #58944
53be0: f2bfeee0 movk x0, #0xff77, lsl #16
53be4: b9400001 ldr w1, [x0]
53be8: f00000c0 adrp x0, 6e000 <iomux_status+0x2c>
53bec: b909c801 str w1, [x0, #2504]
53bf0: d65f03c0 ret
0000000000053bf4 <grf_register_restore>:
53bf4: f00000c0 adrp x0, 6e000 <iomux_status+0x2c>
53bf8: d29c4001 mov x1, #0xe200 // #57856
53bfc: f2bfeee1 movk x1, #0xff77, lsl #16
53c00: d29c7002 mov x2, #0xe380 // #58240
53c04: b949cc00 ldr w0, [x0, #2508]
53c08: f2bfeee2 movk x2, #0xff77, lsl #16
53c0c: 32103c00 orr w0, w0, #0xffff0000
53c10: b9000020 str w0, [x1]
53c14: f00000c0 adrp x0, 6e000 <iomux_status+0x2c>
53c18: b949d000 ldr w0, [x0, #2512]
53c1c: 32103c00 orr w0, w0, #0xffff0000
53c20: b9000420 str w0, [x1, #4]
53c24: f00000c0 adrp x0, 6e000 <iomux_status+0x2c>
53c28: b949d400 ldr w0, [x0, #2516]
53c2c: 32103c00 orr w0, w0, #0xffff0000
53c30: b9000820 str w0, [x1, #8]
53c34: f00000c0 adrp x0, 6e000 <iomux_status+0x2c>
53c38: b949d800 ldr w0, [x0, #2520]
53c3c: 32103c00 orr w0, w0, #0xffff0000
53c40: b9000c20 str w0, [x1, #12]
53c44: f00000c0 adrp x0, 6e000 <iomux_status+0x2c>
53c48: b949dc00 ldr w0, [x0, #2524]
53c4c: 32103c00 orr w0, w0, #0xffff0000
53c50: b9001020 str w0, [x1, #16]
53c54: f00000c0 adrp x0, 6e000 <iomux_status+0x2c>
53c58: b949e000 ldr w0, [x0, #2528]
53c5c: 32103c00 orr w0, w0, #0xffff0000
53c60: b9001c20 str w0, [x1, #28]
53c64: f00000c1 adrp x1, 6e000 <iomux_status+0x2c>
53c68: 9126e020 add x0, x1, #0x9b8
53c6c: b949b821 ldr w1, [x1, #2488]
53c70: 32103c21 orr w1, w1, #0xffff0000
53c74: b9000041 str w1, [x2]
53c78: b9400401 ldr w1, [x0, #4]
53c7c: 32103c21 orr w1, w1, #0xffff0000
53c80: b9000441 str w1, [x2, #4]
53c84: b9400801 ldr w1, [x0, #8]
53c88: 32103c21 orr w1, w1, #0xffff0000
53c8c: b9000841 str w1, [x2, #8]
53c90: d29c7181 mov x1, #0xe38c // #58252
53c94: b9400c00 ldr w0, [x0, #12]
53c98: f2bfeee1 movk x1, #0xff77, lsl #16
53c9c: 32103c00 orr w0, w0, #0xffff0000
53ca0: b9000020 str w0, [x1]
53ca4: f00000c0 adrp x0, 6e000 <iomux_status+0x2c>
53ca8: b949c800 ldr w0, [x0, #2504]
53cac: 32103c00 orr w0, w0, #0xffff0000
53cb0: b902b420 str w0, [x1, #692]
53cb4: d65f03c0 ret
0000000000053cb8 <cru_register_save>:
53cb8: f00000c1 adrp x1, 6e000 <iomux_status+0x2c>
53cbc: d280b203 mov x3, #0x590 // #1424
53cc0: 9110a021 add x1, x1, #0x428
53cc4: d2bfeec0 mov x0, #0xff760000 // #4285923328
53cc8: f2bfeec3 movk x3, #0xff76, lsl #16
53ccc: 11628002 add w2, w0, #0x8a0, lsl #12
53cd0: b9400004 ldr w4, [x0]
53cd4: 91001000 add x0, x0, #0x4
53cd8: 13027c42 asr w2, w2, #2
53cdc: eb03001f cmp x0, x3
53ce0: b822d824 str w4, [x1, w2, sxtw #2]
53ce4: 54ffff41 b.ne 53ccc <cru_register_save+0x14> // b.any
53ce8: d65f03c0 ret
0000000000053cec <cru_register_restore>:
53cec: f00000c3 adrp x3, 6e000 <iomux_status+0x2c>
53cf0: 9110a063 add x3, x3, #0x428
53cf4: d2800000 mov x0, #0x0 // #0
53cf8: 52802306 mov w6, #0x118 // #280
53cfc: d2bfeec7 mov x7, #0xff760000 // #4285923328
53d00: 5280a108 mov w8, #0x508 // #1288
53d04: 51008001 sub w1, w0, #0x20
53d08: 7100d03f cmp w1, #0x34
53d0c: 7a468004 ccmp w0, w6, #0x4, hi // hi = pmore
53d10: 540001a0 b.eq 53d44 <cru_register_restore+0x58> // b.none
53d14: 13027c01 asr w1, w0, #2
53d18: 12187805 and w5, w0, #0xffffff7f
53d1c: 7101a01f cmp w0, #0x68
53d20: 8b070004 add x4, x0, x7
53d24: 7a4818a4 ccmp w5, #0x8, #0x4, ne // ne = any
53d28: b861d861 ldr w1, [x3, w1, sxtw #2]
53d2c: 540000a0 b.eq 53d40 <cru_register_restore+0x54> // b.none
53d30: 7102a01f cmp w0, #0xa8
53d34: 54000060 b.eq 53d40 <cru_register_restore+0x54> // b.none
53d38: 7103201f cmp w0, #0xc8
53d3c: 540000c1 b.ne 53d54 <cru_register_restore+0x68> // b.any
53d40: b9000081 str w1, [x4]
53d44: 91001000 add x0, x0, #0x4
53d48: f116401f cmp x0, #0x590
53d4c: 54fffdc1 b.ne 53d04 <cru_register_restore+0x18> // b.any
53d50: d65f03c0 ret
53d54: 5109f405 sub w5, w0, #0x27d
53d58: 7100c8bf cmp w5, #0x32
53d5c: 7a488004 ccmp w0, w8, #0x4, hi // hi = pmore
53d60: 54ffff00 b.eq 53d40 <cru_register_restore+0x54> // b.none
53d64: 32103c21 orr w1, w1, #0xffff0000
53d68: 17fffff6 b 53d40 <cru_register_restore+0x54>
0000000000053d6c <wdt_register_save>:
53d6c: d2900000 mov x0, #0x8000 // #32768
53d70: f2bff080 movk x0, #0xff84, lsl #16
53d74: b9400001 ldr w1, [x0]
53d78: f00000c0 adrp x0, 6e000 <iomux_status+0x2c>
53d7c: 91287002 add x2, x0, #0xa1c
53d80: b90a1c01 str w1, [x0, #2588]
53d84: d2bff080 mov x0, #0xff840000 // #4286840832
53d88: b9400003 ldr w3, [x0]
53d8c: f00000c0 adrp x0, 6e000 <iomux_status+0x2c>
53d90: 91289001 add x1, x0, #0xa24
53d94: b90a2403 str w3, [x0, #2596]
53d98: d2900080 mov x0, #0x8004 // #32772
53d9c: f2bff080 movk x0, #0xff84, lsl #16
53da0: b9400000 ldr w0, [x0]
53da4: b9000440 str w0, [x2, #4]
53da8: d2800080 mov x0, #0x4 // #4
53dac: f2bff080 movk x0, #0xff84, lsl #16
53db0: b9400000 ldr w0, [x0]
53db4: b9000420 str w0, [x1, #4]
53db8: d65f03c0 ret
0000000000053dbc <wdt_register_restore>:
53dbc: f00000c1 adrp x1, 6e000 <iomux_status+0x2c>
53dc0: 91287020 add x0, x1, #0xa1c
53dc4: b9400402 ldr w2, [x0, #4]
53dc8: d2900080 mov x0, #0x8004 // #32772
53dcc: f2bff080 movk x0, #0xff84, lsl #16
53dd0: b9000002 str w2, [x0]
53dd4: f00000c0 adrp x0, 6e000 <iomux_status+0x2c>
53dd8: 91289002 add x2, x0, #0xa24
53ddc: b9400443 ldr w3, [x2, #4]
53de0: d2800082 mov x2, #0x4 // #4
53de4: f2bff082 movk x2, #0xff84, lsl #16
53de8: b9000043 str w3, [x2]
53dec: b94a1c22 ldr w2, [x1, #2588]
53df0: d2900001 mov x1, #0x8000 // #32768
53df4: f2bff081 movk x1, #0xff84, lsl #16
53df8: b9000022 str w2, [x1]
53dfc: b94a2401 ldr w1, [x0, #2596]
53e00: d2bff080 mov x0, #0xff840000 // #4286840832
53e04: b9000001 str w1, [x0]
53e08: d2900181 mov x1, #0x800c // #32780
53e0c: f2bff081 movk x1, #0xff84, lsl #16
53e10: 52800ec0 mov w0, #0x76 // #118
53e14: b9000020 str w0, [x1]
53e18: d2800181 mov x1, #0xc // #12
53e1c: f2bff081 movk x1, #0xff84, lsl #16
53e20: b9000020 str w0, [x1]
53e24: d65f03c0 ret
0000000000053e28 <rockchip_soc_sys_pwr_dm_suspend>:
53e28: a9bc7bfd stp x29, x30, [sp, #-64]!
53e2c: 910003fd mov x29, sp
53e30: a90153f3 stp x19, x20, [sp, #16]
53e34: a9025bf5 stp x21, x22, [sp, #32]
53e38: 940018fe bl 5a230 <ddr_prepare_for_sys_suspend>
53e3c: 94001f1f bl 5bab8 <dmc_suspend>
53e40: d2800300 mov x0, #0x18 // #24
53e44: f2bfe620 movk x0, #0xff31, lsl #16
53e48: b9400000 ldr w0, [x0]
53e4c: 121c0400 and w0, w0, #0x30
53e50: 7100c01f cmp w0, #0x30
53e54: 5400a920 b.eq 55378 <rockchip_soc_sys_pwr_dm_suspend+0x1550> // b.none
53e58: 90000081 adrp x1, 63000 <CSWTCH.22+0x37e>
53e5c: 90000080 adrp x0, 63000 <CSWTCH.22+0x37e>
53e60: 910b9421 add x1, x1, #0x2e5
53e64: 91091c00 add x0, x0, #0x247
53e68: 94002a87 bl 5e884 <tf_log>
53e6c: 94003018 bl 5fecc <plat_my_core_pos>
53e70: d00000c1 adrp x1, 6d000 <dist_ctx+0x1e50>
53e74: 91234021 add x1, x1, #0x8d0
53e78: 97fff2a4 bl 50908 <gicv3_rdistif_save>
53e7c: 900000c0 adrp x0, 6b000 <psci_ns_context+0xc60>
53e80: 9106c000 add x0, x0, #0x1b0
53e84: 97fff36b bl 50c30 <gicv3_distif_save>
53e88: 97fffeb3 bl 53954 <save_usbphy>
53e8c: 94000b0b bl 56ab8 <clk_gate_con_save>
53e90: 94000b25 bl 56b24 <clk_gate_con_disable>
53e94: 528001e0 mov w0, #0xf // #15
53e98: 97fffbbe bl 52d90 <pmu_power_domain_st>
53e9c: 350003c0 cbnz w0, 53f14 <rockchip_soc_sys_pwr_dm_suspend+0xec>
53ea0: d2bff5c0 mov x0, #0xffae0000 // #4289593344
53ea4: b9400001 ldr w1, [x0]
53ea8: f00000c0 adrp x0, 6e000 <iomux_status+0x2c>
53eac: 91002000 add x0, x0, #0x8
53eb0: b901dc01 str w1, [x0, #476]
53eb4: d2800081 mov x1, #0x4 // #4
53eb8: f2bff5c1 movk x1, #0xffae, lsl #16
53ebc: b9400021 ldr w1, [x1]
53ec0: b901e001 str w1, [x0, #480]
53ec4: d2800101 mov x1, #0x8 // #8
53ec8: f2bff5c1 movk x1, #0xffae, lsl #16
53ecc: b9400021 ldr w1, [x1]
53ed0: b901e401 str w1, [x0, #484]
53ed4: d2800181 mov x1, #0xc // #12
53ed8: f2bff5c1 movk x1, #0xffae, lsl #16
53edc: b9400021 ldr w1, [x1]
53ee0: b901e801 str w1, [x0, #488]
53ee4: d2800201 mov x1, #0x10 // #16
53ee8: f2bff5c1 movk x1, #0xffae, lsl #16
53eec: b9400021 ldr w1, [x1]
53ef0: b901ec01 str w1, [x0, #492]
53ef4: d2800281 mov x1, #0x14 // #20
53ef8: f2bff5c1 movk x1, #0xffae, lsl #16
53efc: b9400021 ldr w1, [x1]
53f00: b901f001 str w1, [x0, #496]
53f04: d2800301 mov x1, #0x18 // #24
53f08: f2bff5c1 movk x1, #0xffae, lsl #16
53f0c: b9400021 ldr w1, [x1]
53f10: b901f401 str w1, [x0, #500]
53f14: 528002c0 mov w0, #0x16 // #22
53f18: 97fffb9e bl 52d90 <pmu_power_domain_st>
53f1c: 35000740 cbnz w0, 54004 <rockchip_soc_sys_pwr_dm_suspend+0x1dc>
53f20: d2bff540 mov x0, #0xffaa0000 // #4289331200
53f24: b9400001 ldr w1, [x0]
53f28: f00000c0 adrp x0, 6e000 <iomux_status+0x2c>
53f2c: 91002000 add x0, x0, #0x8
53f30: b9032c01 str w1, [x0, #812]
53f34: d2800081 mov x1, #0x4 // #4
53f38: f2bff541 movk x1, #0xffaa, lsl #16
53f3c: b9400021 ldr w1, [x1]
53f40: b9033001 str w1, [x0, #816]
53f44: d2800101 mov x1, #0x8 // #8
53f48: f2bff541 movk x1, #0xffaa, lsl #16
53f4c: b9400021 ldr w1, [x1]
53f50: b9033401 str w1, [x0, #820]
53f54: d2800181 mov x1, #0xc // #12
53f58: f2bff541 movk x1, #0xffaa, lsl #16
53f5c: b9400021 ldr w1, [x1]
53f60: b9033801 str w1, [x0, #824]
53f64: d2800201 mov x1, #0x10 // #16
53f68: f2bff541 movk x1, #0xffaa, lsl #16
53f6c: b9400021 ldr w1, [x1]
53f70: b9033c01 str w1, [x0, #828]
53f74: d2800281 mov x1, #0x14 // #20
53f78: f2bff541 movk x1, #0xffaa, lsl #16
53f7c: b9400021 ldr w1, [x1]
53f80: b9034001 str w1, [x0, #832]
53f84: d2800301 mov x1, #0x18 // #24
53f88: f2bff541 movk x1, #0xffaa, lsl #16
53f8c: b9400021 ldr w1, [x1]
53f90: b9034401 str w1, [x0, #836]
53f94: d2801001 mov x1, #0x80 // #128
53f98: f2bff541 movk x1, #0xffaa, lsl #16
53f9c: b9400021 ldr w1, [x1]
53fa0: b9034801 str w1, [x0, #840]
53fa4: d2801081 mov x1, #0x84 // #132
53fa8: f2bff541 movk x1, #0xffaa, lsl #16
53fac: b9400021 ldr w1, [x1]
53fb0: b9034c01 str w1, [x0, #844]
53fb4: d2801101 mov x1, #0x88 // #136
53fb8: f2bff541 movk x1, #0xffaa, lsl #16
53fbc: b9400021 ldr w1, [x1]
53fc0: b9035001 str w1, [x0, #848]
53fc4: d2801181 mov x1, #0x8c // #140
53fc8: f2bff541 movk x1, #0xffaa, lsl #16
53fcc: b9400021 ldr w1, [x1]
53fd0: b9035401 str w1, [x0, #852]
53fd4: d2801201 mov x1, #0x90 // #144
53fd8: f2bff541 movk x1, #0xffaa, lsl #16
53fdc: b9400021 ldr w1, [x1]
53fe0: b9035801 str w1, [x0, #856]
53fe4: d2801281 mov x1, #0x94 // #148
53fe8: f2bff541 movk x1, #0xffaa, lsl #16
53fec: b9400021 ldr w1, [x1]
53ff0: b9035c01 str w1, [x0, #860]
53ff4: d2801301 mov x1, #0x98 // #152
53ff8: f2bff541 movk x1, #0xffaa, lsl #16
53ffc: b9400021 ldr w1, [x1]
54000: b9036001 str w1, [x0, #864]
54004: 528002e0 mov w0, #0x17 // #23
54008: 97fffb62 bl 52d90 <pmu_power_domain_st>
5400c: 35000760 cbnz w0, 540f8 <rockchip_soc_sys_pwr_dm_suspend+0x2d0>
54010: d2900000 mov x0, #0x8000 // #32768
54014: f2bff540 movk x0, #0xffaa, lsl #16
54018: b9400001 ldr w1, [x0]
5401c: d00000c0 adrp x0, 6e000 <iomux_status+0x2c>
54020: 91002000 add x0, x0, #0x8
54024: b902f401 str w1, [x0, #756]
54028: d2900081 mov x1, #0x8004 // #32772
5402c: f2bff541 movk x1, #0xffaa, lsl #16
54030: b9400021 ldr w1, [x1]
54034: b902f801 str w1, [x0, #760]
54038: d2900101 mov x1, #0x8008 // #32776
5403c: f2bff541 movk x1, #0xffaa, lsl #16
54040: b9400021 ldr w1, [x1]
54044: b902fc01 str w1, [x0, #764]
54048: d2900181 mov x1, #0x800c // #32780
5404c: f2bff541 movk x1, #0xffaa, lsl #16
54050: b9400021 ldr w1, [x1]
54054: b9030001 str w1, [x0, #768]
54058: d2900201 mov x1, #0x8010 // #32784
5405c: f2bff541 movk x1, #0xffaa, lsl #16
54060: b9400021 ldr w1, [x1]
54064: b9030401 str w1, [x0, #772]
54068: d2900281 mov x1, #0x8014 // #32788
5406c: f2bff541 movk x1, #0xffaa, lsl #16
54070: b9400021 ldr w1, [x1]
54074: b9030801 str w1, [x0, #776]
54078: d2900301 mov x1, #0x8018 // #32792
5407c: f2bff541 movk x1, #0xffaa, lsl #16
54080: b9400021 ldr w1, [x1]
54084: b9030c01 str w1, [x0, #780]
54088: d2901001 mov x1, #0x8080 // #32896
5408c: f2bff541 movk x1, #0xffaa, lsl #16
54090: b9400021 ldr w1, [x1]
54094: b9031001 str w1, [x0, #784]
54098: d2901081 mov x1, #0x8084 // #32900
5409c: f2bff541 movk x1, #0xffaa, lsl #16
540a0: b9400021 ldr w1, [x1]
540a4: b9031401 str w1, [x0, #788]
540a8: d2901101 mov x1, #0x8088 // #32904
540ac: f2bff541 movk x1, #0xffaa, lsl #16
540b0: b9400021 ldr w1, [x1]
540b4: b9031801 str w1, [x0, #792]
540b8: d2901181 mov x1, #0x808c // #32908
540bc: f2bff541 movk x1, #0xffaa, lsl #16
540c0: b9400021 ldr w1, [x1]
540c4: b9031c01 str w1, [x0, #796]
540c8: d2901201 mov x1, #0x8090 // #32912
540cc: f2bff541 movk x1, #0xffaa, lsl #16
540d0: b9400021 ldr w1, [x1]
540d4: b9032001 str w1, [x0, #800]
540d8: d2901281 mov x1, #0x8094 // #32916
540dc: f2bff541 movk x1, #0xffaa, lsl #16
540e0: b9400021 ldr w1, [x1]
540e4: b9032401 str w1, [x0, #804]
540e8: d2901301 mov x1, #0x8098 // #32920
540ec: f2bff541 movk x1, #0xffaa, lsl #16
540f0: b9400021 ldr w1, [x1]
540f4: b9032801 str w1, [x0, #808]
540f8: 52800280 mov w0, #0x14 // #20
540fc: 97fffb25 bl 52d90 <pmu_power_domain_st>
54100: 35000ac0 cbnz w0, 54258 <rockchip_soc_sys_pwr_dm_suspend+0x430>
54104: d2900000 mov x0, #0x8000 // #32768
54108: f2bff580 movk x0, #0xffac, lsl #16
5410c: b9400001 ldr w1, [x0]
54110: d00000c0 adrp x0, 6e000 <iomux_status+0x2c>
54114: 91002000 add x0, x0, #0x8
54118: b9028401 str w1, [x0, #644]
5411c: d2900081 mov x1, #0x8004 // #32772
54120: f2bff581 movk x1, #0xffac, lsl #16
54124: b9400021 ldr w1, [x1]
54128: b9028801 str w1, [x0, #648]
5412c: d2900101 mov x1, #0x8008 // #32776
54130: f2bff581 movk x1, #0xffac, lsl #16
54134: b9400021 ldr w1, [x1]
54138: b9028c01 str w1, [x0, #652]
5413c: d2900181 mov x1, #0x800c // #32780
54140: f2bff581 movk x1, #0xffac, lsl #16
54144: b9400021 ldr w1, [x1]
54148: b9029001 str w1, [x0, #656]
5414c: d2900201 mov x1, #0x8010 // #32784
54150: f2bff581 movk x1, #0xffac, lsl #16
54154: b9400021 ldr w1, [x1]
54158: b9029401 str w1, [x0, #660]
5415c: d2900281 mov x1, #0x8014 // #32788
54160: f2bff581 movk x1, #0xffac, lsl #16
54164: b9400021 ldr w1, [x1]
54168: b9029801 str w1, [x0, #664]
5416c: d2900301 mov x1, #0x8018 // #32792
54170: f2bff581 movk x1, #0xffac, lsl #16
54174: b9400021 ldr w1, [x1]
54178: b9029c01 str w1, [x0, #668]
5417c: d2901001 mov x1, #0x8080 // #32896
54180: f2bff581 movk x1, #0xffac, lsl #16
54184: b9400021 ldr w1, [x1]
54188: b902a001 str w1, [x0, #672]
5418c: d2901081 mov x1, #0x8084 // #32900
54190: f2bff581 movk x1, #0xffac, lsl #16
54194: b9400021 ldr w1, [x1]
54198: b902a401 str w1, [x0, #676]
5419c: d2901101 mov x1, #0x8088 // #32904
541a0: f2bff581 movk x1, #0xffac, lsl #16
541a4: b9400021 ldr w1, [x1]
541a8: b902a801 str w1, [x0, #680]
541ac: d2901181 mov x1, #0x808c // #32908
541b0: f2bff581 movk x1, #0xffac, lsl #16
541b4: b9400021 ldr w1, [x1]
541b8: b902ac01 str w1, [x0, #684]
541bc: d2901201 mov x1, #0x8090 // #32912
541c0: f2bff581 movk x1, #0xffac, lsl #16
541c4: b9400021 ldr w1, [x1]
541c8: b902b001 str w1, [x0, #688]
541cc: d2901281 mov x1, #0x8094 // #32916
541d0: f2bff581 movk x1, #0xffac, lsl #16
541d4: b9400021 ldr w1, [x1]
541d8: b902b401 str w1, [x0, #692]
541dc: d2901301 mov x1, #0x8098 // #32920
541e0: f2bff581 movk x1, #0xffac, lsl #16
541e4: b9400021 ldr w1, [x1]
541e8: b902b801 str w1, [x0, #696]
541ec: d2bff5a1 mov x1, #0xffad0000 // #4289527808
541f0: b9400021 ldr w1, [x1]
541f4: b902bc01 str w1, [x0, #700]
541f8: d2800081 mov x1, #0x4 // #4
541fc: f2bff5a1 movk x1, #0xffad, lsl #16
54200: b9400021 ldr w1, [x1]
54204: b902c001 str w1, [x0, #704]
54208: d2800101 mov x1, #0x8 // #8
5420c: f2bff5a1 movk x1, #0xffad, lsl #16
54210: b9400021 ldr w1, [x1]
54214: b902c401 str w1, [x0, #708]
54218: d2800181 mov x1, #0xc // #12
5421c: f2bff5a1 movk x1, #0xffad, lsl #16
54220: b9400021 ldr w1, [x1]
54224: b902c801 str w1, [x0, #712]
54228: d2800201 mov x1, #0x10 // #16
5422c: f2bff5a1 movk x1, #0xffad, lsl #16
54230: b9400021 ldr w1, [x1]
54234: b902cc01 str w1, [x0, #716]
54238: d2800281 mov x1, #0x14 // #20
5423c: f2bff5a1 movk x1, #0xffad, lsl #16
54240: b9400021 ldr w1, [x1]
54244: b902d001 str w1, [x0, #720]
54248: d2800301 mov x1, #0x18 // #24
5424c: f2bff5a1 movk x1, #0xffad, lsl #16
54250: b9400021 ldr w1, [x1]
54254: b902d401 str w1, [x0, #724]
54258: 52800300 mov w0, #0x18 // #24
5425c: 97fffacd bl 52d90 <pmu_power_domain_st>
54260: 350003c0 cbnz w0, 542d8 <rockchip_soc_sys_pwr_dm_suspend+0x4b0>
54264: d2bff520 mov x0, #0xffa90000 // #4289265664
54268: b9400001 ldr w1, [x0]
5426c: d00000c0 adrp x0, 6e000 <iomux_status+0x2c>
54270: 91002000 add x0, x0, #0x8
54274: b9036401 str w1, [x0, #868]
54278: d2800081 mov x1, #0x4 // #4
5427c: f2bff521 movk x1, #0xffa9, lsl #16
54280: b9400021 ldr w1, [x1]
54284: b9036801 str w1, [x0, #872]
54288: d2800101 mov x1, #0x8 // #8
5428c: f2bff521 movk x1, #0xffa9, lsl #16
54290: b9400021 ldr w1, [x1]
54294: b9036c01 str w1, [x0, #876]
54298: d2800181 mov x1, #0xc // #12
5429c: f2bff521 movk x1, #0xffa9, lsl #16
542a0: b9400021 ldr w1, [x1]
542a4: b9037001 str w1, [x0, #880]
542a8: d2800201 mov x1, #0x10 // #16
542ac: f2bff521 movk x1, #0xffa9, lsl #16
542b0: b9400021 ldr w1, [x1]
542b4: b9037401 str w1, [x0, #884]
542b8: d2800281 mov x1, #0x14 // #20
542bc: f2bff521 movk x1, #0xffa9, lsl #16
542c0: b9400021 ldr w1, [x1]
542c4: b9037801 str w1, [x0, #888]
542c8: d2800301 mov x1, #0x18 // #24
542cc: f2bff521 movk x1, #0xffa9, lsl #16
542d0: b9400021 ldr w1, [x1]
542d4: b9037c01 str w1, [x0, #892]
542d8: 52800320 mov w0, #0x19 // #25
542dc: 97fffaad bl 52d90 <pmu_power_domain_st>
542e0: 350003e0 cbnz w0, 5435c <rockchip_soc_sys_pwr_dm_suspend+0x534>
542e4: d2980000 mov x0, #0xc000 // #49152
542e8: f2bff4a0 movk x0, #0xffa5, lsl #16
542ec: b9400001 ldr w1, [x0]
542f0: d00000c0 adrp x0, 6e000 <iomux_status+0x2c>
542f4: 91002000 add x0, x0, #0x8
542f8: b9013401 str w1, [x0, #308]
542fc: d2980081 mov x1, #0xc004 // #49156
54300: f2bff4a1 movk x1, #0xffa5, lsl #16
54304: b9400021 ldr w1, [x1]
54308: b9013801 str w1, [x0, #312]
5430c: d2980101 mov x1, #0xc008 // #49160
54310: f2bff4a1 movk x1, #0xffa5, lsl #16
54314: b9400021 ldr w1, [x1]
54318: b9013c01 str w1, [x0, #316]
5431c: d2980181 mov x1, #0xc00c // #49164
54320: f2bff4a1 movk x1, #0xffa5, lsl #16
54324: b9400021 ldr w1, [x1]
54328: b9014001 str w1, [x0, #320]
5432c: d2980201 mov x1, #0xc010 // #49168
54330: f2bff4a1 movk x1, #0xffa5, lsl #16
54334: b9400021 ldr w1, [x1]
54338: b9014401 str w1, [x0, #324]
5433c: d2980281 mov x1, #0xc014 // #49172
54340: f2bff4a1 movk x1, #0xffa5, lsl #16
54344: b9400021 ldr w1, [x1]
54348: b9014801 str w1, [x0, #328]
5434c: d2980301 mov x1, #0xc018 // #49176
54350: f2bff4a1 movk x1, #0xffa5, lsl #16
54354: b9400021 ldr w1, [x1]
54358: b9014c01 str w1, [x0, #332]
5435c: 52800140 mov w0, #0xa // #10
54360: 97fffa8c bl 52d90 <pmu_power_domain_st>
54364: 35000740 cbnz w0, 5444c <rockchip_soc_sys_pwr_dm_suspend+0x624>
54368: d2bff4a0 mov x0, #0xffa50000 // #4289003520
5436c: d00000c1 adrp x1, 6e000 <iomux_status+0x2c>
54370: b9400002 ldr w2, [x0]
54374: 91002020 add x0, x1, #0x8
54378: b9000822 str w2, [x1, #8]
5437c: d2800081 mov x1, #0x4 // #4
54380: f2bff4a1 movk x1, #0xffa5, lsl #16
54384: b9400021 ldr w1, [x1]
54388: b9000401 str w1, [x0, #4]
5438c: d2800101 mov x1, #0x8 // #8
54390: f2bff4a1 movk x1, #0xffa5, lsl #16
54394: b9400021 ldr w1, [x1]
54398: b9000801 str w1, [x0, #8]
5439c: d2800181 mov x1, #0xc // #12
543a0: f2bff4a1 movk x1, #0xffa5, lsl #16
543a4: b9400021 ldr w1, [x1]
543a8: b9000c01 str w1, [x0, #12]
543ac: d2800201 mov x1, #0x10 // #16
543b0: f2bff4a1 movk x1, #0xffa5, lsl #16
543b4: b9400021 ldr w1, [x1]
543b8: b9001001 str w1, [x0, #16]
543bc: d2800281 mov x1, #0x14 // #20
543c0: f2bff4a1 movk x1, #0xffa5, lsl #16
543c4: b9400021 ldr w1, [x1]
543c8: b9001401 str w1, [x0, #20]
543cc: d2800301 mov x1, #0x18 // #24
543d0: f2bff4a1 movk x1, #0xffa5, lsl #16
543d4: b9400021 ldr w1, [x1]
543d8: b9001801 str w1, [x0, #24]
543dc: d2900001 mov x1, #0x8000 // #32768
543e0: f2bff5a1 movk x1, #0xffad, lsl #16
543e4: b9400021 ldr w1, [x1]
543e8: b9001c01 str w1, [x0, #28]
543ec: d2900081 mov x1, #0x8004 // #32772
543f0: f2bff5a1 movk x1, #0xffad, lsl #16
543f4: b9400021 ldr w1, [x1]
543f8: b9002001 str w1, [x0, #32]
543fc: d2900101 mov x1, #0x8008 // #32776
54400: f2bff5a1 movk x1, #0xffad, lsl #16
54404: b9400021 ldr w1, [x1]
54408: b9002401 str w1, [x0, #36]
5440c: d2900181 mov x1, #0x800c // #32780
54410: f2bff5a1 movk x1, #0xffad, lsl #16
54414: b9400021 ldr w1, [x1]
54418: b9002801 str w1, [x0, #40]
5441c: d2900201 mov x1, #0x8010 // #32784
54420: f2bff5a1 movk x1, #0xffad, lsl #16
54424: b9400021 ldr w1, [x1]
54428: b9002c01 str w1, [x0, #44]
5442c: d2900281 mov x1, #0x8014 // #32788
54430: f2bff5a1 movk x1, #0xffad, lsl #16
54434: b9400021 ldr w1, [x1]
54438: b9003001 str w1, [x0, #48]
5443c: d2900301 mov x1, #0x8018 // #32792
54440: f2bff5a1 movk x1, #0xffad, lsl #16
54444: b9400021 ldr w1, [x1]
54448: b9003401 str w1, [x0, #52]
5444c: 528003c0 mov w0, #0x1e // #30
54450: 97fffa50 bl 52d90 <pmu_power_domain_st>
54454: 350003e0 cbnz w0, 544d0 <rockchip_soc_sys_pwr_dm_suspend+0x6a8>
54458: d2880000 mov x0, #0x4000 // #16384
5445c: f2bff4e0 movk x0, #0xffa7, lsl #16
54460: b9400001 ldr w1, [x0]
54464: d00000c0 adrp x0, 6e000 <iomux_status+0x2c>
54468: 91002000 add x0, x0, #0x8
5446c: b9011801 str w1, [x0, #280]
54470: d2880081 mov x1, #0x4004 // #16388
54474: f2bff4e1 movk x1, #0xffa7, lsl #16
54478: b9400021 ldr w1, [x1]
5447c: b9011c01 str w1, [x0, #284]
54480: d2880101 mov x1, #0x4008 // #16392
54484: f2bff4e1 movk x1, #0xffa7, lsl #16
54488: b9400021 ldr w1, [x1]
5448c: b9012001 str w1, [x0, #288]
54490: d2880181 mov x1, #0x400c // #16396
54494: f2bff4e1 movk x1, #0xffa7, lsl #16
54498: b9400021 ldr w1, [x1]
5449c: b9012401 str w1, [x0, #292]
544a0: d2880201 mov x1, #0x4010 // #16400
544a4: f2bff4e1 movk x1, #0xffa7, lsl #16
544a8: b9400021 ldr w1, [x1]
544ac: b9012801 str w1, [x0, #296]
544b0: d2880281 mov x1, #0x4014 // #16404
544b4: f2bff4e1 movk x1, #0xffa7, lsl #16
544b8: b9400021 ldr w1, [x1]
544bc: b9012c01 str w1, [x0, #300]
544c0: d2880301 mov x1, #0x4018 // #16408
544c4: f2bff4e1 movk x1, #0xffa7, lsl #16
544c8: b9400021 ldr w1, [x1]
544cc: b9013001 str w1, [x0, #304]
544d0: 52800340 mov w0, #0x1a // #26
544d4: 97fffa2f bl 52d90 <pmu_power_domain_st>
544d8: 350003e0 cbnz w0, 54554 <rockchip_soc_sys_pwr_dm_suspend+0x72c>
544dc: d2900000 mov x0, #0x8000 // #32768
544e0: f2bff4a0 movk x0, #0xffa5, lsl #16
544e4: b9400001 ldr w1, [x0]
544e8: d00000c0 adrp x0, 6e000 <iomux_status+0x2c>
544ec: 91002000 add x0, x0, #0x8
544f0: b9015001 str w1, [x0, #336]
544f4: d2900081 mov x1, #0x8004 // #32772
544f8: f2bff4a1 movk x1, #0xffa5, lsl #16
544fc: b9400021 ldr w1, [x1]
54500: b9015401 str w1, [x0, #340]
54504: d2900101 mov x1, #0x8008 // #32776
54508: f2bff4a1 movk x1, #0xffa5, lsl #16
5450c: b9400021 ldr w1, [x1]
54510: b9015801 str w1, [x0, #344]
54514: d2900181 mov x1, #0x800c // #32780
54518: f2bff4a1 movk x1, #0xffa5, lsl #16
5451c: b9400021 ldr w1, [x1]
54520: b9015c01 str w1, [x0, #348]
54524: d2900201 mov x1, #0x8010 // #32784
54528: f2bff4a1 movk x1, #0xffa5, lsl #16
5452c: b9400021 ldr w1, [x1]
54530: b9016001 str w1, [x0, #352]
54534: d2900281 mov x1, #0x8014 // #32788
54538: f2bff4a1 movk x1, #0xffa5, lsl #16
5453c: b9400021 ldr w1, [x1]
54540: b9016401 str w1, [x0, #356]
54544: d2900301 mov x1, #0x8018 // #32792
54548: f2bff4a1 movk x1, #0xffa5, lsl #16
5454c: b9400021 ldr w1, [x1]
54550: b9016801 str w1, [x0, #360]
54554: 528003e0 mov w0, #0x1f // #31
54558: 97fffa0e bl 52d90 <pmu_power_domain_st>
5455c: 350003e0 cbnz w0, 545d8 <rockchip_soc_sys_pwr_dm_suspend+0x7b0>
54560: d28c0000 mov x0, #0x6000 // #24576
54564: f2bff4e0 movk x0, #0xffa7, lsl #16
54568: b9400001 ldr w1, [x0]
5456c: d00000c0 adrp x0, 6e000 <iomux_status+0x2c>
54570: 91002000 add x0, x0, #0x8
54574: b903d401 str w1, [x0, #980]
54578: d28c0081 mov x1, #0x6004 // #24580
5457c: f2bff4e1 movk x1, #0xffa7, lsl #16
54580: b9400021 ldr w1, [x1]
54584: b903d801 str w1, [x0, #984]
54588: d28c0101 mov x1, #0x6008 // #24584
5458c: f2bff4e1 movk x1, #0xffa7, lsl #16
54590: b9400021 ldr w1, [x1]
54594: b903dc01 str w1, [x0, #988]
54598: d28c0181 mov x1, #0x600c // #24588
5459c: f2bff4e1 movk x1, #0xffa7, lsl #16
545a0: b9400021 ldr w1, [x1]
545a4: b903e001 str w1, [x0, #992]
545a8: d28c0201 mov x1, #0x6010 // #24592
545ac: f2bff4e1 movk x1, #0xffa7, lsl #16
545b0: b9400021 ldr w1, [x1]
545b4: b903e401 str w1, [x0, #996]
545b8: d28c0281 mov x1, #0x6014 // #24596
545bc: f2bff4e1 movk x1, #0xffa7, lsl #16
545c0: b9400021 ldr w1, [x1]
545c4: b903e801 str w1, [x0, #1000]
545c8: d28c0301 mov x1, #0x6018 // #24600
545cc: f2bff4e1 movk x1, #0xffa7, lsl #16
545d0: b9400021 ldr w1, [x1]
545d4: b903ec01 str w1, [x0, #1004]
545d8: 528003a0 mov w0, #0x1d // #29
545dc: 97fff9ed bl 52d90 <pmu_power_domain_st>
545e0: 350003e0 cbnz w0, 5465c <rockchip_soc_sys_pwr_dm_suspend+0x834>
545e4: d2900000 mov x0, #0x8000 // #32768
545e8: f2bff4e0 movk x0, #0xffa7, lsl #16
545ec: b9400001 ldr w1, [x0]
545f0: d00000c0 adrp x0, 6e000 <iomux_status+0x2c>
545f4: 91002000 add x0, x0, #0x8
545f8: b900fc01 str w1, [x0, #252]
545fc: d2900081 mov x1, #0x8004 // #32772
54600: f2bff4e1 movk x1, #0xffa7, lsl #16
54604: b9400021 ldr w1, [x1]
54608: b9010001 str w1, [x0, #256]
5460c: d2900101 mov x1, #0x8008 // #32776
54610: f2bff4e1 movk x1, #0xffa7, lsl #16
54614: b9400021 ldr w1, [x1]
54618: b9010401 str w1, [x0, #260]
5461c: d2900181 mov x1, #0x800c // #32780
54620: f2bff4e1 movk x1, #0xffa7, lsl #16
54624: b9400021 ldr w1, [x1]
54628: b9010801 str w1, [x0, #264]
5462c: d2900201 mov x1, #0x8010 // #32784
54630: f2bff4e1 movk x1, #0xffa7, lsl #16
54634: b9400021 ldr w1, [x1]
54638: b9010c01 str w1, [x0, #268]
5463c: d2900281 mov x1, #0x8014 // #32788
54640: f2bff4e1 movk x1, #0xffa7, lsl #16
54644: b9400021 ldr w1, [x1]
54648: b9011001 str w1, [x0, #272]
5464c: d2900301 mov x1, #0x8018 // #32792
54650: f2bff4e1 movk x1, #0xffa7, lsl #16
54654: b9400021 ldr w1, [x1]
54658: b9011401 str w1, [x0, #276]
5465c: 52800240 mov w0, #0x12 // #18
54660: 97fff9cc bl 52d90 <pmu_power_domain_st>
54664: 35000740 cbnz w0, 5474c <rockchip_soc_sys_pwr_dm_suspend+0x924>
54668: d2bff560 mov x0, #0xffab0000 // #4289396736
5466c: b9400001 ldr w1, [x0]
54670: d00000c0 adrp x0, 6e000 <iomux_status+0x2c>
54674: 91002000 add x0, x0, #0x8
54678: b9024c01 str w1, [x0, #588]
5467c: d2800081 mov x1, #0x4 // #4
54680: f2bff561 movk x1, #0xffab, lsl #16
54684: b9400021 ldr w1, [x1]
54688: b9025001 str w1, [x0, #592]
5468c: d2800101 mov x1, #0x8 // #8
54690: f2bff561 movk x1, #0xffab, lsl #16
54694: b9400021 ldr w1, [x1]
54698: b9025401 str w1, [x0, #596]
5469c: d2800181 mov x1, #0xc // #12
546a0: f2bff561 movk x1, #0xffab, lsl #16
546a4: b9400021 ldr w1, [x1]
546a8: b9025801 str w1, [x0, #600]
546ac: d2800201 mov x1, #0x10 // #16
546b0: f2bff561 movk x1, #0xffab, lsl #16
546b4: b9400021 ldr w1, [x1]
546b8: b9025c01 str w1, [x0, #604]
546bc: d2800281 mov x1, #0x14 // #20
546c0: f2bff561 movk x1, #0xffab, lsl #16
546c4: b9400021 ldr w1, [x1]
546c8: b9026001 str w1, [x0, #608]
546cc: d2800301 mov x1, #0x18 // #24
546d0: f2bff561 movk x1, #0xffab, lsl #16
546d4: b9400021 ldr w1, [x1]
546d8: b9026401 str w1, [x0, #612]
546dc: d2801001 mov x1, #0x80 // #128
546e0: f2bff561 movk x1, #0xffab, lsl #16
546e4: b9400021 ldr w1, [x1]
546e8: b9026801 str w1, [x0, #616]
546ec: d2801081 mov x1, #0x84 // #132
546f0: f2bff561 movk x1, #0xffab, lsl #16
546f4: b9400021 ldr w1, [x1]
546f8: b9026c01 str w1, [x0, #620]
546fc: d2801101 mov x1, #0x88 // #136
54700: f2bff561 movk x1, #0xffab, lsl #16
54704: b9400021 ldr w1, [x1]
54708: b9027001 str w1, [x0, #624]
5470c: d2801181 mov x1, #0x8c // #140
54710: f2bff561 movk x1, #0xffab, lsl #16
54714: b9400021 ldr w1, [x1]
54718: b9027401 str w1, [x0, #628]
5471c: d2801201 mov x1, #0x90 // #144
54720: f2bff561 movk x1, #0xffab, lsl #16
54724: b9400021 ldr w1, [x1]
54728: b9027801 str w1, [x0, #632]
5472c: d2801281 mov x1, #0x94 // #148
54730: f2bff561 movk x1, #0xffab, lsl #16
54734: b9400021 ldr w1, [x1]
54738: b9027c01 str w1, [x0, #636]
5473c: d2801301 mov x1, #0x98 // #152
54740: f2bff561 movk x1, #0xffab, lsl #16
54744: b9400021 ldr w1, [x1]
54748: b9028001 str w1, [x0, #640]
5474c: 52800260 mov w0, #0x13 // #19
54750: 97fff990 bl 52d90 <pmu_power_domain_st>
54754: 350003e0 cbnz w0, 547d0 <rockchip_soc_sys_pwr_dm_suspend+0x9a8>
54758: d2900000 mov x0, #0x8000 // #32768
5475c: f2bff520 movk x0, #0xffa9, lsl #16
54760: b9400001 ldr w1, [x0]
54764: d00000c0 adrp x0, 6e000 <iomux_status+0x2c>
54768: 91002000 add x0, x0, #0x8
5476c: b902d801 str w1, [x0, #728]
54770: d2900081 mov x1, #0x8004 // #32772
54774: f2bff521 movk x1, #0xffa9, lsl #16
54778: b9400021 ldr w1, [x1]
5477c: b902dc01 str w1, [x0, #732]
54780: d2900101 mov x1, #0x8008 // #32776
54784: f2bff521 movk x1, #0xffa9, lsl #16
54788: b9400021 ldr w1, [x1]
5478c: b902e001 str w1, [x0, #736]
54790: d2900181 mov x1, #0x800c // #32780
54794: f2bff521 movk x1, #0xffa9, lsl #16
54798: b9400021 ldr w1, [x1]
5479c: b902e401 str w1, [x0, #740]
547a0: d2900201 mov x1, #0x8010 // #32784
547a4: f2bff521 movk x1, #0xffa9, lsl #16
547a8: b9400021 ldr w1, [x1]
547ac: b902e801 str w1, [x0, #744]
547b0: d2900281 mov x1, #0x8014 // #32788
547b4: f2bff521 movk x1, #0xffa9, lsl #16
547b8: b9400021 ldr w1, [x1]
547bc: b902ec01 str w1, [x0, #748]
547c0: d2900301 mov x1, #0x8018 // #32792
547c4: f2bff521 movk x1, #0xffa9, lsl #16
547c8: b9400021 ldr w1, [x1]
547cc: b902f001 str w1, [x0, #752]
547d0: 52800360 mov w0, #0x1b // #27
547d4: 97fff96f bl 52d90 <pmu_power_domain_st>
547d8: 35000740 cbnz w0, 548c0 <rockchip_soc_sys_pwr_dm_suspend+0xa98>
547dc: d2bff4e0 mov x0, #0xffa70000 // #4289134592
547e0: b9400001 ldr w1, [x0]
547e4: d00000c0 adrp x0, 6e000 <iomux_status+0x2c>
547e8: 91002000 add x0, x0, #0x8
547ec: b9016c01 str w1, [x0, #364]
547f0: d2800081 mov x1, #0x4 // #4
547f4: f2bff4e1 movk x1, #0xffa7, lsl #16
547f8: b9400021 ldr w1, [x1]
547fc: b9017001 str w1, [x0, #368]
54800: d2800101 mov x1, #0x8 // #8
54804: f2bff4e1 movk x1, #0xffa7, lsl #16
54808: b9400021 ldr w1, [x1]
5480c: b9017401 str w1, [x0, #372]
54810: d2800181 mov x1, #0xc // #12
54814: f2bff4e1 movk x1, #0xffa7, lsl #16
54818: b9400021 ldr w1, [x1]
5481c: b9017801 str w1, [x0, #376]
54820: d2800201 mov x1, #0x10 // #16
54824: f2bff4e1 movk x1, #0xffa7, lsl #16
54828: b9400021 ldr w1, [x1]
5482c: b9017c01 str w1, [x0, #380]
54830: d2800281 mov x1, #0x14 // #20
54834: f2bff4e1 movk x1, #0xffa7, lsl #16
54838: b9400021 ldr w1, [x1]
5483c: b9018001 str w1, [x0, #384]
54840: d2800301 mov x1, #0x18 // #24
54844: f2bff4e1 movk x1, #0xffa7, lsl #16
54848: b9400021 ldr w1, [x1]
5484c: b9018401 str w1, [x0, #388]
54850: d2801001 mov x1, #0x80 // #128
54854: f2bff4e1 movk x1, #0xffa7, lsl #16
54858: b9400021 ldr w1, [x1]
5485c: b9018801 str w1, [x0, #392]
54860: d2801081 mov x1, #0x84 // #132
54864: f2bff4e1 movk x1, #0xffa7, lsl #16
54868: b9400021 ldr w1, [x1]
5486c: b9018c01 str w1, [x0, #396]
54870: d2801101 mov x1, #0x88 // #136
54874: f2bff4e1 movk x1, #0xffa7, lsl #16
54878: b9400021 ldr w1, [x1]
5487c: b9019001 str w1, [x0, #400]
54880: d2801181 mov x1, #0x8c // #140
54884: f2bff4e1 movk x1, #0xffa7, lsl #16
54888: b9400021 ldr w1, [x1]
5488c: b9019401 str w1, [x0, #404]
54890: d2801201 mov x1, #0x90 // #144
54894: f2bff4e1 movk x1, #0xffa7, lsl #16
54898: b9400021 ldr w1, [x1]
5489c: b9019801 str w1, [x0, #408]
548a0: d2801281 mov x1, #0x94 // #148
548a4: f2bff4e1 movk x1, #0xffa7, lsl #16
548a8: b9400021 ldr w1, [x1]
548ac: b9019c01 str w1, [x0, #412]
548b0: d2801301 mov x1, #0x98 // #152
548b4: f2bff4e1 movk x1, #0xffa7, lsl #16
548b8: b9400021 ldr w1, [x1]
548bc: b901a001 str w1, [x0, #416]
548c0: 52800180 mov w0, #0xc // #12
548c4: 97fff933 bl 52d90 <pmu_power_domain_st>
548c8: 35000ae0 cbnz w0, 54a24 <rockchip_soc_sys_pwr_dm_suspend+0xbfc>
548cc: d2802000 mov x0, #0x100 // #256
548d0: f2bff4c0 movk x0, #0xffa6, lsl #16
548d4: b9400001 ldr w1, [x0]
548d8: d00000c0 adrp x0, 6e000 <iomux_status+0x2c>
548dc: 91002000 add x0, x0, #0x8
548e0: b901a401 str w1, [x0, #420]
548e4: d2802081 mov x1, #0x104 // #260
548e8: f2bff4c1 movk x1, #0xffa6, lsl #16
548ec: b9400021 ldr w1, [x1]
548f0: b901a801 str w1, [x0, #424]
548f4: d2802101 mov x1, #0x108 // #264
548f8: f2bff4c1 movk x1, #0xffa6, lsl #16
548fc: b9400021 ldr w1, [x1]
54900: b901ac01 str w1, [x0, #428]
54904: d2802181 mov x1, #0x10c // #268
54908: f2bff4c1 movk x1, #0xffa6, lsl #16
5490c: b9400021 ldr w1, [x1]
54910: b901b001 str w1, [x0, #432]
54914: d2802201 mov x1, #0x110 // #272
54918: f2bff4c1 movk x1, #0xffa6, lsl #16
5491c: b9400021 ldr w1, [x1]
54920: b901b401 str w1, [x0, #436]
54924: d2802281 mov x1, #0x114 // #276
54928: f2bff4c1 movk x1, #0xffa6, lsl #16
5492c: b9400021 ldr w1, [x1]
54930: b901b801 str w1, [x0, #440]
54934: d2802301 mov x1, #0x118 // #280
54938: f2bff4c1 movk x1, #0xffa6, lsl #16
5493c: b9400021 ldr w1, [x1]
54940: b901bc01 str w1, [x0, #444]
54944: d2803001 mov x1, #0x180 // #384
54948: f2bff4c1 movk x1, #0xffa6, lsl #16
5494c: b9400021 ldr w1, [x1]
54950: b901c001 str w1, [x0, #448]
54954: d2803081 mov x1, #0x184 // #388
54958: f2bff4c1 movk x1, #0xffa6, lsl #16
5495c: b9400021 ldr w1, [x1]
54960: b901c401 str w1, [x0, #452]
54964: d2803101 mov x1, #0x188 // #392
54968: f2bff4c1 movk x1, #0xffa6, lsl #16
5496c: b9400021 ldr w1, [x1]
54970: b901c801 str w1, [x0, #456]
54974: d2803181 mov x1, #0x18c // #396
54978: f2bff4c1 movk x1, #0xffa6, lsl #16
5497c: b9400021 ldr w1, [x1]
54980: b901cc01 str w1, [x0, #460]
54984: d2803201 mov x1, #0x190 // #400
54988: f2bff4c1 movk x1, #0xffa6, lsl #16
5498c: b9400021 ldr w1, [x1]
54990: b901d001 str w1, [x0, #464]
54994: d2803281 mov x1, #0x194 // #404
54998: f2bff4c1 movk x1, #0xffa6, lsl #16
5499c: b9400021 ldr w1, [x1]
549a0: b901d401 str w1, [x0, #468]
549a4: d2803301 mov x1, #0x198 // #408
549a8: f2bff4c1 movk x1, #0xffa6, lsl #16
549ac: b9400021 ldr w1, [x1]
549b0: b901d801 str w1, [x0, #472]
549b4: d2901001 mov x1, #0x8080 // #32896
549b8: f2bff5a1 movk x1, #0xffad, lsl #16
549bc: b9400021 ldr w1, [x1]
549c0: b9038001 str w1, [x0, #896]
549c4: d2901081 mov x1, #0x8084 // #32900
549c8: f2bff5a1 movk x1, #0xffad, lsl #16
549cc: b9400021 ldr w1, [x1]
549d0: b9038401 str w1, [x0, #900]
549d4: d2901101 mov x1, #0x8088 // #32904
549d8: f2bff5a1 movk x1, #0xffad, lsl #16
549dc: b9400021 ldr w1, [x1]
549e0: b9038801 str w1, [x0, #904]
549e4: d2901181 mov x1, #0x808c // #32908
549e8: f2bff5a1 movk x1, #0xffad, lsl #16
549ec: b9400021 ldr w1, [x1]
549f0: b9038c01 str w1, [x0, #908]
549f4: d2901201 mov x1, #0x8090 // #32912
549f8: f2bff5a1 movk x1, #0xffad, lsl #16
549fc: b9400021 ldr w1, [x1]
54a00: b9039001 str w1, [x0, #912]
54a04: d2901281 mov x1, #0x8094 // #32916
54a08: f2bff5a1 movk x1, #0xffad, lsl #16
54a0c: b9400021 ldr w1, [x1]
54a10: b9039401 str w1, [x0, #916]
54a14: d2901301 mov x1, #0x8098 // #32920
54a18: f2bff5a1 movk x1, #0xffad, lsl #16
54a1c: b9400021 ldr w1, [x1]
54a20: b9039801 str w1, [x0, #920]
54a24: 52800160 mov w0, #0xb // #11
54a28: 97fff8da bl 52d90 <pmu_power_domain_st>
54a2c: 35001c60 cbnz w0, 54db8 <rockchip_soc_sys_pwr_dm_suspend+0xf90>
54a30: d2884000 mov x0, #0x4200 // #16896
54a34: f2bff4c0 movk x0, #0xffa6, lsl #16
54a38: b9400001 ldr w1, [x0]
54a3c: d00000c0 adrp x0, 6e000 <iomux_status+0x2c>
54a40: 91002000 add x0, x0, #0x8
54a44: b9003801 str w1, [x0, #56]
54a48: d2884081 mov x1, #0x4204 // #16900
54a4c: f2bff4c1 movk x1, #0xffa6, lsl #16
54a50: b9400021 ldr w1, [x1]
54a54: b9003c01 str w1, [x0, #60]
54a58: d2884101 mov x1, #0x4208 // #16904
54a5c: f2bff4c1 movk x1, #0xffa6, lsl #16
54a60: b9400021 ldr w1, [x1]
54a64: b9004001 str w1, [x0, #64]
54a68: d2884181 mov x1, #0x420c // #16908
54a6c: f2bff4c1 movk x1, #0xffa6, lsl #16
54a70: b9400021 ldr w1, [x1]
54a74: b9004401 str w1, [x0, #68]
54a78: d2884201 mov x1, #0x4210 // #16912
54a7c: f2bff4c1 movk x1, #0xffa6, lsl #16
54a80: b9400021 ldr w1, [x1]
54a84: b9004801 str w1, [x0, #72]
54a88: d2884281 mov x1, #0x4214 // #16916
54a8c: f2bff4c1 movk x1, #0xffa6, lsl #16
54a90: b9400021 ldr w1, [x1]
54a94: b9004c01 str w1, [x0, #76]
54a98: d2884301 mov x1, #0x4218 // #16920
54a9c: f2bff4c1 movk x1, #0xffa6, lsl #16
54aa0: b9400021 ldr w1, [x1]
54aa4: b9005001 str w1, [x0, #80]
54aa8: d2885001 mov x1, #0x4280 // #17024
54aac: f2bff4c1 movk x1, #0xffa6, lsl #16
54ab0: b9400021 ldr w1, [x1]
54ab4: b9005401 str w1, [x0, #84]
54ab8: d2885081 mov x1, #0x4284 // #17028
54abc: f2bff4c1 movk x1, #0xffa6, lsl #16
54ac0: b9400021 ldr w1, [x1]
54ac4: b9005801 str w1, [x0, #88]
54ac8: d2885101 mov x1, #0x4288 // #17032
54acc: f2bff4c1 movk x1, #0xffa6, lsl #16
54ad0: b9400021 ldr w1, [x1]
54ad4: b9005c01 str w1, [x0, #92]
54ad8: d2885181 mov x1, #0x428c // #17036
54adc: f2bff4c1 movk x1, #0xffa6, lsl #16
54ae0: b9400021 ldr w1, [x1]
54ae4: b9006001 str w1, [x0, #96]
54ae8: d2885201 mov x1, #0x4290 // #17040
54aec: f2bff4c1 movk x1, #0xffa6, lsl #16
54af0: b9400021 ldr w1, [x1]
54af4: b9006401 str w1, [x0, #100]
54af8: d2885281 mov x1, #0x4294 // #17044
54afc: f2bff4c1 movk x1, #0xffa6, lsl #16
54b00: b9400021 ldr w1, [x1]
54b04: b9006801 str w1, [x0, #104]
54b08: d2885301 mov x1, #0x4298 // #17048
54b0c: f2bff4c1 movk x1, #0xffa6, lsl #16
54b10: b9400021 ldr w1, [x1]
54b14: b9006c01 str w1, [x0, #108]
54b18: d2883001 mov x1, #0x4180 // #16768
54b1c: f2bff4c1 movk x1, #0xffa6, lsl #16
54b20: b9400021 ldr w1, [x1]
54b24: b9007001 str w1, [x0, #112]
54b28: d2883081 mov x1, #0x4184 // #16772
54b2c: f2bff4c1 movk x1, #0xffa6, lsl #16
54b30: b9400021 ldr w1, [x1]
54b34: b9007401 str w1, [x0, #116]
54b38: d2883101 mov x1, #0x4188 // #16776
54b3c: f2bff4c1 movk x1, #0xffa6, lsl #16
54b40: b9400021 ldr w1, [x1]
54b44: b9007801 str w1, [x0, #120]
54b48: d2883181 mov x1, #0x418c // #16780
54b4c: f2bff4c1 movk x1, #0xffa6, lsl #16
54b50: b9400021 ldr w1, [x1]
54b54: b9007c01 str w1, [x0, #124]
54b58: d2883201 mov x1, #0x4190 // #16784
54b5c: f2bff4c1 movk x1, #0xffa6, lsl #16
54b60: b9400021 ldr w1, [x1]
54b64: b9008001 str w1, [x0, #128]
54b68: d2883281 mov x1, #0x4194 // #16788
54b6c: f2bff4c1 movk x1, #0xffa6, lsl #16
54b70: b9400021 ldr w1, [x1]
54b74: b9008401 str w1, [x0, #132]
54b78: d2883301 mov x1, #0x4198 // #16792
54b7c: f2bff4c1 movk x1, #0xffa6, lsl #16
54b80: b9400021 ldr w1, [x1]
54b84: b9008801 str w1, [x0, #136]
54b88: d2882001 mov x1, #0x4100 // #16640
54b8c: f2bff4c1 movk x1, #0xffa6, lsl #16
54b90: b9400021 ldr w1, [x1]
54b94: b9008c01 str w1, [x0, #140]
54b98: d2882081 mov x1, #0x4104 // #16644
54b9c: f2bff4c1 movk x1, #0xffa6, lsl #16
54ba0: b9400021 ldr w1, [x1]
54ba4: b9009001 str w1, [x0, #144]
54ba8: d2882101 mov x1, #0x4108 // #16648
54bac: f2bff4c1 movk x1, #0xffa6, lsl #16
54bb0: b9400021 ldr w1, [x1]
54bb4: b9009401 str w1, [x0, #148]
54bb8: d2882181 mov x1, #0x410c // #16652
54bbc: f2bff4c1 movk x1, #0xffa6, lsl #16
54bc0: b9400021 ldr w1, [x1]
54bc4: b9009801 str w1, [x0, #152]
54bc8: d2882201 mov x1, #0x4110 // #16656
54bcc: f2bff4c1 movk x1, #0xffa6, lsl #16
54bd0: b9400021 ldr w1, [x1]
54bd4: b9009c01 str w1, [x0, #156]
54bd8: d2882281 mov x1, #0x4114 // #16660
54bdc: f2bff4c1 movk x1, #0xffa6, lsl #16
54be0: b9400021 ldr w1, [x1]
54be4: b900a001 str w1, [x0, #160]
54be8: d2882301 mov x1, #0x4118 // #16664
54bec: f2bff4c1 movk x1, #0xffa6, lsl #16
54bf0: b9400021 ldr w1, [x1]
54bf4: b900a401 str w1, [x0, #164]
54bf8: d2881001 mov x1, #0x4080 // #16512
54bfc: f2bff4c1 movk x1, #0xffa6, lsl #16
54c00: b9400021 ldr w1, [x1]
54c04: b900a801 str w1, [x0, #168]
54c08: d2881081 mov x1, #0x4084 // #16516
54c0c: f2bff4c1 movk x1, #0xffa6, lsl #16
54c10: b9400021 ldr w1, [x1]
54c14: b900ac01 str w1, [x0, #172]
54c18: d2881101 mov x1, #0x4088 // #16520
54c1c: f2bff4c1 movk x1, #0xffa6, lsl #16
54c20: b9400021 ldr w1, [x1]
54c24: b900b001 str w1, [x0, #176]
54c28: d2881181 mov x1, #0x408c // #16524
54c2c: f2bff4c1 movk x1, #0xffa6, lsl #16
54c30: b9400021 ldr w1, [x1]
54c34: b900b401 str w1, [x0, #180]
54c38: d2881201 mov x1, #0x4090 // #16528
54c3c: f2bff4c1 movk x1, #0xffa6, lsl #16
54c40: b9400021 ldr w1, [x1]
54c44: b900b801 str w1, [x0, #184]
54c48: d2881281 mov x1, #0x4094 // #16532
54c4c: f2bff4c1 movk x1, #0xffa6, lsl #16
54c50: b9400021 ldr w1, [x1]
54c54: b900bc01 str w1, [x0, #188]
54c58: d2881301 mov x1, #0x4098 // #16536
54c5c: f2bff4c1 movk x1, #0xffa6, lsl #16
54c60: b9400021 ldr w1, [x1]
54c64: b900c001 str w1, [x0, #192]
54c68: d2903001 mov x1, #0x8180 // #33152
54c6c: f2bff5a1 movk x1, #0xffad, lsl #16
54c70: b9400021 ldr w1, [x1]
54c74: b9039c01 str w1, [x0, #924]
54c78: d2903081 mov x1, #0x8184 // #33156
54c7c: f2bff5a1 movk x1, #0xffad, lsl #16
54c80: b9400021 ldr w1, [x1]
54c84: b903a001 str w1, [x0, #928]
54c88: d2903101 mov x1, #0x8188 // #33160
54c8c: f2bff5a1 movk x1, #0xffad, lsl #16
54c90: b9400021 ldr w1, [x1]
54c94: b903a401 str w1, [x0, #932]
54c98: d2903181 mov x1, #0x818c // #33164
54c9c: f2bff5a1 movk x1, #0xffad, lsl #16
54ca0: b9400021 ldr w1, [x1]
54ca4: b903a801 str w1, [x0, #936]
54ca8: d2903201 mov x1, #0x8190 // #33168
54cac: f2bff5a1 movk x1, #0xffad, lsl #16
54cb0: b9400021 ldr w1, [x1]
54cb4: b903ac01 str w1, [x0, #940]
54cb8: d2903281 mov x1, #0x8194 // #33172
54cbc: f2bff5a1 movk x1, #0xffad, lsl #16
54cc0: b9400021 ldr w1, [x1]
54cc4: b903b001 str w1, [x0, #944]
54cc8: d2903301 mov x1, #0x8198 // #33176
54ccc: f2bff5a1 movk x1, #0xffad, lsl #16
54cd0: b9400021 ldr w1, [x1]
54cd4: b903b401 str w1, [x0, #948]
54cd8: d2902001 mov x1, #0x8100 // #33024
54cdc: f2bff5a1 movk x1, #0xffad, lsl #16
54ce0: b9400021 ldr w1, [x1]
54ce4: b903b801 str w1, [x0, #952]
54ce8: d2902081 mov x1, #0x8104 // #33028
54cec: f2bff5a1 movk x1, #0xffad, lsl #16
54cf0: b9400021 ldr w1, [x1]
54cf4: b903bc01 str w1, [x0, #956]
54cf8: d2902101 mov x1, #0x8108 // #33032
54cfc: f2bff5a1 movk x1, #0xffad, lsl #16
54d00: b9400021 ldr w1, [x1]
54d04: b903c001 str w1, [x0, #960]
54d08: d2902181 mov x1, #0x810c // #33036
54d0c: f2bff5a1 movk x1, #0xffad, lsl #16
54d10: b9400021 ldr w1, [x1]
54d14: b903c401 str w1, [x0, #964]
54d18: d2902201 mov x1, #0x8110 // #33040
54d1c: f2bff5a1 movk x1, #0xffad, lsl #16
54d20: b9400021 ldr w1, [x1]
54d24: b903c801 str w1, [x0, #968]
54d28: d2902281 mov x1, #0x8114 // #33044
54d2c: f2bff5a1 movk x1, #0xffad, lsl #16
54d30: b9400021 ldr w1, [x1]
54d34: b903cc01 str w1, [x0, #972]
54d38: d2902301 mov x1, #0x8118 // #33048
54d3c: f2bff5a1 movk x1, #0xffad, lsl #16
54d40: b9400021 ldr w1, [x1]
54d44: b903d001 str w1, [x0, #976]
54d48: d2886001 mov x1, #0x4300 // #17152
54d4c: f2bff4c1 movk x1, #0xffa6, lsl #16
54d50: b9400021 ldr w1, [x1]
54d54: b900e001 str w1, [x0, #224]
54d58: d2886081 mov x1, #0x4304 // #17156
54d5c: f2bff4c1 movk x1, #0xffa6, lsl #16
54d60: b9400021 ldr w1, [x1]
54d64: b900e401 str w1, [x0, #228]
54d68: d2886101 mov x1, #0x4308 // #17160
54d6c: f2bff4c1 movk x1, #0xffa6, lsl #16
54d70: b9400021 ldr w1, [x1]
54d74: b900e801 str w1, [x0, #232]
54d78: d2886181 mov x1, #0x430c // #17164
54d7c: f2bff4c1 movk x1, #0xffa6, lsl #16
54d80: b9400021 ldr w1, [x1]
54d84: b900ec01 str w1, [x0, #236]
54d88: d2886201 mov x1, #0x4310 // #17168
54d8c: f2bff4c1 movk x1, #0xffa6, lsl #16
54d90: b9400021 ldr w1, [x1]
54d94: b900f001 str w1, [x0, #240]
54d98: d2886281 mov x1, #0x4314 // #17172
54d9c: f2bff4c1 movk x1, #0xffa6, lsl #16
54da0: b9400021 ldr w1, [x1]
54da4: b900f401 str w1, [x0, #244]
54da8: d2886301 mov x1, #0x4318 // #17176
54dac: f2bff4c1 movk x1, #0xffa6, lsl #16
54db0: b9400021 ldr w1, [x1]
54db4: b900f801 str w1, [x0, #248]
54db8: 52800220 mov w0, #0x11 // #17
54dbc: 97fff7f5 bl 52d90 <pmu_power_domain_st>
54dc0: 350003e0 cbnz w0, 54e3c <rockchip_soc_sys_pwr_dm_suspend+0x1014>
54dc4: d2900000 mov x0, #0x8000 // #32768
54dc8: f2bff560 movk x0, #0xffab, lsl #16
54dcc: b9400001 ldr w1, [x0]
54dd0: d00000c0 adrp x0, 6e000 <iomux_status+0x2c>
54dd4: 91002000 add x0, x0, #0x8
54dd8: b901f801 str w1, [x0, #504]
54ddc: d2900081 mov x1, #0x8004 // #32772
54de0: f2bff561 movk x1, #0xffab, lsl #16
54de4: b9400021 ldr w1, [x1]
54de8: b901fc01 str w1, [x0, #508]
54dec: d2900101 mov x1, #0x8008 // #32776
54df0: f2bff561 movk x1, #0xffab, lsl #16
54df4: b9400021 ldr w1, [x1]
54df8: b9020001 str w1, [x0, #512]
54dfc: d2900181 mov x1, #0x800c // #32780
54e00: f2bff561 movk x1, #0xffab, lsl #16
54e04: b9400021 ldr w1, [x1]
54e08: b9020401 str w1, [x0, #516]
54e0c: d2900201 mov x1, #0x8010 // #32784
54e10: f2bff561 movk x1, #0xffab, lsl #16
54e14: b9400021 ldr w1, [x1]
54e18: b9020801 str w1, [x0, #520]
54e1c: d2900281 mov x1, #0x8014 // #32788
54e20: f2bff561 movk x1, #0xffab, lsl #16
54e24: b9400021 ldr w1, [x1]
54e28: b9020c01 str w1, [x0, #524]
54e2c: d2900301 mov x1, #0x8018 // #32792
54e30: f2bff561 movk x1, #0xffab, lsl #16
54e34: b9400021 ldr w1, [x1]
54e38: b9021001 str w1, [x0, #528]
54e3c: 52800200 mov w0, #0x10 // #16
54e40: 97fff7d4 bl 52d90 <pmu_power_domain_st>
54e44: 35000740 cbnz w0, 54f2c <rockchip_soc_sys_pwr_dm_suspend+0x1104>
54e48: d2bff580 mov x0, #0xffac0000 // #4289462272
54e4c: b9400001 ldr w1, [x0]
54e50: d00000c0 adrp x0, 6e000 <iomux_status+0x2c>
54e54: 91002000 add x0, x0, #0x8
54e58: b9021401 str w1, [x0, #532]
54e5c: d2800081 mov x1, #0x4 // #4
54e60: f2bff581 movk x1, #0xffac, lsl #16
54e64: b9400021 ldr w1, [x1]
54e68: b9021801 str w1, [x0, #536]
54e6c: d2800101 mov x1, #0x8 // #8
54e70: f2bff581 movk x1, #0xffac, lsl #16
54e74: b9400021 ldr w1, [x1]
54e78: b9021c01 str w1, [x0, #540]
54e7c: d2800181 mov x1, #0xc // #12
54e80: f2bff581 movk x1, #0xffac, lsl #16
54e84: b9400021 ldr w1, [x1]
54e88: b9022001 str w1, [x0, #544]
54e8c: d2800201 mov x1, #0x10 // #16
54e90: f2bff581 movk x1, #0xffac, lsl #16
54e94: b9400021 ldr w1, [x1]
54e98: b9022401 str w1, [x0, #548]
54e9c: d2800281 mov x1, #0x14 // #20
54ea0: f2bff581 movk x1, #0xffac, lsl #16
54ea4: b9400021 ldr w1, [x1]
54ea8: b9022801 str w1, [x0, #552]
54eac: d2800301 mov x1, #0x18 // #24
54eb0: f2bff581 movk x1, #0xffac, lsl #16
54eb4: b9400021 ldr w1, [x1]
54eb8: b9022c01 str w1, [x0, #556]
54ebc: d2801001 mov x1, #0x80 // #128
54ec0: f2bff581 movk x1, #0xffac, lsl #16
54ec4: b9400021 ldr w1, [x1]
54ec8: b9023001 str w1, [x0, #560]
54ecc: d2801081 mov x1, #0x84 // #132
54ed0: f2bff581 movk x1, #0xffac, lsl #16
54ed4: b9400021 ldr w1, [x1]
54ed8: b9023401 str w1, [x0, #564]
54edc: d2801101 mov x1, #0x88 // #136
54ee0: f2bff581 movk x1, #0xffac, lsl #16
54ee4: b9400021 ldr w1, [x1]
54ee8: b9023801 str w1, [x0, #568]
54eec: d2801181 mov x1, #0x8c // #140
54ef0: f2bff581 movk x1, #0xffac, lsl #16
54ef4: b9400021 ldr w1, [x1]
54ef8: b9023c01 str w1, [x0, #572]
54efc: d2801201 mov x1, #0x90 // #144
54f00: f2bff581 movk x1, #0xffac, lsl #16
54f04: b9400021 ldr w1, [x1]
54f08: b9024001 str w1, [x0, #576]
54f0c: d2801281 mov x1, #0x94 // #148
54f10: f2bff581 movk x1, #0xffac, lsl #16
54f14: b9400021 ldr w1, [x1]
54f18: b9024401 str w1, [x0, #580]
54f1c: d2801301 mov x1, #0x98 // #152
54f20: f2bff581 movk x1, #0xffac, lsl #16
54f24: b9400021 ldr w1, [x1]
54f28: b9024801 str w1, [x0, #584]
54f2c: d2800300 mov x0, #0x18 // #24
54f30: d2800e13 mov x19, #0x70 // #112
54f34: f2bfe620 movk x0, #0xff31, lsl #16
54f38: f2bfe633 movk x19, #0xff31, lsl #16
54f3c: b9400001 ldr w1, [x0]
54f40: d00000c0 adrp x0, 6e000 <iomux_status+0x2c>
54f44: b9000401 str w1, [x0, #4]
54f48: 52800021 mov w1, #0x1 // #1
54f4c: 528001e0 mov w0, #0xf // #15
54f50: 97fff865 bl 530e4 <pmu_set_power_domain>
54f54: 52800021 mov w1, #0x1 // #1
54f58: 52800100 mov w0, #0x8 // #8
54f5c: 97fff862 bl 530e4 <pmu_set_power_domain>
54f60: 52800021 mov w1, #0x1 // #1
54f64: 52800120 mov w0, #0x9 // #9
54f68: 97fff85f bl 530e4 <pmu_set_power_domain>
54f6c: 52800021 mov w1, #0x1 // #1
54f70: 52800280 mov w0, #0x14 // #20
54f74: 97fff85c bl 530e4 <pmu_set_power_domain>
54f78: 52800021 mov w1, #0x1 // #1
54f7c: 528002c0 mov w0, #0x16 // #22
54f80: 97fff859 bl 530e4 <pmu_set_power_domain>
54f84: 52800021 mov w1, #0x1 // #1
54f88: 528002e0 mov w0, #0x17 // #23
54f8c: 97fff856 bl 530e4 <pmu_set_power_domain>
54f90: 52800021 mov w1, #0x1 // #1
54f94: 52800300 mov w0, #0x18 // #24
54f98: 97fff853 bl 530e4 <pmu_set_power_domain>
54f9c: 52800021 mov w1, #0x1 // #1
54fa0: 528003e0 mov w0, #0x1f // #31
54fa4: 97fff850 bl 530e4 <pmu_set_power_domain>
54fa8: 52800021 mov w1, #0x1 // #1
54fac: 52800320 mov w0, #0x19 // #25
54fb0: 97fff84d bl 530e4 <pmu_set_power_domain>
54fb4: 52800021 mov w1, #0x1 // #1
54fb8: 52800380 mov w0, #0x1c // #28
54fbc: 97fff84a bl 530e4 <pmu_set_power_domain>
54fc0: 52800021 mov w1, #0x1 // #1
54fc4: 52800260 mov w0, #0x13 // #19
54fc8: 97fff847 bl 530e4 <pmu_set_power_domain>
54fcc: 52800021 mov w1, #0x1 // #1
54fd0: 52800240 mov w0, #0x12 // #18
54fd4: 97fff844 bl 530e4 <pmu_set_power_domain>
54fd8: 52800021 mov w1, #0x1 // #1
54fdc: 52800200 mov w0, #0x10 // #16
54fe0: 97fff841 bl 530e4 <pmu_set_power_domain>
54fe4: 52800021 mov w1, #0x1 // #1
54fe8: 52800220 mov w0, #0x11 // #17
54fec: 97fff83e bl 530e4 <pmu_set_power_domain>
54ff0: 52800021 mov w1, #0x1 // #1
54ff4: 52800360 mov w0, #0x1b // #27
54ff8: 97fff83b bl 530e4 <pmu_set_power_domain>
54ffc: 52800021 mov w1, #0x1 // #1
55000: 52800340 mov w0, #0x1a // #26
55004: 97fff838 bl 530e4 <pmu_set_power_domain>
55008: 52800021 mov w1, #0x1 // #1
5500c: 528001c0 mov w0, #0xe // #14
55010: 97fff835 bl 530e4 <pmu_set_power_domain>
55014: 52800021 mov w1, #0x1 // #1
55018: 528003c0 mov w0, #0x1e // #30
5501c: 97fff832 bl 530e4 <pmu_set_power_domain>
55020: 52800021 mov w1, #0x1 // #1
55024: 52800180 mov w0, #0xc // #12
55028: 97fff82f bl 530e4 <pmu_set_power_domain>
5502c: 940006cc bl 56b5c <clk_gate_con_restore>
55030: d2800b81 mov x1, #0x5c // #92
55034: 529c0042 mov w2, #0xe002 // #57346
55038: f2bfe621 movk x1, #0xff31, lsl #16
5503c: 72a143a2 movk w2, #0xa1d, lsl #16
55040: b9400020 ldr w0, [x1]
55044: 2a020000 orr w0, w0, w2
55048: b9000020 str w0, [x1]
5504c: 940006de bl 56bc4 <set_pmu_rsthold>
55050: d2806180 mov x0, #0x30c // #780
55054: 900000c1 adrp x1, 6d000 <dist_ctx+0x1e50>
55058: f2bfeec0 movk x0, #0xff76, lsl #16
5505c: b9400002 ldr w2, [x0]
55060: b90fbc22 str w2, [x1, #4028]
55064: 52a00041 mov w1, #0x20000 // #131072
55068: b9000001 str w1, [x0]
5506c: 9400065b bl 569d8 <prepare_abpll_for_ddrctrl>
55070: 52800020 mov w0, #0x1 // #1
55074: 97ffac2b bl 40120 <__sram_func_set_ddrctl_pll_veneer>
55078: d29c4200 mov x0, #0xe210 // #57872
5507c: 52a02001 mov w1, #0x1000000 // #16777216
55080: f2bfeee0 movk x0, #0xff77, lsl #16
55084: b9000001 str w1, [x0]
55088: d2800d80 mov x0, #0x6c // #108
5508c: f2bfe620 movk x0, #0xff31, lsl #16
55090: 52801841 mov w1, #0xc2 // #194
55094: 72a01841 movk w1, #0xc2, lsl #16
55098: b9000001 str w1, [x0]
5509c: d2800201 mov x1, #0x10 // #16
550a0: f2bfe621 movk x1, #0xff31, lsl #16
550a4: 32078be0 mov w0, #0xe000e00 // #234884608
550a8: b9000260 str w0, [x19]
550ac: b9400020 ldr w0, [x1]
550b0: 321e0000 orr w0, w0, #0x4
550b4: b9000020 str w0, [x1]
550b8: d2800400 mov x0, #0x20 // #32
550bc: 529fefe1 mov w1, #0xff7f // #65407
550c0: f2bfe620 movk x0, #0xff31, lsl #16
550c4: 72a39fe1 movk w1, #0x1cff, lsl #16
550c8: b9000001 str w1, [x0]
550cc: d2800380 mov x0, #0x1c // #28
550d0: f2bfe620 movk x0, #0xff31, lsl #16
550d4: 52801fe1 mov w1, #0xff // #255
550d8: b9000001 str w1, [x0]
550dc: d2803000 mov x0, #0x180 // #384
550e0: f2bfe640 movk x0, #0xff32, lsl #16
550e4: 52a00021 mov w1, #0x10000 // #65536
550e8: b9000001 str w1, [x0]
550ec: d2bfe640 mov x0, #0xff320000 // #4281466880
550f0: 52800041 mov w1, #0x2 // #2
550f4: 72a00061 movk w1, #0x3, lsl #16
550f8: b9000001 str w1, [x0]
550fc: 907f9ae0 adrp x0, ff3b1000 <rk3399m0pmu_bin>
55100: 91000000 add x0, x0, #0x0
55104: 9400051d bl 56578 <m0_configure_execute_addr>
55108: 94000527 bl 565a4 <m0_start>
5510c: 940006be bl 56c04 <pmu_sgrf_rst_hld>
55110: f07f9ac0 adrp x0, ff3b0000 <pmu_cpuson_entrypoint>
55114: d2980081 mov x1, #0xc004 // #49156
55118: 91000000 add x0, x0, #0x0
5511c: f2bfe661 movk x1, #0xff33, lsl #16
55120: d350fc00 lsr x0, x0, #16
55124: 32103c00 orr w0, w0, #0xffff0000
55128: b9000020 str w0, [x1]
5512c: 320c8be0 mov w0, #0x700070 // #7340144
55130: b9000260 str w0, [x19]
55134: d5033f9f dsb sy
55138: d2800e94 mov x20, #0x74 // #116
5513c: 52807d13 mov w19, #0x3e8 // #1000
55140: f2bfe634 movk x20, #0xff31, lsl #16
55144: b9400280 ldr w0, [x20]
55148: 121c0800 and w0, w0, #0x70
5514c: 7101c01f cmp w0, #0x70
55150: 54001461 b.ne 553dc <rockchip_soc_sys_pwr_dm_suspend+0x15b4> // b.any
55154: d2800281 mov x1, #0x14 // #20
55158: f2bfe621 movk x1, #0xff31, lsl #16
5515c: b9400020 ldr w0, [x1]
55160: 32190000 orr w0, w0, #0x80
55164: b9000020 str w0, [x1]
55168: 97fffb01 bl 53d6c <wdt_register_save>
5516c: 940005ae bl 56824 <secure_watchdog_gate>
55170: 94000600 bl 56970 <disable_dvfs_plls>
55174: 94000540 bl 56674 <disable_pwms>
55178: 94000611 bl 569bc <disable_nodvfs_plls>
5517c: 97fff36b bl 51f28 <plat_get_rockchip_suspend_apio>
55180: b4000da0 cbz x0, 55334 <rockchip_soc_sys_pwr_dm_suspend+0x150c>
55184: d29c0006 mov x6, #0xe000 // #57344
55188: 900000c3 adrp x3, 6d000 <dist_ctx+0x1e50>
5518c: d29c0805 mov x5, #0xe040 // #57408
55190: b00000c2 adrp x2, 6e000 <iomux_status+0x2c>
55194: 913f5063 add x3, x3, #0xfd4
55198: 910fe042 add x2, x2, #0x3f8
5519c: d2800001 mov x1, #0x0 // #0
551a0: f2bfeee6 movk x6, #0xff77, lsl #16
551a4: f2bfeee5 movk x5, #0xff77, lsl #16
551a8: b8666824 ldr w4, [x1, x6]
551ac: b8236824 str w4, [x1, x3]
551b0: b8656824 ldr w4, [x1, x5]
551b4: b8226824 str w4, [x1, x2]
551b8: 91001021 add x1, x1, #0x4
551bc: f100c03f cmp x1, #0x30
551c0: 54ffff41 b.ne 551a8 <rockchip_soc_sys_pwr_dm_suspend+0x1380> // b.any
551c4: d2806f82 mov x2, #0x37c // #892
551c8: 900000c3 adrp x3, 6d000 <dist_ctx+0x1e50>
551cc: f2bfeec2 movk x2, #0xff76, lsl #16
551d0: b9400041 ldr w1, [x2]
551d4: d3431421 ubfx x1, x1, #3, #3
551d8: b90fc461 str w1, [x3, #4036]
551dc: 52a00701 mov w1, #0x380000 // #3670016
551e0: b9000041 str w1, [x2]
551e4: d2800081 mov x1, #0x4 // #4
551e8: 900000c2 adrp x2, 6d000 <dist_ctx+0x1e50>
551ec: f2bfef01 movk x1, #0xff78, lsl #16
551f0: b9400023 ldr w3, [x1]
551f4: 913f2041 add x1, x2, #0xfc8
551f8: b90fc843 str w3, [x2, #4040]
551fc: d2900082 mov x2, #0x8004 // #32772
55200: f2bfef02 movk x2, #0xff78, lsl #16
55204: b9400043 ldr w3, [x2]
55208: b9000423 str w3, [x1, #4]
5520c: d2800083 mov x3, #0x4 // #4
55210: f2bfef23 movk x3, #0xff79, lsl #16
55214: b9400063 ldr w3, [x3]
55218: b9000823 str w3, [x1, #8]
5521c: 39400001 ldrb w1, [x0]
55220: 360001a1 tbz w1, #0, 55254 <rockchip_soc_sys_pwr_dm_suspend+0x142c>
55224: d29c0203 mov x3, #0xe010 // #57360
55228: 52bfffe0 mov w0, #0xffff0000 // #-65536
5522c: f2bfeee3 movk x3, #0xff77, lsl #16
55230: b9000060 str w0, [x3]
55234: b9000460 str w0, [x3, #4]
55238: b9000860 str w0, [x3, #8]
5523c: b9004060 str w0, [x3, #64]
55240: b9004460 str w0, [x3, #68]
55244: b9004860 str w0, [x3, #72]
55248: b9400040 ldr w0, [x2]
5524c: 12081c00 and w0, w0, #0xff000000
55250: b9000040 str w0, [x2]
55254: 360801a1 tbz w1, #1, 55288 <rockchip_soc_sys_pwr_dm_suspend+0x1460>
55258: d29c0002 mov x2, #0xe000 // #57344
5525c: 52bfffe0 mov w0, #0xffff0000 // #-65536
55260: f2bfeee2 movk x2, #0xff77, lsl #16
55264: b9000040 str w0, [x2]
55268: b9000440 str w0, [x2, #4]
5526c: b9004040 str w0, [x2, #64]
55270: b9004440 str w0, [x2, #68]
55274: d2800082 mov x2, #0x4 // #4
55278: f2bfef02 movk x2, #0xff78, lsl #16
5527c: b9400040 ldr w0, [x2]
55280: 12134800 and w0, w0, #0xffffe000
55284: b9000040 str w0, [x2]
55288: 361001a1 tbz w1, #2, 552bc <rockchip_soc_sys_pwr_dm_suspend+0x1494>
5528c: d29c0102 mov x2, #0xe008 // #57352
55290: 52bfffe0 mov w0, #0xffff0000 // #-65536
55294: f2bfeee2 movk x2, #0xff77, lsl #16
55298: b9000040 str w0, [x2]
5529c: b9000440 str w0, [x2, #4]
552a0: b9004040 str w0, [x2, #64]
552a4: b9004440 str w0, [x2, #68]
552a8: d2800082 mov x2, #0x4 // #4
552ac: f2bfef02 movk x2, #0xff78, lsl #16
552b0: b9400040 ldr w0, [x2]
552b4: 12034800 and w0, w0, #0xe000ffff
552b8: b9000040 str w0, [x2]
552bc: 361801a1 tbz w1, #3, 552f0 <rockchip_soc_sys_pwr_dm_suspend+0x14c8>
552c0: d29c0502 mov x2, #0xe028 // #57384
552c4: 52bfffe0 mov w0, #0xffff0000 // #-65536
552c8: f2bfeee2 movk x2, #0xff77, lsl #16
552cc: b9000040 str w0, [x2]
552d0: b9000440 str w0, [x2, #4]
552d4: b9004040 str w0, [x2, #64]
552d8: b9004440 str w0, [x2, #68]
552dc: d2800082 mov x2, #0x4 // #4
552e0: f2bfef22 movk x2, #0xff79, lsl #16
552e4: b9400040 ldr w0, [x2]
552e8: 12014000 and w0, w0, #0x8000ffff
552ec: b9000040 str w0, [x2]
552f0: 36200221 tbz w1, #4, 55334 <rockchip_soc_sys_pwr_dm_suspend+0x150c>
552f4: d29c0381 mov x1, #0xe01c // #57372
552f8: 52bfffe0 mov w0, #0xffff0000 // #-65536
552fc: f2bfeee1 movk x1, #0xff77, lsl #16
55300: b9000020 str w0, [x1]
55304: b9000420 str w0, [x1, #4]
55308: b9004020 str w0, [x1, #64]
5530c: b9004420 str w0, [x1, #68]
55310: d2900081 mov x1, #0x8004 // #32772
55314: f2bfef01 movk x1, #0xff78, lsl #16
55318: b9400020 ldr w0, [x1]
5531c: 12005c00 and w0, w0, #0xffffff
55320: b9000020 str w0, [x1]
55324: 91402021 add x1, x1, #0x8, lsl #12
55328: b9400020 ldr w0, [x1]
5532c: 12185c00 and w0, w0, #0xffffff00
55330: b9000020 str w0, [x1]
55334: 9100f3e0 add x0, sp, #0x3c
55338: 97fff2f6 bl 51f10 <plat_get_rockchip_suspend_gpio>
5533c: 91001013 add x19, x0, #0x4
55340: 52800014 mov w20, #0x0 // #0
55344: b9403fe0 ldr w0, [sp, #60]
55348: 6b14001f cmp w0, w20
5534c: 54000688 b.hi 5541c <rockchip_soc_sys_pwr_dm_suspend+0x15f4> // b.pmore
55350: 97fff947 bl 5386c <suspend_uart>
55354: 97fff9f2 bl 53b1c <grf_register_save>
55358: 97fffa58 bl 53cb8 <cru_register_save>
5535c: 97fff900 bl 5375c <sram_save>
55360: 97fff612 bl 52ba8 <plat_rockchip_save_gpio>
55364: 52800000 mov w0, #0x0 // #0
55368: a94153f3 ldp x19, x20, [sp, #16]
5536c: a9425bf5 ldp x21, x22, [sp, #32]
55370: a8c47bfd ldp x29, x30, [sp], #64
55374: d65f03c0 ret
55378: 97fff82e bl 53430 <rk3399_flush_l2_b>
5537c: d2800f96 mov x22, #0x7c // #124
55380: d2800481 mov x1, #0x24 // #36
55384: d0000074 adrp x20, 63000 <CSWTCH.22+0x37e>
55388: f2bfe621 movk x1, #0xff31, lsl #16
5538c: d0000075 adrp x21, 63000 <CSWTCH.22+0x37e>
55390: 910b9694 add x20, x20, #0x2e5
55394: 910986b5 add x21, x21, #0x261
55398: b9400020 ldr w0, [x1]
5539c: 52800013 mov w19, #0x0 // #0
553a0: f2bfe636 movk x22, #0xff31, lsl #16
553a4: 32010000 orr w0, w0, #0x80000000
553a8: b9000020 str w0, [x1]
553ac: b94002c0 ldr w0, [x22]
553b0: 375f55e0 tbnz w0, #11, 53e6c <rockchip_soc_sys_pwr_dm_suspend+0x44>
553b4: 11000673 add w19, w19, #0x1
553b8: 52800020 mov w0, #0x1 // #1
553bc: 97fff184 bl 519cc <udelay>
553c0: 710f9e7f cmp w19, #0x3e7
553c4: 54ffff49 b.ls 553ac <rockchip_soc_sys_pwr_dm_suspend+0x1584> // b.plast
553c8: b94002c2 ldr w2, [x22]
553cc: aa1403e1 mov x1, x20
553d0: aa1503e0 mov x0, x21
553d4: 9400252c bl 5e884 <tf_log>
553d8: 17fffff5 b 553ac <rockchip_soc_sys_pwr_dm_suspend+0x1584>
553dc: 71000673 subs w19, w19, #0x1
553e0: 54000181 b.ne 55410 <rockchip_soc_sys_pwr_dm_suspend+0x15e8> // b.any
553e4: b9400282 ldr w2, [x20]
553e8: d0000073 adrp x19, 63000 <CSWTCH.22+0x37e>
553ec: 910c8673 add x19, x19, #0x321
553f0: d0000060 adrp x0, 63000 <CSWTCH.22+0x37e>
553f4: aa1303e1 mov x1, x19
553f8: 91098400 add x0, x0, #0x261
553fc: 94002522 bl 5e884 <tf_log>
55400: aa1303e0 mov x0, x19
55404: 94002614 bl 5ec54 <backtrace>
55408: 940025b1 bl 5eacc <console_flush>
5540c: 94002d38 bl 608ec <do_panic>
55410: 52800020 mov w0, #0x1 // #1
55414: 97fff16e bl 519cc <udelay>
55418: 17ffff4b b 55144 <rockchip_soc_sys_pwr_dm_suspend+0x131c>
5541c: 385fc261 ldurb w1, [x19, #-4]
55420: 11000694 add w20, w20, #0x1
55424: b9400260 ldr w0, [x19]
55428: 97fff1ef bl 51be4 <gpio_set_value>
5542c: b8408660 ldr w0, [x19], #8
55430: 52800001 mov w1, #0x0 // #0
55434: 97fff1cd bl 51b68 <gpio_set_direction>
55438: 52800020 mov w0, #0x1 // #1
5543c: 97fff164 bl 519cc <udelay>
55440: 17ffffc1 b 55344 <rockchip_soc_sys_pwr_dm_suspend+0x151c>
0000000000055444 <rockchip_soc_sys_pwr_dm_resume>:
55444: a9bd7bfd stp x29, x30, [sp, #-48]!
55448: 910003fd mov x29, sp
5544c: a90153f3 stp x19, x20, [sp, #16]
55450: 97fff60e bl 52c88 <plat_rockchip_restore_gpio>
55454: 97fffa26 bl 53cec <cru_register_restore>
55458: 97fff9e7 bl 53bf4 <grf_register_restore>
5545c: 97fffa58 bl 53dbc <wdt_register_restore>
55460: 97fff91c bl 538d0 <resume_uart>
55464: 97fff2b1 bl 51f28 <plat_get_rockchip_suspend_apio>
55468: b40004e0 cbz x0, 55504 <rockchip_soc_sys_pwr_dm_resume+0xc0>
5546c: b00000c3 adrp x3, 6e000 <iomux_status+0x2c>
55470: d29c0805 mov x5, #0xe040 // #57408
55474: 900000c2 adrp x2, 6d000 <dist_ctx+0x1e50>
55478: d29c0004 mov x4, #0xe000 // #57344
5547c: 910fe063 add x3, x3, #0x3f8
55480: 913f5042 add x2, x2, #0xfd4
55484: d2800000 mov x0, #0x0 // #0
55488: f2bfeee5 movk x5, #0xff77, lsl #16
5548c: f2bfeee4 movk x4, #0xff77, lsl #16
55490: b8636801 ldr w1, [x0, x3]
55494: 32103c21 orr w1, w1, #0xffff0000
55498: b8256801 str w1, [x0, x5]
5549c: b8626801 ldr w1, [x0, x2]
554a0: 32103c21 orr w1, w1, #0xffff0000
554a4: b8246801 str w1, [x0, x4]
554a8: 91001000 add x0, x0, #0x4
554ac: f100c01f cmp x0, #0x30
554b0: 54ffff01 b.ne 55490 <rockchip_soc_sys_pwr_dm_resume+0x4c> // b.any
554b4: 900000c1 adrp x1, 6d000 <dist_ctx+0x1e50>
554b8: 913f2020 add x0, x1, #0xfc8
554bc: b94fc822 ldr w2, [x1, #4040]
554c0: d2800081 mov x1, #0x4 // #4
554c4: f2bfef01 movk x1, #0xff78, lsl #16
554c8: b9000022 str w2, [x1]
554cc: 91402021 add x1, x1, #0x8, lsl #12
554d0: b9400402 ldr w2, [x0, #4]
554d4: b9000022 str w2, [x1]
554d8: b9400801 ldr w1, [x0, #8]
554dc: d2800080 mov x0, #0x4 // #4
554e0: f2bfef20 movk x0, #0xff79, lsl #16
554e4: b9000001 str w1, [x0]
554e8: 900000c0 adrp x0, 6d000 <dist_ctx+0x1e50>
554ec: d2806f81 mov x1, #0x37c // #892
554f0: b94fc400 ldr w0, [x0, #4036]
554f4: f2bfeec1 movk x1, #0xff76, lsl #16
554f8: 531d7000 lsl w0, w0, #3
554fc: 320d0800 orr w0, w0, #0x380000
55500: b9000020 str w0, [x1]
55504: 9100b3e0 add x0, sp, #0x2c
55508: 97fff282 bl 51f10 <plat_get_rockchip_suspend_gpio>
5550c: b9402ff4 ldr w20, [sp, #44]
55510: 51000694 sub w20, w20, #0x1
55514: 8b34cc13 add x19, x0, w20, sxtw #3
55518: 36f86894 tbz w20, #31, 56228 <rockchip_soc_sys_pwr_dm_resume+0xde4>
5551c: 940005d3 bl 56c68 <enable_nodvfs_plls>
55520: 94000494 bl 56770 <enable_pwms>
55524: 52802580 mov w0, #0x12c // #300
55528: 97fff129 bl 519cc <udelay>
5552c: 940005bb bl 56c18 <enable_dvfs_plls>
55530: 940004cf bl 5686c <secure_sgrf_init>
55534: 940004e6 bl 568cc <secure_sgrf_ddr_rgn_init>
55538: 900000c0 adrp x0, 6d000 <dist_ctx+0x1e50>
5553c: d2806181 mov x1, #0x30c // #780
55540: f2bfeec1 movk x1, #0xff76, lsl #16
55544: b94fbc00 ldr w0, [x0, #4028]
55548: 32101c00 orr w0, w0, #0xff0000
5554c: b9000020 str w0, [x1]
55550: d2800b00 mov x0, #0x58 // #88
55554: 12800001 mov w1, #0xffffffff // #-1
55558: f2bfe620 movk x0, #0xff31, lsl #16
5555c: b9000001 str w1, [x0]
55560: d2800200 mov x0, #0x10 // #16
55564: f2bfe620 movk x0, #0xff31, lsl #16
55568: d2980081 mov x1, #0xc004 // #49156
5556c: f2bfe661 movk x1, #0xff33, lsl #16
55570: b900001f str wzr, [x0]
55574: 900000c0 adrp x0, 6d000 <dist_ctx+0x1e50>
55578: 795f8400 ldrh w0, [x0, #4034]
5557c: 32103c00 orr w0, w0, #0xffff0000
55580: b9000020 str w0, [x1]
55584: d2800d80 mov x0, #0x6c // #108
55588: 52a01841 mov w1, #0xc20000 // #12713984
5558c: f2bfe620 movk x0, #0xff31, lsl #16
55590: b9000001 str w1, [x0]
55594: d5033f9f dsb sy
55598: d2800281 mov x1, #0x14 // #20
5559c: d2800e94 mov x20, #0x74 // #116
555a0: f2bfe621 movk x1, #0xff31, lsl #16
555a4: 52807d13 mov w19, #0x3e8 // #1000
555a8: f2bfe634 movk x20, #0xff31, lsl #16
555ac: b9400020 ldr w0, [x1]
555b0: 12187800 and w0, w0, #0xffffff7f
555b4: b9000020 str w0, [x1]
555b8: d2800e00 mov x0, #0x70 // #112
555bc: 52a1ce01 mov w1, #0xe700000 // #242221056
555c0: f2bfe620 movk x0, #0xff31, lsl #16
555c4: b9000001 str w1, [x0]
555c8: b9400280 ldr w0, [x20]
555cc: 721c081f tst w0, #0x70
555d0: 54006461 b.ne 5625c <rockchip_soc_sys_pwr_dm_resume+0xe18> // b.any
555d4: d2800481 mov x1, #0x24 // #36
555d8: b00000d3 adrp x19, 6e000 <iomux_status+0x2c>
555dc: f2bfe621 movk x1, #0xff31, lsl #16
555e0: b9400020 ldr w0, [x1]
555e4: 12007800 and w0, w0, #0x7fffffff
555e8: b9000020 str w0, [x1]
555ec: 94000533 bl 56ab8 <clk_gate_con_save>
555f0: 9400054d bl 56b24 <clk_gate_con_disable>
555f4: b9400660 ldr w0, [x19, #4]
555f8: 37880080 tbnz w0, #17, 55608 <rockchip_soc_sys_pwr_dm_resume+0x1c4>
555fc: 52800001 mov w1, #0x0 // #0
55600: 52800220 mov w0, #0x11 // #17
55604: 97fff6b8 bl 530e4 <pmu_set_power_domain>
55608: b9400660 ldr w0, [x19, #4]
5560c: 37800080 tbnz w0, #16, 5561c <rockchip_soc_sys_pwr_dm_resume+0x1d8>
55610: 52800001 mov w1, #0x0 // #0
55614: 52800200 mov w0, #0x10 // #16
55618: 97fff6b3 bl 530e4 <pmu_set_power_domain>
5561c: b9400660 ldr w0, [x19, #4]
55620: 37900080 tbnz w0, #18, 55630 <rockchip_soc_sys_pwr_dm_resume+0x1ec>
55624: 52800001 mov w1, #0x0 // #0
55628: 52800240 mov w0, #0x12 // #18
5562c: 97fff6ae bl 530e4 <pmu_set_power_domain>
55630: b9400660 ldr w0, [x19, #4]
55634: 37980080 tbnz w0, #19, 55644 <rockchip_soc_sys_pwr_dm_resume+0x200>
55638: 52800001 mov w1, #0x0 // #0
5563c: 52800260 mov w0, #0x13 // #19
55640: 97fff6a9 bl 530e4 <pmu_set_power_domain>
55644: b9400660 ldr w0, [x19, #4]
55648: 37e00080 tbnz w0, #28, 55658 <rockchip_soc_sys_pwr_dm_resume+0x214>
5564c: 52800001 mov w1, #0x0 // #0
55650: 52800380 mov w0, #0x1c // #28
55654: 97fff6a4 bl 530e4 <pmu_set_power_domain>
55658: b9400660 ldr w0, [x19, #4]
5565c: 37c80080 tbnz w0, #25, 5566c <rockchip_soc_sys_pwr_dm_resume+0x228>
55660: 52800001 mov w1, #0x0 // #0
55664: 52800320 mov w0, #0x19 // #25
55668: 97fff69f bl 530e4 <pmu_set_power_domain>
5566c: b9400660 ldr w0, [x19, #4]
55670: 37f80080 tbnz w0, #31, 55680 <rockchip_soc_sys_pwr_dm_resume+0x23c>
55674: 52800001 mov w1, #0x0 // #0
55678: 528003e0 mov w0, #0x1f // #31
5567c: 97fff69a bl 530e4 <pmu_set_power_domain>
55680: b9400660 ldr w0, [x19, #4]
55684: 37c00080 tbnz w0, #24, 55694 <rockchip_soc_sys_pwr_dm_resume+0x250>
55688: 52800001 mov w1, #0x0 // #0
5568c: 52800300 mov w0, #0x18 // #24
55690: 97fff695 bl 530e4 <pmu_set_power_domain>
55694: b9400660 ldr w0, [x19, #4]
55698: 37b80080 tbnz w0, #23, 556a8 <rockchip_soc_sys_pwr_dm_resume+0x264>
5569c: 52800001 mov w1, #0x0 // #0
556a0: 528002e0 mov w0, #0x17 // #23
556a4: 97fff690 bl 530e4 <pmu_set_power_domain>
556a8: b9400660 ldr w0, [x19, #4]
556ac: 37b00080 tbnz w0, #22, 556bc <rockchip_soc_sys_pwr_dm_resume+0x278>
556b0: 52800001 mov w1, #0x0 // #0
556b4: 528002c0 mov w0, #0x16 // #22
556b8: 97fff68b bl 530e4 <pmu_set_power_domain>
556bc: b9400660 ldr w0, [x19, #4]
556c0: 37a00080 tbnz w0, #20, 556d0 <rockchip_soc_sys_pwr_dm_resume+0x28c>
556c4: 52800001 mov w1, #0x0 // #0
556c8: 52800280 mov w0, #0x14 // #20
556cc: 97fff686 bl 530e4 <pmu_set_power_domain>
556d0: b9400660 ldr w0, [x19, #4]
556d4: 37480080 tbnz w0, #9, 556e4 <rockchip_soc_sys_pwr_dm_resume+0x2a0>
556d8: 52800001 mov w1, #0x0 // #0
556dc: 52800120 mov w0, #0x9 // #9
556e0: 97fff681 bl 530e4 <pmu_set_power_domain>
556e4: b9400660 ldr w0, [x19, #4]
556e8: 37400080 tbnz w0, #8, 556f8 <rockchip_soc_sys_pwr_dm_resume+0x2b4>
556ec: 52800001 mov w1, #0x0 // #0
556f0: 52800100 mov w0, #0x8 // #8
556f4: 97fff67c bl 530e4 <pmu_set_power_domain>
556f8: b9400660 ldr w0, [x19, #4]
556fc: 37780080 tbnz w0, #15, 5570c <rockchip_soc_sys_pwr_dm_resume+0x2c8>
55700: 52800001 mov w1, #0x0 // #0
55704: 528001e0 mov w0, #0xf // #15
55708: 97fff677 bl 530e4 <pmu_set_power_domain>
5570c: b9400660 ldr w0, [x19, #4]
55710: 37d80080 tbnz w0, #27, 55720 <rockchip_soc_sys_pwr_dm_resume+0x2dc>
55714: 52800001 mov w1, #0x0 // #0
55718: 52800360 mov w0, #0x1b // #27
5571c: 97fff672 bl 530e4 <pmu_set_power_domain>
55720: b9400660 ldr w0, [x19, #4]
55724: 37d00080 tbnz w0, #26, 55734 <rockchip_soc_sys_pwr_dm_resume+0x2f0>
55728: 52800001 mov w1, #0x0 // #0
5572c: 52800340 mov w0, #0x1a // #26
55730: 97fff66d bl 530e4 <pmu_set_power_domain>
55734: b9400660 ldr w0, [x19, #4]
55738: 37700080 tbnz w0, #14, 55748 <rockchip_soc_sys_pwr_dm_resume+0x304>
5573c: 52800001 mov w1, #0x0 // #0
55740: 528001c0 mov w0, #0xe // #14
55744: 97fff668 bl 530e4 <pmu_set_power_domain>
55748: b9400660 ldr w0, [x19, #4]
5574c: 37f00080 tbnz w0, #30, 5575c <rockchip_soc_sys_pwr_dm_resume+0x318>
55750: 52800001 mov w1, #0x0 // #0
55754: 528003c0 mov w0, #0x1e // #30
55758: 97fff663 bl 530e4 <pmu_set_power_domain>
5575c: b9400660 ldr w0, [x19, #4]
55760: 37600080 tbnz w0, #12, 55770 <rockchip_soc_sys_pwr_dm_resume+0x32c>
55764: 52800001 mov w1, #0x0 // #0
55768: 52800180 mov w0, #0xc // #12
5576c: 97fff65e bl 530e4 <pmu_set_power_domain>
55770: 528001e0 mov w0, #0xf // #15
55774: 97fff587 bl 52d90 <pmu_power_domain_st>
55778: 35000280 cbnz w0, 557c8 <rockchip_soc_sys_pwr_dm_resume+0x384>
5577c: b00000c0 adrp x0, 6e000 <iomux_status+0x2c>
55780: 91002000 add x0, x0, #0x8
55784: d2bff5c1 mov x1, #0xffae0000 // #4289593344
55788: b941dc02 ldr w2, [x0, #476]
5578c: b9000022 str w2, [x1]
55790: b941e002 ldr w2, [x0, #480]
55794: b9000422 str w2, [x1, #4]
55798: b941e402 ldr w2, [x0, #484]
5579c: b9000822 str w2, [x1, #8]
557a0: b941e802 ldr w2, [x0, #488]
557a4: b9000c22 str w2, [x1, #12]
557a8: b941ec02 ldr w2, [x0, #492]
557ac: b9001022 str w2, [x1, #16]
557b0: b941f002 ldr w2, [x0, #496]
557b4: b9001422 str w2, [x1, #20]
557b8: b941f401 ldr w1, [x0, #500]
557bc: d2800300 mov x0, #0x18 // #24
557c0: f2bff5c0 movk x0, #0xffae, lsl #16
557c4: b9000001 str w1, [x0]
557c8: 528002c0 mov w0, #0x16 // #22
557cc: 97fff571 bl 52d90 <pmu_power_domain_st>
557d0: 35000440 cbnz w0, 55858 <rockchip_soc_sys_pwr_dm_resume+0x414>
557d4: b00000c0 adrp x0, 6e000 <iomux_status+0x2c>
557d8: 91002000 add x0, x0, #0x8
557dc: d2bff541 mov x1, #0xffaa0000 // #4289331200
557e0: b9432c02 ldr w2, [x0, #812]
557e4: b9000022 str w2, [x1]
557e8: b9433002 ldr w2, [x0, #816]
557ec: b9000422 str w2, [x1, #4]
557f0: b9433402 ldr w2, [x0, #820]
557f4: b9000822 str w2, [x1, #8]
557f8: b9433802 ldr w2, [x0, #824]
557fc: b9000c22 str w2, [x1, #12]
55800: b9433c02 ldr w2, [x0, #828]
55804: b9001022 str w2, [x1, #16]
55808: b9434002 ldr w2, [x0, #832]
5580c: b9001422 str w2, [x1, #20]
55810: b9434402 ldr w2, [x0, #836]
55814: b9001822 str w2, [x1, #24]
55818: b9434802 ldr w2, [x0, #840]
5581c: b9008022 str w2, [x1, #128]
55820: b9434c02 ldr w2, [x0, #844]
55824: b9008422 str w2, [x1, #132]
55828: b9435002 ldr w2, [x0, #848]
5582c: b9008822 str w2, [x1, #136]
55830: b9435402 ldr w2, [x0, #852]
55834: b9008c22 str w2, [x1, #140]
55838: b9435802 ldr w2, [x0, #856]
5583c: b9009022 str w2, [x1, #144]
55840: b9435c02 ldr w2, [x0, #860]
55844: b9009422 str w2, [x1, #148]
55848: b9436001 ldr w1, [x0, #864]
5584c: d2801300 mov x0, #0x98 // #152
55850: f2bff540 movk x0, #0xffaa, lsl #16
55854: b9000001 str w1, [x0]
55858: 528002e0 mov w0, #0x17 // #23
5585c: 97fff54d bl 52d90 <pmu_power_domain_st>
55860: 35000460 cbnz w0, 558ec <rockchip_soc_sys_pwr_dm_resume+0x4a8>
55864: b00000c0 adrp x0, 6e000 <iomux_status+0x2c>
55868: 91002000 add x0, x0, #0x8
5586c: d2900001 mov x1, #0x8000 // #32768
55870: f2bff541 movk x1, #0xffaa, lsl #16
55874: b942f402 ldr w2, [x0, #756]
55878: b9000022 str w2, [x1]
5587c: b942f802 ldr w2, [x0, #760]
55880: b9000422 str w2, [x1, #4]
55884: b942fc02 ldr w2, [x0, #764]
55888: b9000822 str w2, [x1, #8]
5588c: b9430002 ldr w2, [x0, #768]
55890: b9000c22 str w2, [x1, #12]
55894: b9430402 ldr w2, [x0, #772]
55898: b9001022 str w2, [x1, #16]
5589c: b9430802 ldr w2, [x0, #776]
558a0: b9001422 str w2, [x1, #20]
558a4: b9430c02 ldr w2, [x0, #780]
558a8: b9001822 str w2, [x1, #24]
558ac: b9431002 ldr w2, [x0, #784]
558b0: b9008022 str w2, [x1, #128]
558b4: b9431402 ldr w2, [x0, #788]
558b8: b9008422 str w2, [x1, #132]
558bc: b9431802 ldr w2, [x0, #792]
558c0: b9008822 str w2, [x1, #136]
558c4: b9431c02 ldr w2, [x0, #796]
558c8: b9008c22 str w2, [x1, #140]
558cc: b9432002 ldr w2, [x0, #800]
558d0: b9009022 str w2, [x1, #144]
558d4: b9432402 ldr w2, [x0, #804]
558d8: b9009422 str w2, [x1, #148]
558dc: b9432801 ldr w1, [x0, #808]
558e0: d2901300 mov x0, #0x8098 // #32920
558e4: f2bff540 movk x0, #0xffaa, lsl #16
558e8: b9000001 str w1, [x0]
558ec: 52800280 mov w0, #0x14 // #20
558f0: 97fff528 bl 52d90 <pmu_power_domain_st>
558f4: 35000640 cbnz w0, 559bc <rockchip_soc_sys_pwr_dm_resume+0x578>
558f8: b00000c0 adrp x0, 6e000 <iomux_status+0x2c>
558fc: 91002000 add x0, x0, #0x8
55900: d2900001 mov x1, #0x8000 // #32768
55904: f2bff581 movk x1, #0xffac, lsl #16
55908: b9428402 ldr w2, [x0, #644]
5590c: b9000022 str w2, [x1]
55910: b9428802 ldr w2, [x0, #648]
55914: b9000422 str w2, [x1, #4]
55918: b9428c02 ldr w2, [x0, #652]
5591c: b9000822 str w2, [x1, #8]
55920: b9429002 ldr w2, [x0, #656]
55924: b9000c22 str w2, [x1, #12]
55928: b9429402 ldr w2, [x0, #660]
5592c: b9001022 str w2, [x1, #16]
55930: b9429802 ldr w2, [x0, #664]
55934: b9001422 str w2, [x1, #20]
55938: b9429c02 ldr w2, [x0, #668]
5593c: b9001822 str w2, [x1, #24]
55940: b942a002 ldr w2, [x0, #672]
55944: b9008022 str w2, [x1, #128]
55948: b942a402 ldr w2, [x0, #676]
5594c: b9008422 str w2, [x1, #132]
55950: b942a802 ldr w2, [x0, #680]
55954: b9008822 str w2, [x1, #136]
55958: b942ac02 ldr w2, [x0, #684]
5595c: b9008c22 str w2, [x1, #140]
55960: b942b002 ldr w2, [x0, #688]
55964: b9009022 str w2, [x1, #144]
55968: b942b402 ldr w2, [x0, #692]
5596c: b9009422 str w2, [x1, #148]
55970: b942b802 ldr w2, [x0, #696]
55974: b9009822 str w2, [x1, #152]
55978: d2bff5a1 mov x1, #0xffad0000 // #4289527808
5597c: b942bc02 ldr w2, [x0, #700]
55980: b9000022 str w2, [x1]
55984: b942c002 ldr w2, [x0, #704]
55988: b9000422 str w2, [x1, #4]
5598c: b942c402 ldr w2, [x0, #708]
55990: b9000822 str w2, [x1, #8]
55994: b942c802 ldr w2, [x0, #712]
55998: b9000c22 str w2, [x1, #12]
5599c: b942cc02 ldr w2, [x0, #716]
559a0: b9001022 str w2, [x1, #16]
559a4: b942d002 ldr w2, [x0, #720]
559a8: b9001422 str w2, [x1, #20]
559ac: b942d401 ldr w1, [x0, #724]
559b0: d2800300 mov x0, #0x18 // #24
559b4: f2bff5a0 movk x0, #0xffad, lsl #16
559b8: b9000001 str w1, [x0]
559bc: 52800300 mov w0, #0x18 // #24
559c0: 97fff4f4 bl 52d90 <pmu_power_domain_st>
559c4: 35000280 cbnz w0, 55a14 <rockchip_soc_sys_pwr_dm_resume+0x5d0>
559c8: b00000c0 adrp x0, 6e000 <iomux_status+0x2c>
559cc: 91002000 add x0, x0, #0x8
559d0: d2bff521 mov x1, #0xffa90000 // #4289265664
559d4: b9436402 ldr w2, [x0, #868]
559d8: b9000022 str w2, [x1]
559dc: b9436802 ldr w2, [x0, #872]
559e0: b9000422 str w2, [x1, #4]
559e4: b9436c02 ldr w2, [x0, #876]
559e8: b9000822 str w2, [x1, #8]
559ec: b9437002 ldr w2, [x0, #880]
559f0: b9000c22 str w2, [x1, #12]
559f4: b9437402 ldr w2, [x0, #884]
559f8: b9001022 str w2, [x1, #16]
559fc: b9437802 ldr w2, [x0, #888]
55a00: b9001422 str w2, [x1, #20]
55a04: b9437c01 ldr w1, [x0, #892]
55a08: d2800300 mov x0, #0x18 // #24
55a0c: f2bff520 movk x0, #0xffa9, lsl #16
55a10: b9000001 str w1, [x0]
55a14: 52800320 mov w0, #0x19 // #25
55a18: 97fff4de bl 52d90 <pmu_power_domain_st>
55a1c: 350002a0 cbnz w0, 55a70 <rockchip_soc_sys_pwr_dm_resume+0x62c>
55a20: b00000c0 adrp x0, 6e000 <iomux_status+0x2c>
55a24: 91002000 add x0, x0, #0x8
55a28: d2980001 mov x1, #0xc000 // #49152
55a2c: f2bff4a1 movk x1, #0xffa5, lsl #16
55a30: b9413402 ldr w2, [x0, #308]
55a34: b9000022 str w2, [x1]
55a38: b9413802 ldr w2, [x0, #312]
55a3c: b9000422 str w2, [x1, #4]
55a40: b9413c02 ldr w2, [x0, #316]
55a44: b9000822 str w2, [x1, #8]
55a48: b9414002 ldr w2, [x0, #320]
55a4c: b9000c22 str w2, [x1, #12]
55a50: b9414402 ldr w2, [x0, #324]
55a54: b9001022 str w2, [x1, #16]
55a58: b9414802 ldr w2, [x0, #328]
55a5c: b9001422 str w2, [x1, #20]
55a60: b9414c01 ldr w1, [x0, #332]
55a64: d2980300 mov x0, #0xc018 // #49176
55a68: f2bff4a0 movk x0, #0xffa5, lsl #16
55a6c: b9000001 str w1, [x0]
55a70: 52800140 mov w0, #0xa // #10
55a74: 97fff4c7 bl 52d90 <pmu_power_domain_st>
55a78: 35000480 cbnz w0, 55b08 <rockchip_soc_sys_pwr_dm_resume+0x6c4>
55a7c: b00000c1 adrp x1, 6e000 <iomux_status+0x2c>
55a80: 91002020 add x0, x1, #0x8
55a84: b9400822 ldr w2, [x1, #8]
55a88: d2bff4a1 mov x1, #0xffa50000 // #4289003520
55a8c: b9000022 str w2, [x1]
55a90: b9400402 ldr w2, [x0, #4]
55a94: b9000422 str w2, [x1, #4]
55a98: b9400802 ldr w2, [x0, #8]
55a9c: b9000822 str w2, [x1, #8]
55aa0: b9400c02 ldr w2, [x0, #12]
55aa4: b9000c22 str w2, [x1, #12]
55aa8: b9401002 ldr w2, [x0, #16]
55aac: b9001022 str w2, [x1, #16]
55ab0: b9401402 ldr w2, [x0, #20]
55ab4: b9001422 str w2, [x1, #20]
55ab8: b9401802 ldr w2, [x0, #24]
55abc: b9001822 str w2, [x1, #24]
55ac0: d2900001 mov x1, #0x8000 // #32768
55ac4: f2bff5a1 movk x1, #0xffad, lsl #16
55ac8: b9401c02 ldr w2, [x0, #28]
55acc: b9000022 str w2, [x1]
55ad0: b9402002 ldr w2, [x0, #32]
55ad4: b9000422 str w2, [x1, #4]
55ad8: b9402402 ldr w2, [x0, #36]
55adc: b9000822 str w2, [x1, #8]
55ae0: b9402802 ldr w2, [x0, #40]
55ae4: b9000c22 str w2, [x1, #12]
55ae8: b9402c02 ldr w2, [x0, #44]
55aec: b9001022 str w2, [x1, #16]
55af0: b9403002 ldr w2, [x0, #48]
55af4: b9001422 str w2, [x1, #20]
55af8: b9403401 ldr w1, [x0, #52]
55afc: d2900300 mov x0, #0x8018 // #32792
55b00: f2bff5a0 movk x0, #0xffad, lsl #16
55b04: b9000001 str w1, [x0]
55b08: 528003c0 mov w0, #0x1e // #30
55b0c: 97fff4a1 bl 52d90 <pmu_power_domain_st>
55b10: 350002a0 cbnz w0, 55b64 <rockchip_soc_sys_pwr_dm_resume+0x720>
55b14: b00000c0 adrp x0, 6e000 <iomux_status+0x2c>
55b18: 91002000 add x0, x0, #0x8
55b1c: d2880001 mov x1, #0x4000 // #16384
55b20: f2bff4e1 movk x1, #0xffa7, lsl #16
55b24: b9411802 ldr w2, [x0, #280]
55b28: b9000022 str w2, [x1]
55b2c: b9411c02 ldr w2, [x0, #284]
55b30: b9000422 str w2, [x1, #4]
55b34: b9412002 ldr w2, [x0, #288]
55b38: b9000822 str w2, [x1, #8]
55b3c: b9412402 ldr w2, [x0, #292]
55b40: b9000c22 str w2, [x1, #12]
55b44: b9412802 ldr w2, [x0, #296]
55b48: b9001022 str w2, [x1, #16]
55b4c: b9412c02 ldr w2, [x0, #300]
55b50: b9001422 str w2, [x1, #20]
55b54: b9413001 ldr w1, [x0, #304]
55b58: d2880300 mov x0, #0x4018 // #16408
55b5c: f2bff4e0 movk x0, #0xffa7, lsl #16
55b60: b9000001 str w1, [x0]
55b64: 52800340 mov w0, #0x1a // #26
55b68: 97fff48a bl 52d90 <pmu_power_domain_st>
55b6c: 350002a0 cbnz w0, 55bc0 <rockchip_soc_sys_pwr_dm_resume+0x77c>
55b70: b00000c0 adrp x0, 6e000 <iomux_status+0x2c>
55b74: 91002000 add x0, x0, #0x8
55b78: d2900001 mov x1, #0x8000 // #32768
55b7c: f2bff4a1 movk x1, #0xffa5, lsl #16
55b80: b9415002 ldr w2, [x0, #336]
55b84: b9000022 str w2, [x1]
55b88: b9415402 ldr w2, [x0, #340]
55b8c: b9000422 str w2, [x1, #4]
55b90: b9415802 ldr w2, [x0, #344]
55b94: b9000822 str w2, [x1, #8]
55b98: b9415c02 ldr w2, [x0, #348]
55b9c: b9000c22 str w2, [x1, #12]
55ba0: b9416002 ldr w2, [x0, #352]
55ba4: b9001022 str w2, [x1, #16]
55ba8: b9416402 ldr w2, [x0, #356]
55bac: b9001422 str w2, [x1, #20]
55bb0: b9416801 ldr w1, [x0, #360]
55bb4: d2900300 mov x0, #0x8018 // #32792
55bb8: f2bff4a0 movk x0, #0xffa5, lsl #16
55bbc: b9000001 str w1, [x0]
55bc0: 528003e0 mov w0, #0x1f // #31
55bc4: 97fff473 bl 52d90 <pmu_power_domain_st>
55bc8: 350002a0 cbnz w0, 55c1c <rockchip_soc_sys_pwr_dm_resume+0x7d8>
55bcc: b00000c0 adrp x0, 6e000 <iomux_status+0x2c>
55bd0: 91002000 add x0, x0, #0x8
55bd4: d28c0001 mov x1, #0x6000 // #24576
55bd8: f2bff4e1 movk x1, #0xffa7, lsl #16
55bdc: b943d402 ldr w2, [x0, #980]
55be0: b9000022 str w2, [x1]
55be4: b943d802 ldr w2, [x0, #984]
55be8: b9000422 str w2, [x1, #4]
55bec: b943dc02 ldr w2, [x0, #988]
55bf0: b9000822 str w2, [x1, #8]
55bf4: b943e002 ldr w2, [x0, #992]
55bf8: b9000c22 str w2, [x1, #12]
55bfc: b943e402 ldr w2, [x0, #996]
55c00: b9001022 str w2, [x1, #16]
55c04: b943e802 ldr w2, [x0, #1000]
55c08: b9001422 str w2, [x1, #20]
55c0c: b943ec01 ldr w1, [x0, #1004]
55c10: d28c0300 mov x0, #0x6018 // #24600
55c14: f2bff4e0 movk x0, #0xffa7, lsl #16
55c18: b9000001 str w1, [x0]
55c1c: 528003a0 mov w0, #0x1d // #29
55c20: 97fff45c bl 52d90 <pmu_power_domain_st>
55c24: 350002a0 cbnz w0, 55c78 <rockchip_soc_sys_pwr_dm_resume+0x834>
55c28: b00000c0 adrp x0, 6e000 <iomux_status+0x2c>
55c2c: 91002000 add x0, x0, #0x8
55c30: d2900001 mov x1, #0x8000 // #32768
55c34: f2bff4e1 movk x1, #0xffa7, lsl #16
55c38: b940fc02 ldr w2, [x0, #252]
55c3c: b9000022 str w2, [x1]
55c40: b9410002 ldr w2, [x0, #256]
55c44: b9000422 str w2, [x1, #4]
55c48: b9410402 ldr w2, [x0, #260]
55c4c: b9000822 str w2, [x1, #8]
55c50: b9410802 ldr w2, [x0, #264]
55c54: b9000c22 str w2, [x1, #12]
55c58: b9410c02 ldr w2, [x0, #268]
55c5c: b9001022 str w2, [x1, #16]
55c60: b9411002 ldr w2, [x0, #272]
55c64: b9001422 str w2, [x1, #20]
55c68: b9411401 ldr w1, [x0, #276]
55c6c: d2900300 mov x0, #0x8018 // #32792
55c70: f2bff4e0 movk x0, #0xffa7, lsl #16
55c74: b9000001 str w1, [x0]
55c78: 52800240 mov w0, #0x12 // #18
55c7c: 97fff445 bl 52d90 <pmu_power_domain_st>
55c80: 35000440 cbnz w0, 55d08 <rockchip_soc_sys_pwr_dm_resume+0x8c4>
55c84: b00000c0 adrp x0, 6e000 <iomux_status+0x2c>
55c88: 91002000 add x0, x0, #0x8
55c8c: d2bff561 mov x1, #0xffab0000 // #4289396736
55c90: b9424c02 ldr w2, [x0, #588]
55c94: b9000022 str w2, [x1]
55c98: b9425002 ldr w2, [x0, #592]
55c9c: b9000422 str w2, [x1, #4]
55ca0: b9425402 ldr w2, [x0, #596]
55ca4: b9000822 str w2, [x1, #8]
55ca8: b9425802 ldr w2, [x0, #600]
55cac: b9000c22 str w2, [x1, #12]
55cb0: b9425c02 ldr w2, [x0, #604]
55cb4: b9001022 str w2, [x1, #16]
55cb8: b9426002 ldr w2, [x0, #608]
55cbc: b9001422 str w2, [x1, #20]
55cc0: b9426402 ldr w2, [x0, #612]
55cc4: b9001822 str w2, [x1, #24]
55cc8: b9426802 ldr w2, [x0, #616]
55ccc: b9008022 str w2, [x1, #128]
55cd0: b9426c02 ldr w2, [x0, #620]
55cd4: b9008422 str w2, [x1, #132]
55cd8: b9427002 ldr w2, [x0, #624]
55cdc: b9008822 str w2, [x1, #136]
55ce0: b9427402 ldr w2, [x0, #628]
55ce4: b9008c22 str w2, [x1, #140]
55ce8: b9427802 ldr w2, [x0, #632]
55cec: b9009022 str w2, [x1, #144]
55cf0: b9427c02 ldr w2, [x0, #636]
55cf4: b9009422 str w2, [x1, #148]
55cf8: b9428001 ldr w1, [x0, #640]
55cfc: d2801300 mov x0, #0x98 // #152
55d00: f2bff560 movk x0, #0xffab, lsl #16
55d04: b9000001 str w1, [x0]
55d08: 52800260 mov w0, #0x13 // #19
55d0c: 97fff421 bl 52d90 <pmu_power_domain_st>
55d10: 350002a0 cbnz w0, 55d64 <rockchip_soc_sys_pwr_dm_resume+0x920>
55d14: b00000c0 adrp x0, 6e000 <iomux_status+0x2c>
55d18: 91002000 add x0, x0, #0x8
55d1c: d2900001 mov x1, #0x8000 // #32768
55d20: f2bff521 movk x1, #0xffa9, lsl #16
55d24: b942d802 ldr w2, [x0, #728]
55d28: b9000022 str w2, [x1]
55d2c: b942dc02 ldr w2, [x0, #732]
55d30: b9000422 str w2, [x1, #4]
55d34: b942e002 ldr w2, [x0, #736]
55d38: b9000822 str w2, [x1, #8]
55d3c: b942e402 ldr w2, [x0, #740]
55d40: b9000c22 str w2, [x1, #12]
55d44: b942e802 ldr w2, [x0, #744]
55d48: b9001022 str w2, [x1, #16]
55d4c: b942ec02 ldr w2, [x0, #748]
55d50: b9001422 str w2, [x1, #20]
55d54: b942f001 ldr w1, [x0, #752]
55d58: d2900300 mov x0, #0x8018 // #32792
55d5c: f2bff520 movk x0, #0xffa9, lsl #16
55d60: b9000001 str w1, [x0]
55d64: 52800360 mov w0, #0x1b // #27
55d68: 97fff40a bl 52d90 <pmu_power_domain_st>
55d6c: 35000440 cbnz w0, 55df4 <rockchip_soc_sys_pwr_dm_resume+0x9b0>
55d70: b00000c0 adrp x0, 6e000 <iomux_status+0x2c>
55d74: 91002000 add x0, x0, #0x8
55d78: d2bff4e1 mov x1, #0xffa70000 // #4289134592
55d7c: b9416c02 ldr w2, [x0, #364]
55d80: b9000022 str w2, [x1]
55d84: b9417002 ldr w2, [x0, #368]
55d88: b9000422 str w2, [x1, #4]
55d8c: b9417402 ldr w2, [x0, #372]
55d90: b9000822 str w2, [x1, #8]
55d94: b9417802 ldr w2, [x0, #376]
55d98: b9000c22 str w2, [x1, #12]
55d9c: b9417c02 ldr w2, [x0, #380]
55da0: b9001022 str w2, [x1, #16]
55da4: b9418002 ldr w2, [x0, #384]
55da8: b9001422 str w2, [x1, #20]
55dac: b9418402 ldr w2, [x0, #388]
55db0: b9001822 str w2, [x1, #24]
55db4: b9418802 ldr w2, [x0, #392]
55db8: b9008022 str w2, [x1, #128]
55dbc: b9418c02 ldr w2, [x0, #396]
55dc0: b9008422 str w2, [x1, #132]
55dc4: b9419002 ldr w2, [x0, #400]
55dc8: b9008822 str w2, [x1, #136]
55dcc: b9419402 ldr w2, [x0, #404]
55dd0: b9008c22 str w2, [x1, #140]
55dd4: b9419802 ldr w2, [x0, #408]
55dd8: b9009022 str w2, [x1, #144]
55ddc: b9419c02 ldr w2, [x0, #412]
55de0: b9009422 str w2, [x1, #148]
55de4: b941a001 ldr w1, [x0, #416]
55de8: d2801300 mov x0, #0x98 // #152
55dec: f2bff4e0 movk x0, #0xffa7, lsl #16
55df0: b9000001 str w1, [x0]
55df4: 52800180 mov w0, #0xc // #12
55df8: 97fff3e6 bl 52d90 <pmu_power_domain_st>
55dfc: 35000660 cbnz w0, 55ec8 <rockchip_soc_sys_pwr_dm_resume+0xa84>
55e00: b00000c0 adrp x0, 6e000 <iomux_status+0x2c>
55e04: 91002000 add x0, x0, #0x8
55e08: d2802001 mov x1, #0x100 // #256
55e0c: f2bff4c1 movk x1, #0xffa6, lsl #16
55e10: b941a402 ldr w2, [x0, #420]
55e14: b9000022 str w2, [x1]
55e18: b941a802 ldr w2, [x0, #424]
55e1c: b9000422 str w2, [x1, #4]
55e20: b941ac02 ldr w2, [x0, #428]
55e24: b9000822 str w2, [x1, #8]
55e28: b941b002 ldr w2, [x0, #432]
55e2c: b9000c22 str w2, [x1, #12]
55e30: b941b402 ldr w2, [x0, #436]
55e34: b9001022 str w2, [x1, #16]
55e38: b941b802 ldr w2, [x0, #440]
55e3c: b9001422 str w2, [x1, #20]
55e40: b941bc02 ldr w2, [x0, #444]
55e44: b9001822 str w2, [x1, #24]
55e48: b941c002 ldr w2, [x0, #448]
55e4c: b9008022 str w2, [x1, #128]
55e50: b941c402 ldr w2, [x0, #452]
55e54: b9008422 str w2, [x1, #132]
55e58: b941c802 ldr w2, [x0, #456]
55e5c: b9008822 str w2, [x1, #136]
55e60: b941cc02 ldr w2, [x0, #460]
55e64: b9008c22 str w2, [x1, #140]
55e68: b941d002 ldr w2, [x0, #464]
55e6c: b9009022 str w2, [x1, #144]
55e70: b941d402 ldr w2, [x0, #468]
55e74: b9009422 str w2, [x1, #148]
55e78: b941d802 ldr w2, [x0, #472]
55e7c: b9009822 str w2, [x1, #152]
55e80: d2901001 mov x1, #0x8080 // #32896
55e84: f2bff5a1 movk x1, #0xffad, lsl #16
55e88: b9438002 ldr w2, [x0, #896]
55e8c: b9000022 str w2, [x1]
55e90: b9438402 ldr w2, [x0, #900]
55e94: b9000422 str w2, [x1, #4]
55e98: b9438802 ldr w2, [x0, #904]
55e9c: b9000822 str w2, [x1, #8]
55ea0: b9438c02 ldr w2, [x0, #908]
55ea4: b9000c22 str w2, [x1, #12]
55ea8: b9439002 ldr w2, [x0, #912]
55eac: b9001022 str w2, [x1, #16]
55eb0: b9439402 ldr w2, [x0, #916]
55eb4: b9001422 str w2, [x1, #20]
55eb8: b9439801 ldr w1, [x0, #920]
55ebc: d2901300 mov x0, #0x8098 // #32920
55ec0: f2bff5a0 movk x0, #0xffad, lsl #16
55ec4: b9000001 str w1, [x0]
55ec8: 52800160 mov w0, #0xb // #11
55ecc: 97fff3b1 bl 52d90 <pmu_power_domain_st>
55ed0: 35001060 cbnz w0, 560dc <rockchip_soc_sys_pwr_dm_resume+0xc98>
55ed4: b00000c0 adrp x0, 6e000 <iomux_status+0x2c>
55ed8: 91002000 add x0, x0, #0x8
55edc: d2884001 mov x1, #0x4200 // #16896
55ee0: f2bff4c1 movk x1, #0xffa6, lsl #16
55ee4: b9403802 ldr w2, [x0, #56]
55ee8: b9000022 str w2, [x1]
55eec: b9403c02 ldr w2, [x0, #60]
55ef0: b9000422 str w2, [x1, #4]
55ef4: b9404002 ldr w2, [x0, #64]
55ef8: b9000822 str w2, [x1, #8]
55efc: b9404402 ldr w2, [x0, #68]
55f00: b9000c22 str w2, [x1, #12]
55f04: b9404802 ldr w2, [x0, #72]
55f08: b9001022 str w2, [x1, #16]
55f0c: b9404c02 ldr w2, [x0, #76]
55f10: b9001422 str w2, [x1, #20]
55f14: b9405002 ldr w2, [x0, #80]
55f18: b9001822 str w2, [x1, #24]
55f1c: b9405402 ldr w2, [x0, #84]
55f20: b9008022 str w2, [x1, #128]
55f24: b9405802 ldr w2, [x0, #88]
55f28: b9008422 str w2, [x1, #132]
55f2c: b9405c02 ldr w2, [x0, #92]
55f30: b9008822 str w2, [x1, #136]
55f34: b9406002 ldr w2, [x0, #96]
55f38: b9008c22 str w2, [x1, #140]
55f3c: b9406402 ldr w2, [x0, #100]
55f40: b9009022 str w2, [x1, #144]
55f44: b9406802 ldr w2, [x0, #104]
55f48: b9009422 str w2, [x1, #148]
55f4c: b9406c02 ldr w2, [x0, #108]
55f50: b9009822 str w2, [x1, #152]
55f54: d2883001 mov x1, #0x4180 // #16768
55f58: f2bff4c1 movk x1, #0xffa6, lsl #16
55f5c: b9407002 ldr w2, [x0, #112]
55f60: b9000022 str w2, [x1]
55f64: b9407402 ldr w2, [x0, #116]
55f68: b9000422 str w2, [x1, #4]
55f6c: b9407802 ldr w2, [x0, #120]
55f70: b9000822 str w2, [x1, #8]
55f74: b9407c02 ldr w2, [x0, #124]
55f78: b9000c22 str w2, [x1, #12]
55f7c: b9408002 ldr w2, [x0, #128]
55f80: b9001022 str w2, [x1, #16]
55f84: b9408402 ldr w2, [x0, #132]
55f88: b9001422 str w2, [x1, #20]
55f8c: b9408802 ldr w2, [x0, #136]
55f90: b9001822 str w2, [x1, #24]
55f94: d2882001 mov x1, #0x4100 // #16640
55f98: f2bff4c1 movk x1, #0xffa6, lsl #16
55f9c: b9408c02 ldr w2, [x0, #140]
55fa0: b9000022 str w2, [x1]
55fa4: b9409002 ldr w2, [x0, #144]
55fa8: b9000422 str w2, [x1, #4]
55fac: b9409402 ldr w2, [x0, #148]
55fb0: b9000822 str w2, [x1, #8]
55fb4: b9409802 ldr w2, [x0, #152]
55fb8: b9000c22 str w2, [x1, #12]
55fbc: b9409c02 ldr w2, [x0, #156]
55fc0: b9001022 str w2, [x1, #16]
55fc4: b940a002 ldr w2, [x0, #160]
55fc8: b9001422 str w2, [x1, #20]
55fcc: b940a402 ldr w2, [x0, #164]
55fd0: b9001822 str w2, [x1, #24]
55fd4: d2881001 mov x1, #0x4080 // #16512
55fd8: f2bff4c1 movk x1, #0xffa6, lsl #16
55fdc: b940a802 ldr w2, [x0, #168]
55fe0: b9000022 str w2, [x1]
55fe4: b940ac02 ldr w2, [x0, #172]
55fe8: b9000422 str w2, [x1, #4]
55fec: b940b002 ldr w2, [x0, #176]
55ff0: b9000822 str w2, [x1, #8]
55ff4: b940b402 ldr w2, [x0, #180]
55ff8: b9000c22 str w2, [x1, #12]
55ffc: b940b802 ldr w2, [x0, #184]
56000: b9001022 str w2, [x1, #16]
56004: b940bc02 ldr w2, [x0, #188]
56008: b9001422 str w2, [x1, #20]
5600c: b940c002 ldr w2, [x0, #192]
56010: b9001822 str w2, [x1, #24]
56014: d2903001 mov x1, #0x8180 // #33152
56018: f2bff5a1 movk x1, #0xffad, lsl #16
5601c: b9439c02 ldr w2, [x0, #924]
56020: b9000022 str w2, [x1]
56024: b943a002 ldr w2, [x0, #928]
56028: b9000422 str w2, [x1, #4]
5602c: b943a402 ldr w2, [x0, #932]
56030: b9000822 str w2, [x1, #8]
56034: b943a802 ldr w2, [x0, #936]
56038: b9000c22 str w2, [x1, #12]
5603c: b943ac02 ldr w2, [x0, #940]
56040: b9001022 str w2, [x1, #16]
56044: b943b002 ldr w2, [x0, #944]
56048: b9001422 str w2, [x1, #20]
5604c: b943b402 ldr w2, [x0, #948]
56050: b9001822 str w2, [x1, #24]
56054: d2902001 mov x1, #0x8100 // #33024
56058: f2bff5a1 movk x1, #0xffad, lsl #16
5605c: b943b802 ldr w2, [x0, #952]
56060: b9000022 str w2, [x1]
56064: b943bc02 ldr w2, [x0, #956]
56068: b9000422 str w2, [x1, #4]
5606c: b943c002 ldr w2, [x0, #960]
56070: b9000822 str w2, [x1, #8]
56074: b943c402 ldr w2, [x0, #964]
56078: b9000c22 str w2, [x1, #12]
5607c: b943c802 ldr w2, [x0, #968]
56080: b9001022 str w2, [x1, #16]
56084: b943cc02 ldr w2, [x0, #972]
56088: b9001422 str w2, [x1, #20]
5608c: b943d002 ldr w2, [x0, #976]
56090: b9001822 str w2, [x1, #24]
56094: d2886001 mov x1, #0x4300 // #17152
56098: f2bff4c1 movk x1, #0xffa6, lsl #16
5609c: b940e002 ldr w2, [x0, #224]
560a0: b9000022 str w2, [x1]
560a4: b940e402 ldr w2, [x0, #228]
560a8: b9000422 str w2, [x1, #4]
560ac: b940e802 ldr w2, [x0, #232]
560b0: b9000822 str w2, [x1, #8]
560b4: b940ec02 ldr w2, [x0, #236]
560b8: b9000c22 str w2, [x1, #12]
560bc: b940f002 ldr w2, [x0, #240]
560c0: b9001022 str w2, [x1, #16]
560c4: b940f402 ldr w2, [x0, #244]
560c8: b9001422 str w2, [x1, #20]
560cc: b940f801 ldr w1, [x0, #248]
560d0: d2886300 mov x0, #0x4318 // #17176
560d4: f2bff4c0 movk x0, #0xffa6, lsl #16
560d8: b9000001 str w1, [x0]
560dc: 52800220 mov w0, #0x11 // #17
560e0: 97fff32c bl 52d90 <pmu_power_domain_st>
560e4: 350002a0 cbnz w0, 56138 <rockchip_soc_sys_pwr_dm_resume+0xcf4>
560e8: 900000c0 adrp x0, 6e000 <iomux_status+0x2c>
560ec: 91002000 add x0, x0, #0x8
560f0: d2900001 mov x1, #0x8000 // #32768
560f4: f2bff561 movk x1, #0xffab, lsl #16
560f8: b941f802 ldr w2, [x0, #504]
560fc: b9000022 str w2, [x1]
56100: b941fc02 ldr w2, [x0, #508]
56104: b9000422 str w2, [x1, #4]
56108: b9420002 ldr w2, [x0, #512]
5610c: b9000822 str w2, [x1, #8]
56110: b9420402 ldr w2, [x0, #516]
56114: b9000c22 str w2, [x1, #12]
56118: b9420802 ldr w2, [x0, #520]
5611c: b9001022 str w2, [x1, #16]
56120: b9420c02 ldr w2, [x0, #524]
56124: b9001422 str w2, [x1, #20]
56128: b9421001 ldr w1, [x0, #528]
5612c: d2900300 mov x0, #0x8018 // #32792
56130: f2bff560 movk x0, #0xffab, lsl #16
56134: b9000001 str w1, [x0]
56138: 52800200 mov w0, #0x10 // #16
5613c: 97fff315 bl 52d90 <pmu_power_domain_st>
56140: 35000440 cbnz w0, 561c8 <rockchip_soc_sys_pwr_dm_resume+0xd84>
56144: 900000c0 adrp x0, 6e000 <iomux_status+0x2c>
56148: 91002000 add x0, x0, #0x8
5614c: d2bff581 mov x1, #0xffac0000 // #4289462272
56150: b9421402 ldr w2, [x0, #532]
56154: b9000022 str w2, [x1]
56158: b9421802 ldr w2, [x0, #536]
5615c: b9000422 str w2, [x1, #4]
56160: b9421c02 ldr w2, [x0, #540]
56164: b9000822 str w2, [x1, #8]
56168: b9422002 ldr w2, [x0, #544]
5616c: b9000c22 str w2, [x1, #12]
56170: b9422402 ldr w2, [x0, #548]
56174: b9001022 str w2, [x1, #16]
56178: b9422802 ldr w2, [x0, #552]
5617c: b9001422 str w2, [x1, #20]
56180: b9422c02 ldr w2, [x0, #556]
56184: b9001822 str w2, [x1, #24]
56188: b9423002 ldr w2, [x0, #560]
5618c: b9008022 str w2, [x1, #128]
56190: b9423402 ldr w2, [x0, #564]
56194: b9008422 str w2, [x1, #132]
56198: b9423802 ldr w2, [x0, #568]
5619c: b9008822 str w2, [x1, #136]
561a0: b9423c02 ldr w2, [x0, #572]
561a4: b9008c22 str w2, [x1, #140]
561a8: b9424002 ldr w2, [x0, #576]
561ac: b9009022 str w2, [x1, #144]
561b0: b9424402 ldr w2, [x0, #580]
561b4: b9009422 str w2, [x1, #148]
561b8: b9424801 ldr w1, [x0, #584]
561bc: d2801300 mov x0, #0x98 // #152
561c0: f2bff580 movk x0, #0xffac, lsl #16
561c4: b9000001 str w1, [x0]
561c8: 94000265 bl 56b5c <clk_gate_con_restore>
561cc: 94000237 bl 56aa8 <restore_abpll>
561d0: d2800b81 mov x1, #0x5c // #92
561d4: 5283ffa2 mov w2, #0x1ffd // #8189
561d8: f2bfe621 movk x1, #0xff31, lsl #16
561dc: 72bebc42 movk w2, #0xf5e2, lsl #16
561e0: b9400020 ldr w0, [x1]
561e4: 0a020000 and w0, w0, w2
561e8: b9000020 str w0, [x1]
561ec: b00000a0 adrp x0, 6b000 <psci_ns_context+0xc60>
561f0: 9106c000 add x0, x0, #0x1b0
561f4: 97ffeb29 bl 50e98 <gicv3_distif_init_restore>
561f8: 94002735 bl 5fecc <plat_my_core_pos>
561fc: f00000a1 adrp x1, 6d000 <dist_ctx+0x1e50>
56200: 91234021 add x1, x1, #0x8d0
56204: 97ffea22 bl 50a8c <gicv3_rdistif_init_restore>
56208: 97ffed45 bl 5171c <plat_rockchip_gic_cpuif_enable>
5620c: 940000fd bl 56600 <m0_stop>
56210: 97fff60e bl 53a48 <restore_usbphy>
56214: 94001025 bl 5a2a8 <ddr_prepare_for_sys_resume>
56218: 52800000 mov w0, #0x0 // #0
5621c: a94153f3 ldp x19, x20, [sp, #16]
56220: a8c37bfd ldp x29, x30, [sp], #48
56224: d65f03c0 ret
56228: 39400260 ldrb w0, [x19]
5622c: 51000694 sub w20, w20, #0x1
56230: d1002273 sub x19, x19, #0x8
56234: 7100001f cmp w0, #0x0
56238: b9400e60 ldr w0, [x19, #12]
5623c: 1a9f17e1 cset w1, eq // eq = none
56240: 97ffee69 bl 51be4 <gpio_set_value>
56244: b9400e60 ldr w0, [x19, #12]
56248: 52800001 mov w1, #0x0 // #0
5624c: 97ffee47 bl 51b68 <gpio_set_direction>
56250: 52800020 mov w0, #0x1 // #1
56254: 97ffedde bl 519cc <udelay>
56258: 17fffcb0 b 55518 <rockchip_soc_sys_pwr_dm_resume+0xd4>
5625c: 71000673 subs w19, w19, #0x1
56260: 54000181 b.ne 56290 <rockchip_soc_sys_pwr_dm_resume+0xe4c> // b.any
56264: b9400282 ldr w2, [x20]
56268: b0000073 adrp x19, 63000 <CSWTCH.22+0x37e>
5626c: 910d0673 add x19, x19, #0x341
56270: b0000060 adrp x0, 63000 <CSWTCH.22+0x37e>
56274: aa1303e1 mov x1, x19
56278: 91098400 add x0, x0, #0x261
5627c: 94002182 bl 5e884 <tf_log>
56280: aa1303e0 mov x0, x19
56284: 94002274 bl 5ec54 <backtrace>
56288: 94002211 bl 5eacc <console_flush>
5628c: 94002998 bl 608ec <do_panic>
56290: 52800020 mov w0, #0x1 // #1
56294: 97ffedce bl 519cc <udelay>
56298: 17fffccc b 555c8 <rockchip_soc_sys_pwr_dm_resume+0x184>
000000000005629c <rockchip_soc_soft_reset>:
5629c: a9be7bfd stp x29, x30, [sp, #-32]!
562a0: 910003fd mov x29, sp
562a4: f9000bf3 str x19, [sp, #16]
562a8: 97ffef0e bl 51ee0 <plat_get_rockchip_gpio_reset>
562ac: b4000120 cbz x0, 562d0 <rockchip_soc_soft_reset+0x34>
562b0: aa0003f3 mov x19, x0
562b4: b9400400 ldr w0, [x0, #4]
562b8: 52800001 mov w1, #0x0 // #0
562bc: 97ffee2b bl 51b68 <gpio_set_direction>
562c0: 39400261 ldrb w1, [x19]
562c4: b9400660 ldr w0, [x19, #4]
562c8: 97ffee47 bl 51be4 <gpio_set_value>
562cc: 14000000 b 562cc <rockchip_soc_soft_reset+0x30>
562d0: 94000278 bl 56cb0 <soc_global_soft_reset>
00000000000562d4 <rockchip_soc_system_off>:
562d4: a9be7bfd stp x29, x30, [sp, #-32]!
562d8: 910003fd mov x29, sp
562dc: f9000bf3 str x19, [sp, #16]
562e0: 97ffef06 bl 51ef8 <plat_get_rockchip_gpio_poweroff>
562e4: b4000200 cbz x0, 56324 <rockchip_soc_system_off+0x50>
562e8: aa0003f3 mov x19, x0
562ec: b9400400 ldr w0, [x0, #4]
562f0: 7100981f cmp w0, #0x26
562f4: 540000a1 b.ne 56308 <rockchip_soc_system_off+0x34> // b.any
562f8: d2800200 mov x0, #0x10 // #16
562fc: 52a60001 mov w1, #0x30000000 // #805306368
56300: f2bfe640 movk x0, #0xff32, lsl #16
56304: b9000001 str w1, [x0]
56308: b9400660 ldr w0, [x19, #4]
5630c: 52800001 mov w1, #0x0 // #0
56310: 97ffee16 bl 51b68 <gpio_set_direction>
56314: 39400261 ldrb w1, [x19]
56318: b9400660 ldr w0, [x19, #4]
5631c: 97ffee32 bl 51be4 <gpio_set_value>
56320: 14000000 b 56320 <rockchip_soc_system_off+0x4c>
56324: b0000060 adrp x0, 63000 <CSWTCH.22+0x37e>
56328: 9109f000 add x0, x0, #0x27c
5632c: 94002156 bl 5e884 <tf_log>
56330: 17fffffc b 56320 <rockchip_soc_system_off+0x4c>
0000000000056334 <rockchip_plat_mmu_el3>:
56334: a9bf7bfd stp x29, x30, [sp, #-16]!
56338: f07fc341 adrp x1, ff8c1000 <__sram_incbin_end>
5633c: 907fc362 adrp x2, ff8c2000 <__bl31_sram_text_end>
56340: 91000021 add x1, x1, #0x0
56344: 91000042 add x2, x2, #0x0
56348: 910003fd mov x29, sp
5634c: cb010042 sub x2, x2, x1
56350: aa0103e0 mov x0, x1
56354: 52800043 mov w3, #0x2 // #2
56358: 940023e5 bl 5f2ec <mmap_add_region>
5635c: 907fc361 adrp x1, ff8c2000 <__bl31_sram_text_end>
56360: 907fc362 adrp x2, ff8c2000 <__bl31_sram_text_end>
56364: 91000021 add x1, x1, #0x0
56368: 91000042 add x2, x2, #0x0
5636c: cb010042 sub x2, x2, x1
56370: aa0103e0 mov x0, x1
56374: 52800143 mov w3, #0xa // #10
56378: 940023dd bl 5f2ec <mmap_add_region>
5637c: 907fc361 adrp x1, ff8c2000 <__bl31_sram_text_end>
56380: b07fc362 adrp x2, ff8c3000 <__bl31_sram_stack_end>
56384: 91000021 add x1, x1, #0x0
56388: 91000042 add x2, x2, #0x0
5638c: cb010042 sub x2, x2, x1
56390: aa0103e0 mov x0, x1
56394: 52800143 mov w3, #0xa // #10
56398: 940023d5 bl 5f2ec <mmap_add_region>
5639c: a8c17bfd ldp x29, x30, [sp], #16
563a0: d07fc341 adrp x1, ff8c0000 <rk3399m0_bin>
563a4: f07fc342 adrp x2, ff8c1000 <__sram_incbin_end>
563a8: 91000021 add x1, x1, #0x0
563ac: 91000042 add x2, x2, #0x0
563b0: aa0103e0 mov x0, x1
563b4: cb010042 sub x2, x2, x1
563b8: 52800123 mov w3, #0x9 // #9
563bc: 140023cc b 5f2ec <mmap_add_region>
00000000000563c0 <plat_rockchip_pmu_init>:
563c0: a9be7bfd stp x29, x30, [sp, #-32]!
563c4: f00000a1 adrp x1, 6d000 <dist_ctx+0x1e50>
563c8: 90000202 adrp x2, 96000 <rockchip_pd_lock>
563cc: 910003fd mov x29, sp
563d0: d0ffffc0 adrp x0, 50000 <platform_cpu_warmboot>
563d4: 91000000 add x0, x0, #0x0
563d8: b90fc020 str w0, [x1, #4032]
563dc: 91040041 add x1, x2, #0x100
563e0: a90153f3 stp x19, x20, [sp, #16]
563e4: 53107c00 lsr w0, w0, #16
563e8: 32103c00 orr w0, w0, #0xffff0000
563ec: 2900fc3f stp wzr, wzr, [x1, #4]
563f0: 52800013 mov w19, #0x0 // #0
563f4: 2901fc3f stp wzr, wzr, [x1, #12]
563f8: b900143f str wzr, [x1, #20]
563fc: 90000201 adrp x1, 96000 <rockchip_pd_lock>
56400: b901005f str wzr, [x2, #256]
56404: 91046022 add x2, x1, #0x118
56408: b901183f str wzr, [x1, #280]
5640c: d2980081 mov x1, #0xc004 // #49156
56410: f2bfe661 movk x1, #0xff33, lsl #16
56414: b900045f str wzr, [x2, #4]
56418: 52832802 mov w2, #0x1940 // #6464
5641c: b9000020 str w0, [x1]
56420: d2801b00 mov x0, #0xd8 // #216
56424: f2bfe620 movk x0, #0xff31, lsl #16
56428: 12b80001 mov w1, #0x3fffffff // #1073741823
5642c: 72a00022 movk w2, #0x1, lsl #16
56430: b9000001 str w1, [x0]
56434: d2802400 mov x0, #0x120 // #288
56438: f2bfe640 movk x0, #0xff32, lsl #16
5643c: 52800021 mov w1, #0x1 // #1
56440: 72a00061 movk w1, #0x3, lsl #16
56444: b9000001 str w1, [x0]
56448: d2801181 mov x1, #0x8c // #140
5644c: f2bfe621 movk x1, #0xff31, lsl #16
56450: 52807800 mov w0, #0x3c0 // #960
56454: b9000020 str w0, [x1]
56458: d2801001 mov x1, #0x80 // #128
5645c: f2bfe621 movk x1, #0xff31, lsl #16
56460: b9000020 str w0, [x1]
56464: d2801280 mov x0, #0x94 // #148
56468: f2bfe620 movk x0, #0xff31, lsl #16
5646c: 52800c01 mov w1, #0x60 // #96
56470: b9000001 str w1, [x0]
56474: d2801781 mov x1, #0xbc // #188
56478: f2bfe621 movk x1, #0xff31, lsl #16
5647c: 528bb800 mov w0, #0x5dc0 // #24000
56480: b9000020 str w0, [x1]
56484: d2801081 mov x1, #0x84 // #132
56488: f2bfe621 movk x1, #0xff31, lsl #16
5648c: b9000022 str w2, [x1]
56490: b9000c20 str w0, [x1, #12]
56494: b9003020 str w0, [x1, #48]
56498: b9003420 str w0, [x1, #52]
5649c: d2801380 mov x0, #0x9c // #156
564a0: f2bfe620 movk x0, #0xff31, lsl #16
564a4: 529a9801 mov w1, #0xd4c0 // #54464
564a8: 72a00021 movk w1, #0x1, lsl #16
564ac: b9000001 str w1, [x0]
564b0: d2801401 mov x1, #0xa0 // #160
564b4: f2bfe621 movk x1, #0xff31, lsl #16
564b8: 52800300 mov w0, #0x18 // #24
564bc: b9000020 str w0, [x1]
564c0: b9000420 str w0, [x1, #4]
564c4: b9000820 str w0, [x1, #8]
564c8: b9000c20 str w0, [x1, #12]
564cc: b9001020 str w0, [x1, #16]
564d0: 9400267f bl 5fecc <plat_my_core_pos>
564d4: 2a0003f4 mov w20, w0
564d8: 6b13029f cmp w20, w19
564dc: 54000080 b.eq 564ec <plat_rockchip_pmu_init+0x12c> // b.none
564e0: 2a1303e0 mov w0, w19
564e4: 52800001 mov w1, #0x0 // #0
564e8: 97fff34d bl 5321c <cpus_power_domain_off>
564ec: 11000673 add w19, w19, #0x1
564f0: 71001a7f cmp w19, #0x6
564f4: 54ffff21 b.ne 564d8 <plat_rockchip_pmu_init+0x118> // b.any
564f8: d2800300 mov x0, #0x18 // #24
564fc: 5280cae2 mov w2, #0x657 // #1623
56500: f2bfe620 movk x0, #0xff31, lsl #16
56504: b0000061 adrp x1, 63000 <CSWTCH.22+0x37e>
56508: a94153f3 ldp x19, x20, [sp, #16]
5650c: 910d8021 add x1, x1, #0x360
56510: a8c27bfd ldp x29, x30, [sp], #32
56514: b9400003 ldr w3, [x0]
56518: b0000060 adrp x0, 63000 <CSWTCH.22+0x37e>
5651c: 910a6400 add x0, x0, #0x299
56520: 140020d9 b 5e884 <tf_log>
0000000000056524 <m0_init>:
56524: d2982000 mov x0, #0xc100 // #49408
56528: 52a01001 mov w1, #0x800000 // #8388608
5652c: f2bfe660 movk x0, #0xff33, lsl #16
56530: b9000001 str w1, [x0]
56534: d29c0300 mov x0, #0xe018 // #57368
56538: f2bfe660 movk x0, #0xff33, lsl #16
5653c: 52a20001 mov w1, #0x10000000 // #268435456
56540: b9000001 str w1, [x0]
56544: d2802601 mov x1, #0x130 // #304
56548: f2bfeea1 movk x1, #0xff75, lsl #16
5654c: b9400020 ldr w0, [x1]
56550: 321f0000 orr w0, w0, #0x2
56554: b9000020 str w0, [x1]
56558: d2801000 mov x0, #0x80 // #128
5655c: 52900001 mov w1, #0x8000 // #32768
56560: f2bfeea0 movk x0, #0xff75, lsl #16
56564: 72b3e001 movk w1, #0x9f00, lsl #16
56568: b9000001 str w1, [x0]
5656c: 52a00401 mov w1, #0x200000 // #2097152
56570: b9008801 str w1, [x0, #136]
56574: d65f03c0 ret
0000000000056578 <m0_configure_execute_addr>:
56578: d2982182 mov x2, #0xc10c // #49420
5657c: d34cfc01 lsr x1, x0, #12
56580: f2bfe662 movk x2, #0xff33, lsl #16
56584: 32103c21 orr w1, w1, #0xffff0000
56588: 531c7c00 lsr w0, w0, #28
5658c: b9000041 str w1, [x2]
56590: d2982381 mov x1, #0xc11c // #49436
56594: f2bfe661 movk x1, #0xff33, lsl #16
56598: 32100c00 orr w0, w0, #0xf0000
5659c: b9000020 str w0, [x1]
565a0: d65f03c0 ret
00000000000565a4 <m0_start>:
565a4: a9be7bfd stp x29, x30, [sp, #-32]!
565a8: d2802100 mov x0, #0x108 // #264
565ac: f2bfeea0 movk x0, #0xff75, lsl #16
565b0: 910003fd mov x29, sp
565b4: f9000bf3 str x19, [sp, #16]
565b8: 52a001e1 mov w1, #0xf0000 // #983040
565bc: b9000001 str w1, [x0]
565c0: d07fc340 adrp x0, ff8c0000 <rk3399m0_bin>
565c4: 91000000 add x0, x0, #0x0
565c8: b900e41f str wzr, [x0, #228]
565cc: d5033ebf dmb st
565d0: d2802213 mov x19, #0x110 // #272
565d4: 52a00080 mov w0, #0x40000 // #262144
565d8: f2bfeeb3 movk x19, #0xff75, lsl #16
565dc: b9000260 str w0, [x19]
565e0: 528000a0 mov w0, #0x5 // #5
565e4: 97ffecfa bl 519cc <udelay>
565e8: 52a00400 mov w0, #0x200000 // #2097152
565ec: b9000260 str w0, [x19]
565f0: d5033ebf dmb st
565f4: f9400bf3 ldr x19, [sp, #16]
565f8: a8c27bfd ldp x29, x30, [sp], #32
565fc: d65f03c0 ret
0000000000056600 <m0_stop>:
56600: d2802200 mov x0, #0x110 // #272
56604: 52800481 mov w1, #0x24 // #36
56608: f2bfeea0 movk x0, #0xff75, lsl #16
5660c: 72a00481 movk w1, #0x24, lsl #16
56610: b9000001 str w1, [x0]
56614: d2802100 mov x0, #0x108 // #264
56618: f2bfeea0 movk x0, #0xff75, lsl #16
5661c: 32008fe1 mov w1, #0xf000f // #983055
56620: b9000001 str w1, [x0]
56624: d65f03c0 ret
0000000000056628 <m0_wait_done>:
56628: a9be7bfd stp x29, x30, [sp, #-32]!
5662c: 910003fd mov x29, sp
56630: a90153f3 stp x19, x20, [sp, #16]
56634: d07fc353 adrp x19, ff8c0000 <rk3399m0_bin>
56638: 52987354 mov w20, #0xc39a // #50074
5663c: 91000273 add x19, x19, #0x0
56640: 72beb3d4 movk w20, #0xf59e, lsl #16
56644: 528000a0 mov w0, #0x5 // #5
56648: 97ffece1 bl 519cc <udelay>
5664c: d5033f9f dsb sy
56650: b940e660 ldr w0, [x19, #228]
56654: 6b14001f cmp w0, w20
56658: 54ffff61 b.ne 56644 <m0_wait_done+0x1c> // b.any
5665c: 52800140 mov w0, #0xa // #10
56660: 97ffecdb bl 519cc <udelay>
56664: d5033f9f dsb sy
56668: a94153f3 ldp x19, x20, [sp, #16]
5666c: a8c27bfd ldp x29, x30, [sp], #32
56670: d65f03c0 ret
0000000000056674 <disable_pwms>:
56674: 900000c0 adrp x0, 6e000 <iomux_status+0x2c>
56678: d29c0501 mov x1, #0xe028 // #57384
5667c: f2bfeee1 movk x1, #0xff77, lsl #16
56680: b90a441f str wzr, [x0, #2628]
56684: b9400022 ldr w2, [x1]
56688: d3441442 ubfx x2, x2, #4, #2
5668c: 7100045f cmp w2, #0x1
56690: 54000081 b.ne 566a0 <disable_pwms+0x2c> // b.any
56694: b90a4402 str w2, [x0, #2628]
56698: 52a00602 mov w2, #0x300000 // #3145728
5669c: b9000022 str w2, [x1]
566a0: b9400022 ldr w2, [x1]
566a4: d34c3442 ubfx x2, x2, #12, #2
566a8: 7100045f cmp w2, #0x1
566ac: 540000c1 b.ne 566c4 <disable_pwms+0x50> // b.any
566b0: b94a4402 ldr w2, [x0, #2628]
566b4: 321f0042 orr w2, w2, #0x2
566b8: b90a4402 str w2, [x0, #2628]
566bc: 52a60002 mov w2, #0x30000000 // #805306368
566c0: b9000022 str w2, [x1]
566c4: d2800302 mov x2, #0x18 // #24
566c8: f2bfe642 movk x2, #0xff32, lsl #16
566cc: b9400041 ldr w1, [x2]
566d0: d3461c21 ubfx x1, x1, #6, #2
566d4: 7100043f cmp w1, #0x1
566d8: 540000c1 b.ne 566f0 <disable_pwms+0x7c> // b.any
566dc: b94a4401 ldr w1, [x0, #2628]
566e0: 321e0021 orr w1, w1, #0x4
566e4: b90a4401 str w1, [x0, #2628]
566e8: 52a01801 mov w1, #0xc00000 // #12582912
566ec: b9000041 str w1, [x2]
566f0: d2bfe642 mov x2, #0xff320000 // #4281466880
566f4: b9400041 ldr w1, [x2]
566f8: d34c3421 ubfx x1, x1, #12, #2
566fc: 7100043f cmp w1, #0x1
56700: 540000c1 b.ne 56718 <disable_pwms+0xa4> // b.any
56704: b94a4401 ldr w1, [x0, #2628]
56708: 321d0021 orr w1, w1, #0x8
5670c: b90a4401 str w1, [x0, #2628]
56710: 52a60001 mov w1, #0x30000000 // #805306368
56714: b9000041 str w1, [x2]
56718: 91291000 add x0, x0, #0xa44
5671c: d2800185 mov x5, #0xc // #12
56720: d2800001 mov x1, #0x0 // #0
56724: 52800004 mov w4, #0x0 // #0
56728: 52800003 mov w3, #0x0 // #0
5672c: f2bfe845 movk x5, #0xff42, lsl #16
56730: 52800027 mov w7, #0x1 // #1
56734: b900041f str wzr, [x0, #4]
56738: d37cec26 lsl x6, x1, #4
5673c: b86568c2 ldr w2, [x6, x5]
56740: 360000c2 tbz w2, #0, 56758 <disable_pwms+0xe4>
56744: 1ac120e4 lsl w4, w7, w1
56748: 121f7842 and w2, w2, #0xfffffffe
5674c: 2a040063 orr w3, w3, w4
56750: 52800024 mov w4, #0x1 // #1
56754: b82568c2 str w2, [x6, x5]
56758: 91000421 add x1, x1, #0x1
5675c: f100103f cmp x1, #0x4
56760: 54fffec1 b.ne 56738 <disable_pwms+0xc4> // b.any
56764: 34000044 cbz w4, 5676c <disable_pwms+0xf8>
56768: b9000403 str w3, [x0, #4]
5676c: d65f03c0 ret
0000000000056770 <enable_pwms>:
56770: 900000c0 adrp x0, 6e000 <iomux_status+0x2c>
56774: 91291001 add x1, x0, #0xa44
56778: d2800183 mov x3, #0xc // #12
5677c: 52800026 mov w6, #0x1 // #1
56780: f2bfe843 movk x3, #0xff42, lsl #16
56784: b9400425 ldr w5, [x1, #4]
56788: d2800001 mov x1, #0x0 // #0
5678c: d37cec24 lsl x4, x1, #4
56790: 1ac120c7 lsl w7, w6, w1
56794: 6a0500ff tst w7, w5
56798: b8636882 ldr w2, [x4, x3]
5679c: 54000060 b.eq 567a8 <enable_pwms+0x38> // b.none
567a0: 32000042 orr w2, w2, #0x1
567a4: b8236882 str w2, [x4, x3]
567a8: 91000421 add x1, x1, #0x1
567ac: f100103f cmp x1, #0x4
567b0: 54fffee1 b.ne 5678c <enable_pwms+0x1c> // b.any
567b4: b94a4401 ldr w1, [x0, #2628]
567b8: 361800a1 tbz w1, #3, 567cc <enable_pwms+0x5c>
567bc: d2bfe641 mov x1, #0xff320000 // #4281466880
567c0: 52820002 mov w2, #0x1000 // #4096
567c4: 72a60002 movk w2, #0x3000, lsl #16
567c8: b9000022 str w2, [x1]
567cc: b94a4401 ldr w1, [x0, #2628]
567d0: 361000c1 tbz w1, #2, 567e8 <enable_pwms+0x78>
567d4: d2800301 mov x1, #0x18 // #24
567d8: 52800802 mov w2, #0x40 // #64
567dc: f2bfe641 movk x1, #0xff32, lsl #16
567e0: 72a01802 movk w2, #0xc0, lsl #16
567e4: b9000022 str w2, [x1]
567e8: b94a4401 ldr w1, [x0, #2628]
567ec: 360800c1 tbz w1, #1, 56804 <enable_pwms+0x94>
567f0: d29c0501 mov x1, #0xe028 // #57384
567f4: 52820002 mov w2, #0x1000 // #4096
567f8: f2bfeee1 movk x1, #0xff77, lsl #16
567fc: 72a60002 movk w2, #0x3000, lsl #16
56800: b9000022 str w2, [x1]
56804: b94a4400 ldr w0, [x0, #2628]
56808: 360000c0 tbz w0, #0, 56820 <enable_pwms+0xb0>
5680c: d29c0500 mov x0, #0xe028 // #57384
56810: 52800201 mov w1, #0x10 // #16
56814: f2bfeee0 movk x0, #0xff77, lsl #16
56818: 72a00601 movk w1, #0x30, lsl #16
5681c: b9000001 str w1, [x0]
56820: d65f03c0 ret
0000000000056824 <secure_watchdog_gate>:
56824: d29c0180 mov x0, #0xe00c // #57356
56828: 5280a001 mov w1, #0x500 // #1280
5682c: f2bfe660 movk x0, #0xff33, lsl #16
56830: 72a0a001 movk w1, #0x500, lsl #16
56834: b9000001 str w1, [x0]
56838: d65f03c0 ret
000000000005683c <secure_timer_init>:
5683c: d2901401 mov x1, #0x80a0 // #32928
56840: 12800000 mov w0, #0xffffffff // #-1
56844: f2bff0c1 movk x1, #0xff86, lsl #16
56848: b9000020 str w0, [x1]
5684c: b9000420 str w0, [x1, #4]
56850: d2901600 mov x0, #0x80b0 // #32944
56854: f2bff0c0 movk x0, #0xff86, lsl #16
56858: 52800021 mov w1, #0x1 // #1
5685c: b900001f str wzr, [x0]
56860: b900001f str wzr, [x0]
56864: b9000c01 str w1, [x0, #12]
56868: d65f03c0 ret
000000000005686c <secure_sgrf_init>:
5686c: d29c0281 mov x1, #0xe014 // #57364
56870: 12800000 mov w0, #0xffffffff // #-1
56874: f2bfe661 movk x1, #0xff33, lsl #16
56878: b9000020 str w0, [x1]
5687c: b9000420 str w0, [x1, #4]
56880: b9000820 str w0, [x1, #8]
56884: d2984800 mov x0, #0xc240 // #49728
56888: f2bfe660 movk x0, #0xff33, lsl #16
5688c: 52a00061 mov w1, #0x30000 // #196608
56890: b9000001 str w1, [x0]
56894: 129fdfe1 mov w1, #0xffff0100 // #-65280
56898: b9000401 str w1, [x0, #4]
5689c: d29c7801 mov x1, #0xe3c0 // #58304
568a0: f2bfe661 movk x1, #0xff33, lsl #16
568a4: 52bfffe0 mov w0, #0xffff0000 // #-65536
568a8: b9000020 str w0, [x1]
568ac: b9000420 str w0, [x1, #4]
568b0: b9000820 str w0, [x1, #8]
568b4: b9000c20 str w0, [x1, #12]
568b8: d29c7a00 mov x0, #0xe3d0 // #58320
568bc: f2bfe660 movk x0, #0xff33, lsl #16
568c0: 129bffe1 mov w1, #0xffff2000 // #-57344
568c4: b9000001 str w1, [x0]
568c8: d65f03c0 ret
00000000000568cc <secure_sgrf_ddr_rgn_init>:
568cc: d2bfe661 mov x1, #0xff330000 // #4281532416
568d0: 52a1ffe0 mov w0, #0xfff0000 // #268369920
568d4: b9000020 str w0, [x1]
568d8: b9002020 str w0, [x1, #32]
568dc: d2800800 mov x0, #0x40 // #64
568e0: f2bfe660 movk x0, #0xff33, lsl #16
568e4: 320083e1 mov w1, #0x10001 // #65537
568e8: b9000001 str w1, [x0]
568ec: 52a04001 mov w1, #0x2000000 // #33554432
568f0: b9000001 str w1, [x0]
568f4: d65f03c0 ret
00000000000568f8 <restore_pll.constprop.0>:
568f8: d2800583 mov x3, #0x2c // #44
568fc: 52a06001 mov w1, #0x3000000 // #50331648
56900: f2bfeec3 movk x3, #0xff76, lsl #16
56904: d2800402 mov x2, #0x20 // #32
56908: f2bfeec2 movk x2, #0xff76, lsl #16
5690c: d2800604 mov x4, #0x30 // #48
56910: b9000061 str w1, [x3]
56914: f2bfeec4 movk x4, #0xff76, lsl #16
56918: b9400001 ldr w1, [x0]
5691c: 32103c21 orr w1, w1, #0xffff0000
56920: b9000041 str w1, [x2]
56924: b9400401 ldr w1, [x0, #4]
56928: 32103c21 orr w1, w1, #0xffff0000
5692c: b9000441 str w1, [x2, #4]
56930: d2800501 mov x1, #0x28 // #40
56934: f2bfeec1 movk x1, #0xff76, lsl #16
56938: b9400802 ldr w2, [x0, #8]
5693c: b9000022 str w2, [x1]
56940: b9401002 ldr w2, [x0, #16]
56944: 32103c42 orr w2, w2, #0xffff0000
56948: b9000082 str w2, [x4]
5694c: b9401402 ldr w2, [x0, #20]
56950: 32103c42 orr w2, w2, #0xffff0000
56954: b9000482 str w2, [x4, #4]
56958: b9400c00 ldr w0, [x0, #12]
5695c: 32103c00 orr w0, w0, #0xffff0000
56960: b9000060 str w0, [x3]
56964: b9400020 ldr w0, [x1]
56968: 36ffffe0 tbz w0, #31, 56964 <restore_pll.constprop.0+0x6c>
5696c: d65f03c0 ret
0000000000056970 <disable_dvfs_plls>:
56970: d2800d82 mov x2, #0x6c // #108
56974: 52a06001 mov w1, #0x3000000 // #50331648
56978: f2bfeec2 movk x2, #0xff76, lsl #16
5697c: 320f83e0 mov w0, #0x20002 // #131074
56980: b9000041 str w1, [x2]
56984: b9000040 str w0, [x2]
56988: b9004041 str w1, [x2, #64]
5698c: b9004040 str w0, [x2, #64]
56990: b9006041 str w1, [x2, #96]
56994: b9006040 str w0, [x2, #96]
56998: d2801182 mov x2, #0x8c // #140
5699c: f2bfeec2 movk x2, #0xff76, lsl #16
569a0: b9000041 str w1, [x2]
569a4: b9000040 str w0, [x2]
569a8: d2800182 mov x2, #0xc // #12
569ac: f2bfeec2 movk x2, #0xff76, lsl #16
569b0: b9000041 str w1, [x2]
569b4: b9000040 str w0, [x2]
569b8: d65f03c0 ret
00000000000569bc <disable_nodvfs_plls>:
569bc: d2800180 mov x0, #0xc // #12
569c0: 52a06001 mov w1, #0x3000000 // #50331648
569c4: f2bfeea0 movk x0, #0xff75, lsl #16
569c8: b9000001 str w1, [x0]
569cc: 320f83e1 mov w1, #0x20002 // #131074
569d0: b9000001 str w1, [x0]
569d4: d65f03c0 ret
00000000000569d8 <prepare_abpll_for_ddrctrl>:
569d8: d2800400 mov x0, #0x20 // #32
569dc: f2bfeec0 movk x0, #0xff76, lsl #16
569e0: b9400001 ldr w1, [x0]
569e4: 900000c0 adrp x0, 6e000 <iomux_status+0x2c>
569e8: 91293000 add x0, x0, #0xa4c
569ec: 9100c000 add x0, x0, #0x30
569f0: b81e8001 stur w1, [x0, #-24]
569f4: d2800481 mov x1, #0x24 // #36
569f8: f2bfeec1 movk x1, #0xff76, lsl #16
569fc: b9400021 ldr w1, [x1]
56a00: b81ec001 stur w1, [x0, #-20]
56a04: d2800501 mov x1, #0x28 // #40
56a08: f2bfeec1 movk x1, #0xff76, lsl #16
56a0c: b9400021 ldr w1, [x1]
56a10: b81f0001 stur w1, [x0, #-16]
56a14: d2800581 mov x1, #0x2c // #44
56a18: f2bfeec1 movk x1, #0xff76, lsl #16
56a1c: b9400021 ldr w1, [x1]
56a20: b81f4001 stur w1, [x0, #-12]
56a24: d2800601 mov x1, #0x30 // #48
56a28: f2bfeec1 movk x1, #0xff76, lsl #16
56a2c: b9400021 ldr w1, [x1]
56a30: b81f8001 stur w1, [x0, #-8]
56a34: d2800681 mov x1, #0x34 // #52
56a38: f2bfeec1 movk x1, #0xff76, lsl #16
56a3c: b9400021 ldr w1, [x1]
56a40: b81fc001 stur w1, [x0, #-4]
56a44: d2800801 mov x1, #0x40 // #64
56a48: f2bfeec1 movk x1, #0xff76, lsl #16
56a4c: b9400021 ldr w1, [x1]
56a50: b9000001 str w1, [x0]
56a54: d2800881 mov x1, #0x44 // #68
56a58: f2bfeec1 movk x1, #0xff76, lsl #16
56a5c: b9400021 ldr w1, [x1]
56a60: b9000401 str w1, [x0, #4]
56a64: d2800901 mov x1, #0x48 // #72
56a68: f2bfeec1 movk x1, #0xff76, lsl #16
56a6c: b9400021 ldr w1, [x1]
56a70: b9000801 str w1, [x0, #8]
56a74: d2800981 mov x1, #0x4c // #76
56a78: f2bfeec1 movk x1, #0xff76, lsl #16
56a7c: b9400021 ldr w1, [x1]
56a80: b9000c01 str w1, [x0, #12]
56a84: d2800a01 mov x1, #0x50 // #80
56a88: f2bfeec1 movk x1, #0xff76, lsl #16
56a8c: b9400021 ldr w1, [x1]
56a90: b9001001 str w1, [x0, #16]
56a94: d2800a81 mov x1, #0x54 // #84
56a98: f2bfeec1 movk x1, #0xff76, lsl #16
56a9c: b9400021 ldr w1, [x1]
56aa0: b9001401 str w1, [x0, #20]
56aa4: 17ffff95 b 568f8 <restore_pll.constprop.0>
0000000000056aa8 <restore_abpll>:
56aa8: 900000c0 adrp x0, 6e000 <iomux_status+0x2c>
56aac: 91293000 add x0, x0, #0xa4c
56ab0: 91006000 add x0, x0, #0x18
56ab4: 17ffff91 b 568f8 <restore_pll.constprop.0>
0000000000056ab8 <clk_gate_con_save>:
56ab8: d2802000 mov x0, #0x100 // #256
56abc: 928047e2 mov x2, #0xfffffffffffffdc0 // #-576
56ac0: f2bfeea0 movk x0, #0xff75, lsl #16
56ac4: f2a01122 movk x2, #0x89, lsl #16
56ac8: b9400001 ldr w1, [x0]
56acc: 900000c0 adrp x0, 6e000 <iomux_status+0x2c>
56ad0: 91293000 add x0, x0, #0xa4c
56ad4: b9014c01 str w1, [x0, #332]
56ad8: d2802081 mov x1, #0x104 // #260
56adc: f2bfeea1 movk x1, #0xff75, lsl #16
56ae0: b9400021 ldr w1, [x1]
56ae4: b9015001 str w1, [x0, #336]
56ae8: d2802101 mov x1, #0x108 // #264
56aec: f2bfeea1 movk x1, #0xff75, lsl #16
56af0: b9400021 ldr w1, [x1]
56af4: b9015401 str w1, [x0, #340]
56af8: 8b020000 add x0, x0, x2
56afc: d2806001 mov x1, #0x300 // #768
56b00: d2807182 mov x2, #0x38c // #908
56b04: f2bfeec1 movk x1, #0xff76, lsl #16
56b08: f2bfeec2 movk x2, #0xff76, lsl #16
56b0c: b9400023 ldr w3, [x1]
56b10: b8206823 str w3, [x1, x0]
56b14: 91001021 add x1, x1, #0x4
56b18: eb02003f cmp x1, x2
56b1c: 54ffff81 b.ne 56b0c <clk_gate_con_save+0x54> // b.any
56b20: d65f03c0 ret
0000000000056b24 <clk_gate_con_disable>:
56b24: d2802001 mov x1, #0x100 // #256
56b28: 52bfffe0 mov w0, #0xffff0000 // #-65536
56b2c: f2bfeea1 movk x1, #0xff75, lsl #16
56b30: d2807182 mov x2, #0x38c // #908
56b34: f2bfeec2 movk x2, #0xff76, lsl #16
56b38: b9000020 str w0, [x1]
56b3c: b9000420 str w0, [x1, #4]
56b40: b9000820 str w0, [x1, #8]
56b44: d2806001 mov x1, #0x300 // #768
56b48: f2bfeec1 movk x1, #0xff76, lsl #16
56b4c: b8004420 str w0, [x1], #4
56b50: eb02003f cmp x1, x2
56b54: 54ffffc1 b.ne 56b4c <clk_gate_con_disable+0x28> // b.any
56b58: d65f03c0 ret
0000000000056b5c <clk_gate_con_restore>:
56b5c: 900000c0 adrp x0, 6e000 <iomux_status+0x2c>
56b60: 91293000 add x0, x0, #0xa4c
56b64: d2802002 mov x2, #0x100 // #256
56b68: d2807183 mov x3, #0x38c // #908
56b6c: f2bfeea2 movk x2, #0xff75, lsl #16
56b70: f2bfeec3 movk x3, #0xff76, lsl #16
56b74: b9414c01 ldr w1, [x0, #332]
56b78: 32103c21 orr w1, w1, #0xffff0000
56b7c: b9000041 str w1, [x2]
56b80: b9415001 ldr w1, [x0, #336]
56b84: 32103c21 orr w1, w1, #0xffff0000
56b88: b9000441 str w1, [x2, #4]
56b8c: b9415401 ldr w1, [x0, #340]
56b90: 32103c21 orr w1, w1, #0xffff0000
56b94: b9000841 str w1, [x2, #8]
56b98: 928047e2 mov x2, #0xfffffffffffffdc0 // #-576
56b9c: d2806001 mov x1, #0x300 // #768
56ba0: f2a01122 movk x2, #0x89, lsl #16
56ba4: 8b020000 add x0, x0, x2
56ba8: f2bfeec1 movk x1, #0xff76, lsl #16
56bac: b8606822 ldr w2, [x1, x0]
56bb0: 32103c42 orr w2, w2, #0xffff0000
56bb4: b8004422 str w2, [x1], #4
56bb8: eb03003f cmp x1, x3
56bbc: 54ffff81 b.ne 56bac <clk_gate_con_restore+0x50> // b.any
56bc0: d65f03c0 ret
0000000000056bc4 <set_pmu_rsthold>:
56bc4: d2802401 mov x1, #0x120 // #288
56bc8: f07f9ac0 adrp x0, ff3b1000 <rk3399m0pmu_bin>
56bcc: f2bfeea1 movk x1, #0xff75, lsl #16
56bd0: 91090002 add x2, x0, #0x240
56bd4: b9400023 ldr w3, [x1]
56bd8: b9024003 str w3, [x0, #576]
56bdc: d2802480 mov x0, #0x124 // #292
56be0: f2bfeea0 movk x0, #0xff75, lsl #16
56be4: b9400003 ldr w3, [x0]
56be8: b9000443 str w3, [x2, #4]
56bec: 3207d7e2 mov w2, #0x7e7e7e7e // #2122219134
56bf0: b9000022 str w2, [x1]
56bf4: 52817e01 mov w1, #0xbf0 // #3056
56bf8: 72a17e01 movk w1, #0xbf0, lsl #16
56bfc: b9000001 str w1, [x0]
56c00: d65f03c0 ret
0000000000056c04 <pmu_sgrf_rst_hld>:
56c04: d2802480 mov x0, #0x124 // #292
56c08: 320a83e1 mov w1, #0x400040 // #4194368
56c0c: f2bfeea0 movk x0, #0xff75, lsl #16
56c10: b9000001 str w1, [x0]
56c14: d65f03c0 ret
0000000000056c18 <enable_dvfs_plls>:
56c18: d2800182 mov x2, #0xc // #12
56c1c: 52a00041 mov w1, #0x20000 // #131072
56c20: f2bfeec2 movk x2, #0xff76, lsl #16
56c24: 52802000 mov w0, #0x100 // #256
56c28: 72a06000 movk w0, #0x300, lsl #16
56c2c: b9000041 str w1, [x2]
56c30: b9000040 str w0, [x2]
56c34: b9008041 str w1, [x2, #128]
56c38: b9008040 str w0, [x2, #128]
56c3c: b900c041 str w1, [x2, #192]
56c40: b900c040 str w0, [x2, #192]
56c44: d2801582 mov x2, #0xac // #172
56c48: f2bfeec2 movk x2, #0xff76, lsl #16
56c4c: b9000041 str w1, [x2]
56c50: b9000040 str w0, [x2]
56c54: d2800d82 mov x2, #0x6c // #108
56c58: f2bfeec2 movk x2, #0xff76, lsl #16
56c5c: b9000041 str w1, [x2]
56c60: b9000040 str w0, [x2]
56c64: d65f03c0 ret
0000000000056c68 <enable_nodvfs_plls>:
56c68: d2800180 mov x0, #0xc // #12
56c6c: 52a00041 mov w1, #0x20000 // #131072
56c70: f2bfeea0 movk x0, #0xff75, lsl #16
56c74: b9000001 str w1, [x0]
56c78: 52802001 mov w1, #0x100 // #256
56c7c: 72a06001 movk w1, #0x300, lsl #16
56c80: b9000001 str w1, [x0]
56c84: d65f03c0 ret
0000000000056c88 <soc_global_soft_reset_init>:
56c88: d2802480 mov x0, #0x124 // #292
56c8c: 52a00801 mov w1, #0x400000 // #4194304
56c90: f2bfeea0 movk x0, #0xff75, lsl #16
56c94: b9000001 str w1, [x0]
56c98: d280a201 mov x1, #0x510 // #1296
56c9c: f2bfeec1 movk x1, #0xff76, lsl #16
56ca0: b9400020 ldr w0, [x1]
56ca4: 121b7000 and w0, w0, #0xffffffe3
56ca8: b9000020 str w0, [x1]
56cac: d65f03c0 ret
0000000000056cb0 <soc_global_soft_reset>:
56cb0: a9bf7bfd stp x29, x30, [sp, #-16]!
56cb4: 910003fd mov x29, sp
56cb8: 97fff1b0 bl 53378 <pmu_power_domains_on>
56cbc: d2801981 mov x1, #0xcc // #204
56cc0: 52a06000 mov w0, #0x3000000 // #50331648
56cc4: f2bfeec1 movk x1, #0xff76, lsl #16
56cc8: b9000020 str w0, [x1]
56ccc: d2801581 mov x1, #0xac // #172
56cd0: f2bfeec1 movk x1, #0xff76, lsl #16
56cd4: b9000020 str w0, [x1]
56cd8: d2801181 mov x1, #0x8c // #140
56cdc: f2bfeec1 movk x1, #0xff76, lsl #16
56ce0: b9000020 str w0, [x1]
56ce4: d2800d81 mov x1, #0x6c // #108
56ce8: f2bfeec1 movk x1, #0xff76, lsl #16
56cec: b9000020 str w0, [x1]
56cf0: d2800181 mov x1, #0xc // #12
56cf4: f2bfeea1 movk x1, #0xff75, lsl #16
56cf8: b9000020 str w0, [x1]
56cfc: d2800581 mov x1, #0x2c // #44
56d00: f2bfeec1 movk x1, #0xff76, lsl #16
56d04: b9000020 str w0, [x1]
56d08: d2800181 mov x1, #0xc // #12
56d0c: f2bfeec1 movk x1, #0xff76, lsl #16
56d10: b9000020 str w0, [x1]
56d14: d5033f9f dsb sy
56d18: d280a000 mov x0, #0x500 // #1280
56d1c: 529fb721 mov w1, #0xfdb9 // #64953
56d20: f2bfeec0 movk x0, #0xff76, lsl #16
56d24: b9000001 str w1, [x0]
56d28: 14000000 b 56d28 <soc_global_soft_reset+0x78>
0000000000056d2c <plat_rockchip_soc_init>:
56d2c: a9bf7bfd stp x29, x30, [sp, #-16]!
56d30: 910003fd mov x29, sp
56d34: 97fffec2 bl 5683c <secure_timer_init>
56d38: 97fffecd bl 5686c <secure_sgrf_init>
56d3c: 97fffee4 bl 568cc <secure_sgrf_ddr_rgn_init>
56d40: 97ffffd2 bl 56c88 <soc_global_soft_reset_init>
56d44: 97fff010 bl 52d84 <plat_rockchip_gpio_init>
56d48: 97fffdf7 bl 56524 <m0_init>
56d4c: 94000d7c bl 5a33c <dram_init>
56d50: a8c17bfd ldp x29, x30, [sp], #16
56d54: 14000b2e b 59a0c <dram_dfs_init>
0000000000056d58 <get_rdlat_adj>:
56d58: 71000c1f cmp w0, #0x3
56d5c: 54000180 b.eq 56d8c <get_rdlat_adj+0x34> // b.none
56d60: 7100181f cmp w0, #0x6
56d64: 540001c0 b.eq 56d9c <get_rdlat_adj+0x44> // b.none
56d68: 90000060 adrp x0, 62000 <vprintf+0x400>
56d6c: 9114a000 add x0, x0, #0x528
56d70: 52800102 mov w2, #0x8 // #8
56d74: 8b225002 add x2, x0, w2, uxtw #4
56d78: b9400003 ldr w3, [x0]
56d7c: 6b01007f cmp w3, w1
56d80: 54000161 b.ne 56dac <get_rdlat_adj+0x54> // b.any
56d84: b9400400 ldr w0, [x0, #4]
56d88: d65f03c0 ret
56d8c: 90000060 adrp x0, 62000 <vprintf+0x400>
56d90: 528000c2 mov w2, #0x6 // #6
56d94: 910cf000 add x0, x0, #0x33c
56d98: 17fffff7 b 56d74 <get_rdlat_adj+0x1c>
56d9c: 90000060 adrp x0, 62000 <vprintf+0x400>
56da0: 52800122 mov w2, #0x9 // #9
56da4: 91126000 add x0, x0, #0x498
56da8: 17fffff3 b 56d74 <get_rdlat_adj+0x1c>
56dac: 91004000 add x0, x0, #0x10
56db0: eb02001f cmp x0, x2
56db4: 54fffe21 b.ne 56d78 <get_rdlat_adj+0x20> // b.any
56db8: 52801fe0 mov w0, #0xff // #255
56dbc: 17fffff3 b 56d88 <get_rdlat_adj+0x30>
0000000000056dc0 <get_wrlat_adj>:
56dc0: 71000c1f cmp w0, #0x3
56dc4: 54000180 b.eq 56df4 <get_wrlat_adj+0x34> // b.none
56dc8: 7100181f cmp w0, #0x6
56dcc: 540001c0 b.eq 56e04 <get_wrlat_adj+0x44> // b.none
56dd0: 90000060 adrp x0, 62000 <vprintf+0x400>
56dd4: 9114a000 add x0, x0, #0x528
56dd8: 52800102 mov w2, #0x8 // #8
56ddc: 8b225002 add x2, x0, w2, uxtw #4
56de0: b9400803 ldr w3, [x0, #8]
56de4: 6b01007f cmp w3, w1
56de8: 54000161 b.ne 56e14 <get_wrlat_adj+0x54> // b.any
56dec: b9400c00 ldr w0, [x0, #12]
56df0: d65f03c0 ret
56df4: 90000060 adrp x0, 62000 <vprintf+0x400>
56df8: 528000c2 mov w2, #0x6 // #6
56dfc: 910cf000 add x0, x0, #0x33c
56e00: 17fffff7 b 56ddc <get_wrlat_adj+0x1c>
56e04: 90000060 adrp x0, 62000 <vprintf+0x400>
56e08: 52800122 mov w2, #0x9 // #9
56e0c: 91126000 add x0, x0, #0x498
56e10: 17fffff3 b 56ddc <get_wrlat_adj+0x1c>
56e14: 91004000 add x0, x0, #0x10
56e18: eb02001f cmp x0, x2
56e1c: 54fffe21 b.ne 56de0 <get_wrlat_adj+0x20> // b.any
56e20: 52801fe0 mov w0, #0xff // #255
56e24: 17fffff3 b 56df0 <get_wrlat_adj+0x30>
0000000000056e28 <get_pi_rdlat_adj>:
56e28: b9417403 ldr w3, [x0, #372]
56e2c: 52884802 mov w2, #0x4240 // #16960
56e30: b9400000 ldr w0, [x0]
56e34: 72a001e2 movk w2, #0xf, lsl #16
56e38: 1ac00842 udiv w2, w2, w0
56e3c: 52817700 mov w0, #0xbb8 // #3000
56e40: 1ac20801 udiv w1, w0, w2
56e44: 1b028020 msub w0, w1, w2, w0
56e48: 7100001f cmp w0, #0x0
56e4c: 52805780 mov w0, #0x2bc // #700
56e50: 1a810421 cinc w1, w1, ne // ne = any
56e54: 1ac20804 udiv w4, w0, w2
56e58: 51000421 sub w1, w1, #0x1
56e5c: 1b028082 msub w2, w4, w2, w0
56e60: 7100005f cmp w2, #0x0
56e64: 51000862 sub w2, w3, #0x2
56e68: 1a840484 cinc w4, w4, ne // ne = any
56e6c: 6b010080 subs w0, w4, w1
56e70: 1a9f8000 csel w0, w0, wzr, hi // hi = pmore
56e74: 6b01005f cmp w2, w1
56e78: 54000062 b.cs 56e84 <get_pi_rdlat_adj+0x5c> // b.hs, b.nlast
56e7c: 4b040060 sub w0, w3, w4
56e80: d65f03c0 ret
56e84: 4b010061 sub w1, w3, w1
56e88: 4b000020 sub w0, w1, w0
56e8c: 7100043f cmp w1, #0x1
56e90: 52800041 mov w1, #0x2 // #2
56e94: 1a818000 csel w0, w0, w1, hi // hi = pmore
56e98: 17fffffa b 56e80 <get_pi_rdlat_adj+0x58>
0000000000056e9c <gen_rk3399_set_odt>:
56e9c: 53103c03 lsl w3, w0, #16
56ea0: 52840281 mov w1, #0x2014 // #8212
56ea4: 900000c5 adrp x5, 6e000 <iomux_status+0x2c>
56ea8: 53081c00 lsl w0, w0, #24
56eac: 912ea0a5 add x5, x5, #0xba8
56eb0: 72bff501 movk w1, #0xffa8, lsl #16
56eb4: 52800004 mov w4, #0x0 // #0
56eb8: b9403ca2 ldr w2, [x5, #60]
56ebc: 6b04005f cmp w2, w4
56ec0: 54000048 b.hi 56ec8 <gen_rk3399_set_odt+0x2c> // b.pmore
56ec4: d65f03c0 ret
56ec8: 2a0103e6 mov w6, w1
56ecc: 11000484 add w4, w4, #0x1
56ed0: b94000c2 ldr w2, [x6]
56ed4: 120d7042 and w2, w2, #0xfff8ffff
56ed8: 2a030042 orr w2, w2, w3
56edc: b90000c2 str w2, [x6]
56ee0: 11080026 add w6, w1, #0x200
56ee4: b94000c2 ldr w2, [x6]
56ee8: 120d7042 and w2, w2, #0xfff8ffff
56eec: 2a030042 orr w2, w2, w3
56ef0: b90000c2 str w2, [x6]
56ef4: 11100026 add w6, w1, #0x400
56ef8: b94000c2 ldr w2, [x6]
56efc: 120d7042 and w2, w2, #0xfff8ffff
56f00: 2a030042 orr w2, w2, w3
56f04: b90000c2 str w2, [x6]
56f08: 11180026 add w6, w1, #0x600
56f0c: b94000c2 ldr w2, [x6]
56f10: 120d7042 and w2, w2, #0xfff8ffff
56f14: 2a030042 orr w2, w2, w3
56f18: b90000c2 str w2, [x6]
56f1c: 11001026 add w6, w1, #0x4
56f20: b94000c2 ldr w2, [x6]
56f24: 12057042 and w2, w2, #0xf8ffffff
56f28: 2a000042 orr w2, w2, w0
56f2c: b90000c2 str w2, [x6]
56f30: 11081026 add w6, w1, #0x204
56f34: b94000c2 ldr w2, [x6]
56f38: 12057042 and w2, w2, #0xf8ffffff
56f3c: 2a000042 orr w2, w2, w0
56f40: b90000c2 str w2, [x6]
56f44: 11101026 add w6, w1, #0x404
56f48: b94000c2 ldr w2, [x6]
56f4c: 12057042 and w2, w2, #0xf8ffffff
56f50: 2a000042 orr w2, w2, w0
56f54: b90000c2 str w2, [x6]
56f58: 11181026 add w6, w1, #0x604
56f5c: 11402021 add w1, w1, #0x8, lsl #12
56f60: b94000c2 ldr w2, [x6]
56f64: 12057042 and w2, w2, #0xf8ffffff
56f68: 2a000042 orr w2, w2, w0
56f6c: b90000c2 str w2, [x6]
56f70: 17ffffd2 b 56eb8 <gen_rk3399_set_odt+0x1c>
0000000000056f74 <to_get_clk_index>:
56f74: 90000063 adrp x3, 62000 <vprintf+0x400>
56f78: 2a0003e2 mov w2, w0
56f7c: 910e7063 add x3, x3, #0x39c
56f80: d2800001 mov x1, #0x0 // #0
56f84: d2800384 mov x4, #0x1c // #28
56f88: 9b047c25 mul x5, x1, x4
56f8c: 2a0103e0 mov w0, w1
56f90: b86368a5 ldr w5, [x5, x3]
56f94: 6b0200bf cmp w5, w2
56f98: 540000a9 b.ls 56fac <to_get_clk_index+0x38> // b.plast
56f9c: 91000421 add x1, x1, #0x1
56fa0: f100243f cmp x1, #0x9
56fa4: 54ffff21 b.ne 56f88 <to_get_clk_index+0x14> // b.any
56fa8: 52800100 mov w0, #0x8 // #8
56fac: d65f03c0 ret
0000000000056fb0 <get_pi_wrlat.isra.0.part.0>:
56fb0: b9400000 ldr w0, [x0]
56fb4: 7100341f cmp w0, #0xd
56fb8: 54000148 b.hi 56fe0 <get_pi_wrlat.isra.0.part.0+0x30> // b.pmore
56fbc: 7100241f cmp w0, #0x9
56fc0: 54000148 b.hi 56fe8 <get_pi_wrlat.isra.0.part.0+0x38> // b.pmore
56fc4: 54000160 b.eq 56ff0 <get_pi_wrlat.isra.0.part.0+0x40> // b.none
56fc8: 7100201f cmp w0, #0x8
56fcc: 54000160 b.eq 56ff8 <get_pi_wrlat.isra.0.part.0+0x48> // b.none
56fd0: 7100181f cmp w0, #0x6
56fd4: 52800060 mov w0, #0x3 // #3
56fd8: 1a9f0400 csinc w0, w0, wzr, eq // eq = none
56fdc: d65f03c0 ret
56fe0: 52800100 mov w0, #0x8 // #8
56fe4: 17fffffe b 56fdc <get_pi_wrlat.isra.0.part.0+0x2c>
56fe8: 528000c0 mov w0, #0x6 // #6
56fec: 17fffffc b 56fdc <get_pi_wrlat.isra.0.part.0+0x2c>
56ff0: 528000a0 mov w0, #0x5 // #5
56ff4: 17fffffa b 56fdc <get_pi_wrlat.isra.0.part.0+0x2c>
56ff8: 52800080 mov w0, #0x4 // #4
56ffc: 17fffff8 b 56fdc <get_pi_wrlat.isra.0.part.0+0x2c>
0000000000057000 <get_pi_todtoff_min.isra.0>:
57000: 7100183f cmp w1, #0x6
57004: 54000180 b.eq 57034 <get_pi_todtoff_min.isra.0+0x34> // b.none
57008: 71001c3f cmp w1, #0x7
5700c: 5280bb81 mov w1, #0x5dc // #1500
57010: 1a9f0022 csel w2, w1, wzr, eq // eq = none
57014: 52884801 mov w1, #0x4240 // #16960
57018: 72a001e1 movk w1, #0xf, lsl #16
5701c: 1ac00821 udiv w1, w1, w0
57020: 1ac10840 udiv w0, w2, w1
57024: 1b018801 msub w1, w0, w1, w2
57028: 7100003f cmp w1, #0x0
5702c: 1a800400 cinc w0, w0, ne // ne = any
57030: d65f03c0 ret
57034: 52813882 mov w2, #0x9c4 // #2500
57038: 17fffff7 b 57014 <get_pi_todtoff_min.isra.0+0x14>
000000000005703c <get_pi_todtoff_max.isra.0>:
5703c: 51001821 sub w1, w1, #0x6
57040: 7100083f cmp w1, #0x2
57044: 5281b581 mov w1, #0xdac // #3500
57048: 1a9f3022 csel w2, w1, wzr, cc // cc = lo, ul, last
5704c: 52884801 mov w1, #0x4240 // #16960
57050: 72a001e1 movk w1, #0xf, lsl #16
57054: 1ac00821 udiv w1, w1, w0
57058: 1ac10840 udiv w0, w2, w1
5705c: 1b018801 msub w1, w0, w1, w2
57060: 7100003f cmp w1, #0x0
57064: 1a800400 cinc w0, w0, ne // ne = any
57068: d65f03c0 ret
000000000005706c <get_pi_tdfi_phy_rdlat.isra.0>:
5706c: b9400003 ldr w3, [x0]
57070: 52884802 mov w2, #0x4240 // #16960
57074: 72a001e2 movk w2, #0xf, lsl #16
57078: 52817704 mov w4, #0xbb8 // #3000
5707c: b9417400 ldr w0, [x0, #372]
57080: 1ac30842 udiv w2, w2, w3
57084: 51000800 sub w0, w0, #0x2
57088: 1ac20883 udiv w3, w4, w2
5708c: 1b029064 msub w4, w3, w2, w4
57090: 7100009f cmp w4, #0x0
57094: 1a830465 cinc w5, w3, ne // ne = any
57098: 510004a5 sub w5, w5, #0x1
5709c: 6b0000bf cmp w5, w0
570a0: 54000248 b.hi 570e8 <get_pi_tdfi_phy_rdlat.isra.0+0x7c> // b.pmore
570a4: 7100009f cmp w4, #0x0
570a8: 1a830463 cinc w3, w3, ne // ne = any
570ac: 11003c60 add w0, w3, #0xf
570b0: 71000c3f cmp w1, #0x3
570b4: 540001e0 b.eq 570f0 <get_pi_tdfi_phy_rdlat.isra.0+0x84> // b.none
570b8: 71001c3f cmp w1, #0x7
570bc: 54000340 b.eq 57124 <get_pi_tdfi_phy_rdlat.isra.0+0xb8> // b.none
570c0: 7100183f cmp w1, #0x6
570c4: 54000340 b.eq 5712c <get_pi_tdfi_phy_rdlat.isra.0+0xc0> // b.none
570c8: a9bf7bfd stp x29, x30, [sp, #-16]!
570cc: 90000060 adrp x0, 63000 <CSWTCH.22+0x37e>
570d0: 910dec00 add x0, x0, #0x37b
570d4: 910003fd mov x29, sp
570d8: 94001deb bl 5e884 <tf_log>
570dc: 52800000 mov w0, #0x0 // #0
570e0: a8c17bfd ldp x29, x30, [sp], #16
570e4: d65f03c0 ret
570e8: 52800003 mov w3, #0x0 // #0
570ec: 17fffff0 b 570ac <get_pi_tdfi_phy_rdlat.isra.0+0x40>
570f0: 52800003 mov w3, #0x0 // #0
570f4: 112a3064 add w4, w3, #0xa8c
570f8: 1ac20881 udiv w1, w4, w2
570fc: 1b029024 msub w4, w1, w2, w4
57100: 7100009f cmp w4, #0x0
57104: 1ac20864 udiv w4, w3, w2
57108: 1a810421 cinc w1, w1, ne // ne = any
5710c: 1b028c82 msub w2, w4, w2, w3
57110: 7100005f cmp w2, #0x0
57114: 1a840484 cinc w4, w4, ne // ne = any
57118: 0b040021 add w1, w1, w4
5711c: 0b000020 add w0, w1, w0
57120: d65f03c0 ret
57124: 5281c203 mov w3, #0xe10 // #3600
57128: 17fffff3 b 570f4 <get_pi_tdfi_phy_rdlat.isra.0+0x88>
5712c: 5282af83 mov w3, #0x157c // #5500
57130: 17fffff1 b 570f4 <get_pi_tdfi_phy_rdlat.isra.0+0x88>
0000000000057134 <get_pi_wrlat_adj.constprop.0>:
57134: f00000a1 adrp x1, 6e000 <iomux_status+0x2c>
57138: b94bdc21 ldr w1, [x1, #3036]
5713c: 7100183f cmp w1, #0x6
57140: 54000101 b.ne 57160 <get_pi_wrlat_adj.constprop.0+0x2c> // b.any
57144: a9bf7bfd stp x29, x30, [sp, #-16]!
57148: 9105d000 add x0, x0, #0x174
5714c: 910003fd mov x29, sp
57150: 97ffff98 bl 56fb0 <get_pi_wrlat.isra.0.part.0>
57154: 51000400 sub w0, w0, #0x1
57158: a8c17bfd ldp x29, x30, [sp], #16
5715c: d65f03c0 ret
57160: 52800020 mov w0, #0x1 // #1
57164: 51000400 sub w0, w0, #0x1
57168: d65f03c0 ret
000000000005716c <prepare_ddr_timing>:
5716c: a9a17bfd stp x29, x30, [sp, #-496]!
57170: f00000a1 adrp x1, 6e000 <iomux_status+0x2c>
57174: 7104ac1f cmp w0, #0x12b
57178: 910003fd mov x29, sp
5717c: a90153f3 stp x19, x20, [sp, #16]
57180: 912ea033 add x19, x1, #0xba8
57184: aa0103e7 mov x7, x1
57188: a9025bf5 stp x21, x22, [sp, #32]
5718c: 2a0003f5 mov w21, w0
57190: a90363f7 stp x23, x24, [sp, #48]
57194: a9046bf9 stp x25, x26, [sp, #64]
57198: a90573fb stp x27, x28, [sp, #80]
5719c: b9003a60 str w0, [x19, #56]
571a0: 1a9f87e0 cset w0, ls // ls = plast
571a4: b9004a60 str w0, [x19, #72]
571a8: b9404e60 ldr w0, [x19, #76]
571ac: 7100041f cmp w0, #0x1
571b0: 54000041 b.ne 571b8 <prepare_ddr_timing+0x4c> // b.any
571b4: 97ffff3a bl 56e9c <gen_rk3399_set_odt>
571b8: b94ba8f4 ldr w20, [x7, #2984]
571bc: 9101c3e1 add x1, sp, #0x70
571c0: 91005260 add x0, x19, #0x14
571c4: 52800016 mov w22, #0x0 // #0
571c8: 11000694 add w20, w20, #0x1
571cc: 52800017 mov w23, #0x0 // #0
571d0: 12000294 and w20, w20, #0x1
571d4: 94000ce9 bl 5a578 <dram_get_parameter>
571d8: 34007754 cbz w20, 580c0 <prepare_ddr_timing+0xf54>
571dc: 52800498 mov w24, #0x24 // #36
571e0: 52801119 mov w25, #0x88 // #136
571e4: 52801e1a mov w26, #0xf0 // #240
571e8: 5280059b mov w27, #0x2c // #44
571ec: 5295cd5c mov w28, #0xae6a // #44650
571f0: 72bff518 movk w24, #0xffa8, lsl #16
571f4: 72bff519 movk w25, #0xffa8, lsl #16
571f8: 72bff51a movk w26, #0xffa8, lsl #16
571fc: 72bff51b movk w27, #0xffa8, lsl #16
57200: 72a0015c movk w28, #0xa, lsl #16
57204: b9403e60 ldr w0, [x19, #60]
57208: 6b0002ff cmp w23, w0
5720c: 54007703 b.cc 580ec <prepare_ddr_timing+0xf80> // b.lo, b.ul, b.last
57210: 52813a16 mov w22, #0x9d0 // #2512
57214: 52884819 mov w25, #0x4240 // #16960
57218: 910793f8 add x24, sp, #0x1e4
5721c: 72bff516 movk w22, #0xffa8, lsl #16
57220: 52800017 mov w23, #0x0 // #0
57224: 72a001f9 movk w25, #0xf, lsl #16
57228: b9403e60 ldr w0, [x19, #60]
5722c: 6b0002ff cmp w23, w0
57230: 54006c02 b.cs 57fb0 <prepare_ddr_timing+0xe44> // b.hs, b.nlast
57234: b94093e0 ldr w0, [sp, #144]
57238: 510702c1 sub w1, w22, #0x1c0
5723c: 531e7402 lsl w2, w0, #2
57240: b9000022 str w2, [x1]
57244: 5106f2c2 sub w2, w22, #0x1bc
57248: b9400041 ldr w1, [x2]
5724c: 12103c21 and w1, w1, #0xffff0000
57250: 2a000421 orr w1, w1, w0, lsl #1
57254: b9000041 str w1, [x2]
57258: 510682c2 sub w2, w22, #0x1a0
5725c: b9400041 ldr w1, [x2]
57260: 12103c21 and w1, w1, #0xffff0000
57264: 2a000420 orr w0, w1, w0, lsl #1
57268: b9000040 str w0, [x2]
5726c: b9403666 ldr w6, [x19, #52]
57270: 71001cdf cmp w6, #0x7
57274: 1a9f17e0 cset w0, eq // eq = none
57278: 531f7805 lsl w5, w0, #1
5727c: 9101c3e0 add x0, sp, #0x70
57280: 97fffeea bl 56e28 <get_pi_rdlat_adj>
57284: b941effa ldr w26, [sp, #492]
57288: 0b050000 add w0, w0, w5
5728c: 2a0603e1 mov w1, w6
57290: 53017f5a lsr w26, w26, #1
57294: 11000b5a add w26, w26, #0x2
57298: 0b00035a add w26, w26, w0
5729c: 9101c3e0 add x0, sp, #0x70
572a0: 97ffff73 bl 5706c <get_pi_tdfi_phy_rdlat.isra.0>
572a4: 0b1a0000 add w0, w0, w26
572a8: 5104a2c2 sub w2, w22, #0x128
572ac: b9400041 ldr w1, [x2]
572b0: 12105c21 and w1, w1, #0xffff00ff
572b4: 2a002021 orr w1, w1, w0, lsl #8
572b8: b9000041 str w1, [x2]
572bc: b9403661 ldr w1, [x19, #52]
572c0: 7100183f cmp w1, #0x6
572c4: 54000101 b.ne 572e4 <prepare_ddr_timing+0x178> // b.any
572c8: aa1803e0 mov x0, x24
572cc: 97ffff39 bl 56fb0 <get_pi_wrlat.isra.0.part.0>
572d0: 510492c2 sub w2, w22, #0x124
572d4: b9400041 ldr w1, [x2]
572d8: 12036821 and w1, w1, #0xe0ffffff
572dc: 2a006021 orr w1, w1, w0, lsl #24
572e0: b9000041 str w1, [x2]
572e4: 510482c2 sub w2, w22, #0x120
572e8: b941e7e3 ldr w3, [sp, #484]
572ec: b94093e5 ldr w5, [sp, #144]
572f0: b940cfe4 ldr w4, [sp, #204]
572f4: b9400041 ldr w1, [x2]
572f8: b94073e6 ldr w6, [sp, #112]
572fc: 121a6421 and w1, w1, #0xffffffc0
57300: b9000041 str w1, [x2]
57304: b9400041 ldr w1, [x2]
57308: 12116021 and w1, w1, #0xffff80ff
5730c: 2a032421 orr w1, w1, w3, lsl #9
57310: b9000041 str w1, [x2]
57314: 510452c2 sub w2, w22, #0x114
57318: b9400041 ldr w1, [x2]
5731c: 12003c21 and w1, w1, #0xffff
57320: 2a054021 orr w1, w1, w5, lsl #16
57324: b9000041 str w1, [x2]
57328: b9400041 ldr w1, [x2]
5732c: 12165421 and w1, w1, #0xfffffc00
57330: 2a040021 orr w1, w1, w4
57334: b9000041 str w1, [x2]
57338: b9403661 ldr w1, [x19, #52]
5733c: 7100183f cmp w1, #0x6
57340: 54000101 b.ne 57360 <prepare_ddr_timing+0x1f4> // b.any
57344: 2a0603e0 mov w0, w6
57348: 97ffff3d bl 5703c <get_pi_todtoff_max.isra.0>
5734c: 510312c2 sub w2, w22, #0xc4
57350: b9400041 ldr w1, [x2]
57354: 12105c21 and w1, w1, #0xffff00ff
57358: 2a002021 orr w1, w1, w0, lsl #8
5735c: b9000041 str w1, [x2]
57360: b9403661 ldr w1, [x19, #52]
57364: 51001822 sub w2, w1, #0x6
57368: 7100045f cmp w2, #0x1
5736c: 5400de68 b.hi 58f38 <prepare_ddr_timing+0x1dcc> // b.pmore
57370: 7100183f cmp w1, #0x6
57374: 5400dde1 b.ne 58f30 <prepare_ddr_timing+0x1dc4> // b.any
57378: aa1803e0 mov x0, x24
5737c: 97ffff0d bl 56fb0 <get_pi_wrlat.isra.0.part.0>
57380: 2a0003e4 mov w4, w0
57384: 2a0603e0 mov w0, w6
57388: 97ffff2d bl 5703c <get_pi_todtoff_max.isra.0>
5738c: 4b000081 sub w1, w4, w0
57390: 6b04001f cmp w0, w4
57394: 1a9f3020 csel w0, w1, wzr, cc // cc = lo, ul, last
57398: 5102c2c2 sub w2, w22, #0xb0
5739c: b9400041 ldr w1, [x2]
573a0: 12026421 and w1, w1, #0xc0ffffff
573a4: 2a006021 orr w1, w1, w0, lsl #24
573a8: b9000041 str w1, [x2]
573ac: b9403664 ldr w4, [x19, #52]
573b0: 51001881 sub w1, w4, #0x6
573b4: 7100043f cmp w1, #0x1
573b8: 5400dc68 b.hi 58f44 <prepare_ddr_timing+0x1dd8> // b.pmore
573bc: 2a0403e1 mov w1, w4
573c0: 2a0603e0 mov w0, w6
573c4: 97ffff0f bl 57000 <get_pi_todtoff_min.isra.0>
573c8: 51000463 sub w3, w3, #0x1
573cc: 0b000063 add w3, w3, w0
573d0: 2a0403e1 mov w1, w4
573d4: 2a0603e0 mov w0, w6
573d8: 97ffff19 bl 5703c <get_pi_todtoff_max.isra.0>
573dc: 6b000061 subs w1, w3, w0
573e0: 1a9f8020 csel w0, w1, wzr, hi // hi = pmore
573e4: 5102b2c2 sub w2, w22, #0xac
573e8: b9400041 ldr w1, [x2]
573ec: 120a6421 and w1, w1, #0xffc0ffff
573f0: 2a004020 orr w0, w1, w0, lsl #16
573f4: b9000040 str w0, [x2]
573f8: 9101c3e0 add x0, sp, #0x70
573fc: 97fffe8b bl 56e28 <get_pi_rdlat_adj>
57400: 5101b2c2 sub w2, w22, #0x6c
57404: b9400041 ldr w1, [x2]
57408: 12005c21 and w1, w1, #0xffffff
5740c: 2a006020 orr w0, w1, w0, lsl #24
57410: b9000040 str w0, [x2]
57414: 9101c3e0 add x0, sp, #0x70
57418: 97ffff47 bl 57134 <get_pi_wrlat_adj.constprop.0>
5741c: 5101a2c2 sub w2, w22, #0x68
57420: b9400041 ldr w1, [x2]
57424: 12005c21 and w1, w1, #0xffffff
57428: 2a006021 orr w1, w1, w0, lsl #24
5742c: b9000041 str w1, [x2]
57430: 340000a0 cbz w0, 57444 <prepare_ddr_timing+0x2d8>
57434: 51000401 sub w1, w0, #0x1
57438: 51001402 sub w2, w0, #0x5
5743c: 7100101f cmp w0, #0x4
57440: 1a818040 csel w0, w2, w1, hi // hi = pmore
57444: 510192c2 sub w2, w22, #0x64
57448: 110006f7 add w23, w23, #0x1
5744c: b9400041 ldr w1, [x2]
57450: 12005c21 and w1, w1, #0xffffff
57454: 2a006020 orr w0, w1, w0, lsl #24
57458: b9000040 str w0, [x2]
5745c: 1ac60b21 udiv w1, w25, w6
57460: 5289c402 mov w2, #0x4e20 // #20000
57464: 1ac10840 udiv w0, w2, w1
57468: 1b018802 msub w2, w0, w1, w2
5746c: 7100005f cmp w2, #0x0
57470: 1a800400 cinc w0, w0, ne // ne = any
57474: 11000400 add w0, w0, #0x1
57478: 12000002 and w2, w0, #0x1
5747c: 0b400440 add w0, w2, w0, lsr #1
57480: 510142c2 sub w2, w22, #0x50
57484: 11001403 add w3, w0, #0x5
57488: 11005c00 add w0, w0, #0x17
5748c: b9400044 ldr w4, [x2]
57490: 12065484 and w4, w4, #0xfc00ffff
57494: 2a034083 orr w3, w4, w3, lsl #16
57498: b9000043 str w3, [x2]
5749c: 1100c2c4 add w4, w22, #0x30
574a0: b9400043 ldr w3, [x2]
574a4: 12165463 and w3, w3, #0xfffffc00
574a8: 2a030000 orr w0, w0, w3
574ac: b9000040 str w0, [x2]
574b0: 5100d2c2 sub w2, w22, #0x34
574b4: b9414be3 ldr w3, [sp, #328]
574b8: b9400040 ldr w0, [x2]
574bc: 121b6800 and w0, w0, #0xffffffe0
574c0: 2a030000 orr w0, w0, w3
574c4: b9000040 str w0, [x2]
574c8: 5280fa02 mov w2, #0x7d0 // #2000
574cc: 510052c3 sub w3, w22, #0x14
574d0: 1ac10840 udiv w0, w2, w1
574d4: 1b018802 msub w2, w0, w1, w2
574d8: 7100005f cmp w2, #0x0
574dc: b9400062 ldr w2, [x3]
574e0: 1a800400 cinc w0, w0, ne // ne = any
574e4: 11001400 add w0, w0, #0x5
574e8: 120c6c42 and w2, w2, #0xfff0ffff
574ec: 2a004040 orr w0, w2, w0, lsl #16
574f0: 5284e202 mov w2, #0x2710 // #10000
574f4: b9000060 str w0, [x3]
574f8: 1101b2c3 add w3, w22, #0x6c
574fc: 1ac10840 udiv w0, w2, w1
57500: 1b018801 msub w1, w0, w1, w2
57504: 2a1603e2 mov w2, w22
57508: 7100003f cmp w1, #0x0
5750c: 1a800400 cinc w0, w0, ne // ne = any
57510: 710190df cmp w6, #0x64
57514: 11002001 add w1, w0, #0x8
57518: 1a808420 csinc w0, w1, w0, hi // hi = pmore
5751c: b9400041 ldr w1, [x2]
57520: 12026421 and w1, w1, #0xc0ffffff
57524: 2a006020 orr w0, w1, w0, lsl #24
57528: b9000040 str w0, [x2]
5752c: b94157e0 ldr w0, [sp, #340]
57530: 110132c2 add w2, w22, #0x4c
57534: b9400081 ldr w1, [x4]
57538: 12103c21 and w1, w1, #0xffff0000
5753c: 2a000021 orr w1, w1, w0
57540: b9000081 str w1, [x4]
57544: b9400041 ldr w1, [x2]
57548: 12083c21 and w1, w1, #0xff0000ff
5754c: 2a002021 orr w1, w1, w0, lsl #8
57550: b9000041 str w1, [x2]
57554: 110222c2 add w2, w22, #0x88
57558: b9400061 ldr w1, [x3]
5755c: 12103c21 and w1, w1, #0xffff0000
57560: 2a000021 orr w1, w1, w0
57564: b9000061 str w1, [x3]
57568: b9400041 ldr w1, [x2]
5756c: 12083c21 and w1, w1, #0xff0000ff
57570: 2a002020 orr w0, w1, w0, lsl #8
57574: b9000040 str w0, [x2]
57578: b9415be2 ldr w2, [sp, #344]
5757c: 110142c0 add w0, w22, #0x50
57580: b9400081 ldr w1, [x4]
57584: 12003c21 and w1, w1, #0xffff
57588: 2a024021 orr w1, w1, w2, lsl #16
5758c: b9000081 str w1, [x4]
57590: b9400001 ldr w1, [x0]
57594: 12103c21 and w1, w1, #0xffff0000
57598: 2a020021 orr w1, w1, w2
5759c: b9000001 str w1, [x0]
575a0: b9400061 ldr w1, [x3]
575a4: 12003c21 and w1, w1, #0xffff
575a8: 2a024021 orr w1, w1, w2, lsl #16
575ac: b9000061 str w1, [x3]
575b0: 110232c1 add w1, w22, #0x8c
575b4: 52800c63 mov w3, #0x63 // #99
575b8: b9400020 ldr w0, [x1]
575bc: 12103c00 and w0, w0, #0xffff0000
575c0: 2a020000 orr w0, w0, w2
575c4: 110282c2 add w2, w22, #0xa0
575c8: b9000020 str w0, [x1]
575cc: b9400040 ldr w0, [x2]
575d0: 12065401 and w1, w0, #0xfc00ffff
575d4: b941c7e0 ldr w0, [sp, #452]
575d8: 2a004020 orr w0, w1, w0, lsl #16
575dc: 1102e2c1 add w1, w22, #0xb8
575e0: b9000040 str w0, [x2]
575e4: b9400020 ldr w0, [x1]
575e8: 12126402 and w2, w0, #0xffffc0ff
575ec: b940a3e0 ldr w0, [sp, #160]
575f0: 2a002040 orr w0, w2, w0, lsl #8
575f4: b9000020 str w0, [x1]
575f8: b940bbe2 ldr w2, [sp, #184]
575fc: b9400020 ldr w0, [x1]
57600: 121a6400 and w0, w0, #0xffffffc0
57604: 2a020000 orr w0, w0, w2
57608: b9000020 str w0, [x1]
5760c: 1102d2c0 add w0, w22, #0xb4
57610: b9400001 ldr w1, [x0]
57614: 12005c22 and w2, w1, #0xffffff
57618: b94097e1 ldr w1, [sp, #148]
5761c: 2a016041 orr w1, w2, w1, lsl #24
57620: b9000001 str w1, [x0]
57624: b9400001 ldr w1, [x0]
57628: 12085c22 and w2, w1, #0xff00ffff
5762c: b9409fe1 ldr w1, [sp, #156]
57630: 2a014041 orr w1, w2, w1, lsl #16
57634: b9000001 str w1, [x0]
57638: b9400001 ldr w1, [x0]
5763c: 12105c22 and w2, w1, #0xffff00ff
57640: b940abe1 ldr w1, [sp, #168]
57644: 2a012041 orr w1, w2, w1, lsl #8
57648: b9000001 str w1, [x0]
5764c: 1102f2c1 add w1, w22, #0xbc
57650: b9400020 ldr w0, [x1]
57654: 12005c02 and w2, w0, #0xffffff
57658: b940c7e0 ldr w0, [sp, #196]
5765c: 2a006040 orr w0, w2, w0, lsl #24
57660: b9000020 str w0, [x1]
57664: b940c3e0 ldr w0, [sp, #192]
57668: b9400022 ldr w2, [x1]
5766c: 120f3842 and w2, w2, #0xfffe0000
57670: 1b037c00 mul w0, w0, w3
57674: 52800c83 mov w3, #0x64 // #100
57678: 1ac30800 udiv w0, w0, w3
5767c: 2a020000 orr w0, w0, w2
57680: b9000020 str w0, [x1]
57684: 110302c1 add w1, w22, #0xc0
57688: b9400020 ldr w0, [x1]
5768c: 120a6402 and w2, w0, #0xffc0ffff
57690: b94107e0 ldr w0, [sp, #260]
57694: 2a004040 orr w0, w2, w0, lsl #16
57698: b9000020 str w0, [x1]
5769c: b940d7e2 ldr w2, [sp, #212]
576a0: b9400020 ldr w0, [x1]
576a4: 121c6c00 and w0, w0, #0xfffffff0
576a8: 2a020000 orr w0, w0, w2
576ac: b9000020 str w0, [x1]
576b0: 110492c1 add w1, w22, #0x124
576b4: b9400020 ldr w0, [x1]
576b8: 12103c00 and w0, w0, #0xffff0000
576bc: 2a050400 orr w0, w0, w5, lsl #1
576c0: b9000020 str w0, [x1]
576c4: 52800280 mov w0, #0x14 // #20
576c8: 1b007ca5 mul w5, w5, w0
576cc: 1104a2c0 add w0, w22, #0x128
576d0: 114022d6 add w22, w22, #0x8, lsl #12
576d4: b9400001 ldr w1, [x0]
576d8: b9000005 str w5, [x0]
576dc: 17fffed3 b 57228 <prepare_ddr_timing+0xbc>
576e0: 295b1fe4 ldp w4, w7, [sp, #216]
576e4: 0b1802ca add w10, w22, w24
576e8: b940366b ldr w11, [x19, #52]
576ec: 0b1902c9 add w9, w22, w25
576f0: b94117e6 ldr w6, [sp, #276]
576f4: 0b1a02c5 add w5, w22, w26
576f8: b9407fe8 ldr w8, [sp, #124]
576fc: 71000d7f cmp w11, #0x3
57700: b94097e0 ldr w0, [sp, #148]
57704: 0b0700cc add w12, w6, w7
57708: b94107e1 ldr w1, [sp, #260]
5770c: 54004981 b.ne 5803c <prepare_ddr_timing+0xed0> // b.any
57710: b9403a63 ldr w3, [x19, #56]
57714: 52807d02 mov w2, #0x3e8 // #1000
57718: b94103eb ldr w11, [sp, #256]
5771c: 1b1c7c63 mul w3, w3, w28
57720: 110f9c63 add w3, w3, #0x3e7
57724: 1ac20863 udiv w3, w3, w2
57728: 0b010422 add w2, w1, w1, lsl #1
5772c: 0b0b0042 add w2, w2, w11
57730: 2a0b2021 orr w1, w1, w11, lsl #8
57734: 0b0c0042 add w2, w2, w12
57738: 0b030042 add w2, w2, w3
5773c: 5155fec3 sub w3, w22, #0x57f, lsl #12
57740: 513ea063 sub w3, w3, #0xfa8
57744: b9000142 str w2, [x10]
57748: b940ebea ldr w10, [sp, #232]
5774c: b9400062 ldr w2, [x3]
57750: 12103c42 and w2, w2, #0xffff0000
57754: 2a0a0042 orr w2, w2, w10
57758: b9000062 str w2, [x3]
5775c: b9000121 str w1, [x9]
57760: 4b000082 sub w2, w4, w0
57764: b94000a1 ldr w1, [x5]
57768: 12003c24 and w4, w1, #0xffff
5776c: 2a024082 orr w2, w4, w2, lsl #16
57770: b90000a2 str w2, [x5]
57774: 5155fec1 sub w1, w22, #0x57f, lsl #12
57778: b94087e2 ldr w2, [sp, #132]
5777c: 513fa021 sub w1, w1, #0xfe8
57780: b941e7e4 ldr w4, [sp, #484]
57784: b941e3e3 ldr w3, [sp, #480]
57788: 5155fec5 sub w5, w22, #0x57f, lsl #12
5778c: 513e60a5 sub w5, w5, #0xf98
57790: 53185c00 lsl w0, w0, #8
57794: b9000028 str w8, [x1]
57798: 5155fec1 sub w1, w22, #0x57f, lsl #12
5779c: 513f8021 sub w1, w1, #0xfe0
577a0: b941ebe8 ldr w8, [sp, #488]
577a4: b9000022 str w2, [x1]
577a8: 5155fec2 sub w2, w22, #0x57f, lsl #12
577ac: 513e9042 sub w2, w2, #0xfa4
577b0: b9400041 ldr w1, [x2]
577b4: 12096021 and w1, w1, #0xff80ffff
577b8: 2a044421 orr w1, w1, w4, lsl #17
577bc: b9000041 str w1, [x2]
577c0: b9400041 ldr w1, [x2]
577c4: 12036821 and w1, w1, #0xe0ffffff
577c8: 2a086021 orr w1, w1, w8, lsl #24
577cc: b9000041 str w1, [x2]
577d0: 5155fec2 sub w2, w22, #0x57f, lsl #12
577d4: 513e8042 sub w2, w2, #0xfa0
577d8: b9400041 ldr w1, [x2]
577dc: 121a6421 and w1, w1, #0xffffffc0
577e0: 2a030021 orr w1, w1, w3
577e4: b9000041 str w1, [x2]
577e8: b940b3e1 ldr w1, [sp, #176]
577ec: b94000a2 ldr w2, [x5]
577f0: 53103c23 lsl w3, w1, #16
577f4: b940afe1 ldr w1, [sp, #172]
577f8: 12003c42 and w2, w2, #0xffff
577fc: 2a016061 orr w1, w3, w1, lsl #24
57800: b940c7e3 ldr w3, [sp, #196]
57804: 2a020021 orr w1, w1, w2
57808: b90000a1 str w1, [x5]
5780c: b9409be1 ldr w1, [sp, #152]
57810: 52800085 mov w5, #0x4 // #4
57814: 53103c22 lsl w2, w1, #16
57818: b940cbe1 ldr w1, [sp, #200]
5781c: 2a016041 orr w1, w2, w1, lsl #24
57820: b940bbe2 ldr w2, [sp, #184]
57824: 2a022062 orr w2, w3, w2, lsl #8
57828: 5155fec3 sub w3, w22, #0x57f, lsl #12
5782c: 2a020021 orr w1, w1, w2
57830: 5155fec2 sub w2, w22, #0x57f, lsl #12
57834: 513e5042 sub w2, w2, #0xf94
57838: 513e1063 sub w3, w3, #0xf84
5783c: b9000041 str w1, [x2]
57840: b940abe1 ldr w1, [sp, #168]
57844: b9400062 ldr w2, [x3]
57848: 7100103f cmp w1, #0x4
5784c: 1a852021 csel w1, w1, w5, cs // cs = hs, nlast
57850: 12005c42 and w2, w2, #0xffffff
57854: b940a3e5 ldr w5, [sp, #160]
57858: 2a016041 orr w1, w2, w1, lsl #24
5785c: b940c3e2 ldr w2, [sp, #192]
57860: b9000061 str w1, [x3]
57864: 5155fec3 sub w3, w22, #0x57f, lsl #12
57868: b940efe1 ldr w1, [sp, #236]
5786c: 513de063 sub w3, w3, #0xf78
57870: 2a054000 orr w0, w0, w5, lsl #16
57874: 2a016041 orr w1, w2, w1, lsl #24
57878: 5155fec2 sub w2, w22, #0x57f, lsl #12
5787c: 513df042 sub w2, w2, #0xf7c
57880: b9000041 str w1, [x2]
57884: b940f3e1 ldr w1, [sp, #240]
57888: b9400062 ldr w2, [x3]
5788c: 7100003f cmp w1, #0x0
57890: 12185c42 and w2, w2, #0xffffff00
57894: 1a9f1421 csinc w1, w1, wzr, ne // ne = any
57898: 2a020021 orr w1, w1, w2
5789c: 5155fec2 sub w2, w22, #0x57f, lsl #12
578a0: 513d9042 sub w2, w2, #0xf64
578a4: b9000061 str w1, [x3]
578a8: b9400041 ldr w1, [x2]
578ac: 120a4421 and w1, w1, #0xffc000ff
578b0: 2a010000 orr w0, w0, w1
578b4: b9000040 str w0, [x2]
578b8: 5155fec2 sub w2, w22, #0x57f, lsl #12
578bc: b9409fe3 ldr w3, [sp, #156]
578c0: 513d6042 sub w2, w2, #0xf58
578c4: b9400040 ldr w0, [x2]
578c8: 120b6801 and w1, w0, #0xffe0ffff
578cc: b9414be0 ldr w0, [sp, #328]
578d0: 2a004020 orr w0, w1, w0, lsl #16
578d4: b9000040 str w0, [x2]
578d8: b940a7e2 ldr w2, [sp, #164]
578dc: 35000042 cbnz w2, 578e4 <prepare_ddr_timing+0x778>
578e0: 0b0300a2 add w2, w5, w3
578e4: 5155fec0 sub w0, w22, #0x57f, lsl #12
578e8: b94093e5 ldr w5, [sp, #144]
578ec: 513d4000 sub w0, w0, #0xf50
578f0: b9400001 ldr w1, [x0]
578f4: 12185c21 and w1, w1, #0xffffff00
578f8: 2a020021 orr w1, w1, w2
578fc: b9000001 str w1, [x0]
57900: 5155fec1 sub w1, w22, #0x57f, lsl #12
57904: b940e3e2 ldr w2, [sp, #224]
57908: 513d3021 sub w1, w1, #0xf4c
5790c: b9400020 ldr w0, [x1]
57910: 12185c00 and w0, w0, #0xffffff00
57914: 2a030000 orr w0, w0, w3
57918: b9000020 str w0, [x1]
5791c: b940cfe1 ldr w1, [sp, #204]
57920: 510020a0 sub w0, w5, #0x8
57924: 5155fec3 sub w3, w22, #0x57f, lsl #12
57928: 513c2063 sub w3, w3, #0xf08
5792c: 2a004020 orr w0, w1, w0, lsl #16
57930: 5155fec1 sub w1, w22, #0x57f, lsl #12
57934: 513d0021 sub w1, w1, #0xf40
57938: b9000020 str w0, [x1]
5793c: 5155fec1 sub w1, w22, #0x57f, lsl #12
57940: 513cc021 sub w1, w1, #0xf30
57944: b9400020 ldr w0, [x1]
57948: 12103c00 and w0, w0, #0xffff0000
5794c: 2a020000 orr w0, w0, w2
57950: 5155fec2 sub w2, w22, #0x57f, lsl #12
57954: 513cb042 sub w2, w2, #0xf2c
57958: b9000020 str w0, [x1]
5795c: b9400040 ldr w0, [x2]
57960: 12003c01 and w1, w0, #0xffff
57964: b940e7e0 ldr w0, [sp, #228]
57968: 2a004020 orr w0, w1, w0, lsl #16
5796c: 5155fec1 sub w1, w22, #0x57f, lsl #12
57970: 513c9021 sub w1, w1, #0xf24
57974: b9000040 str w0, [x2]
57978: b9400020 ldr w0, [x1]
5797c: 12046c02 and w2, w0, #0xf0ffffff
57980: b94197e0 ldr w0, [sp, #404]
57984: 2a006040 orr w0, w2, w0, lsl #24
57988: b9000020 str w0, [x1]
5798c: b9410fe2 ldr w2, [sp, #268]
57990: b9400020 ldr w0, [x1]
57994: 12185c00 and w0, w0, #0xffffff00
57998: 2a020000 orr w0, w0, w2
5799c: b9000020 str w0, [x1]
579a0: b941a7e0 ldr w0, [sp, #420]
579a4: b9419be2 ldr w2, [sp, #408]
579a8: 53103c01 lsl w1, w0, #16
579ac: b941b3e0 ldr w0, [sp, #432]
579b0: 2a006020 orr w0, w1, w0, lsl #24
579b4: b941a3e1 ldr w1, [sp, #416]
579b8: 2a012041 orr w1, w2, w1, lsl #8
579bc: 2a010000 orr w0, w0, w1
579c0: 5155fec1 sub w1, w22, #0x57f, lsl #12
579c4: 513c8021 sub w1, w1, #0xf20
579c8: b9000020 str w0, [x1]
579cc: 5155fec1 sub w1, w22, #0x57f, lsl #12
579d0: 513c4021 sub w1, w1, #0xf10
579d4: b9400020 ldr w0, [x1]
579d8: 12103c00 and w0, w0, #0xffff0000
579dc: 2a070007 orr w7, w0, w7
579e0: b941d7e0 ldr w0, [sp, #468]
579e4: b9000027 str w7, [x1]
579e8: 53103c02 lsl w2, w0, #16
579ec: b941d3e0 ldr w0, [sp, #464]
579f0: b9400061 ldr w1, [x3]
579f4: 2a006040 orr w0, w2, w0, lsl #24
579f8: 12003c21 and w1, w1, #0xffff
579fc: 2a010000 orr w0, w0, w1
57a00: b9000060 str w0, [x3]
57a04: b9418be0 ldr w0, [sp, #392]
57a08: 53103c01 lsl w1, w0, #16
57a0c: b941dbe0 ldr w0, [sp, #472]
57a10: 2a006020 orr w0, w1, w0, lsl #24
57a14: b9418fe1 ldr w1, [sp, #396]
57a18: b941dfe2 ldr w2, [sp, #476]
57a1c: b9419fe3 ldr w3, [sp, #412]
57a20: b94157e7 ldr w7, [sp, #340]
57a24: 2a012041 orr w1, w2, w1, lsl #8
57a28: 5155fec2 sub w2, w22, #0x57f, lsl #12
57a2c: 2a010000 orr w0, w0, w1
57a30: 5155fec1 sub w1, w22, #0x57f, lsl #12
57a34: 513c1021 sub w1, w1, #0xf04
57a38: 513c0042 sub w2, w2, #0xf00
57a3c: b9415bea ldr w10, [sp, #344]
57a40: b9415fe9 ldr w9, [sp, #348]
57a44: b9000020 str w0, [x1]
57a48: b94193e0 ldr w0, [sp, #400]
57a4c: b9400041 ldr w1, [x2]
57a50: 2a002060 orr w0, w3, w0, lsl #8
57a54: 12144c21 and w1, w1, #0xfffff000
57a58: 2a010000 orr w0, w0, w1
57a5c: b9000040 str w0, [x2]
57a60: b940f7e0 ldr w0, [sp, #244]
57a64: 5155fec3 sub w3, w22, #0x57f, lsl #12
57a68: 513a4063 sub w3, w3, #0xe90
57a6c: 53185c02 lsl w2, w0, #8
57a70: b940fbe0 ldr w0, [sp, #248]
57a74: b9400061 ldr w1, [x3]
57a78: 2a004040 orr w0, w2, w0, lsl #16
57a7c: 5155fec2 sub w2, w22, #0x57f, lsl #12
57a80: 51394042 sub w2, w2, #0xe50
57a84: 12083c21 and w1, w1, #0xff0000ff
57a88: 2a010000 orr w0, w0, w1
57a8c: b9000060 str w0, [x3]
57a90: b9400041 ldr w1, [x2]
57a94: b9404a60 ldr w0, [x19, #72]
57a98: 12077821 and w1, w1, #0xfeffffff
57a9c: 2a006020 orr w0, w1, w0, lsl #24
57aa0: b9000040 str w0, [x2]
57aa4: 5155fec2 sub w2, w22, #0x57f, lsl #12
57aa8: 51386042 sub w2, w2, #0xe18
57aac: b9400040 ldr w0, [x2]
57ab0: 12065401 and w1, w0, #0xfc00ffff
57ab4: b941bfe0 ldr w0, [sp, #444]
57ab8: 2a004020 orr w0, w1, w0, lsl #16
57abc: b941c3e1 ldr w1, [sp, #448]
57ac0: b9000040 str w0, [x2]
57ac4: b941c7e0 ldr w0, [sp, #452]
57ac8: 2a004020 orr w0, w1, w0, lsl #16
57acc: 5155fec1 sub w1, w22, #0x57f, lsl #12
57ad0: 51385021 sub w1, w1, #0xe14
57ad4: b9000020 str w0, [x1]
57ad8: b941cfe0 ldr w0, [sp, #460]
57adc: 53185c01 lsl w1, w0, #8
57ae0: b941b7e0 ldr w0, [sp, #436]
57ae4: 2a004020 orr w0, w1, w0, lsl #16
57ae8: b941cbe1 ldr w1, [sp, #456]
57aec: 2a010000 orr w0, w0, w1
57af0: 5155fec1 sub w1, w22, #0x57f, lsl #12
57af4: 51384021 sub w1, w1, #0xe10
57af8: b9000020 str w0, [x1]
57afc: 5155fec1 sub w1, w22, #0x57f, lsl #12
57b00: b94153e0 ldr w0, [sp, #336]
57b04: 5137a021 sub w1, w1, #0xde8
57b08: 2a074007 orr w7, w0, w7, lsl #16
57b0c: 5155fec0 sub w0, w22, #0x57f, lsl #12
57b10: 5137b000 sub w0, w0, #0xdec
57b14: b9000007 str w7, [x0]
57b18: b9400020 ldr w0, [x1]
57b1c: 12103c00 and w0, w0, #0xffff0000
57b20: 2a0a0000 orr w0, w0, w10
57b24: b9000020 str w0, [x1]
57b28: 5155fec0 sub w0, w22, #0x57f, lsl #12
57b2c: 51376000 sub w0, w0, #0xdd8
57b30: b9400002 ldr w2, [x0]
57b34: 12103c42 and w2, w2, #0xffff0000
57b38: 2a090042 orr w2, w2, w9
57b3c: b9000002 str w2, [x0]
57b40: 5155fec0 sub w0, w22, #0x57f, lsl #12
57b44: b94163e3 ldr w3, [sp, #352]
57b48: 51375000 sub w0, w0, #0xdd4
57b4c: b9400002 ldr w2, [x0]
57b50: 12005c42 and w2, w2, #0xffffff
57b54: 2a036042 orr w2, w2, w3, lsl #24
57b58: b9000002 str w2, [x0]
57b5c: 5155fec0 sub w0, w22, #0x57f, lsl #12
57b60: 5136d000 sub w0, w0, #0xdb4
57b64: b9000007 str w7, [x0]
57b68: 5155fec0 sub w0, w22, #0x57f, lsl #12
57b6c: 5136c000 sub w0, w0, #0xdb0
57b70: b9400001 ldr w1, [x0]
57b74: 12103c21 and w1, w1, #0xffff0000
57b78: 2a0a0021 orr w1, w1, w10
57b7c: b9000001 str w1, [x0]
57b80: 5155fec1 sub w1, w22, #0x57f, lsl #12
57b84: 51368021 sub w1, w1, #0xda0
57b88: b9400020 ldr w0, [x1]
57b8c: 12103c00 and w0, w0, #0xffff0000
57b90: 2a090000 orr w0, w0, w9
57b94: b9000020 str w0, [x1]
57b98: 5155fec1 sub w1, w22, #0x57f, lsl #12
57b9c: 51367021 sub w1, w1, #0xd9c
57ba0: b9400020 ldr w0, [x1]
57ba4: 12005c00 and w0, w0, #0xffffff
57ba8: 2a036003 orr w3, w0, w3, lsl #24
57bac: b9000023 str w3, [x1]
57bb0: b9403660 ldr w0, [x19, #52]
57bb4: 71001c1f cmp w0, #0x7
57bb8: 54000501 b.ne 57c58 <prepare_ddr_timing+0xaec> // b.any
57bbc: 5155fec1 sub w1, w22, #0x57f, lsl #12
57bc0: b94167e3 ldr w3, [sp, #356]
57bc4: 51374021 sub w1, w1, #0xdd0
57bc8: b9416fe2 ldr w2, [sp, #364]
57bcc: 5155fec7 sub w7, w22, #0x57f, lsl #12
57bd0: 5136f0e7 sub w7, w7, #0xdbc
57bd4: b9400020 ldr w0, [x1]
57bd8: 12003c00 and w0, w0, #0xffff
57bdc: 2a034000 orr w0, w0, w3, lsl #16
57be0: b9000020 str w0, [x1]
57be4: 5155fec1 sub w1, w22, #0x57f, lsl #12
57be8: 51372021 sub w1, w1, #0xdc8
57bec: b9400020 ldr w0, [x1]
57bf0: 12003c00 and w0, w0, #0xffff
57bf4: 2a024000 orr w0, w0, w2, lsl #16
57bf8: b9000020 str w0, [x1]
57bfc: b9417fe1 ldr w1, [sp, #380]
57c00: b94000e0 ldr w0, [x7]
57c04: 12003c00 and w0, w0, #0xffff
57c08: 2a014000 orr w0, w0, w1, lsl #16
57c0c: b90000e0 str w0, [x7]
57c10: 5155fec7 sub w7, w22, #0x57f, lsl #12
57c14: 513660e7 sub w7, w7, #0xd98
57c18: b94000e0 ldr w0, [x7]
57c1c: 12003c00 and w0, w0, #0xffff
57c20: 2a034003 orr w3, w0, w3, lsl #16
57c24: b90000e3 str w3, [x7]
57c28: 5155fec3 sub w3, w22, #0x57f, lsl #12
57c2c: 51364063 sub w3, w3, #0xd90
57c30: b9400060 ldr w0, [x3]
57c34: 12003c00 and w0, w0, #0xffff
57c38: 2a024002 orr w2, w0, w2, lsl #16
57c3c: b9000062 str w2, [x3]
57c40: 5155fec2 sub w2, w22, #0x57f, lsl #12
57c44: 51361042 sub w2, w2, #0xd84
57c48: b9400040 ldr w0, [x2]
57c4c: 12003c00 and w0, w0, #0xffff
57c50: 2a014001 orr w1, w0, w1, lsl #16
57c54: b9000041 str w1, [x2]
57c58: 5155fec1 sub w1, w22, #0x57f, lsl #12
57c5c: 5155fec2 sub w2, w22, #0x57f, lsl #12
57c60: 5134d021 sub w1, w1, #0xd34
57c64: 5132c042 sub w2, w2, #0xcb0
57c68: b9400020 ldr w0, [x1]
57c6c: 120c4c00 and w0, w0, #0xfff000ff
57c70: 2a062000 orr w0, w0, w6, lsl #8
57c74: b9000020 str w0, [x1]
57c78: b9411be0 ldr w0, [sp, #280]
57c7c: 53017cc6 lsr w6, w6, #1
57c80: b941abe1 ldr w1, [sp, #424]
57c84: 2a0040c6 orr w6, w6, w0, lsl #16
57c88: 5155fec0 sub w0, w22, #0x57f, lsl #12
57c8c: 5134c000 sub w0, w0, #0xd30
57c90: b9000006 str w6, [x0]
57c94: b941afe0 ldr w0, [sp, #428]
57c98: 2a004020 orr w0, w1, w0, lsl #16
57c9c: 5155fec1 sub w1, w22, #0x57f, lsl #12
57ca0: 5134b021 sub w1, w1, #0xd2c
57ca4: b9000020 str w0, [x1]
57ca8: b9400040 ldr w0, [x2]
57cac: 12105c01 and w1, w0, #0xffff00ff
57cb0: b94113e0 ldr w0, [sp, #272]
57cb4: 2a002020 orr w0, w1, w0, lsl #8
57cb8: b9000040 str w0, [x2]
57cbc: 5155fec0 sub w0, w22, #0x57f, lsl #12
57cc0: b9404e61 ldr w1, [x19, #76]
57cc4: 5132b000 sub w0, w0, #0xcac
57cc8: 34001de1 cbz w1, 58084 <prepare_ddr_timing+0xf18>
57ccc: b9400001 ldr w1, [x0]
57cd0: 32100021 orr w1, w1, #0x10000
57cd4: b9000001 str w1, [x0]
57cd8: 52a10001 mov w1, #0x8000000 // #134217728
57cdc: b9403a60 ldr w0, [x19, #56]
57ce0: 7106401f cmp w0, #0x190
57ce4: 52a08000 mov w0, #0x4000000 // #67108864
57ce8: 1a813001 csel w1, w0, w1, cc // cc = lo, ul, last
57cec: 5155fec2 sub w2, w22, #0x57f, lsl #12
57cf0: 5155fec3 sub w3, w22, #0x57f, lsl #12
57cf4: 51328042 sub w2, w2, #0xca0
57cf8: 51323063 sub w3, w3, #0xc8c
57cfc: b9400040 ldr w0, [x2]
57d00: 12036800 and w0, w0, #0xe0ffffff
57d04: 2a010000 orr w0, w0, w1
57d08: b9000040 str w0, [x2]
57d0c: b940d7e0 ldr w0, [sp, #212]
57d10: b9400061 ldr w1, [x3]
57d14: 53185c02 lsl w2, w0, #8
57d18: b940d3e0 ldr w0, [sp, #208]
57d1c: 2a004040 orr w0, w2, w0, lsl #16
57d20: 529e1fe2 mov w2, #0xf0ff // #61695
57d24: 72bfff82 movk w2, #0xfffc, lsl #16
57d28: 0a020021 and w1, w1, w2
57d2c: 2a010000 orr w0, w0, w1
57d30: b9000060 str w0, [x3]
57d34: 2a0803e1 mov w1, w8
57d38: b9403667 ldr w7, [x19, #52]
57d3c: 2a0703e0 mov w0, w7
57d40: 97fffc20 bl 56dc0 <get_wrlat_adj>
57d44: 2a0003e6 mov w6, w0
57d48: 2a0403e1 mov w1, w4
57d4c: 2a0703e0 mov w0, w7
57d50: 97fffc02 bl 56d58 <get_rdlat_adj>
57d54: 5155fec2 sub w2, w22, #0x57f, lsl #12
57d58: 512e4042 sub w2, w2, #0xb90
57d5c: b9400041 ldr w1, [x2]
57d60: 12103c21 and w1, w1, #0xffff0000
57d64: 2a000021 orr w1, w1, w0
57d68: 2a062026 orr w6, w1, w6, lsl #8
57d6c: 5155fec1 sub w1, w22, #0x57f, lsl #12
57d70: 513ae021 sub w1, w1, #0xeb8
57d74: b9000046 str w6, [x2]
57d78: b9400020 ldr w0, [x1]
57d7c: 12003c00 and w0, w0, #0xffff
57d80: 2a054800 orr w0, w0, w5, lsl #18
57d84: b9000020 str w0, [x1]
57d88: 5155fec1 sub w1, w22, #0x57f, lsl #12
57d8c: 531f38a5 ubfiz w5, w5, #1, #15
57d90: 513ad021 sub w1, w1, #0xeb4
57d94: b9400020 ldr w0, [x1]
57d98: 12103c00 and w0, w0, #0xffff0000
57d9c: 2a0000a5 orr w5, w5, w0
57da0: b9000025 str w5, [x1]
57da4: b9403661 ldr w1, [x19, #52]
57da8: 51001820 sub w0, w1, #0x6
57dac: 7100041f cmp w0, #0x1
57db0: 54001788 b.hi 580a0 <prepare_ddr_timing+0xf34> // b.pmore
57db4: 7100183f cmp w1, #0x6
57db8: 54001701 b.ne 58098 <prepare_ddr_timing+0xf2c> // b.any
57dbc: 910793e0 add x0, sp, #0x1e4
57dc0: 97fffc7c bl 56fb0 <get_pi_wrlat.isra.0.part.0>
57dc4: 2a0003e3 mov w3, w0
57dc8: b94073e0 ldr w0, [sp, #112]
57dcc: 97fffc9c bl 5703c <get_pi_todtoff_max.isra.0>
57dd0: 4b000061 sub w1, w3, w0
57dd4: 6b03001f cmp w0, w3
57dd8: 1a9f3020 csel w0, w1, wzr, cc // cc = lo, ul, last
57ddc: 5155fec2 sub w2, w22, #0x57f, lsl #12
57de0: 5132a042 sub w2, w2, #0xca8
57de4: b9400041 ldr w1, [x2]
57de8: 33101401 bfi w1, w0, #16, #6
57dec: b9000041 str w1, [x2]
57df0: b9403663 ldr w3, [x19, #52]
57df4: 51001860 sub w0, w3, #0x6
57df8: 7100041f cmp w0, #0x1
57dfc: 54001568 b.hi 580a8 <prepare_ddr_timing+0xf3c> // b.pmore
57e00: b94073e5 ldr w5, [sp, #112]
57e04: 2a0303e1 mov w1, w3
57e08: 2a0503e0 mov w0, w5
57e0c: 97fffc7d bl 57000 <get_pi_todtoff_min.isra.0>
57e10: 51000484 sub w4, w4, #0x1
57e14: 0b000084 add w4, w4, w0
57e18: 2a0303e1 mov w1, w3
57e1c: 2a0503e0 mov w0, w5
57e20: 97fffc87 bl 5703c <get_pi_todtoff_max.isra.0>
57e24: 6b000081 subs w1, w4, w0
57e28: 1a9f8021 csel w1, w1, wzr, hi // hi = pmore
57e2c: 5155fec2 sub w2, w22, #0x57f, lsl #12
57e30: 51329042 sub w2, w2, #0xca4
57e34: b9400040 ldr w0, [x2]
57e38: 33181420 bfi w0, w1, #8, #6
57e3c: b9000040 str w0, [x2]
57e40: 9101c3e0 add x0, sp, #0x70
57e44: b9403661 ldr w1, [x19, #52]
57e48: 97fffc89 bl 5706c <get_pi_tdfi_phy_rdlat.isra.0>
57e4c: 5155fec2 sub w2, w22, #0x57f, lsl #12
57e50: 512ed042 sub w2, w2, #0xbb4
57e54: b9400041 ldr w1, [x2]
57e58: 33101c01 bfi w1, w0, #16, #8
57e5c: 5155fec0 sub w0, w22, #0x57f, lsl #12
57e60: 512eb000 sub w0, w0, #0xbac
57e64: b9000041 str w1, [x2]
57e68: b94093e2 ldr w2, [sp, #144]
57e6c: b9400001 ldr w1, [x0]
57e70: 531f3843 ubfiz w3, w2, #1, #15
57e74: 12103c21 and w1, w1, #0xffff0000
57e78: 2a030021 orr w1, w1, w3
57e7c: b9000001 str w1, [x0]
57e80: 5155fec1 sub w1, w22, #0x57f, lsl #12
57e84: 512e6021 sub w1, w1, #0xb98
57e88: b9400020 ldr w0, [x1]
57e8c: 12103c00 and w0, w0, #0xffff0000
57e90: 2a030000 orr w0, w0, w3
57e94: b9000020 str w0, [x1]
57e98: 52800280 mov w0, #0x14 // #20
57e9c: 52884801 mov w1, #0x4240 // #16960
57ea0: 72a001e1 movk w1, #0xf, lsl #16
57ea4: 1b007c42 mul w2, w2, w0
57ea8: 5155fec0 sub w0, w22, #0x57f, lsl #12
57eac: 512e5000 sub w0, w0, #0xb94
57eb0: b9000002 str w2, [x0]
57eb4: 5289c402 mov w2, #0x4e20 // #20000
57eb8: b94073e0 ldr w0, [sp, #112]
57ebc: 1ac00821 udiv w1, w1, w0
57ec0: 1ac10840 udiv w0, w2, w1
57ec4: 1b018801 msub w1, w0, w1, w2
57ec8: 7100003f cmp w1, #0x0
57ecc: 1a800400 cinc w0, w0, ne // ne = any
57ed0: 11000400 add w0, w0, #0x1
57ed4: 12000001 and w1, w0, #0x1
57ed8: 0b400420 add w0, w1, w0, lsr #1
57edc: 5155fec1 sub w1, w22, #0x57f, lsl #12
57ee0: 512cc021 sub w1, w1, #0xb30
57ee4: 11001402 add w2, w0, #0x5
57ee8: 11005c00 add w0, w0, #0x17
57eec: b9400023 ldr w3, [x1]
57ef0: 12065463 and w3, w3, #0xfc00ffff
57ef4: 2a024062 orr w2, w3, w2, lsl #16
57ef8: b9000022 str w2, [x1]
57efc: b9400022 ldr w2, [x1]
57f00: 12165442 and w2, w2, #0xfffffc00
57f04: 2a020000 orr w0, w0, w2
57f08: b9000020 str w0, [x1]
57f0c: 9101c3e0 add x0, sp, #0x70
57f10: 97fffc89 bl 57134 <get_pi_wrlat_adj.constprop.0>
57f14: b9403a61 ldr w1, [x19, #56]
57f18: 710e803f cmp w1, #0x3a0
57f1c: 54000ca8 b.hi 580b0 <prepare_ddr_timing+0xf44> // b.pmore
57f20: 340000a0 cbz w0, 57f34 <prepare_ddr_timing+0xdc8>
57f24: 51000401 sub w1, w0, #0x1
57f28: 51001402 sub w2, w0, #0x5
57f2c: 7100101f cmp w0, #0x4
57f30: 1a818040 csel w0, w2, w1, hi // hi = pmore
57f34: 5155fec2 sub w2, w22, #0x57f, lsl #12
57f38: 512c6042 sub w2, w2, #0xb18
57f3c: b9400041 ldr w1, [x2]
57f40: 12105c21 and w1, w1, #0xffff00ff
57f44: 2a002020 orr w0, w1, w0, lsl #8
57f48: b9000040 str w0, [x2]
57f4c: b941e7e0 ldr w0, [sp, #484]
57f50: b9403a61 ldr w1, [x19, #56]
57f54: 710e803f cmp w1, #0x3a0
57f58: 54000b08 b.hi 580b8 <prepare_ddr_timing+0xf4c> // b.pmore
57f5c: 7100101f cmp w0, #0x4
57f60: 54000ac9 b.ls 580b8 <prepare_ddr_timing+0xf4c> // b.plast
57f64: 51001400 sub w0, w0, #0x5
57f68: b9400041 ldr w1, [x2]
57f6c: 110006f7 add w23, w23, #0x1
57f70: 114022d6 add w22, w22, #0x8, lsl #12
57f74: 12185c21 and w1, w1, #0xffffff00
57f78: 2a000020 orr w0, w1, w0
57f7c: b9000040 str w0, [x2]
57f80: b9403e60 ldr w0, [x19, #60]
57f84: 6b0002ff cmp w23, w0
57f88: 54ffbac3 b.cc 576e0 <prepare_ddr_timing+0x574> // b.lo, b.ul, b.last
57f8c: 52813a16 mov w22, #0x9d0 // #2512
57f90: 52884819 mov w25, #0x4240 // #16960
57f94: 910793f8 add x24, sp, #0x1e4
57f98: 52800017 mov w23, #0x0 // #0
57f9c: 72bff516 movk w22, #0xffa8, lsl #16
57fa0: 72a001f9 movk w25, #0xf, lsl #16
57fa4: b9403e60 ldr w0, [x19, #60]
57fa8: 6b0002ff cmp w23, w0
57fac: 540055a3 b.cc 58a60 <prepare_ddr_timing+0x18f4> // b.lo, b.ul, b.last
57fb0: b94073e4 ldr w4, [sp, #112]
57fb4: 53185e80 lsl w0, w20, #8
57fb8: b90067e0 str w0, [sp, #100]
57fbc: 52800500 mov w0, #0x28 // #40
57fc0: 7104109f cmp w4, #0x104
57fc4: b941e7ee ldr w14, [sp, #484]
57fc8: 52800185 mov w5, #0xc // #12
57fcc: 1a9f90a5 csel w5, w5, wzr, ls // ls = plast
57fd0: 1ac00880 udiv w0, w4, w0
57fd4: 5288480a mov w10, #0x4240 // #16960
57fd8: 5284c511 mov w17, #0x2628 // #9768
57fdc: 52842812 mov w18, #0x2140 // #8512
57fe0: 5284681e mov w30, #0x2340 // #9024
57fe4: 5284a816 mov w22, #0x2540 // #9536
57fe8: 5284e817 mov w23, #0x2740 // #10048
57fec: 52840498 mov w24, #0x2024 // #8228
57ff0: b9006be0 str w0, [sp, #104]
57ff4: f00000a0 adrp x0, 6e000 <iomux_status+0x2c>
57ff8: 52844499 mov w25, #0x2224 // #8740
57ffc: 53185ca9 lsl w9, w5, #8
58000: b94ba400 ldr w0, [x0, #2980]
58004: 510009cf sub w15, w14, #0x2
58008: 53103ca5 lsl w5, w5, #16
5800c: 52800001 mov w1, #0x0 // #0
58010: 52800008 mov w8, #0x0 // #0
58014: 72a001ea movk w10, #0xf, lsl #16
58018: 72bff511 movk w17, #0xffa8, lsl #16
5801c: 72bff512 movk w18, #0xffa8, lsl #16
58020: 72bff51e movk w30, #0xffa8, lsl #16
58024: 72bff516 movk w22, #0xffa8, lsl #16
58028: 72bff517 movk w23, #0xffa8, lsl #16
5802c: 72bff518 movk w24, #0xffa8, lsl #16
58030: 72bff519 movk w25, #0xffa8, lsl #16
58034: b9006fe0 str w0, [sp, #108]
58038: 14000532 b 59500 <prepare_ddr_timing+0x2394>
5803c: b94077e3 ldr w3, [sp, #116]
58040: 2a012021 orr w1, w1, w1, lsl #8
58044: 53103c82 lsl w2, w4, #16
58048: 71001d7f cmp w11, #0x7
5804c: 54000121 b.ne 58070 <prepare_ddr_timing+0xf04> // b.any
58050: 0b080063 add w3, w3, w8
58054: b9000143 str w3, [x10]
58058: b9000121 str w1, [x9]
5805c: b94000a1 ldr w1, [x5]
58060: 12003c21 and w1, w1, #0xffff
58064: 2a020021 orr w1, w1, w2
58068: b90000a1 str w1, [x5]
5806c: 17fffdc2 b 57774 <prepare_ddr_timing+0x608>
58070: b9000143 str w3, [x10]
58074: 0b1b02c3 add w3, w22, w27
58078: b94083e4 ldr w4, [sp, #128]
5807c: b9000064 str w4, [x3]
58080: 17fffff6 b 58058 <prepare_ddr_timing+0xeec>
58084: b9400001 ldr w1, [x0]
58088: 120f7821 and w1, w1, #0xfffeffff
5808c: b9000001 str w1, [x0]
58090: 52a04001 mov w1, #0x2000000 // #33554432
58094: 17ffff16 b 57cec <prepare_ddr_timing+0xb80>
58098: 52800023 mov w3, #0x1 // #1
5809c: 17ffff4b b 57dc8 <prepare_ddr_timing+0xc5c>
580a0: 52800000 mov w0, #0x0 // #0
580a4: 17ffff4e b 57ddc <prepare_ddr_timing+0xc70>
580a8: 4b080081 sub w1, w4, w8
580ac: 17ffff60 b 57e2c <prepare_ddr_timing+0xcc0>
580b0: 51000800 sub w0, w0, #0x2
580b4: 17ffffa0 b 57f34 <prepare_ddr_timing+0xdc8>
580b8: 51000800 sub w0, w0, #0x2
580bc: 17ffffab b 57f68 <prepare_ddr_timing+0xdfc>
580c0: 52800298 mov w24, #0x14 // #20
580c4: 52801019 mov w25, #0x80 // #128
580c8: 52801d9a mov w26, #0xec // #236
580cc: 5280039b mov w27, #0x1c // #28
580d0: 5295cd5c mov w28, #0xae6a // #44650
580d4: 72bff518 movk w24, #0xffa8, lsl #16
580d8: 72bff519 movk w25, #0xffa8, lsl #16
580dc: 72bff51a movk w26, #0xffa8, lsl #16
580e0: 72bff51b movk w27, #0xffa8, lsl #16
580e4: 72a0015c movk w28, #0xa, lsl #16
580e8: 17ffffa6 b 57f80 <prepare_ddr_timing+0xe14>
580ec: b940abe8 ldr w8, [sp, #168]
580f0: 0b1802ca add w10, w22, w24
580f4: b94107e0 ldr w0, [sp, #260]
580f8: 0b1902c7 add w7, w22, w25
580fc: 295b1be1 ldp w1, w6, [sp, #216]
58100: 53185d08 lsl w8, w8, #8
58104: b940366d ldr w13, [x19, #52]
58108: 0b1a02c4 add w4, w22, w26
5810c: b94117e5 ldr w5, [sp, #276]
58110: 53103c0e lsl w14, w0, #16
58114: b9407fe9 ldr w9, [sp, #124]
58118: 71000dbf cmp w13, #0x3
5811c: b94097e3 ldr w3, [sp, #148]
58120: 0b0600ac add w12, w5, w6
58124: 2a00410b orr w11, w8, w0, lsl #16
58128: 54004541 b.ne 589d0 <prepare_ddr_timing+0x1864> // b.any
5812c: b9403a62 ldr w2, [x19, #56]
58130: 52807d08 mov w8, #0x3e8 // #1000
58134: 0b000400 add w0, w0, w0, lsl #1
58138: 4b030021 sub w1, w1, w3
5813c: 1b1c7c42 mul w2, w2, w28
58140: 110f9c42 add w2, w2, #0x3e7
58144: 1ac80842 udiv w2, w2, w8
58148: b94103e8 ldr w8, [sp, #256]
5814c: 0b080000 add w0, w0, w8
58150: 0b0c0000 add w0, w0, w12
58154: 0b020000 add w0, w0, w2
58158: b9000140 str w0, [x10]
5815c: 5155feca sub w10, w22, #0x57f, lsl #12
58160: 513ea14a sub w10, w10, #0xfa8
58164: b9400140 ldr w0, [x10]
58168: 12003c02 and w2, w0, #0xffff
5816c: b940ebe0 ldr w0, [sp, #232]
58170: 2a004040 orr w0, w2, w0, lsl #16
58174: b9000140 str w0, [x10]
58178: b94000e0 ldr w0, [x7]
5817c: 12001c00 and w0, w0, #0xff
58180: 2a086008 orr w8, w0, w8, lsl #24
58184: 2a0b0108 orr w8, w8, w11
58188: b90000e8 str w8, [x7]
5818c: b9400080 ldr w0, [x4]
58190: 12003c00 and w0, w0, #0xffff
58194: 2a014001 orr w1, w0, w1, lsl #16
58198: 5155fec0 sub w0, w22, #0x57f, lsl #12
5819c: b9000081 str w1, [x4]
581a0: 513f6000 sub w0, w0, #0xfd8
581a4: 5155fec7 sub w7, w22, #0x57f, lsl #12
581a8: b94087e1 ldr w1, [sp, #132]
581ac: 513e40e7 sub w7, w7, #0xf90
581b0: b941e7e4 ldr w4, [sp, #484]
581b4: b9000009 str w9, [x0]
581b8: 5155fec0 sub w0, w22, #0x57f, lsl #12
581bc: 513f4000 sub w0, w0, #0xfd0
581c0: b941ebe8 ldr w8, [sp, #488]
581c4: b9000001 str w1, [x0]
581c8: 5155fec0 sub w0, w22, #0x57f, lsl #12
581cc: 513e8000 sub w0, w0, #0xfa0
581d0: b9400001 ldr w1, [x0]
581d4: 12116021 and w1, w1, #0xffff80ff
581d8: 2a042421 orr w1, w1, w4, lsl #9
581dc: b9000001 str w1, [x0]
581e0: b9400001 ldr w1, [x0]
581e4: 120b6821 and w1, w1, #0xffe0ffff
581e8: 2a084021 orr w1, w1, w8, lsl #16
581ec: b9000001 str w1, [x0]
581f0: b9400001 ldr w1, [x0]
581f4: 12026422 and w2, w1, #0xc0ffffff
581f8: b941e3e1 ldr w1, [sp, #480]
581fc: 2a016041 orr w1, w2, w1, lsl #24
58200: b9000001 str w1, [x0]
58204: b940afe0 ldr w0, [sp, #172]
58208: b94000e1 ldr w1, [x7]
5820c: 53103c02 lsl w2, w0, #16
58210: b940c7e0 ldr w0, [sp, #196]
58214: 2a006040 orr w0, w2, w0, lsl #24
58218: 12001c22 and w2, w1, #0xff
5821c: b940b3e1 ldr w1, [sp, #176]
58220: 2a012041 orr w1, w2, w1, lsl #8
58224: 2a010000 orr w0, w0, w1
58228: b90000e0 str w0, [x7]
5822c: b9409be0 ldr w0, [sp, #152]
58230: 5155fec7 sub w7, w22, #0x57f, lsl #12
58234: 513e30e7 sub w7, w7, #0xf8c
58238: 53185c02 lsl w2, w0, #8
5823c: b940cbe0 ldr w0, [sp, #200]
58240: b94000e1 ldr w1, [x7]
58244: 2a004040 orr w0, w2, w0, lsl #16
58248: b940bbe2 ldr w2, [sp, #184]
5824c: 12081c21 and w1, w1, #0xff000000
58250: 2a020021 orr w1, w1, w2
58254: 5155fec2 sub w2, w22, #0x57f, lsl #12
58258: 2a010000 orr w0, w0, w1
5825c: b940c3e1 ldr w1, [sp, #192]
58260: b90000e0 str w0, [x7]
58264: 513dc042 sub w2, w2, #0xf70
58268: b940efe0 ldr w0, [sp, #236]
5826c: 2a006020 orr w0, w1, w0, lsl #24
58270: 5155fec1 sub w1, w22, #0x57f, lsl #12
58274: 513dd021 sub w1, w1, #0xf74
58278: b9000020 str w0, [x1]
5827c: b940f3e0 ldr w0, [sp, #240]
58280: b9400041 ldr w1, [x2]
58284: 7100001f cmp w0, #0x0
58288: 12185c21 and w1, w1, #0xffffff00
5828c: 1a9f1400 csinc w0, w0, wzr, ne // ne = any
58290: 2a010000 orr w0, w0, w1
58294: 5155fec1 sub w1, w22, #0x57f, lsl #12
58298: 513d9021 sub w1, w1, #0xf64
5829c: b9000040 str w0, [x2]
582a0: b940a3e2 ldr w2, [sp, #160]
582a4: b9400020 ldr w0, [x1]
582a8: 12005c00 and w0, w0, #0xffffff
582ac: 2a036003 orr w3, w0, w3, lsl #24
582b0: b9000023 str w3, [x1]
582b4: 5155fec1 sub w1, w22, #0x57f, lsl #12
582b8: 5155fec3 sub w3, w22, #0x57f, lsl #12
582bc: 513d8021 sub w1, w1, #0xf60
582c0: 513d6063 sub w3, w3, #0xf58
582c4: b9400020 ldr w0, [x1]
582c8: 121a6400 and w0, w0, #0xffffffc0
582cc: 2a020000 orr w0, w0, w2
582d0: b9000020 str w0, [x1]
582d4: b9400060 ldr w0, [x3]
582d8: 12036801 and w1, w0, #0xe0ffffff
582dc: b9414be0 ldr w0, [sp, #328]
582e0: 2a006020 orr w0, w1, w0, lsl #24
582e4: b9000060 str w0, [x3]
582e8: b940a7e0 ldr w0, [sp, #164]
582ec: b9409fe1 ldr w1, [sp, #156]
582f0: 35000040 cbnz w0, 582f8 <prepare_ddr_timing+0x118c>
582f4: 0b010040 add w0, w2, w1
582f8: 5155fec3 sub w3, w22, #0x57f, lsl #12
582fc: b94093e7 ldr w7, [sp, #144]
58300: 513d4063 sub w3, w3, #0xf50
58304: b9400062 ldr w2, [x3]
58308: 12105c42 and w2, w2, #0xffff00ff
5830c: 2a002040 orr w0, w2, w0, lsl #8
58310: 5155fec2 sub w2, w22, #0x57f, lsl #12
58314: 513d3042 sub w2, w2, #0xf4c
58318: b9000060 str w0, [x3]
5831c: 5155fec3 sub w3, w22, #0x57f, lsl #12
58320: 513c0063 sub w3, w3, #0xf00
58324: b9400040 ldr w0, [x2]
58328: 12105c00 and w0, w0, #0xffff00ff
5832c: 2a012001 orr w1, w0, w1, lsl #8
58330: b9000041 str w1, [x2]
58334: b940cfe1 ldr w1, [sp, #204]
58338: 510020e0 sub w0, w7, #0x8
5833c: 5155fec2 sub w2, w22, #0x57f, lsl #12
58340: 513cc042 sub w2, w2, #0xf30
58344: 2a004020 orr w0, w1, w0, lsl #16
58348: 5155fec1 sub w1, w22, #0x57f, lsl #12
5834c: 513cf021 sub w1, w1, #0xf3c
58350: b9000020 str w0, [x1]
58354: b9400040 ldr w0, [x2]
58358: 12003c01 and w1, w0, #0xffff
5835c: b940e3e0 ldr w0, [sp, #224]
58360: 2a004020 orr w0, w1, w0, lsl #16
58364: 5155fec1 sub w1, w22, #0x57f, lsl #12
58368: 513ca021 sub w1, w1, #0xf28
5836c: b9000040 str w0, [x2]
58370: b940e7e2 ldr w2, [sp, #228]
58374: b9400020 ldr w0, [x1]
58378: 12103c00 and w0, w0, #0xffff0000
5837c: 2a020000 orr w0, w0, w2
58380: 5155fec2 sub w2, w22, #0x57f, lsl #12
58384: 513c9042 sub w2, w2, #0xf24
58388: b9000020 str w0, [x1]
5838c: b9400040 ldr w0, [x2]
58390: 12105c01 and w1, w0, #0xffff00ff
58394: b9410fe0 ldr w0, [sp, #268]
58398: 2a002020 orr w0, w1, w0, lsl #8
5839c: b9000040 str w0, [x2]
583a0: b941a3e0 ldr w0, [sp, #416]
583a4: b94197e2 ldr w2, [sp, #404]
583a8: 53103c01 lsl w1, w0, #16
583ac: b941a7e0 ldr w0, [sp, #420]
583b0: 2a006020 orr w0, w1, w0, lsl #24
583b4: b9419be1 ldr w1, [sp, #408]
583b8: 2a012041 orr w1, w2, w1, lsl #8
583bc: b941b3e2 ldr w2, [sp, #432]
583c0: 2a010000 orr w0, w0, w1
583c4: 5155fec1 sub w1, w22, #0x57f, lsl #12
583c8: 513c7021 sub w1, w1, #0xf1c
583cc: b9000020 str w0, [x1]
583d0: 5155fec1 sub w1, w22, #0x57f, lsl #12
583d4: 513c6021 sub w1, w1, #0xf18
583d8: b9400020 ldr w0, [x1]
583dc: 121c6c00 and w0, w0, #0xfffffff0
583e0: 2a020000 orr w0, w0, w2
583e4: b9000020 str w0, [x1]
583e8: 5155fec1 sub w1, w22, #0x57f, lsl #12
583ec: 513c3021 sub w1, w1, #0xf0c
583f0: b9400020 ldr w0, [x1]
583f4: 12103c00 and w0, w0, #0xffff0000
583f8: 2a060006 orr w6, w0, w6
583fc: b941d7e0 ldr w0, [sp, #468]
58400: b9000026 str w6, [x1]
58404: 53103c02 lsl w2, w0, #16
58408: b941d3e0 ldr w0, [sp, #464]
5840c: b9400061 ldr w1, [x3]
58410: 2a006040 orr w0, w2, w0, lsl #24
58414: 12003c21 and w1, w1, #0xffff
58418: 2a010000 orr w0, w0, w1
5841c: b9000060 str w0, [x3]
58420: b9418be0 ldr w0, [sp, #392]
58424: 53103c01 lsl w1, w0, #16
58428: b941dbe0 ldr w0, [sp, #472]
5842c: 2a006020 orr w0, w1, w0, lsl #24
58430: b9418fe1 ldr w1, [sp, #396]
58434: b941dfe2 ldr w2, [sp, #476]
58438: b9419fe3 ldr w3, [sp, #412]
5843c: b94153e6 ldr w6, [sp, #336]
58440: 2a012041 orr w1, w2, w1, lsl #8
58444: 5155fec2 sub w2, w22, #0x57f, lsl #12
58448: 2a010000 orr w0, w0, w1
5844c: 5155fec1 sub w1, w22, #0x57f, lsl #12
58450: 513bf021 sub w1, w1, #0xefc
58454: 513be042 sub w2, w2, #0xef8
58458: b9000020 str w0, [x1]
5845c: b94193e0 ldr w0, [sp, #400]
58460: b9400041 ldr w1, [x2]
58464: 2a002060 orr w0, w3, w0, lsl #8
58468: 12144c21 and w1, w1, #0xfffff000
5846c: 2a010000 orr w0, w0, w1
58470: b9000040 str w0, [x2]
58474: 5155fec2 sub w2, w22, #0x57f, lsl #12
58478: b9415be3 ldr w3, [sp, #344]
5847c: 513a4042 sub w2, w2, #0xe90
58480: b9400040 ldr w0, [x2]
58484: 12005c01 and w1, w0, #0xffffff
58488: b940f7e0 ldr w0, [sp, #244]
5848c: 2a006020 orr w0, w1, w0, lsl #24
58490: 5155fec1 sub w1, w22, #0x57f, lsl #12
58494: 513a3021 sub w1, w1, #0xe8c
58498: b9000040 str w0, [x2]
5849c: b940fbe2 ldr w2, [sp, #248]
584a0: b9400020 ldr w0, [x1]
584a4: 12185c00 and w0, w0, #0xffffff00
584a8: 2a020000 orr w0, w0, w2
584ac: 5155fec2 sub w2, w22, #0x57f, lsl #12
584b0: 51394042 sub w2, w2, #0xe50
584b4: b9000020 str w0, [x1]
584b8: b9404a60 ldr w0, [x19, #72]
584bc: b9400041 ldr w1, [x2]
584c0: 12067821 and w1, w1, #0xfdffffff
584c4: 2a006420 orr w0, w1, w0, lsl #25
584c8: b941bfe1 ldr w1, [sp, #444]
584cc: b9000040 str w0, [x2]
584d0: b941c3e0 ldr w0, [sp, #448]
584d4: b941b7e2 ldr w2, [sp, #436]
584d8: 2a004020 orr w0, w1, w0, lsl #16
584dc: 5155fec1 sub w1, w22, #0x57f, lsl #12
584e0: 51383021 sub w1, w1, #0xe0c
584e4: b9000020 str w0, [x1]
584e8: b941cbe0 ldr w0, [sp, #456]
584ec: 53103c01 lsl w1, w0, #16
584f0: b941cfe0 ldr w0, [sp, #460]
584f4: 2a006020 orr w0, w1, w0, lsl #24
584f8: b941c7e1 ldr w1, [sp, #452]
584fc: 2a010000 orr w0, w0, w1
58500: 5155fec1 sub w1, w22, #0x57f, lsl #12
58504: 51382021 sub w1, w1, #0xe08
58508: b9000020 str w0, [x1]
5850c: 5155fec1 sub w1, w22, #0x57f, lsl #12
58510: 51381021 sub w1, w1, #0xe04
58514: b9400020 ldr w0, [x1]
58518: 12103c00 and w0, w0, #0xffff0000
5851c: 2a020000 orr w0, w0, w2
58520: b9000020 str w0, [x1]
58524: 5155fec1 sub w1, w22, #0x57f, lsl #12
58528: 5137a021 sub w1, w1, #0xde8
5852c: b9400020 ldr w0, [x1]
58530: 12003c00 and w0, w0, #0xffff
58534: 2a064000 orr w0, w0, w6, lsl #16
58538: b9000020 str w0, [x1]
5853c: b94157e0 ldr w0, [sp, #340]
58540: 5155fec1 sub w1, w22, #0x57f, lsl #12
58544: 51376021 sub w1, w1, #0xdd8
58548: 2a034003 orr w3, w0, w3, lsl #16
5854c: 5155fec0 sub w0, w22, #0x57f, lsl #12
58550: 51379000 sub w0, w0, #0xde4
58554: b9000003 str w3, [x0]
58558: b9415fe2 ldr w2, [sp, #348]
5855c: b9400020 ldr w0, [x1]
58560: b94163e9 ldr w9, [sp, #352]
58564: 12003c00 and w0, w0, #0xffff
58568: 2a024000 orr w0, w0, w2, lsl #16
5856c: b9000020 str w0, [x1]
58570: 5155fec0 sub w0, w22, #0x57f, lsl #12
58574: 51374000 sub w0, w0, #0xdd0
58578: b9400001 ldr w1, [x0]
5857c: 12185c21 and w1, w1, #0xffffff00
58580: 2a090021 orr w1, w1, w9
58584: b9000001 str w1, [x0]
58588: 5155fec0 sub w0, w22, #0x57f, lsl #12
5858c: 5136c000 sub w0, w0, #0xdb0
58590: b9400001 ldr w1, [x0]
58594: 12003c21 and w1, w1, #0xffff
58598: 2a064026 orr w6, w1, w6, lsl #16
5859c: b9000006 str w6, [x0]
585a0: 5155fec0 sub w0, w22, #0x57f, lsl #12
585a4: 5136b000 sub w0, w0, #0xdac
585a8: b9000003 str w3, [x0]
585ac: 5155fec0 sub w0, w22, #0x57f, lsl #12
585b0: 51368000 sub w0, w0, #0xda0
585b4: b9400001 ldr w1, [x0]
585b8: 12003c21 and w1, w1, #0xffff
585bc: 2a024022 orr w2, w1, w2, lsl #16
585c0: 5155fec1 sub w1, w22, #0x57f, lsl #12
585c4: 51366021 sub w1, w1, #0xd98
585c8: b9000002 str w2, [x0]
585cc: b9400020 ldr w0, [x1]
585d0: 12185c00 and w0, w0, #0xffffff00
585d4: 2a090000 orr w0, w0, w9
585d8: b9000020 str w0, [x1]
585dc: b9403660 ldr w0, [x19, #52]
585e0: 71001c1f cmp w0, #0x7
585e4: 54000501 b.ne 58684 <prepare_ddr_timing+0x1518> // b.any
585e8: 5155fec2 sub w2, w22, #0x57f, lsl #12
585ec: b94167e1 ldr w1, [sp, #356]
585f0: 51373042 sub w2, w2, #0xdcc
585f4: b9416fe9 ldr w9, [sp, #364]
585f8: b9417fe6 ldr w6, [sp, #380]
585fc: b9400040 ldr w0, [x2]
58600: 12103c00 and w0, w0, #0xffff0000
58604: 2a010000 orr w0, w0, w1
58608: b9000040 str w0, [x2]
5860c: 5155fec2 sub w2, w22, #0x57f, lsl #12
58610: 51371042 sub w2, w2, #0xdc4
58614: b9400040 ldr w0, [x2]
58618: 12103c00 and w0, w0, #0xffff0000
5861c: 2a090000 orr w0, w0, w9
58620: b9000040 str w0, [x2]
58624: 5155fec0 sub w0, w22, #0x57f, lsl #12
58628: 5136e000 sub w0, w0, #0xdb8
5862c: b9400003 ldr w3, [x0]
58630: 12103c63 and w3, w3, #0xffff0000
58634: 2a060063 orr w3, w3, w6
58638: b9000003 str w3, [x0]
5863c: 5155fec0 sub w0, w22, #0x57f, lsl #12
58640: 51365000 sub w0, w0, #0xd94
58644: b9400002 ldr w2, [x0]
58648: 12103c42 and w2, w2, #0xffff0000
5864c: 2a010042 orr w2, w2, w1
58650: b9000002 str w2, [x0]
58654: 5155fec0 sub w0, w22, #0x57f, lsl #12
58658: 51363000 sub w0, w0, #0xd8c
5865c: b9400001 ldr w1, [x0]
58660: 12103c21 and w1, w1, #0xffff0000
58664: 2a090021 orr w1, w1, w9
58668: b9000001 str w1, [x0]
5866c: 5155fec1 sub w1, w22, #0x57f, lsl #12
58670: 51360021 sub w1, w1, #0xd80
58674: b9400020 ldr w0, [x1]
58678: 12103c00 and w0, w0, #0xffff0000
5867c: 2a060000 orr w0, w0, w6
58680: b9000020 str w0, [x1]
58684: 53017ca0 lsr w0, w5, #1
58688: b9411be1 ldr w1, [sp, #280]
5868c: b941afe2 ldr w2, [sp, #428]
58690: 2a0040a5 orr w5, w5, w0, lsl #16
58694: 5155fec0 sub w0, w22, #0x57f, lsl #12
58698: 5134a000 sub w0, w0, #0xd28
5869c: b9000005 str w5, [x0]
586a0: b941abe0 ldr w0, [sp, #424]
586a4: 2a004020 orr w0, w1, w0, lsl #16
586a8: 5155fec1 sub w1, w22, #0x57f, lsl #12
586ac: 51349021 sub w1, w1, #0xd24
586b0: b9000020 str w0, [x1]
586b4: 5155fec1 sub w1, w22, #0x57f, lsl #12
586b8: 51348021 sub w1, w1, #0xd20
586bc: b9400020 ldr w0, [x1]
586c0: 121a6400 and w0, w0, #0xffffffc0
586c4: 2a020000 orr w0, w0, w2
586c8: b9000020 str w0, [x1]
586cc: 5155fec1 sub w1, w22, #0x57f, lsl #12
586d0: b94123e2 ldr w2, [sp, #288]
586d4: 51344021 sub w1, w1, #0xd10
586d8: b9400020 ldr w0, [x1]
586dc: 12144c00 and w0, w0, #0xfffff000
586e0: 2a020000 orr w0, w0, w2
586e4: 5155fec2 sub w2, w22, #0x57f, lsl #12
586e8: 5132c042 sub w2, w2, #0xcb0
586ec: b9000020 str w0, [x1]
586f0: b9400040 ldr w0, [x2]
586f4: 12085c01 and w1, w0, #0xff00ffff
586f8: b94113e0 ldr w0, [sp, #272]
586fc: 2a004020 orr w0, w1, w0, lsl #16
58700: b9000040 str w0, [x2]
58704: 5155fec0 sub w0, w22, #0x57f, lsl #12
58708: b9404e61 ldr w1, [x19, #76]
5870c: 5132b000 sub w0, w0, #0xcac
58710: 340018a1 cbz w1, 58a24 <prepare_ddr_timing+0x18b8>
58714: b9400001 ldr w1, [x0]
58718: 32080021 orr w1, w1, #0x1000000
5871c: b9000001 str w1, [x0]
58720: 52a10001 mov w1, #0x8000000 // #134217728
58724: b9403a60 ldr w0, [x19, #56]
58728: 7106401f cmp w0, #0x190
5872c: 52a08000 mov w0, #0x4000000 // #67108864
58730: 1a813001 csel w1, w0, w1, cc // cc = lo, ul, last
58734: 5155fec2 sub w2, w22, #0x57f, lsl #12
58738: 51327042 sub w2, w2, #0xc9c
5873c: b9400040 ldr w0, [x2]
58740: 12036800 and w0, w0, #0xe0ffffff
58744: 2a010000 orr w0, w0, w1
58748: b9000040 str w0, [x2]
5874c: 5155fec2 sub w2, w22, #0x57f, lsl #12
58750: 51323042 sub w2, w2, #0xc8c
58754: b9400040 ldr w0, [x2]
58758: 12046c01 and w1, w0, #0xf0ffffff
5875c: b940d7e0 ldr w0, [sp, #212]
58760: 2a006020 orr w0, w1, w0, lsl #24
58764: 5155fec1 sub w1, w22, #0x57f, lsl #12
58768: 51322021 sub w1, w1, #0xc88
5876c: b9000040 str w0, [x2]
58770: b940d3e2 ldr w2, [sp, #208]
58774: b9400020 ldr w0, [x1]
58778: 121e7400 and w0, w0, #0xfffffffc
5877c: 2a020000 orr w0, w0, w2
58780: b9000020 str w0, [x1]
58784: 2a0803e1 mov w1, w8
58788: b9403666 ldr w6, [x19, #52]
5878c: 2a0603e0 mov w0, w6
58790: 97fff98c bl 56dc0 <get_wrlat_adj>
58794: 2a0003e5 mov w5, w0
58798: 2a0403e1 mov w1, w4
5879c: 2a0603e0 mov w0, w6
587a0: 97fff96e bl 56d58 <get_rdlat_adj>
587a4: 5155fec2 sub w2, w22, #0x57f, lsl #12
587a8: 512dd042 sub w2, w2, #0xb74
587ac: b9400041 ldr w1, [x2]
587b0: 12103c21 and w1, w1, #0xffff0000
587b4: 2a000021 orr w1, w1, w0
587b8: 5155fec0 sub w0, w22, #0x57f, lsl #12
587bc: 513ac000 sub w0, w0, #0xeb0
587c0: 2a052025 orr w5, w1, w5, lsl #8
587c4: b9000045 str w5, [x2]
587c8: 531e34e1 ubfiz w1, w7, #2, #14
587cc: b9400002 ldr w2, [x0]
587d0: 12103c42 and w2, w2, #0xffff0000
587d4: 2a020021 orr w1, w1, w2
587d8: b9000001 str w1, [x0]
587dc: b9400001 ldr w1, [x0]
587e0: 12003c21 and w1, w1, #0xffff
587e4: 2a074427 orr w7, w1, w7, lsl #17
587e8: b9000007 str w7, [x0]
587ec: b9403661 ldr w1, [x19, #52]
587f0: 51001820 sub w0, w1, #0x6
587f4: 7100041f cmp w0, #0x1
587f8: 54001248 b.hi 58a40 <prepare_ddr_timing+0x18d4> // b.pmore
587fc: 7100183f cmp w1, #0x6
58800: 540011c1 b.ne 58a38 <prepare_ddr_timing+0x18cc> // b.any
58804: 910793e0 add x0, sp, #0x1e4
58808: 97fff9ea bl 56fb0 <get_pi_wrlat.isra.0.part.0>
5880c: 2a0003e3 mov w3, w0
58810: b94073e0 ldr w0, [sp, #112]
58814: 97fffa0a bl 5703c <get_pi_todtoff_max.isra.0>
58818: 4b000061 sub w1, w3, w0
5881c: 6b03001f cmp w0, w3
58820: 1a9f3020 csel w0, w1, wzr, cc // cc = lo, ul, last
58824: 5155fec2 sub w2, w22, #0x57f, lsl #12
58828: 5132a042 sub w2, w2, #0xca8
5882c: b9400041 ldr w1, [x2]
58830: 33081401 bfi w1, w0, #24, #6
58834: b9000041 str w1, [x2]
58838: b9403663 ldr w3, [x19, #52]
5883c: 51001860 sub w0, w3, #0x6
58840: 7100041f cmp w0, #0x1
58844: 54001028 b.hi 58a48 <prepare_ddr_timing+0x18dc> // b.pmore
58848: b94073e5 ldr w5, [sp, #112]
5884c: 2a0303e1 mov w1, w3
58850: 2a0503e0 mov w0, w5
58854: 97fff9eb bl 57000 <get_pi_todtoff_min.isra.0>
58858: 51000484 sub w4, w4, #0x1
5885c: 0b000084 add w4, w4, w0
58860: 2a0303e1 mov w1, w3
58864: 2a0503e0 mov w0, w5
58868: 97fff9f5 bl 5703c <get_pi_todtoff_max.isra.0>
5886c: 6b000081 subs w1, w4, w0
58870: 1a9f8021 csel w1, w1, wzr, hi // hi = pmore
58874: 5155fec2 sub w2, w22, #0x57f, lsl #12
58878: 51329042 sub w2, w2, #0xca4
5887c: b9400040 ldr w0, [x2]
58880: 33101420 bfi w0, w1, #16, #6
58884: b9000040 str w0, [x2]
58888: 9101c3e0 add x0, sp, #0x70
5888c: b9403661 ldr w1, [x19, #52]
58890: 97fff9f7 bl 5706c <get_pi_tdfi_phy_rdlat.isra.0>
58894: 5155fec2 sub w2, w22, #0x57f, lsl #12
58898: 5155fec3 sub w3, w22, #0x57f, lsl #12
5889c: 512ed042 sub w2, w2, #0xbb4
588a0: 512df063 sub w3, w3, #0xb7c
588a4: b9400041 ldr w1, [x2]
588a8: 12005c21 and w1, w1, #0xffffff
588ac: 2a006020 orr w0, w1, w0, lsl #24
588b0: b9000040 str w0, [x2]
588b4: 5155fec2 sub w2, w22, #0x57f, lsl #12
588b8: b94093e0 ldr w0, [sp, #144]
588bc: 512e4042 sub w2, w2, #0xb90
588c0: b9400041 ldr w1, [x2]
588c4: 12003c21 and w1, w1, #0xffff
588c8: 2a004421 orr w1, w1, w0, lsl #17
588cc: b9000041 str w1, [x2]
588d0: 531f3801 ubfiz w1, w0, #1, #15
588d4: b9400062 ldr w2, [x3]
588d8: 12103c42 and w2, w2, #0xffff0000
588dc: 2a020021 orr w1, w1, w2
588e0: b9000061 str w1, [x3]
588e4: 52800281 mov w1, #0x14 // #20
588e8: 5289c402 mov w2, #0x4e20 // #20000
588ec: 1b017c00 mul w0, w0, w1
588f0: 5155fec1 sub w1, w22, #0x57f, lsl #12
588f4: 512de021 sub w1, w1, #0xb78
588f8: b9000020 str w0, [x1]
588fc: 52884801 mov w1, #0x4240 // #16960
58900: b94073e0 ldr w0, [sp, #112]
58904: 72a001e1 movk w1, #0xf, lsl #16
58908: 1ac00821 udiv w1, w1, w0
5890c: 1ac10840 udiv w0, w2, w1
58910: 1b018801 msub w1, w0, w1, w2
58914: 7100003f cmp w1, #0x0
58918: 1a800400 cinc w0, w0, ne // ne = any
5891c: 11000400 add w0, w0, #0x1
58920: 12000001 and w1, w0, #0x1
58924: 0b400420 add w0, w1, w0, lsr #1
58928: 5155fec1 sub w1, w22, #0x57f, lsl #12
5892c: 512cb021 sub w1, w1, #0xb2c
58930: 11001402 add w2, w0, #0x5
58934: 11005c00 add w0, w0, #0x17
58938: b9400023 ldr w3, [x1]
5893c: 12065463 and w3, w3, #0xfc00ffff
58940: 2a024062 orr w2, w3, w2, lsl #16
58944: b9000022 str w2, [x1]
58948: b9400022 ldr w2, [x1]
5894c: 12165442 and w2, w2, #0xfffffc00
58950: 2a020000 orr w0, w0, w2
58954: b9000020 str w0, [x1]
58958: 9101c3e0 add x0, sp, #0x70
5895c: 97fff9f6 bl 57134 <get_pi_wrlat_adj.constprop.0>
58960: b9403a61 ldr w1, [x19, #56]
58964: 710e803f cmp w1, #0x3a0
58968: 54000748 b.hi 58a50 <prepare_ddr_timing+0x18e4> // b.pmore
5896c: 340000a0 cbz w0, 58980 <prepare_ddr_timing+0x1814>
58970: 51000401 sub w1, w0, #0x1
58974: 51001402 sub w2, w0, #0x5
58978: 7100101f cmp w0, #0x4
5897c: 1a818040 csel w0, w2, w1, hi // hi = pmore
58980: 5155fec1 sub w1, w22, #0x57f, lsl #12
58984: 512c6021 sub w1, w1, #0xb18
58988: b9400022 ldr w2, [x1]
5898c: 12005c42 and w2, w2, #0xffffff
58990: 2a006040 orr w0, w2, w0, lsl #24
58994: b9000020 str w0, [x1]
58998: b941e7e0 ldr w0, [sp, #484]
5899c: b9403a62 ldr w2, [x19, #56]
589a0: 710e805f cmp w2, #0x3a0
589a4: 540005a8 b.hi 58a58 <prepare_ddr_timing+0x18ec> // b.pmore
589a8: 7100101f cmp w0, #0x4
589ac: 54000569 b.ls 58a58 <prepare_ddr_timing+0x18ec> // b.plast
589b0: 51001400 sub w0, w0, #0x5
589b4: b9400022 ldr w2, [x1]
589b8: 110006f7 add w23, w23, #0x1
589bc: 114022d6 add w22, w22, #0x8, lsl #12
589c0: 12085c42 and w2, w2, #0xff00ffff
589c4: 2a004040 orr w0, w2, w0, lsl #16
589c8: b9000020 str w0, [x1]
589cc: 17fffa0e b 57204 <prepare_ddr_timing+0x98>
589d0: 2a0061c0 orr w0, w14, w0, lsl #24
589d4: b94077e2 ldr w2, [sp, #116]
589d8: 53103c21 lsl w1, w1, #16
589dc: 71001dbf cmp w13, #0x7
589e0: 2a080000 orr w0, w0, w8
589e4: 54000161 b.ne 58a10 <prepare_ddr_timing+0x18a4> // b.any
589e8: 0b020122 add w2, w9, w2
589ec: b9000142 str w2, [x10]
589f0: b94000e2 ldr w2, [x7]
589f4: 12001c42 and w2, w2, #0xff
589f8: 2a000040 orr w0, w2, w0
589fc: b90000e0 str w0, [x7]
58a00: b9400080 ldr w0, [x4]
58a04: 12003c00 and w0, w0, #0xffff
58a08: 2a010001 orr w1, w0, w1
58a0c: 17fffde3 b 58198 <prepare_ddr_timing+0x102c>
58a10: b9000142 str w2, [x10]
58a14: 0b1b02c2 add w2, w22, w27
58a18: b94083e8 ldr w8, [sp, #128]
58a1c: b9000048 str w8, [x2]
58a20: 17fffff4 b 589f0 <prepare_ddr_timing+0x1884>
58a24: b9400001 ldr w1, [x0]
58a28: 12077821 and w1, w1, #0xfeffffff
58a2c: b9000001 str w1, [x0]
58a30: 52a04001 mov w1, #0x2000000 // #33554432
58a34: 17ffff40 b 58734 <prepare_ddr_timing+0x15c8>
58a38: 2a1403e3 mov w3, w20
58a3c: 17ffff75 b 58810 <prepare_ddr_timing+0x16a4>
58a40: 52800000 mov w0, #0x0 // #0
58a44: 17ffff78 b 58824 <prepare_ddr_timing+0x16b8>
58a48: 4b080081 sub w1, w4, w8
58a4c: 17ffff8a b 58874 <prepare_ddr_timing+0x1708>
58a50: 51000800 sub w0, w0, #0x2
58a54: 17ffffcb b 58980 <prepare_ddr_timing+0x1814>
58a58: 51000800 sub w0, w0, #0x2
58a5c: 17ffffd6 b 589b4 <prepare_ddr_timing+0x1848>
58a60: b94093e0 ldr w0, [sp, #144]
58a64: 510722c1 sub w1, w22, #0x1c8
58a68: 531e7402 lsl w2, w0, #2
58a6c: b9000022 str w2, [x1]
58a70: 510712c2 sub w2, w22, #0x1c4
58a74: b9400041 ldr w1, [x2]
58a78: 12103c21 and w1, w1, #0xffff0000
58a7c: 2a000421 orr w1, w1, w0, lsl #1
58a80: b9000041 str w1, [x2]
58a84: 5106d2c2 sub w2, w22, #0x1b4
58a88: b9400041 ldr w1, [x2]
58a8c: 12003c21 and w1, w1, #0xffff
58a90: 2a004420 orr w0, w1, w0, lsl #17
58a94: b9000040 str w0, [x2]
58a98: b9403666 ldr w6, [x19, #52]
58a9c: 71001cdf cmp w6, #0x7
58aa0: 1a9f17e0 cset w0, eq // eq = none
58aa4: 531f7805 lsl w5, w0, #1
58aa8: 9101c3e0 add x0, sp, #0x70
58aac: 97fff8df bl 56e28 <get_pi_rdlat_adj>
58ab0: b941effa ldr w26, [sp, #492]
58ab4: 0b050000 add w0, w0, w5
58ab8: 2a0603e1 mov w1, w6
58abc: 53017f5a lsr w26, w26, #1
58ac0: 11000b5a add w26, w26, #0x2
58ac4: 0b00035a add w26, w26, w0
58ac8: 9101c3e0 add x0, sp, #0x70
58acc: 97fff968 bl 5706c <get_pi_tdfi_phy_rdlat.isra.0>
58ad0: 0b1a0000 add w0, w0, w26
58ad4: 5104a2c2 sub w2, w22, #0x128
58ad8: b9400041 ldr w1, [x2]
58adc: 12185c21 and w1, w1, #0xffffff00
58ae0: 2a000021 orr w1, w1, w0
58ae4: b9000041 str w1, [x2]
58ae8: 510492c1 sub w1, w22, #0x124
58aec: b9403662 ldr w2, [x19, #52]
58af0: 7100185f cmp w2, #0x6
58af4: 540000e1 b.ne 58b10 <prepare_ddr_timing+0x19a4> // b.any
58af8: aa1803e0 mov x0, x24
58afc: 97fff92d bl 56fb0 <get_pi_wrlat.isra.0.part.0>
58b00: b9400022 ldr w2, [x1]
58b04: 121b6842 and w2, w2, #0xffffffe0
58b08: 2a000042 orr w2, w2, w0
58b0c: b9000022 str w2, [x1]
58b10: b9400022 ldr w2, [x1]
58b14: b941e7e3 ldr w3, [sp, #484]
58b18: 12126442 and w2, w2, #0xffffc0ff
58b1c: b9000022 str w2, [x1]
58b20: b94093e5 ldr w5, [sp, #144]
58b24: b9400022 ldr w2, [x1]
58b28: b940cfe4 ldr w4, [sp, #204]
58b2c: 12096042 and w2, w2, #0xff80ffff
58b30: b94073e6 ldr w6, [sp, #112]
58b34: 2a034442 orr w2, w2, w3, lsl #17
58b38: b9000022 str w2, [x1]
58b3c: 510462c2 sub w2, w22, #0x118
58b40: b9400041 ldr w1, [x2]
58b44: 12003c21 and w1, w1, #0xffff
58b48: 2a054021 orr w1, w1, w5, lsl #16
58b4c: b9000041 str w1, [x2]
58b50: b9400041 ldr w1, [x2]
58b54: 12165421 and w1, w1, #0xfffffc00
58b58: 2a040021 orr w1, w1, w4
58b5c: b9000041 str w1, [x2]
58b60: b9403661 ldr w1, [x19, #52]
58b64: 7100183f cmp w1, #0x6
58b68: 54000101 b.ne 58b88 <prepare_ddr_timing+0x1a1c> // b.any
58b6c: 2a0603e0 mov w0, w6
58b70: 97fff933 bl 5703c <get_pi_todtoff_max.isra.0>
58b74: 510322c2 sub w2, w22, #0xc8
58b78: b9400041 ldr w1, [x2]
58b7c: 12005c21 and w1, w1, #0xffffff
58b80: 2a006021 orr w1, w1, w0, lsl #24
58b84: b9000041 str w1, [x2]
58b88: b9403661 ldr w1, [x19, #52]
58b8c: 51001822 sub w2, w1, #0x6
58b90: 7100045f cmp w2, #0x1
58b94: 54001be8 b.hi 58f10 <prepare_ddr_timing+0x1da4> // b.pmore
58b98: 7100183f cmp w1, #0x6
58b9c: 54001b61 b.ne 58f08 <prepare_ddr_timing+0x1d9c> // b.any
58ba0: aa1803e0 mov x0, x24
58ba4: 97fff903 bl 56fb0 <get_pi_wrlat.isra.0.part.0>
58ba8: 2a0003e4 mov w4, w0
58bac: 2a0603e0 mov w0, w6
58bb0: 97fff923 bl 5703c <get_pi_todtoff_max.isra.0>
58bb4: 4b000081 sub w1, w4, w0
58bb8: 6b04001f cmp w0, w4
58bbc: 1a9f3020 csel w0, w1, wzr, cc // cc = lo, ul, last
58bc0: 5102c2c2 sub w2, w22, #0xb0
58bc4: b9400041 ldr w1, [x2]
58bc8: 120a6421 and w1, w1, #0xffc0ffff
58bcc: 2a004021 orr w1, w1, w0, lsl #16
58bd0: b9000041 str w1, [x2]
58bd4: b9403664 ldr w4, [x19, #52]
58bd8: 51001881 sub w1, w4, #0x6
58bdc: 7100043f cmp w1, #0x1
58be0: 540019e8 b.hi 58f1c <prepare_ddr_timing+0x1db0> // b.pmore
58be4: 2a0403e1 mov w1, w4
58be8: 2a0603e0 mov w0, w6
58bec: 97fff905 bl 57000 <get_pi_todtoff_min.isra.0>
58bf0: 51000463 sub w3, w3, #0x1
58bf4: 0b000063 add w3, w3, w0
58bf8: 2a0403e1 mov w1, w4
58bfc: 2a0603e0 mov w0, w6
58c00: 97fff90f bl 5703c <get_pi_todtoff_max.isra.0>
58c04: 6b000061 subs w1, w3, w0
58c08: 1a9f8020 csel w0, w1, wzr, hi // hi = pmore
58c0c: 5102b2c2 sub w2, w22, #0xac
58c10: b9400041 ldr w1, [x2]
58c14: 12126421 and w1, w1, #0xffffc0ff
58c18: 2a002020 orr w0, w1, w0, lsl #8
58c1c: b9000040 str w0, [x2]
58c20: 9101c3e0 add x0, sp, #0x70
58c24: 97fff881 bl 56e28 <get_pi_rdlat_adj>
58c28: 5101b2c2 sub w2, w22, #0x6c
58c2c: b9400041 ldr w1, [x2]
58c30: 12085c21 and w1, w1, #0xff00ffff
58c34: 2a004020 orr w0, w1, w0, lsl #16
58c38: b9000040 str w0, [x2]
58c3c: 9101c3e0 add x0, sp, #0x70
58c40: 97fff93d bl 57134 <get_pi_wrlat_adj.constprop.0>
58c44: 5101a2c2 sub w2, w22, #0x68
58c48: b9400041 ldr w1, [x2]
58c4c: 12085c21 and w1, w1, #0xff00ffff
58c50: 2a004021 orr w1, w1, w0, lsl #16
58c54: b9000041 str w1, [x2]
58c58: 340000a0 cbz w0, 58c6c <prepare_ddr_timing+0x1b00>
58c5c: 51000401 sub w1, w0, #0x1
58c60: 51001402 sub w2, w0, #0x5
58c64: 7100101f cmp w0, #0x4
58c68: 1a818040 csel w0, w2, w1, hi // hi = pmore
58c6c: 510192c2 sub w2, w22, #0x64
58c70: 110006f7 add w23, w23, #0x1
58c74: b9400041 ldr w1, [x2]
58c78: 12085c21 and w1, w1, #0xff00ffff
58c7c: 2a004020 orr w0, w1, w0, lsl #16
58c80: b9000040 str w0, [x2]
58c84: 1ac60b21 udiv w1, w25, w6
58c88: 5289c402 mov w2, #0x4e20 // #20000
58c8c: 1ac10840 udiv w0, w2, w1
58c90: 1b018802 msub w2, w0, w1, w2
58c94: 7100005f cmp w2, #0x0
58c98: 1a800400 cinc w0, w0, ne // ne = any
58c9c: 11000400 add w0, w0, #0x1
58ca0: 12000002 and w2, w0, #0x1
58ca4: 0b400440 add w0, w2, w0, lsr #1
58ca8: 510152c2 sub w2, w22, #0x54
58cac: 11001403 add w3, w0, #0x5
58cb0: 11005c00 add w0, w0, #0x17
58cb4: b9400044 ldr w4, [x2]
58cb8: 12065484 and w4, w4, #0xfc00ffff
58cbc: 2a034083 orr w3, w4, w3, lsl #16
58cc0: b9000043 str w3, [x2]
58cc4: b94157e4 ldr w4, [sp, #340]
58cc8: b9400043 ldr w3, [x2]
58ccc: 12165463 and w3, w3, #0xfffffc00
58cd0: 2a030000 orr w0, w0, w3
58cd4: 5100e2c3 sub w3, w22, #0x38
58cd8: b9000040 str w0, [x2]
58cdc: b9400060 ldr w0, [x3]
58ce0: 12136802 and w2, w0, #0xffffe0ff
58ce4: b9414be0 ldr w0, [sp, #328]
58ce8: 2a002040 orr w0, w2, w0, lsl #8
58cec: 5280fa02 mov w2, #0x7d0 // #2000
58cf0: b9000060 str w0, [x3]
58cf4: 510052c3 sub w3, w22, #0x14
58cf8: 1ac10840 udiv w0, w2, w1
58cfc: 1b018802 msub w2, w0, w1, w2
58d00: 7100005f cmp w2, #0x0
58d04: b9400062 ldr w2, [x3]
58d08: 1a800400 cinc w0, w0, ne // ne = any
58d0c: 11001400 add w0, w0, #0x5
58d10: 12146c42 and w2, w2, #0xfffff0ff
58d14: 2a002040 orr w0, w2, w0, lsl #8
58d18: 5284e202 mov w2, #0x2710 // #10000
58d1c: b9000060 str w0, [x3]
58d20: 110112c3 add w3, w22, #0x44
58d24: 1ac10840 udiv w0, w2, w1
58d28: 1b018801 msub w1, w0, w1, w2
58d2c: 2a1603e2 mov w2, w22
58d30: 7100003f cmp w1, #0x0
58d34: 1a800400 cinc w0, w0, ne // ne = any
58d38: 710190df cmp w6, #0x64
58d3c: 11002001 add w1, w0, #0x8
58d40: 1a808420 csinc w0, w1, w0, hi // hi = pmore
58d44: b9400041 ldr w1, [x2]
58d48: 120a6421 and w1, w1, #0xffc0ffff
58d4c: 2a004020 orr w0, w1, w0, lsl #16
58d50: b9000040 str w0, [x2]
58d54: 110092c0 add w0, w22, #0x24
58d58: 110202c2 add w2, w22, #0x80
58d5c: b9400001 ldr w1, [x0]
58d60: 12083c21 and w1, w1, #0xff0000ff
58d64: 2a042021 orr w1, w1, w4, lsl #8
58d68: b9000001 str w1, [x0]
58d6c: 110182c0 add w0, w22, #0x60
58d70: b9400061 ldr w1, [x3]
58d74: 12103c21 and w1, w1, #0xffff0000
58d78: 2a040021 orr w1, w1, w4
58d7c: b9000061 str w1, [x3]
58d80: b9400001 ldr w1, [x0]
58d84: 12003c21 and w1, w1, #0xffff
58d88: 2a044021 orr w1, w1, w4, lsl #16
58d8c: b9000001 str w1, [x0]
58d90: b9400040 ldr w0, [x2]
58d94: 12103c00 and w0, w0, #0xffff0000
58d98: 2a040000 orr w0, w0, w4
58d9c: 1100a2c4 add w4, w22, #0x28
58da0: b9000040 str w0, [x2]
58da4: b9415be0 ldr w0, [sp, #344]
58da8: b9400081 ldr w1, [x4]
58dac: 12103c21 and w1, w1, #0xffff0000
58db0: 2a000021 orr w1, w1, w0
58db4: b9000081 str w1, [x4]
58db8: b9400061 ldr w1, [x3]
58dbc: 12003c21 and w1, w1, #0xffff
58dc0: 2a004021 orr w1, w1, w0, lsl #16
58dc4: b9000061 str w1, [x3]
58dc8: 110192c3 add w3, w22, #0x64
58dcc: b9400061 ldr w1, [x3]
58dd0: 12103c21 and w1, w1, #0xffff0000
58dd4: 2a000021 orr w1, w1, w0
58dd8: b9000061 str w1, [x3]
58ddc: 52800c63 mov w3, #0x63 // #99
58de0: b9400041 ldr w1, [x2]
58de4: 12003c21 and w1, w1, #0xffff
58de8: 2a004020 orr w0, w1, w0, lsl #16
58dec: 110282c1 add w1, w22, #0xa0
58df0: b9000040 str w0, [x2]
58df4: b9400020 ldr w0, [x1]
58df8: b941c7e2 ldr w2, [sp, #452]
58dfc: 12165400 and w0, w0, #0xfffffc00
58e00: 2a020000 orr w0, w0, w2
58e04: b9000020 str w0, [x1]
58e08: 1102a2c0 add w0, w22, #0xa8
58e0c: b9400001 ldr w1, [x0]
58e10: 12026422 and w2, w1, #0xc0ffffff
58e14: b940a3e1 ldr w1, [sp, #160]
58e18: 2a016041 orr w1, w2, w1, lsl #24
58e1c: b9000001 str w1, [x0]
58e20: b9400001 ldr w1, [x0]
58e24: 120a6422 and w2, w1, #0xffc0ffff
58e28: b940bbe1 ldr w1, [sp, #184]
58e2c: 2a014041 orr w1, w2, w1, lsl #16
58e30: b9000001 str w1, [x0]
58e34: b9400001 ldr w1, [x0]
58e38: 12105c22 and w2, w1, #0xffff00ff
58e3c: b94097e1 ldr w1, [sp, #148]
58e40: 2a012041 orr w1, w2, w1, lsl #8
58e44: b9000001 str w1, [x0]
58e48: b9409fe2 ldr w2, [sp, #156]
58e4c: b9400001 ldr w1, [x0]
58e50: 12185c21 and w1, w1, #0xffffff00
58e54: 2a020021 orr w1, w1, w2
58e58: 110292c2 add w2, w22, #0xa4
58e5c: b9000001 str w1, [x0]
58e60: b9400040 ldr w0, [x2]
58e64: 12005c01 and w1, w0, #0xffffff
58e68: b940abe0 ldr w0, [sp, #168]
58e6c: 2a006020 orr w0, w1, w0, lsl #24
58e70: 1102b2c1 add w1, w22, #0xac
58e74: b9000040 str w0, [x2]
58e78: b9400020 ldr w0, [x1]
58e7c: 12005c02 and w2, w0, #0xffffff
58e80: b940c7e0 ldr w0, [sp, #196]
58e84: 2a006040 orr w0, w2, w0, lsl #24
58e88: b9000020 str w0, [x1]
58e8c: b940c3e0 ldr w0, [sp, #192]
58e90: b9400022 ldr w2, [x1]
58e94: 120f3842 and w2, w2, #0xfffe0000
58e98: 1b037c00 mul w0, w0, w3
58e9c: 52800c83 mov w3, #0x64 // #100
58ea0: 1ac30800 udiv w0, w0, w3
58ea4: 2a020000 orr w0, w0, w2
58ea8: b9000020 str w0, [x1]
58eac: 1102c2c1 add w1, w22, #0xb0
58eb0: b9400020 ldr w0, [x1]
58eb4: 120a6402 and w2, w0, #0xffc0ffff
58eb8: b94107e0 ldr w0, [sp, #260]
58ebc: 2a004040 orr w0, w2, w0, lsl #16
58ec0: b9000020 str w0, [x1]
58ec4: b940d7e2 ldr w2, [sp, #212]
58ec8: b9400020 ldr w0, [x1]
58ecc: 121c6c00 and w0, w0, #0xfffffff0
58ed0: 2a020000 orr w0, w0, w2
58ed4: b9000020 str w0, [x1]
58ed8: 110472c1 add w1, w22, #0x11c
58edc: b9400020 ldr w0, [x1]
58ee0: 12083c00 and w0, w0, #0xff0000ff
58ee4: 2a052400 orr w0, w0, w5, lsl #9
58ee8: b9000020 str w0, [x1]
58eec: 52800280 mov w0, #0x14 // #20
58ef0: 1b007ca5 mul w5, w5, w0
58ef4: 110482c0 add w0, w22, #0x120
58ef8: 114022d6 add w22, w22, #0x8, lsl #12
58efc: b9400001 ldr w1, [x0]
58f00: b9000005 str w5, [x0]
58f04: 17fffc28 b 57fa4 <prepare_ddr_timing+0xe38>
58f08: 52800024 mov w4, #0x1 // #1
58f0c: 17ffff28 b 58bac <prepare_ddr_timing+0x1a40>
58f10: 71000c3f cmp w1, #0x3
58f14: 1a9f1000 csel w0, w0, wzr, ne // ne = any
58f18: 17ffff2a b 58bc0 <prepare_ddr_timing+0x1a54>
58f1c: 71000c9f cmp w4, #0x3
58f20: 54ffe761 b.ne 58c0c <prepare_ddr_timing+0x1aa0> // b.any
58f24: b941ebe0 ldr w0, [sp, #488]
58f28: 4b000060 sub w0, w3, w0
58f2c: 17ffff38 b 58c0c <prepare_ddr_timing+0x1aa0>
58f30: 2a1403e4 mov w4, w20
58f34: 17fff914 b 57384 <prepare_ddr_timing+0x218>
58f38: 71000c3f cmp w1, #0x3
58f3c: 1a9f1000 csel w0, w0, wzr, ne // ne = any
58f40: 17fff916 b 57398 <prepare_ddr_timing+0x22c>
58f44: 71000c9f cmp w4, #0x3
58f48: 54ff24e1 b.ne 573e4 <prepare_ddr_timing+0x278> // b.any
58f4c: b941ebe0 ldr w0, [sp, #488]
58f50: 4b000060 sub w0, w3, w0
58f54: 17fff924 b 573e4 <prepare_ddr_timing+0x278>
58f58: 32000042 orr w2, w2, #0x1
58f5c: 1400017b b 59548 <prepare_ddr_timing+0x23dc>
58f60: 52800020 mov w0, #0x1 // #1
58f64: 140001b6 b 5963c <prepare_ddr_timing+0x24d0>
58f68: 52800060 mov w0, #0x3 // #3
58f6c: 140001b4 b 5963c <prepare_ddr_timing+0x24d0>
58f70: 52807d02 mov w2, #0x3e8 // #1000
58f74: 52800000 mov w0, #0x0 // #0
58f78: 110fa000 add w0, w0, #0x3e8
58f7c: 52807d06 mov w6, #0x3e8 // #1000
58f80: 4b4204c2 sub w2, w6, w2, lsr #1
58f84: 5155f42b sub w11, w1, #0x57d, lsl #12
58f88: 513b316b sub w11, w11, #0xecc
58f8c: 12a05fe7 mov w7, #0xfd00ffff // #-50266113
58f90: 1b067c00 mul w0, w0, w6
58f94: 1ac30800 udiv w0, w0, w3
58f98: 0b020000 add w0, w0, w2
58f9c: 1ac60802 udiv w2, w0, w6
58fa0: 1b068040 msub w0, w2, w6, w0
58fa4: 53175800 lsl w0, w0, #9
58fa8: 1ac60800 udiv w0, w0, w6
58fac: b9400166 ldr w6, [x11]
58fb0: 0a0700c6 and w6, w6, w7
58fb4: 2a0040c6 orr w6, w6, w0, lsl #16
58fb8: b9000166 str w6, [x11]
58fbc: 5155f42b sub w11, w1, #0x57d, lsl #12
58fc0: 5133316b sub w11, w11, #0xccc
58fc4: b9400166 ldr w6, [x11]
58fc8: 0a0700c6 and w6, w6, w7
58fcc: 2a0040c6 orr w6, w6, w0, lsl #16
58fd0: b9000166 str w6, [x11]
58fd4: 5155f42b sub w11, w1, #0x57d, lsl #12
58fd8: 512b316b sub w11, w11, #0xacc
58fdc: b9400166 ldr w6, [x11]
58fe0: 0a0700c6 and w6, w6, w7
58fe4: 2a0040c6 orr w6, w6, w0, lsl #16
58fe8: b9000166 str w6, [x11]
58fec: 5155f42b sub w11, w1, #0x57d, lsl #12
58ff0: 5123316b sub w11, w11, #0x8cc
58ff4: b9400166 ldr w6, [x11]
58ff8: 0a0700c7 and w7, w6, w7
58ffc: 5155f426 sub w6, w1, #0x57d, lsl #12
59000: 513f60c6 sub w6, w6, #0xfd8
59004: 2a0040e7 orr w7, w7, w0, lsl #16
59008: b9000167 str w7, [x11]
5900c: 52805787 mov w7, #0x2bc // #700
59010: b94000c0 ldr w0, [x6]
59014: 121c6c00 and w0, w0, #0xfffffff0
59018: 2a020000 orr w0, w0, w2
5901c: b90000c0 str w0, [x6]
59020: 5155f426 sub w6, w1, #0x57d, lsl #12
59024: 513760c6 sub w6, w6, #0xdd8
59028: b94000c0 ldr w0, [x6]
5902c: 121c6c00 and w0, w0, #0xfffffff0
59030: 2a020000 orr w0, w0, w2
59034: b90000c0 str w0, [x6]
59038: 5155f426 sub w6, w1, #0x57d, lsl #12
5903c: 512f60c6 sub w6, w6, #0xbd8
59040: b94000c0 ldr w0, [x6]
59044: 121c6c00 and w0, w0, #0xfffffff0
59048: 2a020000 orr w0, w0, w2
5904c: b90000c0 str w0, [x6]
59050: 0b110026 add w6, w1, w17
59054: b94000c0 ldr w0, [x6]
59058: 121c6c00 and w0, w0, #0xfffffff0
5905c: 2a020002 orr w2, w0, w2
59060: b9406fe0 ldr w0, [sp, #108]
59064: b90000c2 str w2, [x6]
59068: 0b120026 add w6, w1, w18
5906c: 1ac30800 udiv w0, w0, w3
59070: b94000c2 ldr w2, [x6]
59074: 120c6c42 and w2, w2, #0xfff0ffff
59078: 11000800 add w0, w0, #0x2
5907c: 2a004042 orr w2, w2, w0, lsl #16
59080: b90000c2 str w2, [x6]
59084: 0b1e0026 add w6, w1, w30
59088: b94000c2 ldr w2, [x6]
5908c: 120c6c42 and w2, w2, #0xfff0ffff
59090: 2a004042 orr w2, w2, w0, lsl #16
59094: b90000c2 str w2, [x6]
59098: 0b160026 add w6, w1, w22
5909c: b94000c2 ldr w2, [x6]
590a0: 120c6c42 and w2, w2, #0xfff0ffff
590a4: 2a004042 orr w2, w2, w0, lsl #16
590a8: b90000c2 str w2, [x6]
590ac: 0b170026 add w6, w1, w23
590b0: b94000c2 ldr w2, [x6]
590b4: 120c6c42 and w2, w2, #0xfff0ffff
590b8: 2a004040 orr w0, w2, w0, lsl #16
590bc: 52817702 mov w2, #0xbb8 // #3000
590c0: b90000c0 str w0, [x6]
590c4: 1ac30840 udiv w0, w2, w3
590c8: 1b038802 msub w2, w0, w3, w2
590cc: 7100005f cmp w2, #0x0
590d0: 1ac308e2 udiv w2, w7, w3
590d4: 1a800400 cinc w0, w0, ne // ne = any
590d8: 51000406 sub w6, w0, #0x1
590dc: 1b039c43 msub w3, w2, w3, w7
590e0: 7100007f cmp w3, #0x0
590e4: 1a820442 cinc w2, w2, ne // ne = any
590e8: 6b0200c3 subs w3, w6, w2
590ec: 1a9f8063 csel w3, w3, wzr, hi // hi = pmore
590f0: 6b0f00df cmp w6, w15
590f4: 54003048 b.hi 596fc <prepare_ddr_timing+0x2590> // b.pmore
590f8: 4b0001c0 sub w0, w14, w0
590fc: 7100041f cmp w0, #0x1
59100: 54000048 b.hi 59108 <prepare_ddr_timing+0x1f9c> // b.pmore
59104: 4b0300c3 sub w3, w6, w3
59108: 0b18003c add w28, w1, w24
5910c: 0b19003b add w27, w1, w25
59110: 5155f43a sub w26, w1, #0x57d, lsl #12
59114: 5155f430 sub w16, w1, #0x57d, lsl #12
59118: 512f735a sub w26, w26, #0xbdc
5911c: 51277210 sub w16, w16, #0x9dc
59120: b9400380 ldr w0, [x28]
59124: 5155f427 sub w7, w1, #0x57d, lsl #12
59128: 513aa0e7 sub w7, w7, #0xea8
5912c: 5155f42d sub w13, w1, #0x57d, lsl #12
59130: 120c6c00 and w0, w0, #0xfff0ffff
59134: 5132a1ad sub w13, w13, #0xca8
59138: 2a034000 orr w0, w0, w3, lsl #16
5913c: b9000380 str w0, [x28]
59140: 5155f42c sub w12, w1, #0x57d, lsl #12
59144: 5155f42b sub w11, w1, #0x57d, lsl #12
59148: b9400360 ldr w0, [x27]
5914c: 512aa18c sub w12, w12, #0xaa8
59150: 5122a16b sub w11, w11, #0x8a8
59154: 6b0200df cmp w6, w2
59158: 120c6c00 and w0, w0, #0xfff0ffff
5915c: 2a034000 orr w0, w0, w3, lsl #16
59160: b9000360 str w0, [x27]
59164: b9400340 ldr w0, [x26]
59168: 120c6c00 and w0, w0, #0xfff0ffff
5916c: 2a034000 orr w0, w0, w3, lsl #16
59170: b9000340 str w0, [x26]
59174: b9400200 ldr w0, [x16]
59178: 120c6c00 and w0, w0, #0xfff0ffff
5917c: 2a034000 orr w0, w0, w3, lsl #16
59180: b9000200 str w0, [x16]
59184: b94000e0 ldr w0, [x7]
59188: 121c6c00 and w0, w0, #0xfffffff0
5918c: 2a030000 orr w0, w0, w3
59190: b90000e0 str w0, [x7]
59194: b94001a0 ldr w0, [x13]
59198: 121c6c00 and w0, w0, #0xfffffff0
5919c: 2a030000 orr w0, w0, w3
591a0: b90001a0 str w0, [x13]
591a4: b9400180 ldr w0, [x12]
591a8: 121c6c00 and w0, w0, #0xfffffff0
591ac: 2a030000 orr w0, w0, w3
591b0: b9000180 str w0, [x12]
591b4: b9400160 ldr w0, [x11]
591b8: 121c6c00 and w0, w0, #0xfffffff0
591bc: 2a030003 orr w3, w0, w3
591c0: b9000163 str w3, [x11]
591c4: 4b060040 sub w0, w2, w6
591c8: 1a9f3000 csel w0, w0, wzr, cc // cc = lo, ul, last
591cc: 6b0f00df cmp w6, w15
591d0: 54000048 b.hi 591d8 <prepare_ddr_timing+0x206c> // b.pmore
591d4: 0b0000c2 add w2, w6, w0
591d8: b9400380 ldr w0, [x28]
591dc: 5155f423 sub w3, w1, #0x57d, lsl #12
591e0: 513ab063 sub w3, w3, #0xeac
591e4: 5155f426 sub w6, w1, #0x57d, lsl #12
591e8: 12146c00 and w0, w0, #0xfffff0ff
591ec: 513ac0c6 sub w6, w6, #0xeb0
591f0: 2a022000 orr w0, w0, w2, lsl #8
591f4: b9000380 str w0, [x28]
591f8: 710a689f cmp w4, #0x29a
591fc: b9400360 ldr w0, [x27]
59200: 12146c00 and w0, w0, #0xfffff0ff
59204: 2a022000 orr w0, w0, w2, lsl #8
59208: b9000360 str w0, [x27]
5920c: b9400340 ldr w0, [x26]
59210: 12146c00 and w0, w0, #0xfffff0ff
59214: 2a022000 orr w0, w0, w2, lsl #8
59218: b9000340 str w0, [x26]
5921c: b9400200 ldr w0, [x16]
59220: 12146c00 and w0, w0, #0xfffff0ff
59224: 2a022000 orr w0, w0, w2, lsl #8
59228: b9000200 str w0, [x16]
5922c: b9400060 ldr w0, [x3]
59230: 12046c00 and w0, w0, #0xf0ffffff
59234: 2a026000 orr w0, w0, w2, lsl #24
59238: b9000060 str w0, [x3]
5923c: 5155f423 sub w3, w1, #0x57d, lsl #12
59240: 5132b063 sub w3, w3, #0xcac
59244: b9400060 ldr w0, [x3]
59248: 12046c00 and w0, w0, #0xf0ffffff
5924c: 2a026000 orr w0, w0, w2, lsl #24
59250: b9000060 str w0, [x3]
59254: 5155f423 sub w3, w1, #0x57d, lsl #12
59258: 512ab063 sub w3, w3, #0xaac
5925c: b9400060 ldr w0, [x3]
59260: 12046c00 and w0, w0, #0xf0ffffff
59264: 2a026000 orr w0, w0, w2, lsl #24
59268: b9000060 str w0, [x3]
5926c: 5155f423 sub w3, w1, #0x57d, lsl #12
59270: 5122b063 sub w3, w3, #0x8ac
59274: b9400060 ldr w0, [x3]
59278: 12046c00 and w0, w0, #0xf0ffffff
5927c: 2a026002 orr w2, w0, w2, lsl #24
59280: b9000062 str w2, [x3]
59284: 5155f420 sub w0, w1, #0x57d, lsl #12
59288: 5155f423 sub w3, w1, #0x57d, lsl #12
5928c: b94000d0 ldr w16, [x6]
59290: 5155f422 sub w2, w1, #0x57d, lsl #12
59294: 5122c000 sub w0, w0, #0x8b0
59298: 5132c063 sub w3, w3, #0xcb0
5929c: 512ac042 sub w2, w2, #0xab0
592a0: 54002328 b.hi 59704 <prepare_ddr_timing+0x2598> // b.pmore
592a4: 120f7a10 and w16, w16, #0xfffeffff
592a8: b90000d0 str w16, [x6]
592ac: b9400066 ldr w6, [x3]
592b0: 120f78c6 and w6, w6, #0xfffeffff
592b4: b9000066 str w6, [x3]
592b8: b9400043 ldr w3, [x2]
592bc: 120f7863 and w3, w3, #0xfffeffff
592c0: b9000043 str w3, [x2]
592c4: b9400002 ldr w2, [x0]
592c8: 120f7842 and w2, w2, #0xfffeffff
592cc: b9000002 str w2, [x0]
592d0: b9403660 ldr w0, [x19, #52]
592d4: 71000c1f cmp w0, #0x3
592d8: 540022c0 b.eq 59730 <prepare_ddr_timing+0x25c4> // b.none
592dc: 7100181f cmp w0, #0x6
592e0: 5281b582 mov w2, #0xdac // #3500
592e4: 52813880 mov w0, #0x9c4 // #2500
592e8: 1a800040 csel w0, w2, w0, eq // eq = none
592ec: 7104109f cmp w4, #0x104
592f0: 54002248 b.hi 59738 <prepare_ddr_timing+0x25cc> // b.pmore
592f4: 528c8e02 mov w2, #0x6470 // #25712
592f8: 5155f423 sub w3, w1, #0x57d, lsl #12
592fc: 72a00102 movk w2, #0x8, lsl #16
59300: 511fe063 sub w3, w3, #0x7f8
59304: 5294001c mov w28, #0xa000 // #40960
59308: 5285009a mov w26, #0x2804 // #10244
5930c: 1ac40842 udiv w2, w2, w4
59310: 72a0009c movk w28, #0x4, lsl #16
59314: 5280141b mov w27, #0xa0 // #160
59318: 72bff51a movk w26, #0xffa8, lsl #16
5931c: 0b000042 add w2, w2, w0
59320: b9400060 ldr w0, [x3]
59324: 32000000 orr w0, w0, #0x1
59328: b9000060 str w0, [x3]
5932c: 5155f423 sub w3, w1, #0x57d, lsl #12
59330: 1b027c86 mul w6, w4, w2
59334: 5117e063 sub w3, w3, #0x5f8
59338: 1aca08c6 udiv w6, w6, w10
5933c: b9400060 ldr w0, [x3]
59340: 32000000 orr w0, w0, #0x1
59344: b9000060 str w0, [x3]
59348: 5155f423 sub w3, w1, #0x57d, lsl #12
5934c: 510fe063 sub w3, w3, #0x3f8
59350: b9400060 ldr w0, [x3]
59354: 32000000 orr w0, w0, #0x1
59358: b9000060 str w0, [x3]
5935c: 1b0a7cc3 mul w3, w6, w10
59360: 5155f420 sub w0, w1, #0x57d, lsl #12
59364: 513ff000 sub w0, w0, #0xffc
59368: 1ac40863 udiv w3, w3, w4
5936c: 4b030042 sub w2, w2, w3
59370: 1b047c42 mul w2, w2, w4
59374: 53175842 lsl w2, w2, #9
59378: 1aca0842 udiv w2, w2, w10
5937c: 2a0003f0 mov w16, w0
59380: b9400203 ldr w3, [x16]
59384: 120d5063 and w3, w3, #0xfff800ff
59388: 2a1c0063 orr w3, w3, w28
5938c: b9000203 str w3, [x16]
59390: 1100a010 add w16, w0, #0x28
59394: b9400203 ldr w3, [x16]
59398: 12165463 and w3, w3, #0xfffffc00
5939c: 2a1b0063 orr w3, w3, w27
593a0: b9000203 str w3, [x16]
593a4: 11001010 add w16, w0, #0x4
593a8: b9400203 ldr w3, [x16]
593ac: 12165463 and w3, w3, #0xfffffc00
593b0: 2a020063 orr w3, w3, w2
593b4: b9000203 str w3, [x16]
593b8: 1104d010 add w16, w0, #0x134
593bc: 11080000 add w0, w0, #0x200
593c0: b9400203 ldr w3, [x16]
593c4: 121c6c63 and w3, w3, #0xfffffff0
593c8: 2a060063 orr w3, w3, w6
593cc: b9000203 str w3, [x16]
593d0: 0b1a0023 add w3, w1, w26
593d4: 6b00007f cmp w3, w0
593d8: 54fffd21 b.ne 5937c <prepare_ddr_timing+0x2210> // b.any
593dc: 5155f426 sub w6, w1, #0x57d, lsl #12
593e0: 5107f0c6 sub w6, w6, #0x1fc
593e4: 2a0303e2 mov w2, w3
593e8: 11080063 add w3, w3, #0x200
593ec: 6b0300df cmp w6, w3
593f0: b9400040 ldr w0, [x2]
593f4: 12055000 and w0, w0, #0xf800ffff
593f8: 32090000 orr w0, w0, #0x800000
593fc: b9000040 str w0, [x2]
59400: 54ffff21 b.ne 593e4 <prepare_ddr_timing+0x2278> // b.any
59404: b94000e0 ldr w0, [x7]
59408: 7216041f tst w0, #0xc00
5940c: 54000321 b.ne 59470 <prepare_ddr_timing+0x2304> // b.any
59410: 2a1403e0 mov w0, w20
59414: 5155f422 sub w2, w1, #0x57d, lsl #12
59418: 8b284403 add x3, x0, w8, uxtw #1
5941c: 5155f430 sub w16, w1, #0x57d, lsl #12
59420: b00000a0 adrp x0, 6e000 <iomux_status+0x2c>
59424: 9130f000 add x0, x0, #0xc3c
59428: 513c1042 sub w2, w2, #0xf04
5942c: 8b031000 add x0, x0, x3, lsl #4
59430: 511c1210 sub w16, w16, #0x704
59434: 2a0203e3 mov w3, w2
59438: b9400066 ldr w6, [x3]
5943c: d35064c6 ubfx x6, x6, #16, #10
59440: b8004406 str w6, [x0], #4
59444: b9400066 ldr w6, [x3]
59448: 120654c6 and w6, w6, #0xfc00ffff
5944c: b9000066 str w6, [x3]
59450: 1100f046 add w6, w2, #0x3c
59454: 11080042 add w2, w2, #0x200
59458: 6b02021f cmp w16, w2
5945c: b94000c3 ldr w3, [x6]
59460: 12157063 and w3, w3, #0xfffff8ff
59464: 32180063 orr w3, w3, #0x100
59468: b90000c3 str w3, [x6]
5946c: 54fffe41 b.ne 59434 <prepare_ddr_timing+0x22c8> // b.any
59470: b94000e0 ldr w0, [x7]
59474: 5155f422 sub w2, w1, #0x57d, lsl #12
59478: 511dd042 sub w2, w2, #0x774
5947c: 11000508 add w8, w8, #0x1
59480: 12146c00 and w0, w0, #0xfffff0ff
59484: 2a090000 orr w0, w0, w9
59488: b90000e0 str w0, [x7]
5948c: b94001a0 ldr w0, [x13]
59490: 12146c00 and w0, w0, #0xfffff0ff
59494: 2a090000 orr w0, w0, w9
59498: b90001a0 str w0, [x13]
5949c: b9400180 ldr w0, [x12]
594a0: 12146c00 and w0, w0, #0xfffff0ff
594a4: 2a090000 orr w0, w0, w9
594a8: b9000180 str w0, [x12]
594ac: b9400160 ldr w0, [x11]
594b0: 12146c00 and w0, w0, #0xfffff0ff
594b4: 2a090000 orr w0, w0, w9
594b8: b9000160 str w0, [x11]
594bc: b9400040 ldr w0, [x2]
594c0: 120c6c00 and w0, w0, #0xfff0ffff
594c4: 2a050000 orr w0, w0, w5
594c8: b9000040 str w0, [x2]
594cc: 5155f422 sub w2, w1, #0x57d, lsl #12
594d0: 5115d042 sub w2, w2, #0x574
594d4: b9400040 ldr w0, [x2]
594d8: 120c6c00 and w0, w0, #0xfff0ffff
594dc: 2a050000 orr w0, w0, w5
594e0: b9000040 str w0, [x2]
594e4: 5155f422 sub w2, w1, #0x57d, lsl #12
594e8: 11402021 add w1, w1, #0x8, lsl #12
594ec: 510dd042 sub w2, w2, #0x374
594f0: b9400040 ldr w0, [x2]
594f4: 120c6c00 and w0, w0, #0xfff0ffff
594f8: 2a050000 orr w0, w0, w5
594fc: b9000040 str w0, [x2]
59500: b9403e60 ldr w0, [x19, #60]
59504: 6b00011f cmp w8, w0
59508: 54000d82 b.cs 596b8 <prepare_ddr_timing+0x254c> // b.hs, b.nlast
5950c: 5155f422 sub w2, w1, #0x57d, lsl #12
59510: 12806023 mov w3, #0xfffffcfe // #-770
59514: 51080042 sub w2, w2, #0x200
59518: b9400040 ldr w0, [x2]
5951c: 0a030000 and w0, w0, w3
59520: b94067e3 ldr w3, [sp, #100]
59524: 2a030000 orr w0, w0, w3
59528: b9000040 str w0, [x2]
5952c: 5155f420 sub w0, w1, #0x57d, lsl #12
59530: 5106f000 sub w0, w0, #0x1bc
59534: b9403a62 ldr w2, [x19, #56]
59538: 7106405f cmp w2, #0x190
5953c: b9400002 ldr w2, [x0]
59540: 54ffd0c9 b.ls 58f58 <prepare_ddr_timing+0x1dec> // b.plast
59544: 121f7842 and w2, w2, #0xfffffffe
59548: 1ac40943 udiv w3, w10, w4
5954c: b9000002 str w2, [x0]
59550: 52813882 mov w2, #0x9c4 // #2500
59554: 5155f426 sub w6, w1, #0x57d, lsl #12
59558: 513a90c6 sub w6, w6, #0xea4
5955c: 52822047 mov w7, #0x1102 // #4354
59560: 1ac30840 udiv w0, w2, w3
59564: 1b038802 msub w2, w0, w3, w2
59568: 7100005f cmp w2, #0x0
5956c: b94000c2 ldr w2, [x6]
59570: 1a800400 cinc w0, w0, ne // ne = any
59574: 7106409f cmp w4, #0x190
59578: 11000c00 add w0, w0, #0x3
5957c: 120c6c42 and w2, w2, #0xfff0ffff
59580: 2a004042 orr w2, w2, w0, lsl #16
59584: b90000c2 str w2, [x6]
59588: 5155f426 sub w6, w1, #0x57d, lsl #12
5958c: 513290c6 sub w6, w6, #0xca4
59590: b94000c2 ldr w2, [x6]
59594: 120c6c42 and w2, w2, #0xfff0ffff
59598: 2a004042 orr w2, w2, w0, lsl #16
5959c: b90000c2 str w2, [x6]
595a0: 5155f426 sub w6, w1, #0x57d, lsl #12
595a4: 512a90c6 sub w6, w6, #0xaa4
595a8: b94000c2 ldr w2, [x6]
595ac: 120c6c42 and w2, w2, #0xfff0ffff
595b0: 2a004042 orr w2, w2, w0, lsl #16
595b4: b90000c2 str w2, [x6]
595b8: 5155f426 sub w6, w1, #0x57d, lsl #12
595bc: 512290c6 sub w6, w6, #0x8a4
595c0: b94000c2 ldr w2, [x6]
595c4: 120c6c42 and w2, w2, #0xfff0ffff
595c8: 2a004040 orr w0, w2, w0, lsl #16
595cc: b90000c0 str w0, [x6]
595d0: 5155f426 sub w6, w1, #0x57d, lsl #12
595d4: 5155f422 sub w2, w1, #0x57d, lsl #12
595d8: 510710c6 sub w6, w6, #0x1c4
595dc: 51069042 sub w2, w2, #0x1a4
595e0: b94000c0 ldr w0, [x6]
595e4: 12134800 and w0, w0, #0xffffe000
595e8: 2a070000 orr w0, w0, w7
595ec: b90000c0 str w0, [x6]
595f0: b9400040 ldr w0, [x2]
595f4: 12134800 and w0, w0, #0xffffe000
595f8: 2a070000 orr w0, w0, w7
595fc: b9000040 str w0, [x2]
59600: 52a02447 mov w7, #0x1220000 // #19005440
59604: b94000c0 ldr w0, [x6]
59608: 12034800 and w0, w0, #0xe000ffff
5960c: 2a070000 orr w0, w0, w7
59610: b90000c0 str w0, [x6]
59614: b9400040 ldr w0, [x2]
59618: 12034800 and w0, w0, #0xe000ffff
5961c: 2a070007 orr w7, w0, w7
59620: b9000047 str w7, [x2]
59624: 54ffc9e9 b.ls 58f60 <prepare_ddr_timing+0x1df4> // b.plast
59628: 710c809f cmp w4, #0x320
5962c: 54ffc9e9 b.ls 58f68 <prepare_ddr_timing+0x1dfc> // b.plast
59630: 710fa09f cmp w4, #0x3e8
59634: 1a9f97e0 cset w0, hi // hi = pmore
59638: 11001000 add w0, w0, #0x4
5963c: 5155f426 sub w6, w1, #0x57d, lsl #12
59640: 510660c6 sub w6, w6, #0x198
59644: b94000c2 ldr w2, [x6]
59648: 12046c42 and w2, w2, #0xf0ffffff
5964c: 2a006040 orr w0, w2, w0, lsl #24
59650: 52800042 mov w2, #0x2 // #2
59654: b90000c0 str w0, [x6]
59658: 52800020 mov w0, #0x1 // #1
5965c: b9406be6 ldr w6, [sp, #104]
59660: 6b0200df cmp w6, w2
59664: 540000a3 b.cc 59678 <prepare_ddr_timing+0x250c> // b.lo, b.ul, b.last
59668: 11000400 add w0, w0, #0x1
5966c: 531f7842 lsl w2, w2, #1
59670: 7100201f cmp w0, #0x8
59674: 54ffff41 b.ne 5965c <prepare_ddr_timing+0x24f0> // b.any
59678: 5155f426 sub w6, w1, #0x57d, lsl #12
5967c: 5104d0c6 sub w6, w6, #0x134
59680: b94000c2 ldr w2, [x6]
59684: 12157042 and w2, w2, #0xfffff8ff
59688: 2a002040 orr w0, w2, w0, lsl #8
5968c: b90000c0 str w0, [x6]
59690: b9403660 ldr w0, [x19, #52]
59694: 71000c1f cmp w0, #0x3
59698: 54ffc6c0 b.eq 58f70 <prepare_ddr_timing+0x1e04> // b.none
5969c: 71001c1f cmp w0, #0x7
596a0: 54000220 b.eq 596e4 <prepare_ddr_timing+0x2578> // b.none
596a4: 7100181f cmp w0, #0x6
596a8: 54000240 b.eq 596f0 <prepare_ddr_timing+0x2584> // b.none
596ac: d0000040 adrp x0, 63000 <CSWTCH.22+0x37e>
596b0: 910e9800 add x0, x0, #0x3a6
596b4: 94001474 bl 5e884 <tf_log>
596b8: 2a1403e0 mov w0, w20
596bc: a94363f7 ldp x23, x24, [sp, #48]
596c0: 8b000a73 add x19, x19, x0, lsl #2
596c4: a9446bf9 ldp x25, x26, [sp, #64]
596c8: 2a1403e0 mov w0, w20
596cc: a94573fb ldp x27, x28, [sp, #80]
596d0: b9000675 str w21, [x19, #4]
596d4: a94153f3 ldp x19, x20, [sp, #16]
596d8: a9425bf5 ldp x21, x22, [sp, #32]
596dc: a8df7bfd ldp x29, x30, [sp], #496
596e0: d65f03c0 ret
596e4: 52807082 mov w2, #0x384 // #900
596e8: 5280bb80 mov w0, #0x5dc // #1500
596ec: 17fffe23 b 58f78 <prepare_ddr_timing+0x1e0c>
596f0: 52807082 mov w2, #0x384 // #900
596f4: 52813880 mov w0, #0x9c4 // #2500
596f8: 17fffe20 b 58f78 <prepare_ddr_timing+0x1e0c>
596fc: 52800003 mov w3, #0x0 // #0
59700: 17fffe82 b 59108 <prepare_ddr_timing+0x1f9c>
59704: 32100210 orr w16, w16, #0x10000
59708: b90000d0 str w16, [x6]
5970c: b9400066 ldr w6, [x3]
59710: 321000c6 orr w6, w6, #0x10000
59714: b9000066 str w6, [x3]
59718: b9400043 ldr w3, [x2]
5971c: 32100063 orr w3, w3, #0x10000
59720: b9000043 str w3, [x2]
59724: b9400002 ldr w2, [x0]
59728: 32100042 orr w2, w2, #0x10000
5972c: 17fffee8 b 592cc <prepare_ddr_timing+0x2160>
59730: 52807d00 mov w0, #0x3e8 // #1000
59734: 17fffeee b 592ec <prepare_ddr_timing+0x2180>
59738: b94000e0 ldr w0, [x7]
5973c: 7216041f tst w0, #0xc00
59740: 54ffe980 b.eq 59470 <prepare_ddr_timing+0x2304> // b.none
59744: 2a1403e0 mov w0, w20
59748: 5155f422 sub w2, w1, #0x57d, lsl #12
5974c: 8b284403 add x3, x0, w8, uxtw #1
59750: 5155f430 sub w16, w1, #0x57d, lsl #12
59754: b00000a0 adrp x0, 6e000 <iomux_status+0x2c>
59758: 9130f000 add x0, x0, #0xc3c
5975c: 513c1042 sub w2, w2, #0xf04
59760: 8b031000 add x0, x0, x3, lsl #4
59764: 511c1210 sub w16, w16, #0x704
59768: 2a0203e6 mov w6, w2
5976c: b840441a ldr w26, [x0], #4
59770: b94000c3 ldr w3, [x6]
59774: 33102743 bfi w3, w26, #16, #10
59778: b90000c3 str w3, [x6]
5977c: 1100f046 add w6, w2, #0x3c
59780: 11080042 add w2, w2, #0x200
59784: 6b02021f cmp w16, w2
59788: b94000c3 ldr w3, [x6]
5978c: 12157063 and w3, w3, #0xfffff8ff
59790: b90000c3 str w3, [x6]
59794: 54fffea1 b.ne 59768 <prepare_ddr_timing+0x25fc> // b.any
59798: 17ffff36 b 59470 <prepare_ddr_timing+0x2304>
000000000005979c <ddr_get_rate>:
5979c: d2800881 mov x1, #0x44 // #68
597a0: d2800802 mov x2, #0x40 // #64
597a4: f2bfeec1 movk x1, #0xff76, lsl #16
597a8: f2bfeec2 movk x2, #0xff76, lsl #16
597ac: b9400020 ldr w0, [x1]
597b0: b9400043 ldr w3, [x2]
597b4: 12001404 and w4, w0, #0x3f
597b8: 52800300 mov w0, #0x18 // #24
597bc: 12002c63 and w3, w3, #0xfff
597c0: b9400022 ldr w2, [x1]
597c4: b9400021 ldr w1, [x1]
597c8: 1ac40800 udiv w0, w0, w4
597cc: d3482842 ubfx x2, x2, #8, #3
597d0: d34c3821 ubfx x1, x1, #12, #3
597d4: 1b037c00 mul w0, w0, w3
597d8: 1ac20800 udiv w0, w0, w2
597dc: 1ac10800 udiv w0, w0, w1
597e0: 52884801 mov w1, #0x4240 // #16960
597e4: 72a001e1 movk w1, #0xf, lsl #16
597e8: 1b017c00 mul w0, w0, w1
597ec: d65f03c0 ret
00000000000597f0 <exit_low_power>:
597f0: d2806100 mov x0, #0x308 // #776
597f4: f2bfe640 movk x0, #0xff32, lsl #16
597f8: b9400001 ldr w1, [x0]
597fc: 531c7c23 lsr w3, w1, #28
59800: d35c7020 ubfx x0, x1, #28, #1
59804: 36e00561 tbz w1, #28, 598b0 <exit_low_power+0xc0>
59808: d2800080 mov x0, #0x4 // #4
5980c: 52a00021 mov w1, #0x10000 // #65536
59810: f2bfec40 movk x0, #0xff62, lsl #16
59814: b9000001 str w1, [x0]
59818: d2800481 mov x1, #0x24 // #36
5981c: f2bfe621 movk x1, #0xff31, lsl #16
59820: b9400020 ldr w0, [x1]
59824: b9400022 ldr w2, [x1]
59828: 53087c00 lsr w0, w0, #8
5982c: 12177842 and w2, w2, #0xfffffeff
59830: b9000022 str w2, [x1]
59834: d2801302 mov x2, #0x98 // #152
59838: 531c0000 ubfiz w0, w0, #4, #1
5983c: f2bfe622 movk x2, #0xff31, lsl #16
59840: b9400041 ldr w1, [x2]
59844: 3607ffe1 tbz w1, #0, 59840 <exit_low_power+0x50>
59848: d2803282 mov x2, #0x194 // #404
5984c: f2bff502 movk x2, #0xffa8, lsl #16
59850: b9400041 ldr w1, [x2]
59854: 121d7021 and w1, w1, #0xfffffff8
59858: b9000041 str w1, [x2]
5985c: d2803201 mov x1, #0x190 // #400
59860: f2bff501 movk x1, #0xffa8, lsl #16
59864: b9400021 ldr w1, [x1]
59868: d3587821 ubfx x1, x1, #24, #7
5986c: 7101003f cmp w1, #0x40
59870: 54000200 b.eq 598b0 <exit_low_power+0xc0> // b.none
59874: 91063042 add x2, x2, #0x18c
59878: b9400041 ldr w1, [x2]
5987c: 3707ffe1 tbnz w1, #0, 59878 <exit_low_power+0x88>
59880: d2802e82 mov x2, #0x174 // #372
59884: 52ad2004 mov w4, #0x69000000 // #1761607680
59888: f2bff502 movk x2, #0xffa8, lsl #16
5988c: 91007042 add x2, x2, #0x1c
59890: b85e4041 ldur w1, [x2, #-28]
59894: 12005c21 and w1, w1, #0xffffff
59898: 2a040021 orr w1, w1, w4
5989c: b81e4041 stur w1, [x2, #-28]
598a0: b9400041 ldr w1, [x2]
598a4: d3587821 ubfx x1, x1, #24, #7
598a8: 7101003f cmp w1, #0x40
598ac: 54ffffa1 b.ne 598a0 <exit_low_power+0xb0> // b.any
598b0: 36080563 tbz w3, #1, 5995c <exit_low_power+0x16c>
598b4: d2800081 mov x1, #0x4 // #4
598b8: 52a00042 mov w2, #0x20000 // #131072
598bc: f2bfec41 movk x1, #0xff62, lsl #16
598c0: b9000022 str w2, [x1]
598c4: d2800481 mov x1, #0x24 // #36
598c8: f2bfe621 movk x1, #0xff31, lsl #16
598cc: b9400022 ldr w2, [x1]
598d0: 12140042 and w2, w2, #0x1000
598d4: 2a020000 orr w0, w0, w2
598d8: b9400022 ldr w2, [x1]
598dc: 12137842 and w2, w2, #0xffffefff
598e0: b9000022 str w2, [x1]
598e4: d2801302 mov x2, #0x98 // #152
598e8: f2bfe622 movk x2, #0xff31, lsl #16
598ec: b9400041 ldr w1, [x2]
598f0: 360fffe1 tbz w1, #1, 598ec <exit_low_power+0xfc>
598f4: d2903282 mov x2, #0x8194 // #33172
598f8: f2bff502 movk x2, #0xffa8, lsl #16
598fc: b9400041 ldr w1, [x2]
59900: 121d7021 and w1, w1, #0xfffffff8
59904: b9000041 str w1, [x2]
59908: d2903201 mov x1, #0x8190 // #33168
5990c: f2bff501 movk x1, #0xffa8, lsl #16
59910: b9400021 ldr w1, [x1]
59914: d3587821 ubfx x1, x1, #24, #7
59918: 7101003f cmp w1, #0x40
5991c: 54000200 b.eq 5995c <exit_low_power+0x16c> // b.none
59920: 91063042 add x2, x2, #0x18c
59924: b9400041 ldr w1, [x2]
59928: 3707ffe1 tbnz w1, #0, 59924 <exit_low_power+0x134>
5992c: d2902e82 mov x2, #0x8174 // #33140
59930: 52ad2003 mov w3, #0x69000000 // #1761607680
59934: f2bff502 movk x2, #0xffa8, lsl #16
59938: 91007042 add x2, x2, #0x1c
5993c: b85e4041 ldur w1, [x2, #-28]
59940: 12005c21 and w1, w1, #0xffffff
59944: 2a030021 orr w1, w1, w3
59948: b81e4041 stur w1, [x2, #-28]
5994c: b9400041 ldr w1, [x2]
59950: d3587821 ubfx x1, x1, #24, #7
59954: 7101003f cmp w1, #0x40
59958: 54ffffa1 b.ne 5994c <exit_low_power+0x15c> // b.any
5995c: d65f03c0 ret
0000000000059960 <resume_low_power>:
59960: d2806101 mov x1, #0x308 // #776
59964: f2bfe641 movk x1, #0xff32, lsl #16
59968: b9400021 ldr w1, [x1]
5996c: 531c7c23 lsr w3, w1, #28
59970: 36e00261 tbz w1, #28, 599bc <resume_low_power+0x5c>
59974: d2800482 mov x2, #0x24 // #36
59978: 53047c01 lsr w1, w0, #4
5997c: f2bfe622 movk x2, #0xff31, lsl #16
59980: 53180021 ubfiz w1, w1, #8, #1
59984: b9400044 ldr w4, [x2]
59988: 2a040021 orr w1, w1, w4
5998c: b9000041 str w1, [x2]
59990: d2803282 mov x2, #0x194 // #404
59994: 12000801 and w1, w0, #0x7
59998: f2bff502 movk x2, #0xffa8, lsl #16
5999c: b9400044 ldr w4, [x2]
599a0: 2a040021 orr w1, w1, w4
599a4: b9000041 str w1, [x2]
599a8: d2800082 mov x2, #0x4 // #4
599ac: d3430c01 ubfx x1, x0, #3, #1
599b0: f2bfec42 movk x2, #0xff62, lsl #16
599b4: 32100021 orr w1, w1, #0x10000
599b8: b9000041 str w1, [x2]
599bc: 36080263 tbz w3, #1, 59a08 <resume_low_power+0xa8>
599c0: d2800482 mov x2, #0x24 // #36
599c4: 12140001 and w1, w0, #0x1000
599c8: f2bfe622 movk x2, #0xff31, lsl #16
599cc: b9400043 ldr w3, [x2]
599d0: 2a030021 orr w1, w1, w3
599d4: b9000041 str w1, [x2]
599d8: d2903282 mov x2, #0x8194 // #33172
599dc: d3482801 ubfx x1, x0, #8, #3
599e0: f2bff502 movk x2, #0xffa8, lsl #16
599e4: 530b7c00 lsr w0, w0, #11
599e8: b9400043 ldr w3, [x2]
599ec: 531f0000 ubfiz w0, w0, #1, #1
599f0: 320f0000 orr w0, w0, #0x20000
599f4: 2a030021 orr w1, w1, w3
599f8: b9000041 str w1, [x2]
599fc: d2800081 mov x1, #0x4 // #4
59a00: f2bfec41 movk x1, #0xff62, lsl #16
59a04: b9000020 str w0, [x1]
59a08: d65f03c0 ret
0000000000059a0c <dram_dfs_init>:
59a0c: 907f9ac2 adrp x2, ff3b1000 <rk3399m0pmu_bin>
59a10: 91092042 add x2, x2, #0x248
59a14: a9bf7bfd stp x29, x30, [sp, #-16]!
59a18: b00000a8 adrp x8, 6e000 <iomux_status+0x2c>
59a1c: 912ea106 add x6, x8, #0xba8
59a20: 910003fd mov x29, sp
59a24: 39413043 ldrb w3, [x2, #76]
59a28: 71000c7f cmp w3, #0x3
59a2c: 540003a0 b.eq 59aa0 <dram_dfs_init+0x94> // b.none
59a30: d2804500 mov x0, #0x228 // #552
59a34: d2804581 mov x1, #0x22c // #556
59a38: 7100187f cmp w3, #0x6
59a3c: f2bff500 movk x0, #0xffa8, lsl #16
59a40: f2bff501 movk x1, #0xffa8, lsl #16
59a44: 54001a60 b.eq 59d90 <dram_dfs_init+0x384> // b.none
59a48: b9400004 ldr w4, [x0]
59a4c: b9400020 ldr w0, [x1]
59a50: d3431484 ubfx x4, x4, #3, #3
59a54: 7100009f cmp w4, #0x0
59a58: 53187c01 lsr w1, w0, #24
59a5c: 7a471884 ccmp w4, #0x7, #0x4, ne // ne = any
59a60: 54001e40 b.eq 59e28 <dram_dfs_init+0x41c> // b.none
59a64: 52801e05 mov w5, #0xf0 // #240
59a68: 1ac408a4 udiv w4, w5, w4
59a6c: b9007cc4 str w4, [x6, #124]
59a70: 72000821 ands w1, w1, #0x7
59a74: 7a471824 ccmp w1, #0x7, #0x4, ne // ne = any
59a78: 54001dc0 b.eq 59e30 <dram_dfs_init+0x424> // b.none
59a7c: 52801e04 mov w4, #0xf0 // #240
59a80: 1ac10881 udiv w1, w4, w1
59a84: d35c7800 ubfx x0, x0, #28, #3
59a88: b90080c1 str w1, [x6, #128]
59a8c: 7100001f cmp w0, #0x0
59a90: 7a471804 ccmp w0, #0x7, #0x4, ne // ne = any
59a94: 54001d21 b.ne 59e38 <dram_dfs_init+0x42c> // b.any
59a98: b90084df str wzr, [x6, #132]
59a9c: 14000010 b 59adc <dram_dfs_init+0xd0>
59aa0: d2804280 mov x0, #0x214 // #532
59aa4: 52800504 mov w4, #0x28 // #40
59aa8: f2bff500 movk x0, #0xffa8, lsl #16
59aac: b9400000 ldr w0, [x0]
59ab0: 53147c01 lsr w1, w0, #20
59ab4: 2a404421 orr w1, w1, w0, lsr #17
59ab8: f240003f tst x1, #0x1
59abc: 52800441 mov w1, #0x22 // #34
59ac0: 1a841021 csel w1, w1, w4, ne // ne = any
59ac4: b9007cc1 str w1, [x6, #124]
59ac8: 53157c01 lsr w1, w0, #21
59acc: 2a404821 orr w1, w1, w0, lsr #18
59ad0: 2a405c20 orr w0, w1, w0, lsr #23
59ad4: 37001580 tbnz w0, #0, 59d84 <dram_dfs_init+0x378>
59ad8: b90080df str wzr, [x6, #128]
59adc: 3941344a ldrb w10, [x2, #77]
59ae0: aa0603e4 mov x4, x6
59ae4: 52800009 mov w9, #0x0 // #0
59ae8: 528002ae mov w14, #0x15 // #21
59aec: 5280010b mov w11, #0x8 // #8
59af0: 5280002c mov w12, #0x1 // #1
59af4: 5280008f mov w15, #0x4 // #4
59af8: 52800070 mov w16, #0x3 // #3
59afc: 6b0a013f cmp w9, w10
59b00: 54001a43 b.cc 59e48 <dram_dfs_init+0x43c> // b.lo, b.ul, b.last
59b04: b90034c3 str w3, [x6, #52]
59b08: 7100187f cmp w3, #0x6
59b0c: b9003cca str w10, [x6, #60]
59b10: 540000a0 b.eq 59b24 <dram_dfs_init+0x118> // b.none
59b14: 71001c7f cmp w3, #0x7
59b18: 54001e20 b.eq 59edc <dram_dfs_init+0x4d0> // b.none
59b1c: 71000c7f cmp w3, #0x3
59b20: 54000061 b.ne 59b2c <dram_dfs_init+0x120> // b.any
59b24: 52800100 mov w0, #0x8 // #8
59b28: 29087cc0 stp w0, wzr, [x6, #64]
59b2c: b9407cc0 ldr w0, [x6, #124]
59b30: 52800144 mov w4, #0xa // #10
59b34: b90058c0 str w0, [x6, #88]
59b38: 528004e2 mov w2, #0x27 // #39
59b3c: b94080c0 ldr w0, [x6, #128]
59b40: 71000c7f cmp w3, #0x3
59b44: b9005cc0 str w0, [x6, #92]
59b48: b94084c0 ldr w0, [x6, #132]
59b4c: b90060c0 str w0, [x6, #96]
59b50: d2840280 mov x0, #0x2014 // #8212
59b54: f2bff500 movk x0, #0xffa8, lsl #16
59b58: b9400000 ldr w0, [x0]
59b5c: d3504000 ubfx x0, x0, #16, #1
59b60: b9004cc0 str w0, [x6, #76]
59b64: d2801800 mov x0, #0xc0 // #192
59b68: f2bff500 movk x0, #0xffa8, lsl #16
59b6c: 91001000 add x0, x0, #0x4
59b70: b85fc001 ldur w1, [x0, #-4]
59b74: b9400000 ldr w0, [x0]
59b78: 53107c21 lsr w1, w1, #16
59b7c: 53107c00 lsr w0, w0, #16
59b80: 11002021 add w1, w1, #0x8
59b84: 11002000 add w0, w0, #0x8
59b88: 1b047c21 mul w1, w1, w4
59b8c: 1b047c00 mul w0, w0, w4
59b90: 1ac20821 udiv w1, w1, w2
59b94: 1ac20800 udiv w0, w0, w2
59b98: d2803782 mov x2, #0x1bc // #444
59b9c: f2bff502 movk x2, #0xffa8, lsl #16
59ba0: 290080c1 stp w1, w0, [x6, #4]
59ba4: b9400047 ldr w7, [x2]
59ba8: d35044e7 ubfx x7, x7, #16, #2
59bac: b90ba907 str w7, [x8, #2984]
59bb0: 54000081 b.ne 59bc0 <dram_dfs_init+0x1b4> // b.any
59bb4: 53017c21 lsr w1, w1, #1
59bb8: 53017c00 lsr w0, w0, #1
59bbc: 290080c1 stp w1, w0, [x6, #4]
59bc0: d37e04e9 ubfiz x9, x7, #2, #2
59bc4: 8b0900c9 add x9, x6, x9
59bc8: b9400520 ldr w0, [x9, #4]
59bcc: 97fff4ea bl 56f74 <to_get_clk_index>
59bd0: 93407c00 sxtw x0, w0
59bd4: d2800381 mov x1, #0x1c // #28
59bd8: 110004e7 add w7, w7, #0x1
59bdc: 5280e004 mov w4, #0x700 // #1792
59be0: 9b017c00 mul x0, x0, x1
59be4: b0000041 adrp x1, 62000 <vprintf+0x400>
59be8: 910e7021 add x1, x1, #0x39c
59bec: d37e00e7 ubfiz x7, x7, #2, #1
59bf0: 8b0700c7 add x7, x6, x7
59bf4: 72a00044 movk w4, #0x2, lsl #16
59bf8: b8606822 ldr w2, [x1, x0]
59bfc: d29c4001 mov x1, #0xe200 // #57856
59c00: f2bfeee1 movk x1, #0xff77, lsl #16
59c04: b9000522 str w2, [x9, #4]
59c08: b90004ff str wzr, [x7, #4]
59c0c: 12800000 mov w0, #0xffffffff // #-1
59c10: 2901fcc2 stp w2, wzr, [x6, #12]
59c14: 529e1e07 mov w7, #0xf0f0 // #61680
59c18: b9000020 str w0, [x1]
59c1c: 72bfff07 movk w7, #0xfff8, lsl #16
59c20: b9000420 str w0, [x1, #4]
59c24: b9000820 str w0, [x1, #8]
59c28: b9000c20 str w0, [x1, #12]
59c2c: d29c4200 mov x0, #0xe210 // #57872
59c30: f2bfeee0 movk x0, #0xff77, lsl #16
59c34: 32048be1 mov w1, #0x70007000 // #1879076864
59c38: b9000001 str w1, [x0]
59c3c: d285c001 mov x1, #0x2e00 // #11776
59c40: f2bff501 movk x1, #0xffa8, lsl #16
59c44: b9400020 ldr w0, [x1]
59c48: 121f7800 and w0, w0, #0xfffffffe
59c4c: b9000020 str w0, [x1]
59c50: 91402021 add x1, x1, #0x8, lsl #12
59c54: b9400020 ldr w0, [x1]
59c58: 121f7800 and w0, w0, #0xfffffffe
59c5c: b9000020 str w0, [x1]
59c60: 52800001 mov w1, #0x0 // #0
59c64: b94034c0 ldr w0, [x6, #52]
59c68: b9403cc5 ldr w5, [x6, #60]
59c6c: 52803286 mov w6, #0x194 // #404
59c70: 71000c1f cmp w0, #0x3
59c74: 5280e000 mov w0, #0x700 // #1792
59c78: 72a00060 movk w0, #0x3, lsl #16
59c7c: 1a800084 csel w4, w4, w0, eq // eq = none
59c80: 72bff506 movk w6, #0xffa8, lsl #16
59c84: 6b0100bf cmp w5, w1
59c88: 54001321 b.ne 59eec <dram_dfs_init+0x4e0> // b.any
59c8c: d2800180 mov x0, #0xc // #12
59c90: 52800101 mov w1, #0x8 // #8
59c94: f2bfec40 movk x0, #0xff62, lsl #16
59c98: 72a00c81 movk w1, #0x64, lsl #16
59c9c: 710008bf cmp w5, #0x2
59ca0: b9000001 str w1, [x0]
59ca4: 52801a00 mov w0, #0xd0 // #208
59ca8: 72a01e00 movk w0, #0xf0, lsl #16
59cac: 54000121 b.ne 59cd0 <dram_dfs_init+0x2c4> // b.any
59cb0: d29c7181 mov x1, #0xe38c // #58252
59cb4: 52800503 mov w3, #0x28 // #40
59cb8: f2bfeee1 movk x1, #0xff77, lsl #16
59cbc: 72a00543 movk w3, #0x2a, lsl #16
59cc0: b9000020 str w0, [x1]
59cc4: d2800081 mov x1, #0x4 // #4
59cc8: f2bfec41 movk x1, #0xff62, lsl #16
59ccc: b9000023 str w3, [x1]
59cd0: d29c7081 mov x1, #0xe384 // #58244
59cd4: b00000a4 adrp x4, 6e000 <iomux_status+0x2c>
59cd8: f2bfeee1 movk x1, #0xff77, lsl #16
59cdc: b9000020 str w0, [x1]
59ce0: d2800080 mov x0, #0x4 // #4
59ce4: f2bfec40 movk x0, #0xff62, lsl #16
59ce8: 52800281 mov w1, #0x14 // #20
59cec: 72a002a1 movk w1, #0x15, lsl #16
59cf0: b9000001 str w1, [x0]
59cf4: d2842b00 mov x0, #0x2158 // #8536
59cf8: f2bff500 movk x0, #0xffa8, lsl #16
59cfc: b9400000 ldr w0, [x0]
59d00: d3482c00 ubfx x0, x0, #8, #4
59d04: 7100301f cmp w0, #0xc
59d08: 54001000 b.eq 59f08 <dram_dfs_init+0x4fc> // b.none
59d0c: d285c003 mov x3, #0x2e00 // #11776
59d10: b94ba900 ldr w0, [x8, #2984]
59d14: f2bff503 movk x3, #0xffa8, lsl #16
59d18: b9400061 ldr w1, [x3]
59d1c: 12167421 and w1, w1, #0xfffffcff
59d20: 2a002020 orr w0, w1, w0, lsl #8
59d24: b9000060 str w0, [x3]
59d28: d2842680 mov x0, #0x2134 // #8500
59d2c: d2842701 mov x1, #0x2138 // #8504
59d30: f2bff500 movk x0, #0xffa8, lsl #16
59d34: f2bff501 movk x1, #0xffa8, lsl #16
59d38: 52884803 mov w3, #0x4240 // #16960
59d3c: b9400000 ldr w0, [x0]
59d40: 72a001e3 movk w3, #0xf, lsl #16
59d44: b9400021 ldr w1, [x1]
59d48: d3506400 ubfx x0, x0, #16, #10
59d4c: 12000c21 and w1, w1, #0xf
59d50: 1b037c00 mul w0, w0, w3
59d54: 1b037c21 mul w1, w1, w3
59d58: 52942403 mov w3, #0xa120 // #41248
59d5c: 72a000e3 movk w3, #0x7, lsl #16
59d60: 1ac20800 udiv w0, w0, w2
59d64: 1ac20863 udiv w3, w3, w2
59d68: 1ac20821 udiv w1, w1, w2
59d6c: 53097c00 lsr w0, w0, #9
59d70: 4b030000 sub w0, w0, w3
59d74: 0b010000 add w0, w0, w1
59d78: a8c17bfd ldp x29, x30, [sp], #16
59d7c: b90ba480 str w0, [x4, #2980]
59d80: d65f03c0 ret
59d84: 52800780 mov w0, #0x3c // #60
59d88: b90080c0 str w0, [x6, #128]
59d8c: 17ffff54 b 59adc <dram_dfs_init+0xd0>
59d90: b9400000 ldr w0, [x0]
59d94: b9400021 ldr w1, [x1]
59d98: 12000c00 and w0, w0, #0xf
59d9c: 71002c1f cmp w0, #0xb
59da0: d3586421 ubfx x1, x1, #24, #2
59da4: 54000121 b.ne 59dc8 <dram_dfs_init+0x3bc> // b.any
59da8: 5281af00 mov w0, #0xd78 // #3448
59dac: b9007cc0 str w0, [x6, #124]
59db0: 7100043f cmp w1, #0x1
59db4: 54fffe80 b.eq 59d84 <dram_dfs_init+0x378> // b.none
59db8: 7100083f cmp w1, #0x2
59dbc: 54000301 b.ne 59e1c <dram_dfs_init+0x410> // b.any
59dc0: 52800f00 mov w0, #0x78 // #120
59dc4: 17fffff1 b 59d88 <dram_dfs_init+0x37c>
59dc8: 7100281f cmp w0, #0xa
59dcc: 54000061 b.ne 59dd8 <dram_dfs_init+0x3cc> // b.any
59dd0: 5281fa00 mov w0, #0xfd0 // #4048
59dd4: 17fffff6 b 59dac <dram_dfs_init+0x3a0>
59dd8: 7100241f cmp w0, #0x9
59ddc: 54000061 b.ne 59de8 <dram_dfs_init+0x3dc> // b.any
59de0: 5281ae00 mov w0, #0xd70 // #3440
59de4: 17fffff2 b 59dac <dram_dfs_init+0x3a0>
59de8: 7100101f cmp w0, #0x4
59dec: 54000061 b.ne 59df8 <dram_dfs_init+0x3ec> // b.any
59df0: 52800780 mov w0, #0x3c // #60
59df4: 17ffffee b 59dac <dram_dfs_init+0x3a0>
59df8: 71000c1f cmp w0, #0x3
59dfc: 54000061 b.ne 59e08 <dram_dfs_init+0x3fc> // b.any
59e00: 52800600 mov w0, #0x30 // #48
59e04: 17ffffea b 59dac <dram_dfs_init+0x3a0>
59e08: 7100081f cmp w0, #0x2
59e0c: 52800444 mov w4, #0x22 // #34
59e10: 52800500 mov w0, #0x28 // #40
59e14: 1a840000 csel w0, w0, w4, eq // eq = none
59e18: 17ffffe5 b 59dac <dram_dfs_init+0x3a0>
59e1c: 34ffe5e1 cbz w1, 59ad8 <dram_dfs_init+0xcc>
59e20: 52801e00 mov w0, #0xf0 // #240
59e24: 17ffffd9 b 59d88 <dram_dfs_init+0x37c>
59e28: 52800504 mov w4, #0x28 // #40
59e2c: 17ffff10 b 59a6c <dram_dfs_init+0x60>
59e30: 52800001 mov w1, #0x0 // #0
59e34: 17ffff14 b 59a84 <dram_dfs_init+0x78>
59e38: 52801e01 mov w1, #0xf0 // #240
59e3c: 1ac00820 udiv w0, w1, w0
59e40: b90084c0 str w0, [x6, #132]
59e44: 17ffff26 b 59adc <dram_dfs_init+0xd0>
59e48: 3940004d ldrb w13, [x2]
59e4c: 91007091 add x17, x4, #0x1c
59e50: d2800005 mov x5, #0x0 // #0
59e54: 2902b48e stp w14, w13, [x4, #20]
59e58: 6b0501bf cmp w13, w5
59e5c: 540000a8 b.hi 59e70 <dram_dfs_init+0x464> // b.pmore
59e60: 11000529 add w9, w9, #0x1
59e64: 91004084 add x4, x4, #0x10
59e68: 91009042 add x2, x2, #0x24
59e6c: 17ffff24 b 59afc <dram_dfs_init+0xf0>
59e70: 35000325 cbnz w5, 59ed4 <dram_dfs_init+0x4c8>
59e74: 39401852 ldrb w18, [x2, #6]
59e78: 39400c41 ldrb w1, [x2, #3]
59e7c: 39401040 ldrb w0, [x2, #4]
59e80: 1ac12161 lsl w1, w11, w1
59e84: 1ac02160 lsl w0, w11, w0
59e88: 1ac00827 udiv w7, w1, w0
59e8c: 39400840 ldrb w0, [x2, #2]
59e90: 1ac02180 lsl w0, w12, w0
59e94: 1acf0c00 sdiv w0, w0, w15
59e98: 0b411001 add w1, w0, w1, lsr #4
59e9c: 39400440 ldrb w0, [x2, #1]
59ea0: 11000400 add w0, w0, #0x1
59ea4: 0b000020 add w0, w1, w0
59ea8: 0b120000 add w0, w0, w18
59eac: 39401452 ldrb w18, [x2, #5]
59eb0: 1ac02181 lsl w1, w12, w0
59eb4: 7100025f cmp w18, #0x0
59eb8: 1ac02200 lsl w0, w16, w0
59ebc: 53027c00 lsr w0, w0, #2
59ec0: 1a811000 csel w0, w0, w1, ne // ne = any
59ec4: 1ac70800 udiv w0, w0, w7
59ec8: b8257a20 str w0, [x17, x5, lsl #2]
59ecc: 910004a5 add x5, x5, #0x1
59ed0: 17ffffe2 b 59e58 <dram_dfs_init+0x44c>
59ed4: 39401c52 ldrb w18, [x2, #7]
59ed8: 17ffffe8 b 59e78 <dram_dfs_init+0x46c>
59edc: 52800200 mov w0, #0x10 // #16
59ee0: 29087cc0 stp w0, wzr, [x6, #64]
59ee4: 290a7cdf stp wzr, wzr, [x6, #80]
59ee8: 17ffff11 b 59b2c <dram_dfs_init+0x120>
59eec: 0b013cc3 add w3, w6, w1, lsl #15
59ef0: 11000421 add w1, w1, #0x1
59ef4: b9400060 ldr w0, [x3]
59ef8: 0a070000 and w0, w0, w7
59efc: 2a040000 orr w0, w0, w4
59f00: b9000060 str w0, [x3]
59f04: 17ffff60 b 59c84 <dram_dfs_init+0x278>
59f08: 5281b580 mov w0, #0xdac // #3500
59f0c: 17ffff9b b 59d78 <dram_dfs_init+0x36c>
0000000000059f10 <dram_set_odt_pd>:
59f10: a9bf7bfd stp x29, x30, [sp, #-16]!
59f14: b00000a5 adrp x5, 6e000 <iomux_status+0x2c>
59f18: 912ea0a5 add x5, x5, #0xba8
59f1c: 2a0003e6 mov w6, w0
59f20: 2a0103e7 mov w7, w1
59f24: 910003fd mov x29, sp
59f28: 12001c00 and w0, w0, #0xff
59f2c: 12002c2a and w10, w1, #0xfff
59f30: b94034ab ldr w11, [x5, #52]
59f34: 12000042 and w2, w2, #0x1
59f38: b9403ca9 ldr w9, [x5, #60]
59f3c: 53107cc8 lsr w8, w6, #16
59f40: 290c80aa stp w10, w0, [x5, #100]
59f44: d3483cc0 ubfx x0, x6, #8, #8
59f48: b9006ca0 str w0, [x5, #108]
59f4c: d3506ce0 ubfx x0, x7, #16, #12
59f50: b90070a0 str w0, [x5, #112]
59f54: b90074a8 str w8, [x5, #116]
59f58: b9004ca2 str w2, [x5, #76]
59f5c: 97fffe25 bl 597f0 <exit_low_power>
59f60: b94064a0 ldr w0, [x5, #100]
59f64: b94070a1 ldr w1, [x5, #112]
59f68: 52802022 mov w2, #0x101 // #257
59f6c: 7100001f cmp w0, #0x0
59f70: b94068a0 ldr w0, [x5, #104]
59f74: 1a9f1042 csel w2, w2, wzr, ne // ne = any
59f78: 52804043 mov w3, #0x202 // #514
59f7c: 2a010000 orr w0, w0, w1
59f80: 2a0203e1 mov w1, w2
59f84: 7100001f cmp w0, #0x0
59f88: b9406ca0 ldr w0, [x5, #108]
59f8c: 2a030042 orr w2, w2, w3
59f90: 1a811042 csel w2, w2, w1, ne // ne = any
59f94: b90010a2 str w2, [x5, #16]
59f98: 340000a0 cbz w0, 59fac <dram_set_odt_pd+0x9c>
59f9c: 2a0203e0 mov w0, w2
59fa0: 52808081 mov w1, #0x404 // #1028
59fa4: 2a010000 orr w0, w0, w1
59fa8: b90010a0 str w0, [x5, #16]
59fac: b94074a0 ldr w0, [x5, #116]
59fb0: 34000120 cbz w0, 59fd4 <dram_set_odt_pd+0xc4>
59fb4: b94010a0 ldr w0, [x5, #16]
59fb8: 52810103 mov w3, #0x808 // #2056
59fbc: b9403ca2 ldr w2, [x5, #60]
59fc0: 321d0001 orr w1, w0, #0x8
59fc4: 2a030000 orr w0, w0, w3
59fc8: 7100085f cmp w2, #0x2
59fcc: 1a810000 csel w0, w0, w1, eq // eq = none
59fd0: b90010a0 str w0, [x5, #16]
59fd4: 71001d7f cmp w11, #0x7
59fd8: 52803303 mov w3, #0x198 // #408
59fdc: 52803384 mov w4, #0x19c // #412
59fe0: 1a8a00e7 csel w7, w7, w10, eq // eq = none
59fe4: 12003cc6 and w6, w6, #0xffff
59fe8: 52800000 mov w0, #0x0 // #0
59fec: 72bff503 movk w3, #0xffa8, lsl #16
59ff0: 72bff504 movk w4, #0xffa8, lsl #16
59ff4: 6b09001f cmp w0, w9
59ff8: 540000e1 b.ne 5a014 <dram_set_odt_pd+0x104> // b.any
59ffc: d2800100 mov x0, #0x8 // #8
5a000: f2bfec40 movk x0, #0xff62, lsl #16
5a004: b9000008 str w8, [x0]
5a008: 52800000 mov w0, #0x0 // #0
5a00c: a8c17bfd ldp x29, x30, [sp], #16
5a010: d65f03c0 ret
5a014: 0b003c61 add w1, w3, w0, lsl #15
5a018: 0b003c82 add w2, w4, w0, lsl #15
5a01c: 11000400 add w0, w0, #0x1
5a020: b9000027 str w7, [x1]
5a024: b9400041 ldr w1, [x2]
5a028: 12103c21 and w1, w1, #0xffff0000
5a02c: 2a060021 orr w1, w1, w6
5a030: b9000041 str w1, [x2]
5a034: 17fffff0 b 59ff4 <dram_set_odt_pd+0xe4>
000000000005a038 <ddr_set_rate>:
5a038: a9bc7bfd stp x29, x30, [sp, #-64]!
5a03c: 52884801 mov w1, #0x4240 // #16960
5a040: 72a001e1 movk w1, #0xf, lsl #16
5a044: 910003fd mov x29, sp
5a048: a9025bf5 stp x21, x22, [sp, #32]
5a04c: 900000b6 adrp x22, 6e000 <iomux_status+0x2c>
5a050: 912ea2d5 add x21, x22, #0xba8
5a054: a90153f3 stp x19, x20, [sp, #16]
5a058: 1ac10813 udiv w19, w0, w1
5a05c: b94baac0 ldr w0, [x22, #2984]
5a060: a90363f7 stp x23, x24, [sp, #48]
5a064: 8b000aa0 add x0, x21, x0, lsl #2
5a068: b9400400 ldr w0, [x0, #4]
5a06c: 6b13001f cmp w0, w19
5a070: 54000760 b.eq 5a15c <ddr_set_rate+0x124> // b.none
5a074: 2a1303e0 mov w0, w19
5a078: 97fff3bf bl 56f74 <to_get_clk_index>
5a07c: 2a0003f4 mov w20, w0
5a080: 2a0003e0 mov w0, w0
5a084: d2800381 mov x1, #0x1c // #28
5a088: 90000042 adrp x2, 62000 <vprintf+0x400>
5a08c: 910e7058 add x24, x2, #0x39c
5a090: 9b017c00 mul x0, x0, x1
5a094: b8606b13 ldr w19, [x24, x0]
5a098: 2a1303e0 mov w0, w19
5a09c: 97fff434 bl 5716c <prepare_ddr_timing>
5a0a0: 7104127f cmp w19, #0x104
5a0a4: b9403ea5 ldr w5, [x21, #60]
5a0a8: 1a9f97e3 cset w3, hi // hi = pmore
5a0ac: 2a0003f7 mov w23, w0
5a0b0: 52809880 mov w0, #0x4c4 // #1220
5a0b4: 52800002 mov w2, #0x0 // #0
5a0b8: 53103c66 lsl w6, w3, #16
5a0bc: 72bff500 movk w0, #0xffa8, lsl #16
5a0c0: 6b0200bf cmp w5, w2
5a0c4: 54000581 b.ne 5a174 <ddr_set_rate+0x13c> // b.any
5a0c8: 710006ff cmp w23, #0x1
5a0cc: 540003c8 b.hi 5a144 <ddr_set_rate+0x10c> // b.pmore
5a0d0: 52800382 mov w2, #0x1c // #28
5a0d4: 52aee7e4 mov w4, #0x773f0000 // #2000617472
5a0d8: 9ba26282 umaddl x2, w20, w2, x24
5a0dc: b9400441 ldr w1, [x2, #4]
5a0e0: 29418c45 ldp w5, w3, [x2, #12]
5a0e4: 2a040024 orr w4, w1, w4
5a0e8: d07fc321 adrp x1, ff8c0000 <rk3399m0_bin>
5a0ec: 91000020 add x0, x1, #0x0
5a0f0: b9400841 ldr w1, [x2, #8]
5a0f4: 32102c21 orr w1, w1, #0xfff0000
5a0f8: b900c801 str w1, [x0, #200]
5a0fc: 53185ca1 lsl w1, w5, #8
5a100: 2a033021 orr w1, w1, w3, lsl #12
5a104: 2a040021 orr w1, w1, w4
5a108: b900cc01 str w1, [x0, #204]
5a10c: b900c413 str w19, [x0, #196]
5a110: 531c6ee1 lsl w1, w23, #4
5a114: b900e001 str w1, [x0, #224]
5a118: d5033ebf dmb st
5a11c: 97fff117 bl 56578 <m0_configure_execute_addr>
5a120: 97fff121 bl 565a4 <m0_start>
5a124: 97fff141 bl 56628 <m0_wait_done>
5a128: 97fff136 bl 56600 <m0_stop>
5a12c: b9404ea0 ldr w0, [x21, #76]
5a130: 35000040 cbnz w0, 5a138 <ddr_set_rate+0x100>
5a134: 97fff35a bl 56e9c <gen_rk3399_set_odt>
5a138: b94012a0 ldr w0, [x21, #16]
5a13c: b90baad7 str w23, [x22, #2984]
5a140: 97fffe08 bl 59960 <resume_low_power>
5a144: b9403ea4 ldr w4, [x21, #60]
5a148: 52809880 mov w0, #0x4c4 // #1220
5a14c: 72bff500 movk w0, #0xffa8, lsl #16
5a150: 52800001 mov w1, #0x0 // #0
5a154: 6b01009f cmp w4, w1
5a158: 54000301 b.ne 5a1b8 <ddr_set_rate+0x180> // b.any
5a15c: 2a1303e0 mov w0, w19
5a160: a94153f3 ldp x19, x20, [sp, #16]
5a164: a9425bf5 ldp x21, x22, [sp, #32]
5a168: a94363f7 ldp x23, x24, [sp, #48]
5a16c: a8c47bfd ldp x29, x30, [sp], #64
5a170: d65f03c0 ret
5a174: 2a0003e4 mov w4, w0
5a178: 11000442 add w2, w2, #0x1
5a17c: b9400081 ldr w1, [x4]
5a180: 120f7821 and w1, w1, #0xfffeffff
5a184: 2a060021 orr w1, w1, w6
5a188: b9000081 str w1, [x4]
5a18c: 510ea004 sub w4, w0, #0x3a8
5a190: b9400081 ldr w1, [x4]
5a194: 121f7821 and w1, w1, #0xfffffffe
5a198: 2a030021 orr w1, w1, w3
5a19c: b9000081 str w1, [x4]
5a1a0: 510eb004 sub w4, w0, #0x3ac
5a1a4: 11402000 add w0, w0, #0x8, lsl #12
5a1a8: b9400081 ldr w1, [x4]
5a1ac: 32180021 orr w1, w1, #0x100
5a1b0: b9000081 str w1, [x4]
5a1b4: 17ffffc3 b 5a0c0 <ddr_set_rate+0x88>
5a1b8: 2a0003e3 mov w3, w0
5a1bc: 11000421 add w1, w1, #0x1
5a1c0: b9400062 ldr w2, [x3]
5a1c4: 120f7842 and w2, w2, #0xfffeffff
5a1c8: b9000062 str w2, [x3]
5a1cc: 510ea003 sub w3, w0, #0x3a8
5a1d0: b9400062 ldr w2, [x3]
5a1d4: 121f7842 and w2, w2, #0xfffffffe
5a1d8: b9000062 str w2, [x3]
5a1dc: 510eb003 sub w3, w0, #0x3ac
5a1e0: 11402000 add w0, w0, #0x8, lsl #12
5a1e4: b9400062 ldr w2, [x3]
5a1e8: 12177842 and w2, w2, #0xfffffeff
5a1ec: b9000062 str w2, [x3]
5a1f0: 17ffffd9 b 5a154 <ddr_set_rate+0x11c>
000000000005a1f4 <ddr_round_rate>:
5a1f4: 52884806 mov w6, #0x4240 // #16960
5a1f8: a9bf7bfd stp x29, x30, [sp, #-16]!
5a1fc: 72a001e6 movk w6, #0xf, lsl #16
5a200: 910003fd mov x29, sp
5a204: 1ac60800 udiv w0, w0, w6
5a208: 97fff35b bl 56f74 <to_get_clk_index>
5a20c: 93407c00 sxtw x0, w0
5a210: d2800381 mov x1, #0x1c // #28
5a214: a8c17bfd ldp x29, x30, [sp], #16
5a218: 9b017c00 mul x0, x0, x1
5a21c: 90000041 adrp x1, 62000 <vprintf+0x400>
5a220: 910e7021 add x1, x1, #0x39c
5a224: b8606820 ldr w0, [x1, x0]
5a228: 1b067c00 mul w0, w0, w6
5a22c: d65f03c0 ret
000000000005a230 <ddr_prepare_for_sys_suspend>:
5a230: a9be7bfd stp x29, x30, [sp, #-32]!
5a234: 900000a0 adrp x0, 6e000 <iomux_status+0x2c>
5a238: 910003fd mov x29, sp
5a23c: f9000bf3 str x19, [sp, #16]
5a240: 912ea013 add x19, x0, #0xba8
5a244: b94ba800 ldr w0, [x0, #2984]
5a248: 8b000a60 add x0, x19, x0, lsl #2
5a24c: b9400405 ldr w5, [x0, #4]
5a250: 900000a0 adrp x0, 6e000 <iomux_status+0x2c>
5a254: 9130c006 add x6, x0, #0xc30
5a258: b90c3005 str w5, [x0, #3120]
5a25c: 97fffd65 bl 597f0 <exit_low_power>
5a260: b9401260 ldr w0, [x19, #16]
5a264: b90004c0 str w0, [x6, #4]
5a268: b9404e60 ldr w0, [x19, #76]
5a26c: b90008c0 str w0, [x6, #8]
5a270: 52800020 mov w0, #0x1 // #1
5a274: b900127f str wzr, [x19, #16]
5a278: b9004e60 str w0, [x19, #76]
5a27c: b9400e60 ldr w0, [x19, #12]
5a280: 6b05001f cmp w0, w5
5a284: 540000a0 b.eq 5a298 <ddr_prepare_for_sys_suspend+0x68> // b.none
5a288: 52884801 mov w1, #0x4240 // #16960
5a28c: 72a001e1 movk w1, #0xf, lsl #16
5a290: 1b017c00 mul w0, w0, w1
5a294: 97ffff69 bl 5a038 <ddr_set_rate>
5a298: b9400e60 ldr w0, [x19, #12]
5a29c: f9400bf3 ldr x19, [sp, #16]
5a2a0: a8c27bfd ldp x29, x30, [sp], #32
5a2a4: 17fff3b2 b 5716c <prepare_ddr_timing>
000000000005a2a8 <ddr_prepare_for_sys_resume>:
5a2a8: d285c001 mov x1, #0x2e00 // #11776
5a2ac: 900000a2 adrp x2, 6e000 <iomux_status+0x2c>
5a2b0: f2bff501 movk x1, #0xffa8, lsl #16
5a2b4: b9400020 ldr w0, [x1]
5a2b8: 121f7800 and w0, w0, #0xfffffffe
5a2bc: b9000020 str w0, [x1]
5a2c0: 91402021 add x1, x1, #0x8, lsl #12
5a2c4: b9400020 ldr w0, [x1]
5a2c8: 121f7800 and w0, w0, #0xfffffffe
5a2cc: b9000020 str w0, [x1]
5a2d0: d2803780 mov x0, #0x1bc // #444
5a2d4: f2bff500 movk x0, #0xffa8, lsl #16
5a2d8: b9400001 ldr w1, [x0]
5a2dc: 900000a0 adrp x0, 6e000 <iomux_status+0x2c>
5a2e0: 912ea007 add x7, x0, #0xba8
5a2e4: d3504421 ubfx x1, x1, #16, #2
5a2e8: b90ba801 str w1, [x0, #2984]
5a2ec: 9130c040 add x0, x2, #0xc30
5a2f0: b94c3042 ldr w2, [x2, #3120]
5a2f4: d37e0421 ubfiz x1, x1, #2, #2
5a2f8: 8b0100e1 add x1, x7, x1
5a2fc: 29408003 ldp w3, w0, [x0, #4]
5a300: b90010e3 str w3, [x7, #16]
5a304: b9400421 ldr w1, [x1, #4]
5a308: b9004ce0 str w0, [x7, #76]
5a30c: 6b01005f cmp w2, w1
5a310: 540000a0 b.eq 5a324 <ddr_prepare_for_sys_resume+0x7c> // b.none
5a314: 52884800 mov w0, #0x4240 // #16960
5a318: 72a001e0 movk w0, #0xf, lsl #16
5a31c: 1b007c40 mul w0, w2, w0
5a320: 17ffff46 b 5a038 <ddr_set_rate>
5a324: a9bf7bfd stp x29, x30, [sp, #-16]!
5a328: 910003fd mov x29, sp
5a32c: 97fff2dc bl 56e9c <gen_rk3399_set_odt>
5a330: b94010e0 ldr w0, [x7, #16]
5a334: a8c17bfd ldp x29, x30, [sp], #16
5a338: 17fffd8a b 59960 <resume_low_power>
000000000005a33c <dram_init>:
5a33c: d2806100 mov x0, #0x308 // #776
5a340: f07f9aa3 adrp x3, ff3b1000 <rk3399m0pmu_bin>
5a344: f2bfe640 movk x0, #0xff32, lsl #16
5a348: b9400001 ldr w1, [x0]
5a34c: 91092060 add x0, x3, #0x248
5a350: d34d3c22 ubfx x2, x1, #13, #3
5a354: 39013002 strb w2, [x0, #76]
5a358: d34c3022 ubfx x2, x1, #12, #1
5a35c: 11000442 add w2, w2, #0x1
5a360: 39013402 strb w2, [x0, #77]
5a364: d29c0202 mov x2, #0xe010 // #57360
5a368: f2bfe662 movk x2, #0xff33, lsl #16
5a36c: b9400042 ldr w2, [x2]
5a370: d34a3842 ubfx x2, x2, #10, #5
5a374: 39013802 strb w2, [x0, #78]
5a378: 36e006c1 tbz w1, #28, 5a450 <dram_init+0x114>
5a37c: d34b2c22 ubfx x2, x1, #11, #1
5a380: 11000442 add w2, w2, #0x1
5a384: 39092062 strb w2, [x3, #584]
5a388: d3492822 ubfx x2, x1, #9, #2
5a38c: d3482023 ubfx x3, x1, #8, #1
5a390: 11002442 add w2, w2, #0x9
5a394: 39000402 strb w2, [x0, #1]
5a398: 52800062 mov w2, #0x3 // #3
5a39c: 4b030042 sub w2, w2, w3
5a3a0: d3420c23 ubfx x3, x1, #2, #2
5a3a4: 39000802 strb w2, [x0, #2]
5a3a8: 52800042 mov w2, #0x2 // #2
5a3ac: 1ac32843 asr w3, w2, w3
5a3b0: 39000c03 strb w3, [x0, #3]
5a3b4: 12000423 and w3, w1, #0x3
5a3b8: 1ac32842 asr w2, w2, w3
5a3bc: 39001002 strb w2, [x0, #4]
5a3c0: d35e7822 ubfx x2, x1, #30, #1
5a3c4: 39001402 strb w2, [x0, #5]
5a3c8: d3461c22 ubfx x2, x1, #6, #2
5a3cc: 11003442 add w2, w2, #0xd
5a3d0: 39001802 strb w2, [x0, #6]
5a3d4: d3441422 ubfx x2, x1, #4, #2
5a3d8: 11003442 add w2, w2, #0xd
5a3dc: 39001c02 strb w2, [x0, #7]
5a3e0: d2880102 mov x2, #0x4008 // #16392
5a3e4: f2bff502 movk x2, #0xffa8, lsl #16
5a3e8: b9400042 ldr w2, [x2]
5a3ec: b9000802 str w2, [x0, #8]
5a3f0: d2880202 mov x2, #0x4010 // #16400
5a3f4: f2bff502 movk x2, #0xffa8, lsl #16
5a3f8: b9400042 ldr w2, [x2]
5a3fc: b9000c02 str w2, [x0, #12]
5a400: d2880282 mov x2, #0x4014 // #16404
5a404: f2bff502 movk x2, #0xffa8, lsl #16
5a408: b9400042 ldr w2, [x2]
5a40c: b9001002 str w2, [x0, #16]
5a410: d2880302 mov x2, #0x4018 // #16408
5a414: f2bff502 movk x2, #0xffa8, lsl #16
5a418: b9400042 ldr w2, [x2]
5a41c: b9001402 str w2, [x0, #20]
5a420: d2880382 mov x2, #0x401c // #16412
5a424: f2bff502 movk x2, #0xffa8, lsl #16
5a428: b9400042 ldr w2, [x2]
5a42c: b9001802 str w2, [x0, #24]
5a430: d2882202 mov x2, #0x4110 // #16656
5a434: f2bff502 movk x2, #0xffa8, lsl #16
5a438: b9400042 ldr w2, [x2]
5a43c: b9001c02 str w2, [x0, #28]
5a440: d28a0002 mov x2, #0x5000 // #20480
5a444: f2bff502 movk x2, #0xffa8, lsl #16
5a448: b9400042 ldr w2, [x2]
5a44c: b9002002 str w2, [x0, #32]
5a450: 36e806c1 tbz w1, #29, 5a528 <dram_init+0x1ec>
5a454: d35b6c22 ubfx x2, x1, #27, #1
5a458: d3586023 ubfx x3, x1, #24, #1
5a45c: 11000442 add w2, w2, #0x1
5a460: 39009002 strb w2, [x0, #36]
5a464: d3596822 ubfx x2, x1, #25, #2
5a468: 11002442 add w2, w2, #0x9
5a46c: 39009402 strb w2, [x0, #37]
5a470: 52800062 mov w2, #0x3 // #3
5a474: 4b030042 sub w2, w2, w3
5a478: d3524c23 ubfx x3, x1, #18, #2
5a47c: 39009802 strb w2, [x0, #38]
5a480: 52800042 mov w2, #0x2 // #2
5a484: 1ac32843 asr w3, w2, w3
5a488: 39009c03 strb w3, [x0, #39]
5a48c: d3504423 ubfx x3, x1, #16, #2
5a490: 1ac32842 asr w2, w2, w3
5a494: 3900a002 strb w2, [x0, #40]
5a498: 531f7c22 lsr w2, w1, #31
5a49c: 3900a402 strb w2, [x0, #41]
5a4a0: d3565c22 ubfx x2, x1, #22, #2
5a4a4: d3545421 ubfx x1, x1, #20, #2
5a4a8: 11003421 add w1, w1, #0xd
5a4ac: 3900ac01 strb w1, [x0, #43]
5a4b0: d2980101 mov x1, #0xc008 // #49160
5a4b4: 11003442 add w2, w2, #0xd
5a4b8: f2bff501 movk x1, #0xffa8, lsl #16
5a4bc: 3900a802 strb w2, [x0, #42]
5a4c0: b9400021 ldr w1, [x1]
5a4c4: b9002c01 str w1, [x0, #44]
5a4c8: d2980201 mov x1, #0xc010 // #49168
5a4cc: f2bff501 movk x1, #0xffa8, lsl #16
5a4d0: b9400021 ldr w1, [x1]
5a4d4: b9003001 str w1, [x0, #48]
5a4d8: d2980281 mov x1, #0xc014 // #49172
5a4dc: f2bff501 movk x1, #0xffa8, lsl #16
5a4e0: b9400021 ldr w1, [x1]
5a4e4: b9003401 str w1, [x0, #52]
5a4e8: d2980301 mov x1, #0xc018 // #49176
5a4ec: f2bff501 movk x1, #0xffa8, lsl #16
5a4f0: b9400021 ldr w1, [x1]
5a4f4: b9003801 str w1, [x0, #56]
5a4f8: d2980381 mov x1, #0xc01c // #49180
5a4fc: f2bff501 movk x1, #0xffa8, lsl #16
5a500: b9400021 ldr w1, [x1]
5a504: b9003c01 str w1, [x0, #60]
5a508: d2982201 mov x1, #0xc110 // #49424
5a50c: f2bff501 movk x1, #0xffa8, lsl #16
5a510: b9400021 ldr w1, [x1]
5a514: b9004001 str w1, [x0, #64]
5a518: d29a0001 mov x1, #0xd000 // #53248
5a51c: f2bff501 movk x1, #0xffa8, lsl #16
5a520: b9400021 ldr w1, [x1]
5a524: b9004401 str w1, [x0, #68]
5a528: d65f03c0 ret
000000000005a52c <get_max_die_capability>:
5a52c: aa0003e1 mov x1, x0
5a530: 52800000 mov w0, #0x0 // #0
5a534: b9402822 ldr w2, [x1, #40]
5a538: 8b225022 add x2, x1, w2, uxtw #4
5a53c: eb02003f cmp x1, x2
5a540: 540001a0 b.eq 5a574 <get_max_die_capability+0x48> // b.none
5a544: b9400423 ldr w3, [x1, #4]
5a548: 34000123 cbz w3, 5a56c <get_max_die_capability+0x40>
5a54c: b9400824 ldr w4, [x1, #8]
5a550: 6b04001f cmp w0, w4
5a554: 1a842000 csel w0, w0, w4, cs // cs = hs, nlast
5a558: 7100047f cmp w3, #0x1
5a55c: 54000089 b.ls 5a56c <get_max_die_capability+0x40> // b.plast
5a560: b9400c23 ldr w3, [x1, #12]
5a564: 6b03001f cmp w0, w3
5a568: 1a832000 csel w0, w0, w3, cs // cs = hs, nlast
5a56c: 91004021 add x1, x1, #0x10
5a570: 17fffff3 b 5a53c <get_max_die_capability+0x10>
5a574: d65f03c0 ret
000000000005a578 <dram_get_parameter>:
5a578: a9bc7bfd stp x29, x30, [sp, #-64]!
5a57c: 910003fd mov x29, sp
5a580: a90363f7 stp x23, x24, [sp, #48]
5a584: b9402017 ldr w23, [x0, #32]
5a588: a90153f3 stp x19, x20, [sp, #16]
5a58c: aa0103f3 mov x19, x1
5a590: 51000ee1 sub w1, w23, #0x3
5a594: a9025bf5 stp x21, x22, [sp, #32]
5a598: 7100103f cmp w1, #0x4
5a59c: 54002008 b.hi 5a99c <dram_get_parameter+0x424> // b.pmore
5a5a0: aa0003f5 mov x21, x0
5a5a4: 90000040 adrp x0, 62000 <vprintf+0x400>
5a5a8: 9116a000 add x0, x0, #0x5a8
5a5ac: 78615800 ldrh w0, [x0, w1, uxtw #1]
5a5b0: 10000061 adr x1, 5a5bc <dram_get_parameter+0x44>
5a5b4: 8b20a820 add x0, x1, w0, sxth #2
5a5b8: d61f0000 br x0
5a5bc: 294482b4 ldp w20, w0, [x21, #36]
5a5c0: b94002b8 ldr w24, [x21]
5a5c4: 7100041f cmp w0, #0x1
5a5c8: 54000089 b.ls 5a5d8 <dram_get_parameter+0x60> // b.plast
5a5cc: b94012a0 ldr w0, [x21, #16]
5a5d0: 6b00031f cmp w24, w0
5a5d4: 1a802318 csel w24, w24, w0, cs // cs = hs, nlast
5a5d8: aa1503e0 mov x0, x21
5a5dc: 97ffffd4 bl 5a52c <get_max_die_capability>
5a5e0: d2803001 mov x1, #0x180 // #384
5a5e4: 2a0003f6 mov w22, w0
5a5e8: aa1303e0 mov x0, x19
5a5ec: 9400193a bl 60ad4 <zeromem>
5a5f0: b9402ea3 ldr w3, [x21, #44]
5a5f4: 71052a9f cmp w20, #0x14a
5a5f8: b9000274 str w20, [x19]
5a5fc: 2a1803e0 mov w0, w24
5a600: b901727f str wzr, [x19, #368]
5a604: b9017e63 str w3, [x19, #380]
5a608: 540002a9 b.ls 5a65c <dram_get_parameter+0xe4> // b.plast
5a60c: 7106429f cmp w20, #0x190
5a610: 54001d09 b.ls 5a9b0 <dram_get_parameter+0x438> // b.plast
5a614: 7108569f cmp w20, #0x215
5a618: 54001d09 b.ls 5a9b8 <dram_get_parameter+0x440> // b.plast
5a61c: 710a6a9f cmp w20, #0x29a
5a620: 540000c9 b.ls 5a638 <dram_get_parameter+0xc0> // b.plast
5a624: 710c829f cmp w20, #0x320
5a628: 54001cc9 b.ls 5a9c0 <dram_get_parameter+0x448> // b.plast
5a62c: 710e969f cmp w20, #0x3a5
5a630: 1a9f97f7 cset w23, hi // hi = pmore
5a634: 110016f7 add w23, w23, #0x5
5a638: b0000041 adrp x1, 63000 <CSWTCH.22+0x37e>
5a63c: 910f4422 add x2, x1, #0x3d1
5a640: d28000e1 mov x1, #0x7 // #7
5a644: 9b010801 madd x1, x0, x1, x2
5a648: 38774821 ldrb w1, [x1, w23, uxtw]
5a64c: 53047c22 lsr w2, w1, #4
5a650: 12000c21 and w1, w1, #0xf
5a654: b9017662 str w2, [x19, #372]
5a658: 14000005 b 5a66c <dram_get_parameter+0xf4>
5a65c: 7104ae9f cmp w20, #0x12b
5a660: 54001b48 b.hi 5a9c8 <dram_get_parameter+0x450> // b.pmore
5a664: 528000c1 mov w1, #0x6 // #6
5a668: b9017661 str w1, [x19, #372]
5a66c: b9403aa2 ldr w2, [x21, #56]
5a670: b9017a61 str w1, [x19, #376]
5a674: b94046a1 ldr w1, [x21, #68]
5a678: 7100a03f cmp w1, #0x28
5a67c: 1a9f07e1 cset w1, ne // ne = any
5a680: 531f7821 lsl w1, w1, #1
5a684: 34000142 cbz w2, 5a6ac <dram_get_parameter+0x134>
5a688: b9404aa4 ldr w4, [x21, #72]
5a68c: 7100f09f cmp w4, #0x3c
5a690: 54001a00 b.eq 5a9d0 <dram_get_parameter+0x458> // b.none
5a694: 7101e09f cmp w4, #0x78
5a698: 54001a00 b.eq 5a9d8 <dram_get_parameter+0x460> // b.none
5a69c: 7100a09f cmp w4, #0x28
5a6a0: 52800882 mov w2, #0x44 // #68
5a6a4: 2a020022 orr w2, w1, w2
5a6a8: 1a821021 csel w1, w1, w2, ne // ne = any
5a6ac: b9417a66 ldr w6, [x19, #376]
5a6b0: 52807d09 mov w9, #0x3e8 // #1000
5a6b4: b900e661 str w1, [x19, #228]
5a6b8: 528001e4 mov w4, #0xf // #15
5a6bc: 510014c1 sub w1, w6, #0x5
5a6c0: 5283cf07 mov w7, #0x1e78 // #7800
5a6c4: 1b047e84 mul w4, w20, w4
5a6c8: b9417662 ldr w2, [x19, #372]
5a6cc: 531d0821 ubfiz w1, w1, #3, #3
5a6d0: b900ea61 str w1, [x19, #232]
5a6d4: 52800c81 mov w1, #0x64 // #100
5a6d8: 110f9c84 add w4, w4, #0x3e7
5a6dc: 1b077e87 mul w7, w20, w7
5a6e0: 29050a62 stp w2, w2, [x19, #40]
5a6e4: 1b017e81 mul w1, w20, w1
5a6e8: 528464ea mov w10, #0x2327 // #8999
5a6ec: 110f9ce7 add w7, w7, #0x3e7
5a6f0: 6b0a009f cmp w4, w10
5a6f4: 110f9c21 add w1, w1, #0x3e7
5a6f8: 5280008a mov w10, #0x4 // #4
5a6fc: 1ac90885 udiv w5, w4, w9
5a700: b900466a str w10, [x19, #68]
5a704: b9004e7f str wzr, [x19, #76]
5a708: 1ac90821 udiv w1, w1, w9
5a70c: b900ee7f str wzr, [x19, #236]
5a710: 1ac908e7 udiv w7, w7, w9
5a714: 510010a8 sub w8, w5, #0x4
5a718: b9003265 str w5, [x19, #48]
5a71c: b9001a61 str w1, [x19, #24]
5a720: 52942401 mov w1, #0xa120 // #41248
5a724: 72a000e1 movk w1, #0x7, lsl #16
5a728: 29040a67 stp w7, w2, [x19, #32]
5a72c: 0b070ce7 add w7, w7, w7, lsl #3
5a730: 1b017e81 mul w1, w20, w1
5a734: b9005267 str w7, [x19, #80]
5a738: 110f9c21 add w1, w1, #0x3e7
5a73c: 1ac90821 udiv w1, w1, w9
5a740: b9001e61 str w1, [x19, #28]
5a744: 0b050041 add w1, w2, w5
5a748: b9003661 str w1, [x19, #52]
5a74c: 110004a1 add w1, w5, #0x1
5a750: 51001042 sub w2, w2, #0x4
5a754: 53017c21 lsr w1, w1, #1
5a758: 1a888021 csel w1, w1, w8, hi // hi = pmore
5a75c: 53017c44 lsr w4, w2, #1
5a760: 121e0084 and w4, w4, #0x4
5a764: 531c0842 ubfiz w2, w2, #4, #3
5a768: 2a020082 orr w2, w4, w2
5a76c: 53170821 ubfiz w1, w1, #9, #3
5a770: 2a020021 orr w1, w1, w2
5a774: 7100107f cmp w3, #0x4
5a778: 321f0022 orr w2, w1, #0x2
5a77c: 53017e83 lsr w3, w20, #1
5a780: 1a810041 csel w1, w2, w1, eq // eq = none
5a784: 90000042 adrp x2, 62000 <vprintf+0x400>
5a788: 9118d842 add x2, x2, #0x636
5a78c: b900e261 str w1, [x19, #224]
5a790: 528000e1 mov w1, #0x7 // #7
5a794: 78607844 ldrh w4, [x2, x0, lsl #1]
5a798: 52800142 mov w2, #0xa // #10
5a79c: 1b010e83 madd w3, w20, w1, w3
5a7a0: 1b027e82 mul w2, w20, w2
5a7a4: 53087c80 lsr w0, w4, #8
5a7a8: 110f9c61 add w1, w3, #0x3e7
5a7ac: 110f9c48 add w8, w2, #0x3e7
5a7b0: 12001c84 and w4, w4, #0xff
5a7b4: 1ac90821 udiv w1, w1, w9
5a7b8: 1b147c00 mul w0, w0, w20
5a7bc: 1b147c84 mul w4, w4, w20
5a7c0: 1ac90908 udiv w8, w8, w9
5a7c4: 110f9c00 add w0, w0, #0x3e7
5a7c8: 110f9c84 add w4, w4, #0x3e7
5a7cc: 6b0a003f cmp w1, w10
5a7d0: 1ac90800 udiv w0, w0, w9
5a7d4: 1a8a202b csel w11, w1, w10, cs // cs = hs, nlast
5a7d8: 6b0a011f cmp w8, w10
5a7dc: b9003a6b str w11, [x19, #56]
5a7e0: 1ac90884 udiv w4, w4, w9
5a7e4: b9004a6b str w11, [x19, #72]
5a7e8: b9003e60 str w0, [x19, #60]
5a7ec: 1a8a2100 csel w0, w8, w10, cs // cs = hs, nlast
5a7f0: b9004260 str w0, [x19, #64]
5a7f4: 528003c0 mov w0, #0x1e // #30
5a7f8: b9005a64 str w4, [x19, #88]
5a7fc: 1b000e83 madd w3, w20, w0, w3
5a800: 110f9c60 add w0, w3, #0x3e7
5a804: 1ac90800 udiv w0, w0, w9
5a808: b9005660 str w0, [x19, #84]
5a80c: 52a08000 mov w0, #0x4000000 // #67108864
5a810: 6b0002df cmp w22, w0
5a814: 54000e69 b.ls 5a9e0 <dram_get_parameter+0x468> // b.plast
5a818: 52a10000 mov w0, #0x8000000 // #134217728
5a81c: 6b0002df cmp w22, w0
5a820: 54000e49 b.ls 5a9e8 <dram_get_parameter+0x470> // b.plast
5a824: 52a20000 mov w0, #0x10000000 // #268435456
5a828: 6b0002df cmp w22, w0
5a82c: 54000e29 b.ls 5a9f0 <dram_get_parameter+0x478> // b.plast
5a830: 52a40000 mov w0, #0x20000000 // #536870912
5a834: 6b0002df cmp w22, w0
5a838: 52802bc4 mov w4, #0x15e // #350
5a83c: 52802580 mov w0, #0x12c // #300
5a840: 1a849000 csel w0, w0, w4, ls // ls = plast
5a844: 1b007e80 mul w0, w20, w0
5a848: 52807d07 mov w7, #0x3e8 // #1000
5a84c: 110f9c04 add w4, w0, #0x3e7
5a850: 0b000040 add w0, w2, w0
5a854: 110f9c00 add w0, w0, #0x3e7
5a858: 528270e2 mov w2, #0x1387 // #4999
5a85c: 6b02001f cmp w0, w2
5a860: 1ac70884 udiv w4, w4, w7
5a864: b9005e64 str w4, [x19, #92]
5a868: 54000c89 b.ls 5a9f8 <dram_get_parameter+0x480> // b.plast
5a86c: 1ac70800 udiv w0, w0, w7
5a870: 71000c3f cmp w1, #0x3
5a874: b9006e60 str w0, [x19, #108]
5a878: 52800060 mov w0, #0x3 // #3
5a87c: 1a802020 csel w0, w1, w0, cs // cs = hs, nlast
5a880: b9007260 str w0, [x19, #112]
5a884: 52800300 mov w0, #0x18 // #24
5a888: 52807d02 mov w2, #0x3e8 // #1000
5a88c: 52804004 mov w4, #0x200 // #512
5a890: 1b007e80 mul w0, w20, w0
5a894: 52800147 mov w7, #0xa // #10
5a898: 290c927f stp wzr, w4, [x19, #100]
5a89c: 110f9c00 add w0, w0, #0x3e7
5a8a0: b9007a64 str w4, [x19, #120]
5a8a4: 1ac20800 udiv w0, w0, w2
5a8a8: 7100281f cmp w0, #0xa
5a8ac: 1a872000 csel w0, w0, w7, cs // cs = hs, nlast
5a8b0: b9007660 str w0, [x19, #116]
5a8b4: 7108529f cmp w20, #0x214
5a8b8: 540000a9 b.ls 5a8cc <dram_get_parameter+0x354> // b.plast
5a8bc: 528000c1 mov w1, #0x6 // #6
5a8c0: 1b017e81 mul w1, w20, w1
5a8c4: 110f9c21 add w1, w1, #0x3e7
5a8c8: 1ac20821 udiv w1, w1, w2
5a8cc: 71000c3f cmp w1, #0x3
5a8d0: 52800060 mov w0, #0x3 // #3
5a8d4: 1a802021 csel w1, w1, w0, cs // cs = hs, nlast
5a8d8: 7100151f cmp w8, #0x5
5a8dc: 528000a0 mov w0, #0x5 // #5
5a8e0: 1a802108 csel w8, w8, w0, cs // cs = hs, nlast
5a8e4: 710030bf cmp w5, #0xc
5a8e8: 52800180 mov w0, #0xc // #12
5a8ec: 1a8020a5 csel w5, w5, w0, cs // cs = hs, nlast
5a8f0: 52800080 mov w0, #0x4 // #4
5a8f4: 29120265 stp w5, w0, [x19, #144]
5a8f8: 52805000 mov w0, #0x280 // #640
5a8fc: b9007e61 str w1, [x19, #124]
5a900: 11000421 add w1, w1, #0x1
5a904: 1b007e80 mul w0, w20, w0
5a908: b9008261 str w1, [x19, #128]
5a90c: 52807d01 mov w1, #0x3e8 // #1000
5a910: 52804002 mov w2, #0x200 // #512
5a914: 110f9c00 add w0, w0, #0x3e7
5a918: 510008c6 sub w6, w6, #0x2
5a91c: 2910a268 stp w8, w8, [x19, #132]
5a920: b9009a7f str wzr, [x19, #152]
5a924: 1ac10800 udiv w0, w0, w1
5a928: b900a266 str w6, [x19, #160]
5a92c: 7108001f cmp w0, #0x200
5a930: 1a822000 csel w0, w0, w2, cs // cs = hs, nlast
5a934: b900a660 str w0, [x19, #164]
5a938: 52800a00 mov w0, #0x50 // #80
5a93c: 52800802 mov w2, #0x40 // #64
5a940: 1b007e80 mul w0, w20, w0
5a944: 110f9c00 add w0, w0, #0x3e7
5a948: 1ac10800 udiv w0, w0, w1
5a94c: 7101001f cmp w0, #0x40
5a950: 1a822000 csel w0, w0, w2, cs // cs = hs, nlast
5a954: b900aa60 str w0, [x19, #168]
5a958: 52802800 mov w0, #0x140 // #320
5a95c: 52802002 mov w2, #0x100 // #256
5a960: 1b007e80 mul w0, w20, w0
5a964: 110f9c00 add w0, w0, #0x3e7
5a968: 1ac10800 udiv w0, w0, w1
5a96c: 7104001f cmp w0, #0x100
5a970: 1a822000 csel w0, w0, w2, cs // cs = hs, nlast
5a974: b900ae60 str w0, [x19, #172]
5a978: 52800500 mov w0, #0x28 // #40
5a97c: b900b660 str w0, [x19, #180]
5a980: 52800320 mov w0, #0x19 // #25
5a984: b900be60 str w0, [x19, #188]
5a988: 52800380 mov w0, #0x1c // #28
5a98c: 1b008e94 msub w20, w20, w0, w3
5a990: 110f9e94 add w20, w20, #0x3e7
5a994: 1ac10a94 udiv w20, w20, w1
5a998: b900ba74 str w20, [x19, #184]
5a99c: a94153f3 ldp x19, x20, [sp, #16]
5a9a0: a9425bf5 ldp x21, x22, [sp, #32]
5a9a4: a94363f7 ldp x23, x24, [sp, #48]
5a9a8: a8c47bfd ldp x29, x30, [sp], #64
5a9ac: d65f03c0 ret
5a9b0: 52800037 mov w23, #0x1 // #1
5a9b4: 17ffff21 b 5a638 <dram_get_parameter+0xc0>
5a9b8: 52800057 mov w23, #0x2 // #2
5a9bc: 17ffff1f b 5a638 <dram_get_parameter+0xc0>
5a9c0: 52800097 mov w23, #0x4 // #4
5a9c4: 17ffff1d b 5a638 <dram_get_parameter+0xc0>
5a9c8: 52800017 mov w23, #0x0 // #0
5a9cc: 17ffff1b b 5a638 <dram_get_parameter+0xc0>
5a9d0: 321e0021 orr w1, w1, #0x4
5a9d4: 17ffff36 b 5a6ac <dram_get_parameter+0x134>
5a9d8: 321a0021 orr w1, w1, #0x40
5a9dc: 17ffff34 b 5a6ac <dram_get_parameter+0x134>
5a9e0: 52800b40 mov w0, #0x5a // #90
5a9e4: 17ffff98 b 5a844 <dram_get_parameter+0x2cc>
5a9e8: 52800dc0 mov w0, #0x6e // #110
5a9ec: 17ffff96 b 5a844 <dram_get_parameter+0x2cc>
5a9f0: 52801400 mov w0, #0xa0 // #160
5a9f4: 17ffff94 b 5a844 <dram_get_parameter+0x2cc>
5a9f8: 528000a0 mov w0, #0x5 // #5
5a9fc: 17ffff9d b 5a870 <dram_get_parameter+0x2f8>
5aa00: aa1503e0 mov x0, x21
5aa04: 97fffeca bl 5a52c <get_max_die_capability>
5aa08: d2803001 mov x1, #0x180 // #384
5aa0c: b94026b4 ldr w20, [x21, #36]
5aa10: 2a0003f6 mov w22, w0
5aa14: aa1303e0 mov x0, x19
5aa18: 9400182f bl 60ad4 <zeromem>
5aa1c: b9402ea2 ldr w2, [x21, #44]
5aa20: 71042a9f cmp w20, #0x10a
5aa24: b9000274 str w20, [x19]
5aa28: b901727f str wzr, [x19, #368]
5aa2c: b9017e62 str w2, [x19, #380]
5aa30: 54000208 b.hi 5aa70 <dram_get_parameter+0x4f8> // b.pmore
5aa34: 52800080 mov w0, #0x4 // #4
5aa38: b9017660 str w0, [x19, #372]
5aa3c: 52800040 mov w0, #0x2 // #2
5aa40: b9017a60 str w0, [x19, #376]
5aa44: b900ea60 str w0, [x19, #232]
5aa48: b94046a0 ldr w0, [x21, #68]
5aa4c: 7100f01f cmp w0, #0x3c
5aa50: 54001c80 b.eq 5ade0 <dram_get_parameter+0x868> // b.none
5aa54: 54000488 b.hi 5aae4 <dram_get_parameter+0x56c> // b.pmore
5aa58: 7100a01f cmp w0, #0x28
5aa5c: 54001ca0 b.eq 5adf0 <dram_get_parameter+0x878> // b.none
5aa60: 7100c01f cmp w0, #0x30
5aa64: 54001c20 b.eq 5ade8 <dram_get_parameter+0x870> // b.none
5aa68: 52800020 mov w0, #0x1 // #1
5aa6c: 14000023 b 5aaf8 <dram_get_parameter+0x580>
5aa70: 7105369f cmp w20, #0x14d
5aa74: 540000e8 b.hi 5aa90 <dram_get_parameter+0x518> // b.pmore
5aa78: 528000a0 mov w0, #0x5 // #5
5aa7c: b9017660 str w0, [x19, #372]
5aa80: 52800040 mov w0, #0x2 // #2
5aa84: b9017a60 str w0, [x19, #376]
5aa88: 52800060 mov w0, #0x3 // #3
5aa8c: 17ffffee b 5aa44 <dram_get_parameter+0x4cc>
5aa90: 7106429f cmp w20, #0x190
5aa94: 540000e8 b.hi 5aab0 <dram_get_parameter+0x538> // b.pmore
5aa98: 528000c0 mov w0, #0x6 // #6
5aa9c: b9017660 str w0, [x19, #372]
5aaa0: 52800060 mov w0, #0x3 // #3
5aaa4: b9017a60 str w0, [x19, #376]
5aaa8: 52800080 mov w0, #0x4 // #4
5aaac: 17ffffe6 b 5aa44 <dram_get_parameter+0x4cc>
5aab0: 71074a9f cmp w20, #0x1d2
5aab4: 52800080 mov w0, #0x4 // #4
5aab8: 540000c8 b.hi 5aad0 <dram_get_parameter+0x558> // b.pmore
5aabc: 528000e1 mov w1, #0x7 // #7
5aac0: b9017661 str w1, [x19, #372]
5aac4: b9017a60 str w0, [x19, #376]
5aac8: 528000a0 mov w0, #0x5 // #5
5aacc: 17ffffde b 5aa44 <dram_get_parameter+0x4cc>
5aad0: 52800101 mov w1, #0x8 // #8
5aad4: b9017661 str w1, [x19, #372]
5aad8: b9017a60 str w0, [x19, #376]
5aadc: 528000c0 mov w0, #0x6 // #6
5aae0: 17ffffd9 b 5aa44 <dram_get_parameter+0x4cc>
5aae4: 7101401f cmp w0, #0x50
5aae8: 54001780 b.eq 5add8 <dram_get_parameter+0x860> // b.none
5aaec: 7101e01f cmp w0, #0x78
5aaf0: 54fffbc1 b.ne 5aa68 <dram_get_parameter+0x4f0> // b.any
5aaf4: 528000e0 mov w0, #0x7 // #7
5aaf8: b900ee60 str w0, [x19, #236]
5aafc: 52800c80 mov w0, #0x64 // #100
5ab00: 52807d01 mov w1, #0x3e8 // #1000
5ab04: b9001a7f str wzr, [x19, #24]
5ab08: 1b007e80 mul w0, w20, w0
5ab0c: b900e27f str wzr, [x19, #224]
5ab10: 1b017e84 mul w4, w20, w1
5ab14: 110f9c00 add w0, w0, #0x3e7
5ab18: 110f9c84 add w4, w4, #0x3e7
5ab1c: 1ac10800 udiv w0, w0, w1
5ab20: 1ac10884 udiv w4, w4, w1
5ab24: b9000660 str w0, [x19, #4]
5ab28: 528000a0 mov w0, #0x5 // #5
5ab2c: b9000a60 str w0, [x19, #8]
5ab30: 5281a800 mov w0, #0xd40 // #3392
5ab34: 72a00060 movk w0, #0x3, lsl #16
5ab38: b9001264 str w4, [x19, #16]
5ab3c: 1b007e80 mul w0, w20, w0
5ab40: 110f9c00 add w0, w0, #0x3e7
5ab44: 1ac10800 udiv w0, w0, w1
5ab48: b9000e60 str w0, [x19, #12]
5ab4c: 5284e200 mov w0, #0x2710 // #10000
5ab50: 1b007e80 mul w0, w20, w0
5ab54: 110f9c00 add w0, w0, #0x3e7
5ab58: 1ac10800 udiv w0, w0, w1
5ab5c: b9001660 str w0, [x19, #20]
5ab60: 52942400 mov w0, #0xa120 // #41248
5ab64: 72a000e0 movk w0, #0x7, lsl #16
5ab68: 1b007e80 mul w0, w20, w0
5ab6c: 110f9c00 add w0, w0, #0x3e7
5ab70: 1ac10800 udiv w0, w0, w1
5ab74: b9001e60 str w0, [x19, #28]
5ab78: 12be0000 mov w0, #0xfffffff // #268435455
5ab7c: 6b0002df cmp w22, w0
5ab80: 540013c9 b.ls 5adf8 <dram_get_parameter+0x880> // b.plast
5ab84: 5281e780 mov w0, #0xf3c // #3900
5ab88: 1b007e80 mul w0, w20, w0
5ab8c: 52807d03 mov w3, #0x3e8 // #1000
5ab90: 528001e5 mov w5, #0xf // #15
5ab94: 110f9c00 add w0, w0, #0x3e7
5ab98: 1b057e85 mul w5, w20, w5
5ab9c: 1ac10801 udiv w1, w0, w1
5aba0: 52800060 mov w0, #0x3 // #3
5aba4: 110f9ca5 add w5, w5, #0x3e7
5aba8: 1ac308a5 udiv w5, w5, w3
5abac: b9002261 str w1, [x19, #32]
5abb0: 52800301 mov w1, #0x18 // #24
5abb4: 1b017e81 mul w1, w20, w1
5abb8: 110f9c21 add w1, w1, #0x3e7
5abbc: 1ac30821 udiv w1, w1, w3
5abc0: 6b00003f cmp w1, w0
5abc4: 1a802021 csel w1, w1, w0, cs // cs = hs, nlast
5abc8: b9002661 str w1, [x19, #36]
5abcc: 52800241 mov w1, #0x12 // #18
5abd0: 1b017e81 mul w1, w20, w1
5abd4: 110f9c21 add w1, w1, #0x3e7
5abd8: 1ac30821 udiv w1, w1, w3
5abdc: 6b00003f cmp w1, w0
5abe0: 1a802021 csel w1, w1, w0, cs // cs = hs, nlast
5abe4: b9002a61 str w1, [x19, #40]
5abe8: 528002a1 mov w1, #0x15 // #21
5abec: 1b017e81 mul w1, w20, w1
5abf0: 110f9c21 add w1, w1, #0x3e7
5abf4: 1ac30821 udiv w1, w1, w3
5abf8: 6b00003f cmp w1, w0
5abfc: 1a802021 csel w1, w1, w0, cs // cs = hs, nlast
5ac00: 6b0000bf cmp w5, w0
5ac04: 1a8020a5 csel w5, w5, w0, cs // cs = hs, nlast
5ac08: 29059661 stp w1, w5, [x19, #44]
5ac0c: 7100405f cmp w2, #0x10
5ac10: 54000f80 b.eq 5ae00 <dram_get_parameter+0x888> // b.none
5ac14: 7100205f cmp w2, #0x8
5ac18: 1a9f17e0 cset w0, eq // eq = none
5ac1c: 11000800 add w0, w0, #0x2
5ac20: 510008a2 sub w2, w5, #0x2
5ac24: 53017e86 lsr w6, w20, #1
5ac28: 52807d09 mov w9, #0x3e8 // #1000
5ac2c: 5280004a mov w10, #0x2 // #2
5ac30: 2a021400 orr w0, w0, w2, lsl #5
5ac34: b900e660 str w0, [x19, #228]
5ac38: 528000e0 mov w0, #0x7 // #7
5ac3c: 52800542 mov w2, #0x2a // #42
5ac40: 52822e08 mov w8, #0x1170 // #4464
5ac44: b900466a str w10, [x19, #68]
5ac48: 1b001a86 madd w6, w20, w0, w6
5ac4c: 52800060 mov w0, #0x3 // #3
5ac50: 1b027e82 mul w2, w20, w2
5ac54: 72a00028 movk w8, #0x1, lsl #16
5ac58: 110f9cc3 add w3, w6, #0x3e7
5ac5c: 110f9c42 add w2, w2, #0x3e7
5ac60: 1b087e88 mul w8, w20, w8
5ac64: 1ac90863 udiv w3, w3, w9
5ac68: 110f9d08 add w8, w8, #0x3e7
5ac6c: 1ac90842 udiv w2, w2, w9
5ac70: 1ac90908 udiv w8, w8, w9
5ac74: 6b0a007f cmp w3, w10
5ac78: 1a8a2067 csel w7, w3, w10, cs // cs = hs, nlast
5ac7c: 71000c5f cmp w2, #0x3
5ac80: 1a802042 csel w2, w2, w0, cs // cs = hs, nlast
5ac84: 52800140 mov w0, #0xa // #10
5ac88: 0b020021 add w1, w1, w2
5ac8c: b9005662 str w2, [x19, #84]
5ac90: 1b007e80 mul w0, w20, w0
5ac94: 52800642 mov w2, #0x32 // #50
5ac98: 29070667 stp w7, w1, [x19, #56]
5ac9c: 110f9c00 add w0, w0, #0x3e7
5aca0: 1b027e82 mul w2, w20, w2
5aca4: 2909a27f stp wzr, w8, [x19, #76]
5aca8: 110f9c42 add w2, w2, #0x3e7
5acac: 1ac90800 udiv w0, w0, w9
5acb0: 1ac90842 udiv w2, w2, w9
5acb4: 6b0a001f cmp w0, w10
5acb8: 1a8a2001 csel w1, w0, w10, cs // cs = hs, nlast
5acbc: 7103229f cmp w20, #0xc8
5acc0: 1a808063 csel w3, w3, w0, hi // hi = pmore
5acc4: b9004261 str w1, [x19, #64]
5acc8: 6b0a007f cmp w3, w10
5accc: 1a8a2063 csel w3, w3, w10, cs // cs = hs, nlast
5acd0: b9004a63 str w3, [x19, #72]
5acd4: 7103229f cmp w20, #0xc8
5acd8: 54000988 b.hi 5ae08 <dram_get_parameter+0x890> // b.pmore
5acdc: 52800780 mov w0, #0x3c // #60
5ace0: 1b007e80 mul w0, w20, w0
5ace4: 110f9c00 add w0, w0, #0x3e7
5ace8: 1ac90800 udiv w0, w0, w9
5acec: b9005a60 str w0, [x19, #88]
5acf0: 52807d01 mov w1, #0x3e8 // #1000
5acf4: 12b80000 mov w0, #0x3fffffff // #1073741823
5acf8: 6b0002df cmp w22, w0
5acfc: 540008a9 b.ls 5ae10 <dram_get_parameter+0x898> // b.plast
5ad00: 52801a40 mov w0, #0xd2 // #210
5ad04: 52801b83 mov w3, #0xdc // #220
5ad08: 1b007e80 mul w0, w20, w0
5ad0c: 110f9c00 add w0, w0, #0x3e7
5ad10: 1ac10800 udiv w0, w0, w1
5ad14: 1b037e83 mul w3, w20, w3
5ad18: b9005e60 str w0, [x19, #92]
5ad1c: 0b140a80 add w0, w20, w20, lsl #2
5ad20: 290e7e67 stp w7, wzr, [x19, #112]
5ad24: 110f9c63 add w3, w3, #0x3e7
5ad28: 4b0000c0 sub w0, w6, w0
5ad2c: b9007a7f str wzr, [x19, #120]
5ad30: b9008265 str w5, [x19, #128]
5ad34: 1ac10861 udiv w1, w3, w1
5ad38: 52800043 mov w3, #0x2 // #2
5ad3c: b9008a63 str w3, [x19, #136]
5ad40: b9009a63 str w3, [x19, #152]
5ad44: b900927f str wzr, [x19, #144]
5ad48: 6b03003f cmp w1, w3
5ad4c: b900a664 str w4, [x19, #164]
5ad50: 1a832021 csel w1, w1, w3, cs // cs = hs, nlast
5ad54: 290d0661 stp w1, w1, [x19, #104]
5ad58: 52807d01 mov w1, #0x3e8 // #1000
5ad5c: 528000c3 mov w3, #0x6 // #6
5ad60: 1ac10806 udiv w6, w0, w1
5ad64: b9006266 str w6, [x19, #96]
5ad68: 0b140686 add w6, w20, w20, lsl #1
5ad6c: 0b0000c6 add w6, w6, w0
5ad70: 52800020 mov w0, #0x1 // #1
5ad74: b9008660 str w0, [x19, #132]
5ad78: 528000a0 mov w0, #0x5 // #5
5ad7c: b9009660 str w0, [x19, #148]
5ad80: 52800b40 mov w0, #0x5a // #90
5ad84: 110f9cc6 add w6, w6, #0x3e7
5ad88: 1b007e80 mul w0, w20, w0
5ad8c: 1ac108c6 udiv w6, w6, w1
5ad90: 110f9c00 add w0, w0, #0x3e7
5ad94: 1ac10800 udiv w0, w0, w1
5ad98: b9006666 str w6, [x19, #100]
5ad9c: 52800066 mov w6, #0x3 // #3
5ada0: b9007e66 str w6, [x19, #124]
5ada4: 6b03001f cmp w0, w3
5ada8: 1a832000 csel w0, w0, w3, cs // cs = hs, nlast
5adac: b900aa60 str w0, [x19, #168]
5adb0: 52802d00 mov w0, #0x168 // #360
5adb4: 1b007e94 mul w20, w20, w0
5adb8: 110f9e94 add w20, w20, #0x3e7
5adbc: 1ac10a94 udiv w20, w20, w1
5adc0: 6b03029f cmp w20, w3
5adc4: 1a832294 csel w20, w20, w3, cs // cs = hs, nlast
5adc8: 6b06005f cmp w2, w6
5adcc: 1a862042 csel w2, w2, w6, cs // cs = hs, nlast
5add0: 29158a74 stp w20, w2, [x19, #172]
5add4: 17fffef2 b 5a99c <dram_get_parameter+0x424>
5add8: 528000c0 mov w0, #0x6 // #6
5addc: 17ffff47 b 5aaf8 <dram_get_parameter+0x580>
5ade0: 52800080 mov w0, #0x4 // #4
5ade4: 17ffff45 b 5aaf8 <dram_get_parameter+0x580>
5ade8: 52800060 mov w0, #0x3 // #3
5adec: 17ffff43 b 5aaf8 <dram_get_parameter+0x580>
5adf0: 52800040 mov w0, #0x2 // #2
5adf4: 17ffff41 b 5aaf8 <dram_get_parameter+0x580>
5adf8: 5283cf00 mov w0, #0x1e78 // #7800
5adfc: 17ffff63 b 5ab88 <dram_get_parameter+0x610>
5ae00: 52800080 mov w0, #0x4 // #4
5ae04: 17ffff87 b 5ac20 <dram_get_parameter+0x6a8>
5ae08: 2a0203e0 mov w0, w2
5ae0c: 17ffffb8 b 5acec <dram_get_parameter+0x774>
5ae10: 52801040 mov w0, #0x82 // #130
5ae14: 52801183 mov w3, #0x8c // #140
5ae18: 1b007e80 mul w0, w20, w0
5ae1c: 110f9c00 add w0, w0, #0x3e7
5ae20: 1ac10800 udiv w0, w0, w1
5ae24: 17ffffbc b 5ad14 <dram_get_parameter+0x79c>
5ae28: aa1503e0 mov x0, x21
5ae2c: 97fffdc0 bl 5a52c <get_max_die_capability>
5ae30: d2803001 mov x1, #0x180 // #384
5ae34: b94026b4 ldr w20, [x21, #36]
5ae38: 2a0003f6 mov w22, w0
5ae3c: aa1303e0 mov x0, x19
5ae40: 94001725 bl 60ad4 <zeromem>
5ae44: b9402ea0 ldr w0, [x21, #44]
5ae48: 7106429f cmp w20, #0x190
5ae4c: b9000274 str w20, [x19]
5ae50: b901727f str wzr, [x19, #368]
5ae54: b9017e60 str w0, [x19, #380]
5ae58: 54000268 b.hi 5aea4 <dram_get_parameter+0x92c> // b.pmore
5ae5c: 528000c0 mov w0, #0x6 // #6
5ae60: b9017660 str w0, [x19, #372]
5ae64: 52800060 mov w0, #0x3 // #3
5ae68: b9017a60 str w0, [x19, #376]
5ae6c: 52800080 mov w0, #0x4 // #4
5ae70: b900ea60 str w0, [x19, #232]
5ae74: b94046a0 ldr w0, [x21, #68]
5ae78: 7101401f cmp w0, #0x50
5ae7c: 540008e0 b.eq 5af98 <dram_get_parameter+0xa20> // b.none
5ae80: 540007c8 b.hi 5af78 <dram_get_parameter+0xa00> // b.pmore
5ae84: 7100c01f cmp w0, #0x30
5ae88: 54001300 b.eq 5b0e8 <dram_get_parameter+0xb70> // b.none
5ae8c: 7100f01f cmp w0, #0x3c
5ae90: 54001280 b.eq 5b0e0 <dram_get_parameter+0xb68> // b.none
5ae94: 7100a01f cmp w0, #0x28
5ae98: 540012c0 b.eq 5b0f0 <dram_get_parameter+0xb78> // b.none
5ae9c: 52800020 mov w0, #0x1 // #1
5aea0: 1400003f b 5af9c <dram_get_parameter+0xa24>
5aea4: 7108569f cmp w20, #0x215
5aea8: 540000e8 b.hi 5aec4 <dram_get_parameter+0x94c> // b.pmore
5aeac: 52800100 mov w0, #0x8 // #8
5aeb0: b9017660 str w0, [x19, #372]
5aeb4: 52800080 mov w0, #0x4 // #4
5aeb8: b9017a60 str w0, [x19, #376]
5aebc: 528000c0 mov w0, #0x6 // #6
5aec0: 17ffffec b 5ae70 <dram_get_parameter+0x8f8>
5aec4: 7109629f cmp w20, #0x258
5aec8: 540000e8 b.hi 5aee4 <dram_get_parameter+0x96c> // b.pmore
5aecc: 52800120 mov w0, #0x9 // #9
5aed0: b9017660 str w0, [x19, #372]
5aed4: 528000a0 mov w0, #0x5 // #5
5aed8: b9017a60 str w0, [x19, #376]
5aedc: 528000e0 mov w0, #0x7 // #7
5aee0: 17ffffe4 b 5ae70 <dram_get_parameter+0x8f8>
5aee4: 710a6e9f cmp w20, #0x29b
5aee8: 540000e8 b.hi 5af04 <dram_get_parameter+0x98c> // b.pmore
5aeec: 52800140 mov w0, #0xa // #10
5aef0: b9017660 str w0, [x19, #372]
5aef4: 528000c0 mov w0, #0x6 // #6
5aef8: b9017a60 str w0, [x19, #376]
5aefc: 52800100 mov w0, #0x8 // #8
5af00: 17ffffdc b 5ae70 <dram_get_parameter+0x8f8>
5af04: 710b769f cmp w20, #0x2dd
5af08: 540000e8 b.hi 5af24 <dram_get_parameter+0x9ac> // b.pmore
5af0c: 52800160 mov w0, #0xb // #11
5af10: b9017660 str w0, [x19, #372]
5af14: 528000c0 mov w0, #0x6 // #6
5af18: b9017a60 str w0, [x19, #376]
5af1c: 52800120 mov w0, #0x9 // #9
5af20: 17ffffd4 b 5ae70 <dram_get_parameter+0x8f8>
5af24: 710c829f cmp w20, #0x320
5af28: 540000e8 b.hi 5af44 <dram_get_parameter+0x9cc> // b.pmore
5af2c: 52800180 mov w0, #0xc // #12
5af30: b9017660 str w0, [x19, #372]
5af34: 528000c0 mov w0, #0x6 // #6
5af38: b9017a60 str w0, [x19, #376]
5af3c: 52800140 mov w0, #0xa // #10
5af40: 17ffffcc b 5ae70 <dram_get_parameter+0x8f8>
5af44: 710e969f cmp w20, #0x3a5
5af48: 52800100 mov w0, #0x8 // #8
5af4c: 540000c8 b.hi 5af64 <dram_get_parameter+0x9ec> // b.pmore
5af50: 528001c1 mov w1, #0xe // #14
5af54: b9017661 str w1, [x19, #372]
5af58: b9017a60 str w0, [x19, #376]
5af5c: 52800180 mov w0, #0xc // #12
5af60: 17ffffc4 b 5ae70 <dram_get_parameter+0x8f8>
5af64: 52800201 mov w1, #0x10 // #16
5af68: b9017661 str w1, [x19, #372]
5af6c: b9017a60 str w0, [x19, #376]
5af70: 528001c0 mov w0, #0xe // #14
5af74: 17ffffbf b 5ae70 <dram_get_parameter+0x8f8>
5af78: 7135e01f cmp w0, #0xd78
5af7c: 54000c20 b.eq 5b100 <dram_get_parameter+0xb88> // b.none
5af80: 713f401f cmp w0, #0xfd0
5af84: 54000ba0 b.eq 5b0f8 <dram_get_parameter+0xb80> // b.none
5af88: 7135c01f cmp w0, #0xd70
5af8c: 54fff881 b.ne 5ae9c <dram_get_parameter+0x924> // b.any
5af90: 52800120 mov w0, #0x9 // #9
5af94: 14000002 b 5af9c <dram_get_parameter+0xa24>
5af98: 528000c0 mov w0, #0x6 // #6
5af9c: b900ee60 str w0, [x19, #236]
5afa0: b9403aa0 ldr w0, [x21, #56]
5afa4: b900e27f str wzr, [x19, #224]
5afa8: 34000b40 cbz w0, 5b110 <dram_get_parameter+0xb98>
5afac: b9404aa0 ldr w0, [x21, #72]
5afb0: 7100f01f cmp w0, #0x3c
5afb4: 54000aa0 b.eq 5b108 <dram_get_parameter+0xb90> // b.none
5afb8: 7101e01f cmp w0, #0x78
5afbc: 52800041 mov w1, #0x2 // #2
5afc0: 52800060 mov w0, #0x3 // #3
5afc4: 1a811000 csel w0, w0, w1, ne // ne = any
5afc8: b900f260 str w0, [x19, #240]
5afcc: 52800c80 mov w0, #0x64 // #100
5afd0: 52807d03 mov w3, #0x3e8 // #1000
5afd4: 52800246 mov w6, #0x12 // #18
5afd8: 528002a2 mov w2, #0x15 // #21
5afdc: 1b007e80 mul w0, w20, w0
5afe0: 52800081 mov w1, #0x4 // #4
5afe4: 1b067e86 mul w6, w20, w6
5afe8: 29037e7f stp wzr, wzr, [x19, #24]
5afec: 110f9c00 add w0, w0, #0x3e7
5aff0: 1b027e82 mul w2, w20, w2
5aff4: 110f9cc6 add w6, w6, #0x3e7
5aff8: 1b037e87 mul w7, w20, w3
5affc: 110f9c42 add w2, w2, #0x3e7
5b000: 52836ae4 mov w4, #0x1b57 // #6999
5b004: 1ac30800 udiv w0, w0, w3
5b008: 110f9ce7 add w7, w7, #0x3e7
5b00c: 1ac308c6 udiv w6, w6, w3
5b010: 1ac30842 udiv w2, w2, w3
5b014: b9000660 str w0, [x19, #4]
5b018: 528000a0 mov w0, #0x5 // #5
5b01c: b9000a60 str w0, [x19, #8]
5b020: 1ac308e7 udiv w7, w7, w3
5b024: 5281a800 mov w0, #0xd40 // #3392
5b028: 72a00060 movk w0, #0x3, lsl #16
5b02c: 1b007e80 mul w0, w20, w0
5b030: b9001267 str w7, [x19, #16]
5b034: 110f9c00 add w0, w0, #0x3e7
5b038: 1ac30800 udiv w0, w0, w3
5b03c: b9000e60 str w0, [x19, #12]
5b040: 5284e200 mov w0, #0x2710 // #10000
5b044: 1b007e80 mul w0, w20, w0
5b048: 110f9c00 add w0, w0, #0x3e7
5b04c: 1ac30800 udiv w0, w0, w3
5b050: b9001660 str w0, [x19, #20]
5b054: 5281e780 mov w0, #0xf3c // #3900
5b058: 1b007e80 mul w0, w20, w0
5b05c: 110f9c00 add w0, w0, #0x3e7
5b060: 1ac30800 udiv w0, w0, w3
5b064: b9002260 str w0, [x19, #32]
5b068: 52800060 mov w0, #0x3 // #3
5b06c: 6b0000df cmp w6, w0
5b070: 1a8020c6 csel w6, w6, w0, cs // cs = hs, nlast
5b074: 6b00005f cmp w2, w0
5b078: 1a802042 csel w2, w2, w0, cs // cs = hs, nlast
5b07c: 528001e0 mov w0, #0xf // #15
5b080: 29049a66 stp w6, w6, [x19, #36]
5b084: 1b007e80 mul w0, w20, w0
5b088: 110f9c00 add w0, w0, #0x3e7
5b08c: 1ac30803 udiv w3, w0, w3
5b090: 7100107f cmp w3, #0x4
5b094: 1a812061 csel w1, w3, w1, cs // cs = hs, nlast
5b098: 29058662 stp w2, w1, [x19, #44]
5b09c: 6b04001f cmp w0, w4
5b0a0: 54001649 b.ls 5b368 <dram_get_parameter+0xdf0> // b.plast
5b0a4: 528464e4 mov w4, #0x2327 // #8999
5b0a8: 6b04001f cmp w0, w4
5b0ac: 54001649 b.ls 5b374 <dram_get_parameter+0xdfc> // b.plast
5b0b0: 528658e4 mov w4, #0x32c7 // #12999
5b0b4: 6b04001f cmp w0, w4
5b0b8: 54000309 b.ls 5b118 <dram_get_parameter+0xba0> // b.plast
5b0bc: 528752e1 mov w1, #0x3a97 // #14999
5b0c0: 6b01001f cmp w0, w1
5b0c4: 52800201 mov w1, #0x10 // #16
5b0c8: 528001c0 mov w0, #0xe // #14
5b0cc: 1a808021 csel w1, w1, w0, hi // hi = pmore
5b0d0: b940ea60 ldr w0, [x19, #232]
5b0d4: 321c0000 orr w0, w0, #0x10
5b0d8: b900ea60 str w0, [x19, #232]
5b0dc: 14000012 b 5b124 <dram_get_parameter+0xbac>
5b0e0: 52800080 mov w0, #0x4 // #4
5b0e4: 17ffffae b 5af9c <dram_get_parameter+0xa24>
5b0e8: 52800060 mov w0, #0x3 // #3
5b0ec: 17ffffac b 5af9c <dram_get_parameter+0xa24>
5b0f0: 52800040 mov w0, #0x2 // #2
5b0f4: 17ffffaa b 5af9c <dram_get_parameter+0xa24>
5b0f8: 52800140 mov w0, #0xa // #10
5b0fc: 17ffffa8 b 5af9c <dram_get_parameter+0xa24>
5b100: 52800160 mov w0, #0xb // #11
5b104: 17ffffa6 b 5af9c <dram_get_parameter+0xa24>
5b108: 52800020 mov w0, #0x1 // #1
5b10c: 17ffffaf b 5afc8 <dram_get_parameter+0xa50>
5b110: b900f27f str wzr, [x19, #240]
5b114: 17ffffae b 5afcc <dram_get_parameter+0xa54>
5b118: 5284e1e4 mov w4, #0x270f // #9999
5b11c: 6b04001f cmp w0, w4
5b120: 54fffd88 b.hi 5b0d0 <dram_get_parameter+0xb58> // b.pmore
5b124: 7100243f cmp w1, #0x9
5b128: 54001229 b.ls 5b36c <dram_get_parameter+0xdf4> // b.plast
5b12c: 51002821 sub w1, w1, #0xa
5b130: 528000e0 mov w0, #0x7 // #7
5b134: 52807d04 mov w4, #0x3e8 // #1000
5b138: 531b6821 lsl w1, w1, #5
5b13c: 5280008a mov w10, #0x4 // #4
5b140: 1b007e80 mul w0, w20, w0
5b144: 32000421 orr w1, w1, #0x3
5b148: b900e661 str w1, [x19, #228]
5b14c: 52800541 mov w1, #0x2a // #42
5b150: 5280006b mov w11, #0x3 // #3
5b154: b9004e7f str wzr, [x19, #76]
5b158: 0b540405 add w5, w0, w20, lsr #1
5b15c: 1b017e81 mul w1, w20, w1
5b160: 110f9ca9 add w9, w5, #0x3e7
5b164: 53017e88 lsr w8, w20, #1
5b168: 110f9c21 add w1, w1, #0x3e7
5b16c: 1ac40929 udiv w9, w9, w4
5b170: 1ac40821 udiv w1, w1, w4
5b174: 6b0a013f cmp w9, w10
5b178: 1a8a2120 csel w0, w9, w10, cs // cs = hs, nlast
5b17c: b9003a60 str w0, [x19, #56]
5b180: 2908826a stp w10, w0, [x19, #68]
5b184: 52822e00 mov w0, #0x1170 // #4464
5b188: 72a00020 movk w0, #0x1, lsl #16
5b18c: 71000c3f cmp w1, #0x3
5b190: 1a8b2021 csel w1, w1, w11, cs // cs = hs, nlast
5b194: 1b007e80 mul w0, w20, w0
5b198: 0b010042 add w2, w2, w1
5b19c: b9003e62 str w2, [x19, #60]
5b1a0: 52800042 mov w2, #0x2 // #2
5b1a4: 110f9c00 add w0, w0, #0x3e7
5b1a8: 1ac40800 udiv w0, w0, w4
5b1ac: 290a0660 stp w0, w1, [x19, #80]
5b1b0: 52800141 mov w1, #0xa // #10
5b1b4: 52800100 mov w0, #0x8 // #8
5b1b8: 1b017e81 mul w1, w20, w1
5b1bc: 110f9c21 add w1, w1, #0x3e7
5b1c0: 1ac40821 udiv w1, w1, w4
5b1c4: 7100083f cmp w1, #0x2
5b1c8: 1a822021 csel w1, w1, w2, cs // cs = hs, nlast
5b1cc: 52800642 mov w2, #0x32 // #50
5b1d0: b9004261 str w1, [x19, #64]
5b1d4: 1b027e82 mul w2, w20, w2
5b1d8: 110f9c42 add w2, w2, #0x3e7
5b1dc: 1ac40842 udiv w2, w2, w4
5b1e0: 7100205f cmp w2, #0x8
5b1e4: 1a802040 csel w0, w2, w0, cs // cs = hs, nlast
5b1e8: b9005a60 str w0, [x19, #88]
5b1ec: 52a40000 mov w0, #0x20000000 // #536870912
5b1f0: 6b0002df cmp w22, w0
5b1f4: 54000c49 b.ls 5b37c <dram_get_parameter+0xe04> // b.plast
5b1f8: 52801a41 mov w1, #0xd2 // #210
5b1fc: 52801b80 mov w0, #0xdc // #220
5b200: 1b017e81 mul w1, w20, w1
5b204: 110f9c21 add w1, w1, #0x3e7
5b208: 1ac40821 udiv w1, w1, w4
5b20c: 1b007e80 mul w0, w20, w0
5b210: 5280004a mov w10, #0x2 // #2
5b214: b9005e61 str w1, [x19, #92]
5b218: 52807d01 mov w1, #0x3e8 // #1000
5b21c: 110f9c00 add w0, w0, #0x3e7
5b220: b900767f str wzr, [x19, #116]
5b224: 2910aa6a stp w10, w10, [x19, #132]
5b228: b900927f str wzr, [x19, #144]
5b22c: 1ac40800 udiv w0, w0, w4
5b230: b9009e66 str w6, [x19, #156]
5b234: b900a667 str w7, [x19, #164]
5b238: 6b0a001f cmp w0, w10
5b23c: 1a8a2000 csel w0, w0, w10, cs // cs = hs, nlast
5b240: 290d0260 stp w0, w0, [x19, #104]
5b244: 0b140a80 add w0, w20, w20, lsl #2
5b248: 4b0000a0 sub w0, w5, w0
5b24c: 52800065 mov w5, #0x3 // #3
5b250: 6b05013f cmp w9, w5
5b254: 1a852129 csel w9, w9, w5, cs // cs = hs, nlast
5b258: 6b05007f cmp w3, w5
5b25c: 1ac10804 udiv w4, w0, w1
5b260: 1a852063 csel w3, w3, w5, cs // cs = hs, nlast
5b264: 290f8e69 stp w9, w3, [x19, #124]
5b268: 52800143 mov w3, #0xa // #10
5b26c: b9007269 str w9, [x19, #112]
5b270: 29180e63 stp w3, w3, [x19, #192]
5b274: b9006264 str w4, [x19, #96]
5b278: 0b140684 add w4, w20, w20, lsl #1
5b27c: 0b040000 add w0, w0, w4
5b280: 0b040108 add w8, w8, w4
5b284: 110f9c00 add w0, w0, #0x3e7
5b288: 110f9d08 add w8, w8, #0x3e7
5b28c: 110f9c84 add w4, w4, #0x3e7
5b290: 29198e63 stp w3, w3, [x19, #204]
5b294: 1ac10800 udiv w0, w0, w1
5b298: 1ac10908 udiv w8, w8, w1
5b29c: 1ac10884 udiv w4, w4, w1
5b2a0: b9006660 str w0, [x19, #100]
5b2a4: 528001c0 mov w0, #0xe // #14
5b2a8: b900a268 str w8, [x19, #160]
5b2ac: 1b007e80 mul w0, w20, w0
5b2b0: b900da64 str w4, [x19, #216]
5b2b4: 110f9c00 add w0, w0, #0x3e7
5b2b8: 1ac10800 udiv w0, w0, w1
5b2bc: 6b03001f cmp w0, w3
5b2c0: 1a832000 csel w0, w0, w3, cs // cs = hs, nlast
5b2c4: b9009660 str w0, [x19, #148]
5b2c8: 52800080 mov w0, #0x4 // #4
5b2cc: b9009a60 str w0, [x19, #152]
5b2d0: 52800b40 mov w0, #0x5a // #90
5b2d4: 6b05005f cmp w2, w5
5b2d8: 1a852042 csel w2, w2, w5, cs // cs = hs, nlast
5b2dc: 52800285 mov w5, #0x14 // #20
5b2e0: 1b007e80 mul w0, w20, w0
5b2e4: b900b262 str w2, [x19, #176]
5b2e8: 52800322 mov w2, #0x19 // #25
5b2ec: b900ca65 str w5, [x19, #200]
5b2f0: 110f9c00 add w0, w0, #0x3e7
5b2f4: 1b027e82 mul w2, w20, w2
5b2f8: 1ac10800 udiv w0, w0, w1
5b2fc: 110f9c42 add w2, w2, #0x3e7
5b300: 1ac10842 udiv w2, w2, w1
5b304: b900aa60 str w0, [x19, #168]
5b308: 52802d00 mov w0, #0x168 // #360
5b30c: 1b007e80 mul w0, w20, w0
5b310: b900be62 str w2, [x19, #188]
5b314: 110f9c00 add w0, w0, #0x3e7
5b318: 1ac10800 udiv w0, w0, w1
5b31c: b900ae60 str w0, [x19, #172]
5b320: 52800500 mov w0, #0x28 // #40
5b324: 1b007e80 mul w0, w20, w0
5b328: 110f9c00 add w0, w0, #0x3e7
5b32c: 1ac10800 udiv w0, w0, w1
5b330: b900b660 str w0, [x19, #180]
5b334: 1b057e80 mul w0, w20, w5
5b338: 110f9c00 add w0, w0, #0x3e7
5b33c: 1ac10800 udiv w0, w0, w1
5b340: b900ba60 str w0, [x19, #184]
5b344: b900d660 str w0, [x19, #212]
5b348: 0b0a0000 add w0, w0, w10
5b34c: b900de60 str w0, [x19, #220]
5b350: 52801f40 mov w0, #0xfa // #250
5b354: 1b007e94 mul w20, w20, w0
5b358: 110f9e94 add w20, w20, #0x3e7
5b35c: 1ac10a94 udiv w20, w20, w1
5b360: b9015674 str w20, [x19, #340]
5b364: 17fffd8e b 5a99c <dram_get_parameter+0x424>
5b368: 2a1703e1 mov w1, w23
5b36c: 51000821 sub w1, w1, #0x2
5b370: 17ffff70 b 5b130 <dram_get_parameter+0xbb8>
5b374: 52800101 mov w1, #0x8 // #8
5b378: 17fffffd b 5b36c <dram_get_parameter+0xdf4>
5b37c: 52801041 mov w1, #0x82 // #130
5b380: 52801180 mov w0, #0x8c // #140
5b384: 1b017e81 mul w1, w20, w1
5b388: 110f9c21 add w1, w1, #0x3e7
5b38c: 1ac40821 udiv w1, w1, w4
5b390: 17ffff9f b 5b20c <dram_get_parameter+0xc94>
5b394: aa1503e0 mov x0, x21
5b398: 97fffc65 bl 5a52c <get_max_die_capability>
5b39c: d2803001 mov x1, #0x180 // #384
5b3a0: b94026b4 ldr w20, [x21, #36]
5b3a4: 2a0003f6 mov w22, w0
5b3a8: aa1303e0 mov x0, x19
5b3ac: 940015ca bl 60ad4 <zeromem>
5b3b0: b9402ea0 ldr w0, [x21, #44]
5b3b4: b9403ea2 ldr w2, [x21, #60]
5b3b8: b9000274 str w20, [x19]
5b3bc: 7100801f cmp w0, #0x20
5b3c0: b901727f str wzr, [x19, #368]
5b3c4: 1a9f17e1 cset w1, eq // eq = none
5b3c8: b9017e60 str w0, [x19, #380]
5b3cc: 71042a9f cmp w20, #0x10a
5b3d0: 54000388 b.hi 5b440 <dram_get_parameter+0xec8> // b.pmore
5b3d4: 528000c3 mov w3, #0x6 // #6
5b3d8: 321e0021 orr w1, w1, #0x4
5b3dc: 52800084 mov w4, #0x4 // #4
5b3e0: b9003263 str w3, [x19, #48]
5b3e4: b900ea7f str wzr, [x19, #232]
5b3e8: b9017663 str w3, [x19, #372]
5b3ec: 52800103 mov w3, #0x8 // #8
5b3f0: b9003a63 str w3, [x19, #56]
5b3f4: b9017a64 str w4, [x19, #376]
5b3f8: 7100005f cmp w2, #0x0
5b3fc: b94042a2 ldr w2, [x21, #64]
5b400: b900e661 str w1, [x19, #228]
5b404: 1a9f07e1 cset w1, ne // ne = any
5b408: 7100005f cmp w2, #0x0
5b40c: 1a9f07e2 cset w2, ne // ne = any
5b410: 53196042 lsl w2, w2, #7
5b414: 2a011841 orr w1, w2, w1, lsl #6
5b418: b94046a2 ldr w2, [x21, #68]
5b41c: 7101405f cmp w2, #0x50
5b420: 54001380 b.eq 5b690 <dram_get_parameter+0x1118> // b.none
5b424: 54000f88 b.hi 5b614 <dram_get_parameter+0x109c> // b.pmore
5b428: 7100c05f cmp w2, #0x30
5b42c: 540013a0 b.eq 5b6a0 <dram_get_parameter+0x1128> // b.none
5b430: 7100f05f cmp w2, #0x3c
5b434: 54001320 b.eq 5b698 <dram_get_parameter+0x1120> // b.none
5b438: 321c0422 orr w2, w1, #0x30
5b43c: 1400007b b 5b628 <dram_get_parameter+0x10b0>
5b440: 7108569f cmp w20, #0x215
5b444: 54000228 b.hi 5b488 <dram_get_parameter+0xf10> // b.pmore
5b448: 52800023 mov w3, #0x1 // #1
5b44c: 340001a2 cbz w2, 5b480 <dram_get_parameter+0xf08>
5b450: 52800184 mov w4, #0xc // #12
5b454: b900ea63 str w3, [x19, #232]
5b458: 528000c3 mov w3, #0x6 // #6
5b45c: b9017a63 str w3, [x19, #376]
5b460: 52800143 mov w3, #0xa // #10
5b464: b9003263 str w3, [x19, #48]
5b468: 52800103 mov w3, #0x8 // #8
5b46c: b9003a63 str w3, [x19, #56]
5b470: 52800283 mov w3, #0x14 // #20
5b474: b9017664 str w4, [x19, #372]
5b478: 2a030021 orr w1, w1, w3
5b47c: 17ffffdf b 5b3f8 <dram_get_parameter+0xe80>
5b480: 52800144 mov w4, #0xa // #10
5b484: 17fffff4 b 5b454 <dram_get_parameter+0xedc>
5b488: 710c829f cmp w20, #0x320
5b48c: 540001e8 b.hi 5b4c8 <dram_get_parameter+0xf50> // b.pmore
5b490: 52800043 mov w3, #0x2 // #2
5b494: 34000162 cbz w2, 5b4c0 <dram_get_parameter+0xf48>
5b498: 52800204 mov w4, #0x10 // #16
5b49c: b900ea63 str w3, [x19, #232]
5b4a0: 52800103 mov w3, #0x8 // #8
5b4a4: b9003a63 str w3, [x19, #56]
5b4a8: b9017664 str w4, [x19, #372]
5b4ac: 52800204 mov w4, #0x10 // #16
5b4b0: b9003264 str w4, [x19, #48]
5b4b4: b9017a63 str w3, [x19, #376]
5b4b8: 52800483 mov w3, #0x24 // #36
5b4bc: 17ffffef b 5b478 <dram_get_parameter+0xf00>
5b4c0: 528001c4 mov w4, #0xe // #14
5b4c4: 17fffff6 b 5b49c <dram_get_parameter+0xf24>
5b4c8: 7110aa9f cmp w20, #0x42a
5b4cc: 54000208 b.hi 5b50c <dram_get_parameter+0xf94> // b.pmore
5b4d0: 52800063 mov w3, #0x3 // #3
5b4d4: 34000182 cbz w2, 5b504 <dram_get_parameter+0xf8c>
5b4d8: 528002c4 mov w4, #0x16 // #22
5b4dc: b900ea63 str w3, [x19, #232]
5b4e0: 52800143 mov w3, #0xa // #10
5b4e4: b9017a63 str w3, [x19, #376]
5b4e8: 52800283 mov w3, #0x14 // #20
5b4ec: b9003263 str w3, [x19, #48]
5b4f0: 52800103 mov w3, #0x8 // #8
5b4f4: b9003a63 str w3, [x19, #56]
5b4f8: 52800683 mov w3, #0x34 // #52
5b4fc: b9017664 str w4, [x19, #372]
5b500: 17ffffde b 5b478 <dram_get_parameter+0xf00>
5b504: 52800284 mov w4, #0x14 // #20
5b508: 17fffff5 b 5b4dc <dram_get_parameter+0xf64>
5b50c: 7114d69f cmp w20, #0x535
5b510: 54000208 b.hi 5b550 <dram_get_parameter+0xfd8> // b.pmore
5b514: 52800083 mov w3, #0x4 // #4
5b518: 34000182 cbz w2, 5b548 <dram_get_parameter+0xfd0>
5b51c: 52800384 mov w4, #0x1c // #28
5b520: b900ea63 str w3, [x19, #232]
5b524: 52800183 mov w3, #0xc // #12
5b528: b9017a63 str w3, [x19, #376]
5b52c: 52800303 mov w3, #0x18 // #24
5b530: b9003263 str w3, [x19, #48]
5b534: 52800143 mov w3, #0xa // #10
5b538: b9003a63 str w3, [x19, #56]
5b53c: 52800883 mov w3, #0x44 // #68
5b540: b9017664 str w4, [x19, #372]
5b544: 17ffffcd b 5b478 <dram_get_parameter+0xf00>
5b548: 52800304 mov w4, #0x18 // #24
5b54c: 17fffff5 b 5b520 <dram_get_parameter+0xfa8>
5b550: 7119029f cmp w20, #0x640
5b554: 54000208 b.hi 5b594 <dram_get_parameter+0x101c> // b.pmore
5b558: 528000a3 mov w3, #0x5 // #5
5b55c: 34000182 cbz w2, 5b58c <dram_get_parameter+0x1014>
5b560: 52800404 mov w4, #0x20 // #32
5b564: b900ea63 str w3, [x19, #232]
5b568: 528001c3 mov w3, #0xe // #14
5b56c: b9017a63 str w3, [x19, #376]
5b570: 528003c3 mov w3, #0x1e // #30
5b574: b9003263 str w3, [x19, #48]
5b578: 52800183 mov w3, #0xc // #12
5b57c: b9003a63 str w3, [x19, #56]
5b580: 52800a83 mov w3, #0x54 // #84
5b584: b9017664 str w4, [x19, #372]
5b588: 17ffffbc b 5b478 <dram_get_parameter+0xf00>
5b58c: 52800384 mov w4, #0x1c // #28
5b590: 17fffff5 b 5b564 <dram_get_parameter+0xfec>
5b594: 711d2a9f cmp w20, #0x74a
5b598: 54000208 b.hi 5b5d8 <dram_get_parameter+0x1060> // b.pmore
5b59c: 528000c3 mov w3, #0x6 // #6
5b5a0: 34000182 cbz w2, 5b5d0 <dram_get_parameter+0x1058>
5b5a4: 52800484 mov w4, #0x24 // #36
5b5a8: b900ea63 str w3, [x19, #232]
5b5ac: 52800203 mov w3, #0x10 // #16
5b5b0: b9017a63 str w3, [x19, #376]
5b5b4: 52800443 mov w3, #0x22 // #34
5b5b8: b9003263 str w3, [x19, #48]
5b5bc: 528001c3 mov w3, #0xe // #14
5b5c0: b9003a63 str w3, [x19, #56]
5b5c4: 52800c83 mov w3, #0x64 // #100
5b5c8: b9017664 str w4, [x19, #372]
5b5cc: 17ffffab b 5b478 <dram_get_parameter+0xf00>
5b5d0: 52800404 mov w4, #0x20 // #32
5b5d4: 17fffff5 b 5b5a8 <dram_get_parameter+0x1030>
5b5d8: 528000e3 mov w3, #0x7 // #7
5b5dc: 34000182 cbz w2, 5b60c <dram_get_parameter+0x1094>
5b5e0: 52800504 mov w4, #0x28 // #40
5b5e4: b900ea63 str w3, [x19, #232]
5b5e8: 52800243 mov w3, #0x12 // #18
5b5ec: b9017a63 str w3, [x19, #376]
5b5f0: 52800503 mov w3, #0x28 // #40
5b5f4: b9003263 str w3, [x19, #48]
5b5f8: 52800203 mov w3, #0x10 // #16
5b5fc: b9003a63 str w3, [x19, #56]
5b600: 52800e83 mov w3, #0x74 // #116
5b604: b9017664 str w4, [x19, #372]
5b608: 17ffff9c b 5b478 <dram_get_parameter+0xf00>
5b60c: 52800484 mov w4, #0x24 // #36
5b610: 17fffff5 b 5b5e4 <dram_get_parameter+0x106c>
5b614: 7101e05f cmp w2, #0x78
5b618: 54000380 b.eq 5b688 <dram_get_parameter+0x1110> // b.none
5b61c: 7103c05f cmp w2, #0xf0
5b620: 54fff0c1 b.ne 5b438 <dram_get_parameter+0xec0> // b.any
5b624: 321d0022 orr w2, w1, #0x8
5b628: b900ee62 str w2, [x19, #236]
5b62c: b9403aa2 ldr w2, [x21, #56]
5b630: b900e27f str wzr, [x19, #224]
5b634: 340005e2 cbz w2, 5b6f0 <dram_get_parameter+0x1178>
5b638: b9404aa1 ldr w1, [x21, #72]
5b63c: 7101403f cmp w1, #0x50
5b640: 54000420 b.eq 5b6c4 <dram_get_parameter+0x114c> // b.none
5b644: 54000348 b.hi 5b6ac <dram_get_parameter+0x1134> // b.pmore
5b648: 7100c03f cmp w1, #0x30
5b64c: 54000400 b.eq 5b6cc <dram_get_parameter+0x1154> // b.none
5b650: 7100f03f cmp w1, #0x3c
5b654: 52800082 mov w2, #0x4 // #4
5b658: 528000c1 mov w1, #0x6 // #6
5b65c: 1a821021 csel w1, w1, w2, ne // ne = any
5b660: b9404ea2 ldr w2, [x21, #76]
5b664: 7101405f cmp w2, #0x50
5b668: 54001e60 b.eq 5ba34 <dram_get_parameter+0x14bc> // b.none
5b66c: 54000388 b.hi 5b6dc <dram_get_parameter+0x1164> // b.pmore
5b670: 7100c05f cmp w2, #0x30
5b674: 54001e80 b.eq 5ba44 <dram_get_parameter+0x14cc> // b.none
5b678: 7100f05f cmp w2, #0x3c
5b67c: 54001e00 b.eq 5ba3c <dram_get_parameter+0x14c4> // b.none
5b680: 321b0421 orr w1, w1, #0x60
5b684: 1400001b b 5b6f0 <dram_get_parameter+0x1178>
5b688: 321c0022 orr w2, w1, #0x10
5b68c: 17ffffe7 b 5b628 <dram_get_parameter+0x10b0>
5b690: 321d0422 orr w2, w1, #0x18
5b694: 17ffffe5 b 5b628 <dram_get_parameter+0x10b0>
5b698: 321b0022 orr w2, w1, #0x20
5b69c: 17ffffe3 b 5b628 <dram_get_parameter+0x10b0>
5b6a0: 52800502 mov w2, #0x28 // #40
5b6a4: 2a020022 orr w2, w1, w2
5b6a8: 17ffffe0 b 5b628 <dram_get_parameter+0x10b0>
5b6ac: 7101e03f cmp w1, #0x78
5b6b0: 54000120 b.eq 5b6d4 <dram_get_parameter+0x115c> // b.none
5b6b4: 7103c03f cmp w1, #0xf0
5b6b8: 528000c1 mov w1, #0x6 // #6
5b6bc: 1a9f1421 csinc w1, w1, wzr, ne // ne = any
5b6c0: 17ffffe8 b 5b660 <dram_get_parameter+0x10e8>
5b6c4: 52800061 mov w1, #0x3 // #3
5b6c8: 17ffffe6 b 5b660 <dram_get_parameter+0x10e8>
5b6cc: 528000a1 mov w1, #0x5 // #5
5b6d0: 17ffffe4 b 5b660 <dram_get_parameter+0x10e8>
5b6d4: 52800041 mov w1, #0x2 // #2
5b6d8: 17ffffe2 b 5b660 <dram_get_parameter+0x10e8>
5b6dc: 7101e05f cmp w2, #0x78
5b6e0: 54001a60 b.eq 5ba2c <dram_get_parameter+0x14b4> // b.none
5b6e4: 7103c05f cmp w2, #0xf0
5b6e8: 54fffcc1 b.ne 5b680 <dram_get_parameter+0x1108> // b.any
5b6ec: 321c0021 orr w1, w1, #0x10
5b6f0: 5281a805 mov w5, #0xd40 // #3392
5b6f4: 52909002 mov w2, #0x8480 // #33920
5b6f8: 72a00065 movk w5, #0x3, lsl #16
5b6fc: 5280fa06 mov w6, #0x7d0 // #2000
5b700: 72a003c2 movk w2, #0x1e, lsl #16
5b704: 0b140a87 add w7, w20, w20, lsl #2
5b708: 1b057e85 mul w5, w20, w5
5b70c: 110f9ce7 add w7, w7, #0x3e7
5b710: 1b067e86 mul w6, w20, w6
5b714: b900f261 str w1, [x19, #240]
5b718: 1b027e82 mul w2, w20, w2
5b71c: 110f9ca5 add w5, w5, #0x3e7
5b720: 110f9cc6 add w6, w6, #0x3e7
5b724: 52807d01 mov w1, #0x3e8 // #1000
5b728: 110f9c42 add w2, w2, #0x3e7
5b72c: 52800144 mov w4, #0xa // #10
5b730: 1ac108a5 udiv w5, w5, w1
5b734: 52800088 mov w8, #0x4 // #4
5b738: 1b047e84 mul w4, w20, w4
5b73c: 52800069 mov w9, #0x3 // #3
5b740: 1ac108c6 udiv w6, w6, w1
5b744: b9004e7f str wzr, [x19, #76]
5b748: 110f9c84 add w4, w4, #0x3e7
5b74c: 531e7683 lsl w3, w20, #2
5b750: 1ac10842 udiv w2, w2, w1
5b754: 1ac108e7 udiv w7, w7, w1
5b758: 29029666 stp w6, w5, [x19, #20]
5b75c: 52800246 mov w6, #0x12 // #18
5b760: 1ac10884 udiv w4, w4, w1
5b764: b9001e62 str w2, [x19, #28]
5b768: 1b067e86 mul w6, w20, w6
5b76c: 29019e62 stp w2, w7, [x19, #12]
5b770: 5281e782 mov w2, #0xf3c // #3900
5b774: 110f9cc6 add w6, w6, #0x3e7
5b778: 1b027e82 mul w2, w20, w2
5b77c: 29009265 stp w5, w4, [x19, #4]
5b780: 52800545 mov w5, #0x2a // #42
5b784: 1ac108c6 udiv w6, w6, w1
5b788: 110f9c42 add w2, w2, #0x3e7
5b78c: 1b057e85 mul w5, w20, w5
5b790: 1ac10842 udiv w2, w2, w1
5b794: 110f9ca5 add w5, w5, #0x3e7
5b798: 6b0800df cmp w6, w8
5b79c: 1a8820c6 csel w6, w6, w8, cs // cs = hs, nlast
5b7a0: b9002a66 str w6, [x19, #40]
5b7a4: 1ac108a5 udiv w5, w5, w1
5b7a8: 29041a62 stp w2, w6, [x19, #32]
5b7ac: 528002a2 mov w2, #0x15 // #21
5b7b0: 1b027e82 mul w2, w20, w2
5b7b4: 110f9c42 add w2, w2, #0x3e7
5b7b8: 1ac10842 udiv w2, w2, w1
5b7bc: 6b08005f cmp w2, w8
5b7c0: 1a882042 csel w2, w2, w8, cs // cs = hs, nlast
5b7c4: 71000cbf cmp w5, #0x3
5b7c8: 1a8920a5 csel w5, w5, w9, cs // cs = hs, nlast
5b7cc: 6b08009f cmp w4, w8
5b7d0: 1a882088 csel w8, w4, w8, cs // cs = hs, nlast
5b7d4: 7100801f cmp w0, #0x20
5b7d8: b9002e62 str w2, [x19, #44]
5b7dc: 0b050042 add w2, w2, w5
5b7e0: 52800200 mov w0, #0x10 // #16
5b7e4: b9003e62 str w2, [x19, #60]
5b7e8: 52800102 mov w2, #0x8 // #8
5b7ec: 1a800040 csel w0, w2, w0, eq // eq = none
5b7f0: 6b02009f cmp w4, w2
5b7f4: b9004268 str w8, [x19, #64]
5b7f8: 1a822084 csel w4, w4, w2, cs // cs = hs, nlast
5b7fc: 29089260 stp w0, w4, [x19, #68]
5b800: 531e7400 lsl w0, w0, #2
5b804: b9011260 str w0, [x19, #272]
5b808: 52822e00 mov w0, #0x1170 // #4464
5b80c: b9005665 str w5, [x19, #84]
5b810: 72a00020 movk w0, #0x1, lsl #16
5b814: 52ac0002 mov w2, #0x60000000 // #1610612736
5b818: 6b0202df cmp w22, w2
5b81c: 1b007e80 mul w0, w20, w0
5b820: 110f9c00 add w0, w0, #0x3e7
5b824: 1ac10800 udiv w0, w0, w1
5b828: b9005260 str w0, [x19, #80]
5b82c: 52800500 mov w0, #0x28 // #40
5b830: 1b007e80 mul w0, w20, w0
5b834: 110f9c00 add w0, w0, #0x3e7
5b838: 1ac10800 udiv w0, w0, w1
5b83c: b9005a60 str w0, [x19, #88]
5b840: 53017e80 lsr w0, w20, #1
5b844: 54001069 b.ls 5ba50 <dram_get_parameter+0x14d8> // b.plast
5b848: 52802302 mov w2, #0x118 // #280
5b84c: 1b027e82 mul w2, w20, w2
5b850: 110f9c42 add w2, w2, #0x3e7
5b854: 1ac10842 udiv w2, w2, w1
5b858: b9005e62 str w2, [x19, #92]
5b85c: 528023e2 mov w2, #0x11f // #287
5b860: 1b020282 madd w2, w20, w2, w0
5b864: 0b140685 add w5, w20, w20, lsl #1
5b868: 0b000284 add w4, w20, w0
5b86c: 0b0000a0 add w0, w5, w0
5b870: 110f9c42 add w2, w2, #0x3e7
5b874: 110f9c0a add w10, w0, #0x3e7
5b878: 0b000060 add w0, w3, w0
5b87c: 528000ac mov w12, #0x5 // #5
5b880: 110f9c00 add w0, w0, #0x3e7
5b884: 52800069 mov w9, #0x3 // #3
5b888: 1ac10841 udiv w1, w2, w1
5b88c: 52800042 mov w2, #0x2 // #2
5b890: 0b0900c6 add w6, w6, w9
5b894: b9009e66 str w6, [x19, #156]
5b898: 91048266 add x6, x19, #0x120
5b89c: 7100083f cmp w1, #0x2
5b8a0: 1a822021 csel w1, w1, w2, cs // cs = hs, nlast
5b8a4: 290d0661 stp w1, w1, [x19, #104]
5b8a8: 52807d01 mov w1, #0x3e8 // #1000
5b8ac: 1ac10800 udiv w0, w0, w1
5b8b0: 1ac10882 udiv w2, w4, w1
5b8b4: 110f9c84 add w4, w4, #0x3e7
5b8b8: 1ac1094a udiv w10, w10, w1
5b8bc: 6b0c001f cmp w0, w12
5b8c0: 1a8c200b csel w11, w0, w12, cs // cs = hs, nlast
5b8c4: b900726b str w11, [x19, #112]
5b8c8: 1ac10884 udiv w4, w4, w1
5b8cc: b901326b str w11, [x19, #304]
5b8d0: 290c2a62 stp w2, w10, [x19, #96]
5b8d4: 52800082 mov w2, #0x4 // #4
5b8d8: 6b02001f cmp w0, w2
5b8dc: b9011662 str w2, [x19, #276]
5b8e0: 1a822003 csel w3, w0, w2, cs // cs = hs, nlast
5b8e4: 110f9e82 add w2, w20, #0x3e7
5b8e8: 0b450845 add w5, w2, w5, lsr #2
5b8ec: 528001e2 mov w2, #0xf // #15
5b8f0: b9007e63 str w3, [x19, #124]
5b8f4: 1b027e82 mul w2, w20, w2
5b8f8: b900a26a str w10, [x19, #160]
5b8fc: 1ac108a5 udiv w5, w5, w1
5b900: 110f9c42 add w2, w2, #0x3e7
5b904: 1ac10842 udiv w2, w2, w1
5b908: 6b0900bf cmp w5, w9
5b90c: 1a8920a8 csel w8, w5, w9, cs // cs = hs, nlast
5b910: 290014c8 stp w8, w5, [x6]
5b914: 6b09005f cmp w2, w9
5b918: 1a892042 csel w2, w2, w9, cs // cs = hs, nlast
5b91c: 293f08c8 stp w8, w2, [x6, #-8]
5b920: 528001c2 mov w2, #0xe // #14
5b924: 6b0c00ff cmp w7, w12
5b928: 1a8c20e7 csel w7, w7, w12, cs // cs = hs, nlast
5b92c: b9012a67 str w7, [x19, #296]
5b930: 1b027e82 mul w2, w20, w2
5b934: 9105a267 add x7, x19, #0x168
5b938: b9012e65 str w5, [x19, #300]
5b93c: 52800145 mov w5, #0xa // #10
5b940: 110f9c42 add w2, w2, #0x3e7
5b944: b9014268 str w8, [x19, #320]
5b948: 91053268 add x8, x19, #0x14c
5b94c: 1ac10842 udiv w2, w2, w1
5b950: 7100285f cmp w2, #0xa
5b954: 1a852042 csel w2, w2, w5, cs // cs = hs, nlast
5b958: 6b09001f cmp w0, w9
5b95c: 1a892000 csel w0, w0, w9, cs // cs = hs, nlast
5b960: 52800105 mov w5, #0x8 // #8
5b964: 29129662 stp w2, w5, [x19, #148]
5b968: b9013662 str w2, [x19, #308]
5b96c: 528003c2 mov w2, #0x1e // #30
5b970: 293f00e0 stp w0, w0, [x7, #-8]
5b974: 290000e0 stp w0, w0, [x7]
5b978: 1b017e80 mul w0, w20, w1
5b97c: 1b027e82 mul w2, w20, w2
5b980: 110f9c00 add w0, w0, #0x3e7
5b984: 110f9c42 add w2, w2, #0x3e7
5b988: 1ac10800 udiv w0, w0, w1
5b98c: 1ac10842 udiv w2, w2, w1
5b990: b9013a60 str w0, [x19, #312]
5b994: 52800640 mov w0, #0x32 // #50
5b998: 1b007e80 mul w0, w20, w0
5b99c: 6b05005f cmp w2, w5
5b9a0: 1a852042 csel w2, w2, w5, cs // cs = hs, nlast
5b9a4: b9013e62 str w2, [x19, #316]
5b9a8: 110f9c00 add w0, w0, #0x3e7
5b9ac: 1ac10800 udiv w0, w0, w1
5b9b0: 6b09001f cmp w0, w9
5b9b4: 1a892000 csel w0, w0, w9, cs // cs = hs, nlast
5b9b8: b900b260 str w0, [x19, #176]
5b9bc: 52800500 mov w0, #0x28 // #40
5b9c0: b900b660 str w0, [x19, #180]
5b9c4: 52800280 mov w0, #0x14 // #20
5b9c8: 1b007e82 mul w2, w20, w0
5b9cc: 110f9c42 add w2, w2, #0x3e7
5b9d0: 1ac10842 udiv w2, w2, w1
5b9d4: 29170262 stp w2, w0, [x19, #184]
5b9d8: 52801f40 mov w0, #0xfa // #250
5b9dc: b900d662 str w2, [x19, #212]
5b9e0: 52800c82 mov w2, #0x64 // #100
5b9e4: 1b007e80 mul w0, w20, w0
5b9e8: 1b027e82 mul w2, w20, w2
5b9ec: 110f9c00 add w0, w0, #0x3e7
5b9f0: 110f9c42 add w2, w2, #0x3e7
5b9f4: 1ac10800 udiv w0, w0, w1
5b9f8: 1ac10842 udiv w2, w2, w1
5b9fc: b900c660 str w0, [x19, #196]
5ba00: b900da64 str w4, [x19, #216]
5ba04: 52801904 mov w4, #0xc8 // #200
5ba08: 293f0900 stp w0, w2, [x8, #-8]
5ba0c: 1b047e94 mul w20, w20, w4
5ba10: 29008102 stp w2, w0, [x8, #4]
5ba14: b9015a63 str w3, [x19, #344]
5ba18: 110f9e94 add w20, w20, #0x3e7
5ba1c: b9015e63 str w3, [x19, #348]
5ba20: 1ac10a94 udiv w20, w20, w1
5ba24: b9014e74 str w20, [x19, #332]
5ba28: 17fffbdd b 5a99c <dram_get_parameter+0x424>
5ba2c: 321b0021 orr w1, w1, #0x20
5ba30: 17ffff30 b 5b6f0 <dram_get_parameter+0x1178>
5ba34: 321c0421 orr w1, w1, #0x30
5ba38: 17ffff2e b 5b6f0 <dram_get_parameter+0x1178>
5ba3c: 321a0021 orr w1, w1, #0x40
5ba40: 17ffff2c b 5b6f0 <dram_get_parameter+0x1178>
5ba44: 52800a02 mov w2, #0x50 // #80
5ba48: 2a020021 orr w1, w1, w2
5ba4c: 17ffff29 b 5b6f0 <dram_get_parameter+0x1178>
5ba50: 52a60002 mov w2, #0x30000000 // #805306368
5ba54: 6b0202df cmp w22, w2
5ba58: 54000109 b.ls 5ba78 <dram_get_parameter+0x1500> // b.plast
5ba5c: 52801682 mov w2, #0xb4 // #180
5ba60: 1b027e82 mul w2, w20, w2
5ba64: 110f9c42 add w2, w2, #0x3e7
5ba68: 1ac10842 udiv w2, w2, w1
5ba6c: b9005e62 str w2, [x19, #92]
5ba70: 52801762 mov w2, #0xbb // #187
5ba74: 17ffff7b b 5b860 <dram_get_parameter+0x12e8>
5ba78: 52801042 mov w2, #0x82 // #130
5ba7c: 1b027e82 mul w2, w20, w2
5ba80: 110f9c42 add w2, w2, #0x3e7
5ba84: 1ac10842 udiv w2, w2, w1
5ba88: b9005e62 str w2, [x19, #92]
5ba8c: 52801122 mov w2, #0x89 // #137
5ba90: 17ffff74 b 5b860 <dram_get_parameter+0x12e8>
000000000005ba94 <dram_regcpy>:
5ba94: cb010000 sub x0, x0, x1
5ba98: 51000442 sub w2, w2, #0x1
5ba9c: 3100045f cmn w2, #0x1
5baa0: 54000041 b.ne 5baa8 <dram_regcpy+0x14> // b.any
5baa4: d65f03c0 ret
5baa8: b9400023 ldr w3, [x1]
5baac: b8216803 str w3, [x0, x1]
5bab0: 91001021 add x1, x1, #0x4
5bab4: 17fffff9 b 5ba98 <dram_regcpy+0x4>
000000000005bab8 <dmc_suspend>:
5bab8: d2802300 mov x0, #0x118 // #280
5babc: a9be7bfd stp x29, x30, [sp, #-32]!
5bac0: f2bfeec0 movk x0, #0xff76, lsl #16
5bac4: 910003fd mov x29, sp
5bac8: b9400001 ldr w1, [x0]
5bacc: d07f9aa0 adrp x0, ff3b1000 <rk3399m0pmu_bin>
5bad0: 913ce002 add x2, x0, #0xf38
5bad4: d2800903 mov x3, #0x48 // #72
5bad8: b90f3801 str w1, [x0, #3896]
5badc: d2800800 mov x0, #0x40 // #64
5bae0: f2bfeec0 movk x0, #0xff76, lsl #16
5bae4: 91001041 add x1, x2, #0x4
5bae8: f2bfeec3 movk x3, #0xff76, lsl #16
5baec: b9400000 ldr w0, [x0]
5baf0: f9000bf3 str x19, [sp, #16]
5baf4: d07f9ab3 adrp x19, ff3b1000 <rk3399m0pmu_bin>
5baf8: b9000440 str w0, [x2, #4]
5bafc: d2800882 mov x2, #0x44 // #68
5bb00: f2bfeec2 movk x2, #0xff76, lsl #16
5bb04: 91092273 add x19, x19, #0x248
5bb08: b9400042 ldr w2, [x2]
5bb0c: b9000422 str w2, [x1, #4]
5bb10: b9400063 ldr w3, [x3]
5bb14: b9000823 str w3, [x1, #8]
5bb18: d2800983 mov x3, #0x4c // #76
5bb1c: f2bfeec3 movk x3, #0xff76, lsl #16
5bb20: b9400063 ldr w3, [x3]
5bb24: b9000c23 str w3, [x1, #12]
5bb28: d2800a03 mov x3, #0x50 // #80
5bb2c: f2bfeec3 movk x3, #0xff76, lsl #16
5bb30: b9400063 ldr w3, [x3]
5bb34: b9001023 str w3, [x1, #16]
5bb38: d2800a83 mov x3, #0x54 // #84
5bb3c: f2bfeec3 movk x3, #0xff76, lsl #16
5bb40: b9400063 ldr w3, [x3]
5bb44: b9001423 str w3, [x1, #20]
5bb48: 12002c01 and w1, w0, #0xfff
5bb4c: 52800300 mov w0, #0x18 // #24
5bb50: d3482843 ubfx x3, x2, #8, #3
5bb54: 1b007c21 mul w1, w1, w0
5bb58: d34c3840 ubfx x0, x2, #12, #3
5bb5c: 12001442 and w2, w2, #0x3f
5bb60: 1b037c00 mul w0, w0, w3
5bb64: 1b027c02 mul w2, w0, w2
5bb68: 52884800 mov w0, #0x4240 // #16960
5bb6c: 72a001e0 movk w0, #0xf, lsl #16
5bb70: 1ac20821 udiv w1, w1, w2
5bb74: 1b007c21 mul w1, w1, w0
5bb78: 90000040 adrp x0, 63000 <CSWTCH.22+0x37e>
5bb7c: 9111ac00 add x0, x0, #0x46b
5bb80: b9004a61 str w1, [x19, #72]
5bb84: 94000b40 bl 5e884 <tf_log>
5bb88: d2840280 mov x0, #0x2014 // #8212
5bb8c: 52802982 mov w2, #0x14c // #332
5bb90: f2bff500 movk x0, #0xffa8, lsl #16
5bb94: d2bff501 mov x1, #0xffa80000 // #4289200128
5bb98: b9400000 ldr w0, [x0]
5bb9c: f270081f tst x0, #0x70000
5bba0: 1a9f07e0 cset w0, ne // ne = any
5bba4: 39013e60 strb w0, [x19, #79]
5bba8: d07f9aa0 adrp x0, ff3b1000 <rk3399m0pmu_bin>
5bbac: 910a6000 add x0, x0, #0x298
5bbb0: 97ffffb9 bl 5ba94 <dram_regcpy>
5bbb4: b9405260 ldr w0, [x19, #80]
5bbb8: d2810001 mov x1, #0x800 // #2048
5bbbc: 52801902 mov w2, #0xc8 // #200
5bbc0: f2bff501 movk x1, #0xffa8, lsl #16
5bbc4: 121f7800 and w0, w0, #0xfffffffe
5bbc8: b9005260 str w0, [x19, #80]
5bbcc: d07f9aa0 adrp x0, ff3b1000 <rk3399m0pmu_bin>
5bbd0: 911f2000 add x0, x0, #0x7c8
5bbd4: 97ffffb0 bl 5ba94 <dram_regcpy>
5bbd8: b9458260 ldr w0, [x19, #1408]
5bbdc: d2840001 mov x1, #0x2000 // #8192
5bbe0: 52800b62 mov w2, #0x5b // #91
5bbe4: f2bff501 movk x1, #0xffa8, lsl #16
5bbe8: 121f7800 and w0, w0, #0xfffffffe
5bbec: b9058260 str w0, [x19, #1408]
5bbf0: d07f9aa0 adrp x0, ff3b1000 <rk3399m0pmu_bin>
5bbf4: 912ba000 add x0, x0, #0xae8
5bbf8: 97ffffa7 bl 5ba94 <dram_regcpy>
5bbfc: d2850001 mov x1, #0x2800 // #10240
5bc00: 528004c2 mov w2, #0x26 // #38
5bc04: f2bff501 movk x1, #0xffa8, lsl #16
5bc08: d07f9aa0 adrp x0, ff3b1000 <rk3399m0pmu_bin>
5bc0c: 91315000 add x0, x0, #0xc54
5bc10: 97ffffa1 bl 5ba94 <dram_regcpy>
5bc14: d2854001 mov x1, #0x2a00 // #10752
5bc18: 528004c2 mov w2, #0x26 // #38
5bc1c: f2bff501 movk x1, #0xffa8, lsl #16
5bc20: d07f9aa0 adrp x0, ff3b1000 <rk3399m0pmu_bin>
5bc24: 9133b000 add x0, x0, #0xcec
5bc28: 97ffff9b bl 5ba94 <dram_regcpy>
5bc2c: d2858001 mov x1, #0x2c00 // #11264
5bc30: 528004c2 mov w2, #0x26 // #38
5bc34: f2bff501 movk x1, #0xffa8, lsl #16
5bc38: d07f9aa0 adrp x0, ff3b1000 <rk3399m0pmu_bin>
5bc3c: 91361000 add x0, x0, #0xd84
5bc40: 97ffff95 bl 5ba94 <dram_regcpy>
5bc44: d285c001 mov x1, #0x2e00 // #11776
5bc48: 528007e2 mov w2, #0x3f // #63
5bc4c: f2bff501 movk x1, #0xffa8, lsl #16
5bc50: d07f9aa0 adrp x0, ff3b1000 <rk3399m0pmu_bin>
5bc54: 91387000 add x0, x0, #0xe1c
5bc58: 97ffff8f bl 5ba94 <dram_regcpy>
5bc5c: 39413665 ldrb w5, [x19, #77]
5bc60: 52851c81 mov w1, #0x28e4 // #10468
5bc64: 72bff501 movk w1, #0xffa8, lsl #16
5bc68: d2800000 mov x0, #0x0 // #0
5bc6c: 6b0000bf cmp w5, w0
5bc70: 54000188 b.hi 5bca0 <dmc_suspend+0x1e8> // b.pmore
5bc74: b94cca60 ldr w0, [x19, #3272]
5bc78: 12067400 and w0, w0, #0xfcffffff
5bc7c: 32080000 orr w0, w0, #0x1000000
5bc80: b90cca60 str w0, [x19, #3272]
5bc84: b94bd660 ldr w0, [x19, #3028]
5bc88: 12167400 and w0, w0, #0xfffffcff
5bc8c: 32000000 orr w0, w0, #0x1
5bc90: b90bd660 str w0, [x19, #3028]
5bc94: f9400bf3 ldr x19, [sp, #16]
5bc98: a8c27bfd ldp x29, x30, [sp], #32
5bc9c: d65f03c0 ret
5bca0: 51200022 sub w2, w1, #0x800
5bca4: 8b001263 add x3, x19, x0, lsl #4
5bca8: 2a0203e4 mov w4, w2
5bcac: 11080042 add w2, w2, #0x200
5bcb0: 6b02003f cmp w1, w2
5bcb4: 91001063 add x3, x3, #0x4
5bcb8: b9400084 ldr w4, [x4]
5bcbc: 12102c84 and w4, w4, #0xfff0000
5bcc0: b90ccc64 str w4, [x3, #3276]
5bcc4: 54ffff21 b.ne 5bca8 <dmc_suspend+0x1f0> // b.any
5bcc8: 91000400 add x0, x0, #0x1
5bccc: 11402021 add w1, w1, #0x8, lsl #12
5bcd0: 17ffffe7 b 5bc6c <dmc_suspend+0x1b4>
000000000005bcd4 <get_arm_std_svc_args>:
5bcd4: 529ffc01 mov w1, #0xffe0 // #65504
5bcd8: 6b01001f cmp w0, w1
5bcdc: 54000120 b.eq 5bd00 <get_arm_std_svc_args+0x2c> // b.none
5bce0: a9bf7bfd stp x29, x30, [sp, #-16]!
5bce4: 90000042 adrp x2, 63000 <CSWTCH.22+0x37e>
5bce8: 90000040 adrp x0, 63000 <CSWTCH.22+0x37e>
5bcec: 910003fd mov x29, sp
5bcf0: 91122442 add x2, x2, #0x489
5bcf4: 91128c00 add x0, x0, #0x4a3
5bcf8: 528006c1 mov w1, #0x36 // #54
5bcfc: 9400174c bl 61a2c <__assert>
5bd00: f0000020 adrp x0, 62000 <vprintf+0x400>
5bd04: 910a4000 add x0, x0, #0x290
5bd08: d65f03c0 ret
000000000005bd0c <bl31_setup>:
5bd0c: a9bf7bfd stp x29, x30, [sp, #-16]!
5bd10: 910003fd mov x29, sp
5bd14: 97ffd7fc bl 51d04 <bl31_early_platform_setup2>
5bd18: a8c17bfd ldp x29, x30, [sp], #16
5bd1c: 17ffd822 b 51da4 <bl31_plat_arch_setup>
000000000005bd20 <bl31_prepare_next_image_entry>:
5bd20: a9bd7bfd stp x29, x30, [sp, #-48]!
5bd24: 910003fd mov x29, sp
5bd28: a90153f3 stp x19, x20, [sp, #16]
5bd2c: f90013f5 str x21, [sp, #32]
5bd30: d5380400 mrs x0, id_aa64pfr0_el1
5bd34: d3441c00 ubfx x0, x0, #4, #4
5bd38: f100041f cmp x0, #0x1
5bd3c: 54000121 b.ne 5bd60 <bl31_prepare_next_image_entry+0x40> // b.any
5bd40: 90000040 adrp x0, 63000 <CSWTCH.22+0x37e>
5bd44: 91130800 add x0, x0, #0x4c2
5bd48: 94000acf bl 5e884 <tf_log>
5bd4c: 90000040 adrp x0, 63000 <CSWTCH.22+0x37e>
5bd50: 9117f400 add x0, x0, #0x5fd
5bd54: 94000bc0 bl 5ec54 <backtrace>
5bd58: 94000b5d bl 5eacc <console_flush>
5bd5c: 940012e4 bl 608ec <do_panic>
5bd60: 90000060 adrp x0, 67000 <__RO_END__>
5bd64: b9405415 ldr w21, [x0, #84]
5bd68: 2a1503e0 mov w0, w21
5bd6c: 97ffd7d1 bl 51cb0 <bl31_plat_get_next_image_ep_info>
5bd70: aa0003f3 mov x19, x0
5bd74: b50000e0 cbnz x0, 5bd90 <bl31_prepare_next_image_entry+0x70>
5bd78: 90000042 adrp x2, 63000 <CSWTCH.22+0x37e>
5bd7c: 91144842 add x2, x2, #0x512
5bd80: 528018a1 mov w1, #0xc5 // #197
5bd84: 90000040 adrp x0, 63000 <CSWTCH.22+0x37e>
5bd88: 91128c00 add x0, x0, #0x4a3
5bd8c: 94001728 bl 61a2c <__assert>
5bd90: b9400414 ldr w20, [x0, #4]
5bd94: 12000294 and w20, w20, #0x1
5bd98: 6b15029f cmp w20, w21
5bd9c: 540000a0 b.eq 5bdb0 <bl31_prepare_next_image_entry+0x90> // b.none
5bda0: 90000042 adrp x2, 63000 <CSWTCH.22+0x37e>
5bda4: 528018c1 mov w1, #0xc6 // #198
5bda8: 9114a842 add x2, x2, #0x52a
5bdac: 17fffff6 b 5bd84 <bl31_prepare_next_image_entry+0x64>
5bdb0: 7100029f cmp w20, #0x0
5bdb4: 90000040 adrp x0, 63000 <CSWTCH.22+0x37e>
5bdb8: 90000041 adrp x1, 63000 <CSWTCH.22+0x37e>
5bdbc: 9112ec00 add x0, x0, #0x4bb
5bdc0: 9112d021 add x1, x1, #0x4b4
5bdc4: 9a800021 csel x1, x1, x0, eq // eq = none
5bdc8: 90000040 adrp x0, 63000 <CSWTCH.22+0x37e>
5bdcc: 91159000 add x0, x0, #0x564
5bdd0: 94000aad bl 5e884 <tf_log>
5bdd4: aa1303e0 mov x0, x19
5bdd8: 94000a7d bl 5e7cc <print_entry_point_info>
5bddc: aa1303e0 mov x0, x19
5bde0: 940001b1 bl 5c4a4 <cm_init_my_context>
5bde4: 2a1403e0 mov w0, w20
5bde8: a94153f3 ldp x19, x20, [sp, #16]
5bdec: f94013f5 ldr x21, [sp, #32]
5bdf0: a8c37bfd ldp x29, x30, [sp], #48
5bdf4: 140001f4 b 5c5c4 <cm_prepare_el3_exit>
000000000005bdf8 <bl31_main>:
5bdf8: a9be7bfd stp x29, x30, [sp, #-32]!
5bdfc: f0000021 adrp x1, 62000 <vprintf+0x400>
5be00: 911a0021 add x1, x1, #0x680
5be04: 910003fd mov x29, sp
5be08: f9000bf3 str x19, [sp, #16]
5be0c: 90000053 adrp x19, 63000 <CSWTCH.22+0x37e>
5be10: 91163e73 add x19, x19, #0x58f
5be14: aa1303e0 mov x0, x19
5be18: 94000a9b bl 5e884 <tf_log>
5be1c: aa1303e0 mov x0, x19
5be20: f0000021 adrp x1, 62000 <vprintf+0x400>
5be24: 91198821 add x1, x1, #0x662
5be28: 94000a97 bl 5e884 <tf_log>
5be2c: d0000093 adrp x19, 6d000 <dist_ctx+0x1e50>
5be30: 97ffd7d5 bl 51d84 <bl31_platform_setup>
5be34: 94000132 bl 5c2fc <cm_init>
5be38: 90000040 adrp x0, 63000 <CSWTCH.22+0x37e>
5be3c: 91166800 add x0, x0, #0x59a
5be40: 94000a91 bl 5e884 <tf_log>
5be44: 94000060 bl 5bfc4 <runtime_svc_init>
5be48: f9449660 ldr x0, [x19, #2344]
5be4c: b4000140 cbz x0, 5be74 <bl31_main+0x7c>
5be50: 90000040 adrp x0, 63000 <CSWTCH.22+0x37e>
5be54: 91170000 add x0, x0, #0x5c0
5be58: 94000a8b bl 5e884 <tf_log>
5be5c: f9449660 ldr x0, [x19, #2344]
5be60: d63f0000 blr x0
5be64: 35000080 cbnz w0, 5be74 <bl31_main+0x7c>
5be68: 90000040 adrp x0, 63000 <CSWTCH.22+0x37e>
5be6c: 91176800 add x0, x0, #0x5da
5be70: 94000a85 bl 5e884 <tf_log>
5be74: 97ffffab bl 5bd20 <bl31_prepare_next_image_entry>
5be78: 94000b15 bl 5eacc <console_flush>
5be7c: f9400bf3 ldr x19, [sp, #16]
5be80: a8c27bfd ldp x29, x30, [sp], #32
5be84: 14000b3a b 5eb6c <bl31_plat_runtime_setup>
000000000005be88 <get_scr_el3_from_routing_model>:
5be88: 7100041f cmp w0, #0x1
5be8c: 54000129 b.ls 5beb0 <get_scr_el3_from_routing_model+0x28> // b.plast
5be90: a9bf7bfd stp x29, x30, [sp, #-16]!
5be94: 90000042 adrp x2, 63000 <CSWTCH.22+0x37e>
5be98: 90000040 adrp x0, 63000 <CSWTCH.22+0x37e>
5be9c: 910003fd mov x29, sp
5bea0: 91186c42 add x2, x2, #0x61b
5bea4: 9118f800 add x0, x0, #0x63e
5bea8: 52800aa1 mov w1, #0x55 // #85
5beac: 940016e0 bl 61a2c <__assert>
5beb0: d0000081 adrp x1, 6d000 <dist_ctx+0x1e50>
5beb4: 9124c022 add x2, x1, #0x930
5beb8: 2a0003e1 mov w1, w0
5bebc: 8b010c40 add x0, x2, x1, lsl #3
5bec0: 8b010c43 add x3, x2, x1, lsl #3
5bec4: 8b010c41 add x1, x2, x1, lsl #3
5bec8: f9400463 ldr x3, [x3, #8]
5becc: f9402400 ldr x0, [x0, #72]
5bed0: f9401421 ldr x1, [x1, #40]
5bed4: aa030000 orr x0, x0, x3
5bed8: aa010000 orr x0, x0, x1
5bedc: d65f03c0 ret
000000000005bee0 <get_interrupt_type_handler>:
5bee0: 7100081f cmp w0, #0x2
5bee4: 540000c8 b.hi 5befc <get_interrupt_type_handler+0x1c> // b.pmore
5bee8: d37b7c00 ubfiz x0, x0, #5, #32
5beec: d0000081 adrp x1, 6d000 <dist_ctx+0x1e50>
5bef0: 9124c021 add x1, x1, #0x930
5bef4: f8606820 ldr x0, [x1, x0]
5bef8: d65f03c0 ret
5befc: d2800000 mov x0, #0x0 // #0
5bf00: 17fffffe b 5bef8 <get_interrupt_type_handler+0x18>
000000000005bf04 <cm_get_context>:
5bf04: 7100041f cmp w0, #0x1
5bf08: 54000129 b.ls 5bf2c <cm_get_context+0x28> // b.plast
5bf0c: a9bf7bfd stp x29, x30, [sp, #-16]!
5bf10: 90000042 adrp x2, 63000 <CSWTCH.22+0x37e>
5bf14: 90000040 adrp x0, 63000 <CSWTCH.22+0x37e>
5bf18: 910003fd mov x29, sp
5bf1c: 91195042 add x2, x2, #0x654
5bf20: 9119c400 add x0, x0, #0x671
5bf24: 528002c1 mov w1, #0x16 // #22
5bf28: 940016c1 bl 61a2c <__assert>
5bf2c: d53ed041 mrs x1, tpidr_el3
5bf30: f8605820 ldr x0, [x1, w0, uxtw #3]
5bf34: d65f03c0 ret
000000000005bf38 <cm_get_context_by_index>:
5bf38: a9be7bfd stp x29, x30, [sp, #-32]!
5bf3c: 7100043f cmp w1, #0x1
5bf40: 910003fd mov x29, sp
5bf44: f9000bf3 str x19, [sp, #16]
5bf48: 540000e9 b.ls 5bf64 <cm_get_context_by_index+0x2c> // b.plast
5bf4c: 90000042 adrp x2, 63000 <CSWTCH.22+0x37e>
5bf50: 90000040 adrp x0, 63000 <CSWTCH.22+0x37e>
5bf54: 91186c42 add x2, x2, #0x61b
5bf58: 9119c400 add x0, x0, #0x671
5bf5c: 528005e1 mov w1, #0x2f // #47
5bf60: 940016b3 bl 61a2c <__assert>
5bf64: 2a0103f3 mov w19, w1
5bf68: 94001128 bl 60408 <_cpu_data_by_index>
5bf6c: f8735800 ldr x0, [x0, w19, uxtw #3]
5bf70: f9400bf3 ldr x19, [sp, #16]
5bf74: a8c27bfd ldp x29, x30, [sp], #32
5bf78: d65f03c0 ret
000000000005bf7c <cm_set_context_by_index>:
5bf7c: a9be7bfd stp x29, x30, [sp, #-32]!
5bf80: 7100045f cmp w2, #0x1
5bf84: 910003fd mov x29, sp
5bf88: a90153f3 stp x19, x20, [sp, #16]
5bf8c: 540000e9 b.ls 5bfa8 <cm_set_context_by_index+0x2c> // b.plast
5bf90: 90000042 adrp x2, 63000 <CSWTCH.22+0x37e>
5bf94: 90000040 adrp x0, 63000 <CSWTCH.22+0x37e>
5bf98: 91186c42 add x2, x2, #0x61b
5bf9c: 9119c400 add x0, x0, #0x671
5bfa0: 52800761 mov w1, #0x3b // #59
5bfa4: 940016a2 bl 61a2c <__assert>
5bfa8: 2a0203f3 mov w19, w2
5bfac: aa0103f4 mov x20, x1
5bfb0: 94001116 bl 60408 <_cpu_data_by_index>
5bfb4: f8335814 str x20, [x0, w19, uxtw #3]
5bfb8: a94153f3 ldp x19, x20, [sp, #16]
5bfbc: a8c27bfd ldp x29, x30, [sp], #32
5bfc0: d65f03c0 ret
000000000005bfc4 <runtime_svc_init>:
5bfc4: a9bb7bfd stp x29, x30, [sp, #-80]!
5bfc8: 910003fd mov x29, sp
5bfcc: a90153f3 stp x19, x20, [sp, #16]
5bfd0: d0000053 adrp x19, 65000 <panic_msg+0xb>
5bfd4: 91066273 add x19, x19, #0x198
5bfd8: a9025bf5 stp x21, x22, [sp, #32]
5bfdc: a90363f7 stp x23, x24, [sp, #48]
5bfe0: d0000058 adrp x24, 65000 <panic_msg+0xb>
5bfe4: 9104e318 add x24, x24, #0x138
5bfe8: f90023f9 str x25, [sp, #64]
5bfec: eb18027f cmp x19, x24
5bff0: 54000083 b.cc 5c000 <runtime_svc_init+0x3c> // b.lo, b.ul, b.last
5bff4: cb180273 sub x19, x19, x24
5bff8: f13ffe7f cmp x19, #0xfff
5bffc: 540000e9 b.ls 5c018 <runtime_svc_init+0x54> // b.plast
5c000: f0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5c004: 911ab842 add x2, x2, #0x6ae
5c008: 52800c21 mov w1, #0x61 // #97
5c00c: f0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5c010: 911a6400 add x0, x0, #0x699
5c014: 94001686 bl 61a2c <__assert>
5c018: f1007e7f cmp x19, #0x1f
5c01c: 540001a9 b.ls 5c050 <runtime_svc_init+0x8c> // b.plast
5c020: f0000037 adrp x23, 63000 <CSWTCH.22+0x37e>
5c024: d345fe74 lsr x20, x19, #5
5c028: 911c8af7 add x23, x23, #0x722
5c02c: 52800015 mov w21, #0x0 // #0
5c030: b0000136 adrp x22, 81000 <store_sram+0x2377>
5c034: 913226d6 add x22, x22, #0xc89
5c038: aa1603e0 mov x0, x22
5c03c: d2801002 mov x2, #0x80 // #128
5c040: 12800001 mov w1, #0xffffffff // #-1
5c044: 940016b4 bl 61b14 <memset>
5c048: eb35029f cmp x20, w21, uxtb
5c04c: 540000e8 b.hi 5c068 <runtime_svc_init+0xa4> // b.pmore
5c050: a94153f3 ldp x19, x20, [sp, #16]
5c054: a9425bf5 ldp x21, x22, [sp, #32]
5c058: a94363f7 ldp x23, x24, [sp, #48]
5c05c: f94023f9 ldr x25, [sp, #64]
5c060: a8c57bfd ldp x29, x30, [sp], #80
5c064: d65f03c0 ret
5c068: d37b1eb9 ubfiz x25, x21, #5, #8
5c06c: 8b190313 add x19, x24, x25
5c070: 38796b01 ldrb w1, [x24, x25]
5c074: 39400660 ldrb w0, [x19, #1]
5c078: 6b00003f cmp w1, w0
5c07c: 54000148 b.hi 5c0a4 <runtime_svc_init+0xe0> // b.pmore
5c080: 7100fc1f cmp w0, #0x3f
5c084: 54000108 b.hi 5c0a4 <runtime_svc_init+0xe0> // b.pmore
5c088: 39400a60 ldrb w0, [x19, #2]
5c08c: 7100041f cmp w0, #0x1
5c090: 540000a8 b.hi 5c0a4 <runtime_svc_init+0xe0> // b.pmore
5c094: f9400a60 ldr x0, [x19, #16]
5c098: b5000180 cbnz x0, 5c0c8 <runtime_svc_init+0x104>
5c09c: f9400e60 ldr x0, [x19, #24]
5c0a0: b5000240 cbnz x0, 5c0e8 <runtime_svc_init+0x124>
5c0a4: aa1303e1 mov x1, x19
5c0a8: f0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5c0ac: 911be800 add x0, x0, #0x6fa
5c0b0: 940009f5 bl 5e884 <tf_log>
5c0b4: f0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5c0b8: 911d7c00 add x0, x0, #0x75f
5c0bc: 94000ae6 bl 5ec54 <backtrace>
5c0c0: 94000a83 bl 5eacc <console_flush>
5c0c4: 9400120a bl 608ec <do_panic>
5c0c8: d63f0000 blr x0
5c0cc: 340000e0 cbz w0, 5c0e8 <runtime_svc_init+0x124>
5c0d0: f9400661 ldr x1, [x19, #8]
5c0d4: aa1703e0 mov x0, x23
5c0d8: 940009eb bl 5e884 <tf_log>
5c0dc: 110006b5 add w21, w21, #0x1
5c0e0: 12001eb5 and w21, w21, #0xff
5c0e4: 17ffffd9 b 5c048 <runtime_svc_init+0x84>
5c0e8: 39400a61 ldrb w1, [x19, #2]
5c0ec: 38796b00 ldrb w0, [x24, x25]
5c0f0: 531a0022 ubfiz w2, w1, #6, #1
5c0f4: 39400661 ldrb w1, [x19, #1]
5c0f8: 12001400 and w0, w0, #0x3f
5c0fc: 12001421 and w1, w1, #0x3f
5c100: 2a020000 orr w0, w0, w2
5c104: 2a020021 orr w1, w1, w2
5c108: 6b01001f cmp w0, w1
5c10c: 540000a9 b.ls 5c120 <runtime_svc_init+0x15c> // b.plast
5c110: f0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5c114: 528012a1 mov w1, #0x95 // #149
5c118: 911d2842 add x2, x2, #0x74a
5c11c: 17ffffbc b 5c00c <runtime_svc_init+0x48>
5c120: 92401c00 and x0, x0, #0xff
5c124: 38206ad5 strb w21, [x22, x0]
5c128: 91000400 add x0, x0, #0x1
5c12c: 6b20003f cmp w1, w0, uxtb
5c130: 54ffffa2 b.cs 5c124 <runtime_svc_init+0x160> // b.hs, b.nlast
5c134: 17ffffea b 5c0dc <runtime_svc_init+0x118>
000000000005c138 <arm_arch_svc_smc_handler>:
5c138: a9be7bfd stp x29, x30, [sp, #-32]!
5c13c: 320183e2 mov w2, #0x80008000 // #-2147450880
5c140: 6b02001f cmp w0, w2
5c144: 910003fd mov x29, sp
5c148: f9000bf3 str x19, [sp, #16]
5c14c: aa0603f3 mov x19, x6
5c150: 54000148 b.hi 5c178 <arm_arch_svc_smc_handler+0x40> // b.pmore
5c154: 32013fe2 mov w2, #0x80007fff // #-2147450881
5c158: 6b02001f cmp w0, w2
5c15c: 54000202 b.cs 5c19c <arm_arch_svc_smc_handler+0x64> // b.hs, b.nlast
5c160: 52b00002 mov w2, #0x80000000 // #-2147483648
5c164: 6b02001f cmp w0, w2
5c168: 54000140 b.eq 5c190 <arm_arch_svc_smc_handler+0x58> // b.none
5c16c: 320107e2 mov w2, #0x80000001 // #-2147483647
5c170: 6b02001f cmp w0, w2
5c174: 540001c0 b.eq 5c1ac <arm_arch_svc_smc_handler+0x74> // b.none
5c178: 2a0003e1 mov w1, w0
5c17c: f0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5c180: 911dc000 add x0, x0, #0x770
5c184: 940009c0 bl 5e884 <tf_log>
5c188: 92800000 mov x0, #0xffffffffffffffff // #-1
5c18c: 14000003 b 5c198 <arm_arch_svc_smc_handler+0x60>
5c190: d2800040 mov x0, #0x2 // #2
5c194: f2a00020 movk x0, #0x1, lsl #16
5c198: f9000260 str x0, [x19]
5c19c: aa1303e0 mov x0, x19
5c1a0: f9400bf3 ldr x19, [sp, #16]
5c1a4: a8c27bfd ldp x29, x30, [sp], #32
5c1a8: d65f03c0 ret
5c1ac: 32013fe0 mov w0, #0x80007fff // #-2147450881
5c1b0: eb00003f cmp x1, x0
5c1b4: 540001e0 b.eq 5c1f0 <arm_arch_svc_smc_handler+0xb8> // b.none
5c1b8: 540000e8 b.hi 5c1d4 <arm_arch_svc_smc_handler+0x9c> // b.pmore
5c1bc: b26183e0 mov x0, #0xffffffff80000000 // #-2147483648
5c1c0: 8b000021 add x1, x1, x0
5c1c4: f100043f cmp x1, #0x1
5c1c8: 5a9f93e0 csetm w0, hi // hi = pmore
5c1cc: 93407c00 sxtw x0, w0
5c1d0: 17fffff2 b 5c198 <arm_arch_svc_smc_handler+0x60>
5c1d4: 320183e0 mov w0, #0x80008000 // #-2147450880
5c1d8: eb00003f cmp x1, x0
5c1dc: 540000e1 b.ne 5c1f8 <arm_arch_svc_smc_handler+0xc0> // b.any
5c1e0: 940010eb bl 6058c <check_wa_cve_2017_5715>
5c1e4: 7100001f cmp w0, #0x0
5c1e8: 1a9f17e0 cset w0, eq // eq = none
5c1ec: 17fffff8 b 5c1cc <arm_arch_svc_smc_handler+0x94>
5c1f0: 12800020 mov w0, #0xfffffffe // #-2
5c1f4: 17fffff6 b 5c1cc <arm_arch_svc_smc_handler+0x94>
5c1f8: 12800000 mov w0, #0xffffffff // #-1
5c1fc: 17fffff4 b 5c1cc <arm_arch_svc_smc_handler+0x94>
000000000005c200 <std_svc_smc_handler>:
5c200: a9be7bfd stp x29, x30, [sp, #-32]!
5c204: 721b281f tst w0, #0xffe0
5c208: 910003fd mov x29, sp
5c20c: f9000bf3 str x19, [sp, #16]
5c210: aa0603f3 mov x19, x6
5c214: 54000081 b.ne 5c224 <std_svc_smc_handler+0x24> // b.any
5c218: 940006f4 bl 5dde8 <psci_smc_handler>
5c21c: f9000260 str x0, [x19]
5c220: 1400001d b 5c294 <std_svc_smc_handler+0x94>
5c224: 2a0003e8 mov w8, w0
5c228: 529fe020 mov w0, #0xff01 // #65281
5c22c: 72b08000 movk w0, #0x8400, lsl #16
5c230: 6b00011f cmp w8, w0
5c234: 54000140 b.eq 5c25c <std_svc_smc_handler+0x5c> // b.none
5c238: 11000800 add w0, w0, #0x2
5c23c: 6b00011f cmp w8, w0
5c240: 54000260 b.eq 5c28c <std_svc_smc_handler+0x8c> // b.none
5c244: 529fe000 mov w0, #0xff00 // #65280
5c248: 72b08000 movk w0, #0x8400, lsl #16
5c24c: 6b00011f cmp w8, w0
5c250: 540002a1 b.ne 5c2a4 <std_svc_smc_handler+0xa4> // b.any
5c254: d2800240 mov x0, #0x12 // #18
5c258: 17fffff1 b 5c21c <std_svc_smc_handler+0x1c>
5c25c: d2882ac0 mov x0, #0x4156 // #16726
5c260: f2bc5ec0 movk x0, #0xe2f6, lsl #16
5c264: f9000cc0 str x0, [x6, #24]
5c268: d285b5c0 mov x0, #0x2dae // #11694
5c26c: f2bf7800 movk x0, #0xfbc0, lsl #16
5c270: f90008c0 str x0, [x6, #16]
5c274: d29f0c60 mov x0, #0xf863 // #63587
5c278: f2a8fd00 movk x0, #0x47e8, lsl #16
5c27c: f90004c0 str x0, [x6, #8]
5c280: d2920b60 mov x0, #0x905b // #36955
5c284: f2a211a0 movk x0, #0x108d, lsl #16
5c288: 17ffffe5 b 5c21c <std_svc_smc_handler+0x1c>
5c28c: d2800020 mov x0, #0x1 // #1
5c290: a90000df stp xzr, x0, [x6]
5c294: aa1303e0 mov x0, x19
5c298: f9400bf3 ldr x19, [sp, #16]
5c29c: a8c27bfd ldp x29, x30, [sp], #32
5c2a0: d65f03c0 ret
5c2a4: 2a0803e1 mov w1, w8
5c2a8: f0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5c2ac: 911ec800 add x0, x0, #0x7b2
5c2b0: 94000975 bl 5e884 <tf_log>
5c2b4: 92800000 mov x0, #0xffffffffffffffff // #-1
5c2b8: 17ffffd9 b 5c21c <std_svc_smc_handler+0x1c>
000000000005c2bc <std_svc_setup>:
5c2bc: a9bf7bfd stp x29, x30, [sp, #-16]!
5c2c0: 529ffc00 mov w0, #0xffe0 // #65504
5c2c4: 910003fd mov x29, sp
5c2c8: 97fffe83 bl 5bcd4 <get_arm_std_svc_args>
5c2cc: b50000e0 cbnz x0, 5c2e8 <std_svc_setup+0x2c>
5c2d0: f0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5c2d4: f0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5c2d8: 911f7c42 add x2, x2, #0x7df
5c2dc: 911f9c00 add x0, x0, #0x7e7
5c2e0: 528004e1 mov w1, #0x27 // #39
5c2e4: 940015d2 bl 61a2c <__assert>
5c2e8: 9400071f bl 5df64 <psci_setup>
5c2ec: 7100001f cmp w0, #0x0
5c2f0: 1a9f07e0 cset w0, ne // ne = any
5c2f4: a8c17bfd ldp x29, x30, [sp], #16
5c2f8: d65f03c0 ret
000000000005c2fc <cm_init>:
5c2fc: d65f03c0 ret
000000000005c300 <cm_setup_context>:
5c300: a9bd7bfd stp x29, x30, [sp, #-48]!
5c304: 910003fd mov x29, sp
5c308: a90153f3 stp x19, x20, [sp, #16]
5c30c: a9025bf5 stp x21, x22, [sp, #32]
5c310: b50000e0 cbnz x0, 5c32c <cm_setup_context+0x2c>
5c314: d0000022 adrp x2, 62000 <vprintf+0x400>
5c318: f0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5c31c: 91289c42 add x2, x2, #0xa27
5c320: 91204000 add x0, x0, #0x810
5c324: 52800901 mov w1, #0x48 // #72
5c328: 940015c1 bl 61a2c <__assert>
5c32c: aa0103f4 mov x20, x1
5c330: aa0003f5 mov x21, x0
5c334: d2804401 mov x1, #0x220 // #544
5c338: b9400696 ldr w22, [x20, #4]
5c33c: 940011e6 bl 60ad4 <zeromem>
5c340: 120002d6 and w22, w22, #0x1
5c344: d53e1113 mrs x19, scr_el3
5c348: 1281a0e0 mov w0, #0xfffff2f8 // #-3336
5c34c: 8a000273 and x19, x19, x0
5c350: 34000056 cbz w22, 5c358 <cm_setup_context+0x58>
5c354: b2400273 orr x19, x19, #0x1
5c358: b9401280 ldr w0, [x20, #16]
5c35c: 37200040 tbnz w0, #4, 5c364 <cm_setup_context+0x64>
5c360: b2760273 orr x19, x19, #0x400
5c364: b9400680 ldr w0, [x20, #4]
5c368: 36100040 tbz w0, #2, 5c370 <cm_setup_context+0x70>
5c36c: b2750273 orr x19, x19, #0x800
5c370: 92407e73 and x19, x19, #0xffffffff
5c374: 927cfa73 and x19, x19, #0xfffffffffffffff7
5c378: 34000056 cbz w22, 5c380 <cm_setup_context+0x80>
5c37c: b2700673 orr x19, x19, #0x30000
5c380: d5380420 mrs x0, id_aa64pfr1_el1
5c384: 53082c00 ubfx w0, w0, #8, #4
5c388: 7100041f cmp w0, #0x1
5c38c: 54000061 b.ne 5c398 <cm_setup_context+0x98> // b.any
5c390: b2660273 orr x19, x19, #0x4000000
5c394: 14000004 b 5c3a4 <cm_setup_context+0xa4>
5c398: 7100081f cmp w0, #0x2
5c39c: 1a9f02c0 csel w0, w22, wzr, eq // eq = none
5c3a0: 35ffff80 cbnz w0, 5c390 <cm_setup_context+0x90>
5c3a4: 2a1603e0 mov w0, w22
5c3a8: 97fffeb8 bl 5be88 <get_scr_el3_from_routing_model>
5c3ac: aa000273 orr x19, x19, x0
5c3b0: b9401280 ldr w0, [x20, #16]
5c3b4: d3441003 ubfx x3, x0, #4, #1
5c3b8: 372000c0 tbnz w0, #4, 5c3d0 <cm_setup_context+0xd0>
5c3bc: d3420c01 ubfx x1, x0, #2, #2
5c3c0: 7100083f cmp w1, #0x2
5c3c4: 54000281 b.ne 5c414 <cm_setup_context+0x114> // b.any
5c3c8: b2780273 orr x19, x19, #0x100
5c3cc: 14000004 b 5c3dc <cm_setup_context+0xdc>
5c3d0: 12000c01 and w1, w0, #0xf
5c3d4: 7100283f cmp w1, #0xa
5c3d8: 54ffff80 b.eq 5c3c8 <cm_setup_context+0xc8> // b.none
5c3dc: 350001d6 cbnz w22, 5c414 <cm_setup_context+0x114>
5c3e0: d3420c01 ubfx x1, x0, #2, #2
5c3e4: 7100083f cmp w1, #0x2
5c3e8: 54000161 b.ne 5c414 <cm_setup_context+0x114> // b.any
5c3ec: b26e0273 orr x19, x19, #0x40000
5c3f0: 34000123 cbz w3, 5c414 <cm_setup_context+0x114>
5c3f4: f0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5c3f8: 9120dc00 add x0, x0, #0x837
5c3fc: 94000922 bl 5e884 <tf_log>
5c400: f0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5c404: 91226000 add x0, x0, #0x898
5c408: 94000a13 bl 5ec54 <backtrace>
5c40c: 940009b0 bl 5eacc <console_flush>
5c410: 94001137 bl 608ec <do_panic>
5c414: b9400682 ldr w2, [x20, #4]
5c418: d2810001 mov x1, #0x800 // #2048
5c41c: d2810704 mov x4, #0x838 // #2104
5c420: 7100007f cmp w3, #0x0
5c424: f2a018a4 movk x4, #0xc5, lsl #16
5c428: f2a61a01 movk x1, #0x30d0, lsl #16
5c42c: d3689c42 lsl x2, x2, #24
5c430: 92670042 and x2, x2, #0x2000000
5c434: aa010041 orr x1, x2, x1
5c438: aa040042 orr x2, x2, x4
5c43c: 9a811042 csel x2, x2, x1, ne // ne = any
5c440: f900a2a2 str x2, [x21, #320]
5c444: d5381021 mrs x1, actlr_el1
5c448: f9400682 ldr x2, [x20, #8]
5c44c: 2a0003e0 mov w0, w0
5c450: f90082b3 str x19, [x21, #256]
5c454: a9118aa0 stp x0, x2, [x21, #280]
5c458: aa1503e0 mov x0, x21
5c45c: d2800802 mov x2, #0x40 // #64
5c460: f900a6a1 str x1, [x21, #328]
5c464: 91006281 add x1, x20, #0x18
5c468: a94153f3 ldp x19, x20, [sp, #16]
5c46c: a9425bf5 ldp x21, x22, [sp, #32]
5c470: a8c37bfd ldp x29, x30, [sp], #48
5c474: 14001593 b 61ac0 <memcpy>
000000000005c478 <cm_init_context_by_index>:
5c478: a9be7bfd stp x29, x30, [sp, #-32]!
5c47c: 910003fd mov x29, sp
5c480: f9000bf3 str x19, [sp, #16]
5c484: aa0103f3 mov x19, x1
5c488: b9400421 ldr w1, [x1, #4]
5c48c: 12000021 and w1, w1, #0x1
5c490: 97fffeaa bl 5bf38 <cm_get_context_by_index>
5c494: aa1303e1 mov x1, x19
5c498: f9400bf3 ldr x19, [sp, #16]
5c49c: a8c27bfd ldp x29, x30, [sp], #32
5c4a0: 17ffff98 b 5c300 <cm_setup_context>
000000000005c4a4 <cm_init_my_context>:
5c4a4: a9be7bfd stp x29, x30, [sp, #-32]!
5c4a8: 910003fd mov x29, sp
5c4ac: f9000bf3 str x19, [sp, #16]
5c4b0: aa0003f3 mov x19, x0
5c4b4: b9400400 ldr w0, [x0, #4]
5c4b8: 12000000 and w0, w0, #0x1
5c4bc: 97fffe92 bl 5bf04 <cm_get_context>
5c4c0: aa1303e1 mov x1, x19
5c4c4: f9400bf3 ldr x19, [sp, #16]
5c4c8: a8c27bfd ldp x29, x30, [sp], #32
5c4cc: 17ffff8d b 5c300 <cm_setup_context>
000000000005c4d0 <cm_el1_sysregs_context_restore>:
5c4d0: a9be7bfd stp x29, x30, [sp, #-32]!
5c4d4: 910003fd mov x29, sp
5c4d8: a90153f3 stp x19, x20, [sp, #16]
5c4dc: 2a0003f3 mov w19, w0
5c4e0: 97fffe89 bl 5bf04 <cm_get_context>
5c4e4: b50000e0 cbnz x0, 5c500 <cm_el1_sysregs_context_restore+0x30>
5c4e8: d0000022 adrp x2, 62000 <vprintf+0x400>
5c4ec: f0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5c4f0: 91289c42 add x2, x2, #0xa27
5c4f4: 91204000 add x0, x0, #0x810
5c4f8: 52804601 mov w1, #0x230 // #560
5c4fc: 9400154c bl 61a2c <__assert>
5c500: 9104c000 add x0, x0, #0x130
5c504: 94001059 bl 60668 <el1_sysregs_context_restore>
5c508: 34000273 cbz w19, 5c554 <cm_el1_sysregs_context_restore+0x84>
5c50c: b0000053 adrp x19, 65000 <panic_msg+0xb>
5c510: b0000054 adrp x20, 65000 <panic_msg+0xb>
5c514: 91094273 add x19, x19, #0x250
5c518: 91094294 add x20, x20, #0x250
5c51c: eb14027f cmp x19, x20
5c520: 54000142 b.cs 5c548 <cm_el1_sysregs_context_restore+0x78> // b.hs, b.nlast
5c524: f8408661 ldr x1, [x19], #8
5c528: d2800000 mov x0, #0x0 // #0
5c52c: d63f0020 blr x1
5c530: 17fffffb b 5c51c <cm_el1_sysregs_context_restore+0x4c>
5c534: f8408661 ldr x1, [x19], #8
5c538: d2800000 mov x0, #0x0 // #0
5c53c: d63f0020 blr x1
5c540: eb14027f cmp x19, x20
5c544: 54ffff83 b.cc 5c534 <cm_el1_sysregs_context_restore+0x64> // b.lo, b.ul, b.last
5c548: a94153f3 ldp x19, x20, [sp, #16]
5c54c: a8c27bfd ldp x29, x30, [sp], #32
5c550: d65f03c0 ret
5c554: b0000053 adrp x19, 65000 <panic_msg+0xb>
5c558: b0000054 adrp x20, 65000 <panic_msg+0xb>
5c55c: 91092273 add x19, x19, #0x248
5c560: 91094294 add x20, x20, #0x250
5c564: 17fffff7 b 5c540 <cm_el1_sysregs_context_restore+0x70>
000000000005c568 <cm_set_next_eret_context>:
5c568: a9bf7bfd stp x29, x30, [sp, #-16]!
5c56c: 910003fd mov x29, sp
5c570: 97fffe65 bl 5bf04 <cm_get_context>
5c574: b50000e0 cbnz x0, 5c590 <cm_set_next_eret_context+0x28>
5c578: d0000022 adrp x2, 62000 <vprintf+0x400>
5c57c: f0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5c580: 91289c42 add x2, x2, #0xa27
5c584: 91204000 add x0, x0, #0x810
5c588: 52805381 mov w1, #0x29c // #668
5c58c: 94001528 bl 61a2c <__assert>
5c590: d5384201 mrs x1, spsel
5c594: b40000e1 cbz x1, 5c5b0 <cm_set_next_eret_context+0x48>
5c598: f0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5c59c: f0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5c5a0: 91216842 add x2, x2, #0x85a
5c5a4: 9121c400 add x0, x0, #0x871
5c5a8: 528008a1 mov w1, #0x45 // #69
5c5ac: 17fffff8 b 5c58c <cm_set_next_eret_context+0x24>
5c5b0: d50041bf msr spsel, #0x1
5c5b4: 9100001f mov sp, x0
5c5b8: d50040bf msr spsel, #0x0
5c5bc: a8c17bfd ldp x29, x30, [sp], #16
5c5c0: d65f03c0 ret
000000000005c5c4 <cm_prepare_el3_exit>:
5c5c4: a9be7bfd stp x29, x30, [sp, #-32]!
5c5c8: 910003fd mov x29, sp
5c5cc: f9000bf3 str x19, [sp, #16]
5c5d0: 2a0003f3 mov w19, w0
5c5d4: 97fffe4c bl 5bf04 <cm_get_context>
5c5d8: b50000e0 cbnz x0, 5c5f4 <cm_prepare_el3_exit+0x30>
5c5dc: d0000022 adrp x2, 62000 <vprintf+0x400>
5c5e0: f0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5c5e4: 91289c42 add x2, x2, #0xa27
5c5e8: 91204000 add x0, x0, #0x810
5c5ec: 52802981 mov w1, #0x14c // #332
5c5f0: 9400150f bl 61a2c <__assert>
5c5f4: 7100067f cmp w19, #0x1
5c5f8: 540004e1 b.ne 5c694 <cm_prepare_el3_exit+0xd0> // b.any
5c5fc: f9408001 ldr x1, [x0, #256]
5c600: 92780022 and x2, x1, #0x100
5c604: 36400121 tbz w1, #8, 5c628 <cm_prepare_el3_exit+0x64>
5c608: f940a000 ldr x0, [x0, #320]
5c60c: d2810601 mov x1, #0x830 // #2096
5c610: f2a618a1 movk x1, #0x30c5, lsl #16
5c614: 92670000 and x0, x0, #0x2000000
5c618: aa010000 orr x0, x0, x1
5c61c: d51c1000 msr sctlr_el2, x0
5c620: 52800000 mov w0, #0x0 // #0
5c624: 1400001b b 5c690 <cm_prepare_el3_exit+0xcc>
5c628: d5380400 mrs x0, id_aa64pfr0_el1
5c62c: f2780c1f tst x0, #0xf00
5c630: 54ffff80 b.eq 5c620 <cm_prepare_el3_exit+0x5c> // b.none
5c634: f2760021 ands x1, x1, #0x400
5c638: d2b00000 mov x0, #0x80000000 // #2147483648
5c63c: 9a800021 csel x1, x1, x0, eq // eq = none
5c640: b2580421 orr x1, x1, #0x30000000000
5c644: d51c1101 msr hcr_el2, x1
5c648: d2867fe0 mov x0, #0x33ff // #13311
5c64c: d51c1140 msr cptr_el2, x0
5c650: d2800060 mov x0, #0x3 // #3
5c654: d51ce100 msr cnthctl_el2, x0
5c658: d51ce062 msr cntvoff_el2, x2
5c65c: d5380000 mrs x0, midr_el1
5c660: d51c0000 msr vpidr_el2, x0
5c664: d53800a0 mrs x0, mpidr_el1
5c668: d51c00a0 msr vmpidr_el2, x0
5c66c: d51c2102 msr vttbr_el2, x2
5c670: d53b9c00 mrs x0, pmcr_el0
5c674: d34b3c00 ubfx x0, x0, #11, #5
5c678: d2a08041 mov x1, #0x4020000 // #67239936
5c67c: aa010000 orr x0, x0, x1
5c680: d51c1120 msr mdcr_el2, x0
5c684: d51c1162 msr hstr_el2, x2
5c688: d51ce222 msr cnthp_ctl_el2, x2
5c68c: 2a1303e0 mov w0, w19
5c690: 9400083e bl 5e788 <spe_enable>
5c694: 2a1303e0 mov w0, w19
5c698: 97ffff8e bl 5c4d0 <cm_el1_sysregs_context_restore>
5c69c: 2a1303e0 mov w0, w19
5c6a0: f9400bf3 ldr x19, [sp, #16]
5c6a4: a8c27bfd ldp x29, x30, [sp], #32
5c6a8: 17ffffb0 b 5c568 <cm_set_next_eret_context>
000000000005c6ac <errata_needs_reporting>:
5c6ac: a9bd7bfd stp x29, x30, [sp, #-48]!
5c6b0: 910003fd mov x29, sp
5c6b4: a90153f3 stp x19, x20, [sp, #16]
5c6b8: aa0103f3 mov x19, x1
5c6bc: b9400021 ldr w1, [x1]
5c6c0: f90013f5 str x21, [sp, #32]
5c6c4: 35000201 cbnz w1, 5c704 <errata_needs_reporting+0x58>
5c6c8: aa0003f5 mov x21, x0
5c6cc: 94000fbd bl 605c0 <spin_lock>
5c6d0: b9400260 ldr w0, [x19]
5c6d4: 7100001f cmp w0, #0x0
5c6d8: 1a9f17f4 cset w20, eq // eq = none
5c6dc: 35000060 cbnz w0, 5c6e8 <errata_needs_reporting+0x3c>
5c6e0: 52800020 mov w0, #0x1 // #1
5c6e4: b9000260 str w0, [x19]
5c6e8: aa1503e0 mov x0, x21
5c6ec: 94000fbd bl 605e0 <spin_unlock>
5c6f0: 2a1403e0 mov w0, w20
5c6f4: a94153f3 ldp x19, x20, [sp, #16]
5c6f8: f94013f5 ldr x21, [sp, #32]
5c6fc: a8c37bfd ldp x29, x30, [sp], #48
5c700: d65f03c0 ret
5c704: 52800000 mov w0, #0x0 // #0
5c708: 17fffffb b 5c6f4 <errata_needs_reporting+0x48>
000000000005c70c <errata_print_msg>:
5c70c: a9bf7bfd stp x29, x30, [sp, #-16]!
5c710: 7100081f cmp w0, #0x2
5c714: 910003fd mov x29, sp
5c718: 540000e9 b.ls 5c734 <errata_print_msg+0x28> // b.plast
5c71c: f0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5c720: 9122a442 add x2, x2, #0x8a9
5c724: 528009c1 mov w1, #0x4e // #78
5c728: f0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5c72c: 91234000 add x0, x0, #0x8d0
5c730: 940014bf bl 61a2c <__assert>
5c734: aa0103e5 mov x5, x1
5c738: b50000a1 cbnz x1, 5c74c <errata_print_msg+0x40>
5c73c: f0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5c740: 528009e1 mov w1, #0x4f // #79
5c744: 9123a442 add x2, x2, #0x8e9
5c748: 17fffff8 b 5c728 <errata_print_msg+0x1c>
5c74c: aa0203e3 mov x3, x2
5c750: b50000a2 cbnz x2, 5c764 <errata_print_msg+0x58>
5c754: f0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5c758: 52800a01 mov w1, #0x50 // #80
5c75c: 9123d442 add x2, x2, #0x8f5
5c760: 17fffff2 b 5c728 <errata_print_msg+0x1c>
5c764: 90000041 adrp x1, 64000 <__func__.3216+0x18e>
5c768: 7100041f cmp w0, #0x1
5c76c: 911c7021 add x1, x1, #0x71c
5c770: 54000160 b.eq 5c79c <errata_print_msg+0x90> // b.none
5c774: 7100081f cmp w0, #0x2
5c778: 540001e0 b.eq 5c7b4 <errata_print_msg+0xa8> // b.none
5c77c: d0000022 adrp x2, 62000 <vprintf+0x400>
5c780: 910a8042 add x2, x2, #0x2a0
5c784: f8605844 ldr x4, [x2, w0, uxtw #3]
5c788: f0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5c78c: aa0503e2 mov x2, x5
5c790: 91240000 add x0, x0, #0x900
5c794: a8c17bfd ldp x29, x30, [sp], #16
5c798: 1400083b b 5e884 <tf_log>
5c79c: f0000024 adrp x4, 63000 <CSWTCH.22+0x37e>
5c7a0: f0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5c7a4: 91260884 add x4, x4, #0x982
5c7a8: aa0503e2 mov x2, x5
5c7ac: 91249c00 add x0, x0, #0x927
5c7b0: 17fffff9 b 5c794 <errata_print_msg+0x88>
5c7b4: f0000024 adrp x4, 63000 <CSWTCH.22+0x37e>
5c7b8: f0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5c7bc: 91253884 add x4, x4, #0x94e
5c7c0: aa0503e2 mov x2, x5
5c7c4: 91255c00 add x0, x0, #0x957
5c7c8: 17fffff3 b 5c794 <errata_print_msg+0x88>
000000000005c7cc <psci_do_cpu_off>:
5c7cc: a9bc7bfd stp x29, x30, [sp, #-64]!
5c7d0: 910003fd mov x29, sp
5c7d4: f90013f5 str x21, [sp, #32]
5c7d8: b0000095 adrp x21, 6d000 <dist_ctx+0x1e50>
5c7dc: a90153f3 stp x19, x20, [sp, #16]
5c7e0: 2a0003f4 mov w20, w0
5c7e4: 94000dba bl 5fecc <plat_my_core_pos>
5c7e8: f944faa1 ldr x1, [x21, #2544]
5c7ec: f9001fff str xzr, [sp, #56]
5c7f0: f9400821 ldr x1, [x1, #16]
5c7f4: b40005c1 cbz x1, 5c8ac <psci_do_cpu_off+0xe0>
5c7f8: 9100e3e2 add x2, sp, #0x38
5c7fc: 52804041 mov w1, #0x202 // #514
5c800: 790063e1 strh w1, [sp, #48]
5c804: 52800041 mov w1, #0x2 // #2
5c808: 3900cbe1 strb w1, [sp, #50]
5c80c: 2a1403e1 mov w1, w20
5c810: 9400024c bl 5d140 <psci_get_parent_pwr_domain_nodes>
5c814: 2a1403e0 mov w0, w20
5c818: 9100e3e1 add x1, sp, #0x38
5c81c: 94000329 bl 5d4c0 <psci_acquire_pwr_domain_locks>
5c820: b0000080 adrp x0, 6d000 <dist_ctx+0x1e50>
5c824: f944fc00 ldr x0, [x0, #2552]
5c828: b50004e0 cbnz x0, 5c8c4 <psci_do_cpu_off+0xf8>
5c82c: 9100c3e1 add x1, sp, #0x30
5c830: 2a1403e0 mov w0, w20
5c834: 9400027d bl 5d228 <psci_do_state_coordination>
5c838: 52800013 mov w19, #0x0 // #0
5c83c: 9100c3e0 add x0, sp, #0x30
5c840: 940002dc bl 5d3b0 <psci_find_max_off_lvl>
5c844: 94000436 bl 5d91c <psci_do_pwrdown_sequence>
5c848: f944faa0 ldr x0, [x21, #2544]
5c84c: f9400801 ldr x1, [x0, #16]
5c850: 9100c3e0 add x0, sp, #0x30
5c854: d63f0020 blr x1
5c858: 9100e3e1 add x1, sp, #0x38
5c85c: 2a1403e0 mov w0, w20
5c860: 94000334 bl 5d530 <psci_release_pwr_domain_locks>
5c864: 35000413 cbnz w19, 5c8e4 <psci_do_cpu_off+0x118>
5c868: d53ed040 mrs x0, tpidr_el3
5c86c: d2800081 mov x1, #0x4 // #4
5c870: 91006000 add x0, x0, #0x18
5c874: 9400102f bl 60930 <flush_dcache_range>
5c878: d53ed040 mrs x0, tpidr_el3
5c87c: 52800021 mov w1, #0x1 // #1
5c880: b9001801 str w1, [x0, #24]
5c884: d5033b9f dsb ish
5c888: d53ed040 mrs x0, tpidr_el3
5c88c: d2800081 mov x1, #0x4 // #4
5c890: 91006000 add x0, x0, #0x18
5c894: 94001043 bl 609a0 <inv_dcache_range>
5c898: f944faa0 ldr x0, [x21, #2544]
5c89c: f9402001 ldr x1, [x0, #64]
5c8a0: b4000201 cbz x1, 5c8e0 <psci_do_cpu_off+0x114>
5c8a4: 9100c3e0 add x0, sp, #0x30
5c8a8: d63f0020 blr x1
5c8ac: f0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5c8b0: f0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5c8b4: 91262842 add x2, x2, #0x98a
5c8b8: 9126cc00 add x0, x0, #0x9b3
5c8bc: 528006c1 mov w1, #0x36 // #54
5c8c0: 9400145b bl 61a2c <__assert>
5c8c4: f9400401 ldr x1, [x0, #8]
5c8c8: b4fffb21 cbz x1, 5c82c <psci_do_cpu_off+0x60>
5c8cc: d2800000 mov x0, #0x0 // #0
5c8d0: d63f0020 blr x1
5c8d4: 2a0003f3 mov w19, w0
5c8d8: 34fffaa0 cbz w0, 5c82c <psci_do_cpu_off+0x60>
5c8dc: 17ffffdf b 5c858 <psci_do_cpu_off+0x8c>
5c8e0: 94000f5e bl 60658 <psci_power_down_wfi>
5c8e4: 2a1303e0 mov w0, w19
5c8e8: a94153f3 ldp x19, x20, [sp, #16]
5c8ec: f94013f5 ldr x21, [sp, #32]
5c8f0: a8c47bfd ldp x29, x30, [sp], #64
5c8f4: d65f03c0 ret
000000000005c8f8 <psci_cpu_on_start>:
5c8f8: a9bc7bfd stp x29, x30, [sp, #-64]!
5c8fc: 910003fd mov x29, sp
5c900: a90153f3 stp x19, x20, [sp, #16]
5c904: aa0003f4 mov x20, x0
5c908: a9025bf5 stp x21, x22, [sp, #32]
5c90c: aa0103f6 mov x22, x1
5c910: a90363f7 stp x23, x24, [sp, #48]
5c914: 97ffd6b2 bl 523dc <plat_core_pos_by_mpidr>
5c918: 36f800e0 tbz w0, #31, 5c934 <psci_cpu_on_start+0x3c>
5c91c: f0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5c920: 91271c42 add x2, x2, #0x9c7
5c924: 52800881 mov w1, #0x44 // #68
5c928: f0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5c92c: 91274000 add x0, x0, #0x9d0
5c930: 9400143f bl 61a2c <__assert>
5c934: b50000b6 cbnz x22, 5c948 <psci_cpu_on_start+0x50>
5c938: f0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5c93c: 528008a1 mov w1, #0x45 // #69
5c940: 91278c42 add x2, x2, #0x9e3
5c944: 17fffff9 b 5c928 <psci_cpu_on_start+0x30>
5c948: b0000097 adrp x23, 6d000 <dist_ctx+0x1e50>
5c94c: 2a0003f3 mov w19, w0
5c950: f944fae0 ldr x0, [x23, #2544]
5c954: f9400401 ldr x1, [x0, #8]
5c958: b4000061 cbz x1, 5c964 <psci_cpu_on_start+0x6c>
5c95c: f9401400 ldr x0, [x0, #40]
5c960: b50000a0 cbnz x0, 5c974 <psci_cpu_on_start+0x7c>
5c964: f0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5c968: 52800981 mov w1, #0x4c // #76
5c96c: 9127b842 add x2, x2, #0x9ee
5c970: 17ffffee b 5c928 <psci_cpu_on_start+0x30>
5c974: d2800195 mov x21, #0xc // #12
5c978: b0000082 adrp x2, 6d000 <dist_ctx+0x1e50>
5c97c: 91264042 add x2, x2, #0x990
5c980: 8b3352b5 add x21, x21, w19, uxtw #4
5c984: 8b0202b5 add x21, x21, x2
5c988: aa1503e0 mov x0, x21
5c98c: 94000f0d bl 605c0 <spin_lock>
5c990: 2a1303e0 mov w0, w19
5c994: 94000e9d bl 60408 <_cpu_data_by_index>
5c998: d2800081 mov x1, #0x4 // #4
5c99c: 91006000 add x0, x0, #0x18
5c9a0: 94000fe4 bl 60930 <flush_dcache_range>
5c9a4: 2a1303e0 mov w0, w19
5c9a8: 94000e98 bl 60408 <_cpu_data_by_index>
5c9ac: b9401802 ldr w2, [x0, #24]
5c9b0: 34000ae2 cbz w2, 5cb0c <psci_cpu_on_start+0x214>
5c9b4: 7100085f cmp w2, #0x2
5c9b8: 54000ae0 b.eq 5cb14 <psci_cpu_on_start+0x21c> // b.none
5c9bc: 7100045f cmp w2, #0x1
5c9c0: 540000a0 b.eq 5c9d4 <psci_cpu_on_start+0xdc> // b.none
5c9c4: f0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5c9c8: 528005a1 mov w1, #0x2d // #45
5c9cc: 91294c42 add x2, x2, #0xa53
5c9d0: 17ffffd6 b 5c928 <psci_cpu_on_start+0x30>
5c9d4: b0000080 adrp x0, 6d000 <dist_ctx+0x1e50>
5c9d8: f944fc00 ldr x0, [x0, #2552]
5c9dc: b40000a0 cbz x0, 5c9f0 <psci_cpu_on_start+0xf8>
5c9e0: f9400001 ldr x1, [x0]
5c9e4: b4000061 cbz x1, 5c9f0 <psci_cpu_on_start+0xf8>
5c9e8: aa1403e0 mov x0, x20
5c9ec: d63f0020 blr x1
5c9f0: 52800058 mov w24, #0x2 // #2
5c9f4: 2a1303e0 mov w0, w19
5c9f8: 94000e84 bl 60408 <_cpu_data_by_index>
5c9fc: b9001818 str w24, [x0, #24]
5ca00: 2a1303e0 mov w0, w19
5ca04: 94000e81 bl 60408 <_cpu_data_by_index>
5ca08: 91006000 add x0, x0, #0x18
5ca0c: d2800081 mov x1, #0x4 // #4
5ca10: 94000fc8 bl 60930 <flush_dcache_range>
5ca14: 2a1303e0 mov w0, w19
5ca18: 94000e7c bl 60408 <_cpu_data_by_index>
5ca1c: b9401800 ldr w0, [x0, #24]
5ca20: 6b18001f cmp w0, w24
5ca24: 54000300 b.eq 5ca84 <psci_cpu_on_start+0x18c> // b.none
5ca28: 7100041f cmp w0, #0x1
5ca2c: 540000a0 b.eq 5ca40 <psci_cpu_on_start+0x148> // b.none
5ca30: f0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5ca34: 52801021 mov w1, #0x81 // #129
5ca38: 91293042 add x2, x2, #0xa4c
5ca3c: 17ffffbb b 5c928 <psci_cpu_on_start+0x30>
5ca40: 2a1303e0 mov w0, w19
5ca44: 94000e71 bl 60408 <_cpu_data_by_index>
5ca48: b9001818 str w24, [x0, #24]
5ca4c: 2a1303e0 mov w0, w19
5ca50: 94000e6e bl 60408 <_cpu_data_by_index>
5ca54: 91006000 add x0, x0, #0x18
5ca58: d2800081 mov x1, #0x4 // #4
5ca5c: 94000fb5 bl 60930 <flush_dcache_range>
5ca60: 2a1303e0 mov w0, w19
5ca64: 94000e69 bl 60408 <_cpu_data_by_index>
5ca68: b9401800 ldr w0, [x0, #24]
5ca6c: 7100081f cmp w0, #0x2
5ca70: 540000a0 b.eq 5ca84 <psci_cpu_on_start+0x18c> // b.none
5ca74: f0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5ca78: 528010c1 mov w1, #0x86 // #134
5ca7c: 9129b842 add x2, x2, #0xa6e
5ca80: 17ffffaa b 5c928 <psci_cpu_on_start+0x30>
5ca84: f944fae0 ldr x0, [x23, #2544]
5ca88: f9400401 ldr x1, [x0, #8]
5ca8c: aa1403e0 mov x0, x20
5ca90: d63f0020 blr x1
5ca94: 7100001f cmp w0, #0x0
5ca98: 2a0003f4 mov w20, w0
5ca9c: 3a461804 ccmn w0, #0x6, #0x4, ne // ne = any
5caa0: 540000a0 b.eq 5cab4 <psci_cpu_on_start+0x1bc> // b.none
5caa4: f0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5caa8: 52801261 mov w1, #0x93 // #147
5caac: 912ac442 add x2, x2, #0xab1
5cab0: 17ffff9e b 5c928 <psci_cpu_on_start+0x30>
5cab4: 35000180 cbnz w0, 5cae4 <psci_cpu_on_start+0x1ec>
5cab8: aa1603e1 mov x1, x22
5cabc: 2a1303e0 mov w0, w19
5cac0: 97fffe6e bl 5c478 <cm_init_context_by_index>
5cac4: aa1503e0 mov x0, x21
5cac8: 94000ec6 bl 605e0 <spin_unlock>
5cacc: 2a1403e0 mov w0, w20
5cad0: a94153f3 ldp x19, x20, [sp, #16]
5cad4: a9425bf5 ldp x21, x22, [sp, #32]
5cad8: a94363f7 ldp x23, x24, [sp, #48]
5cadc: a8c47bfd ldp x29, x30, [sp], #64
5cae0: d65f03c0 ret
5cae4: 2a1303e0 mov w0, w19
5cae8: 94000e48 bl 60408 <_cpu_data_by_index>
5caec: 52800021 mov w1, #0x1 // #1
5caf0: b9001801 str w1, [x0, #24]
5caf4: 2a1303e0 mov w0, w19
5caf8: 94000e44 bl 60408 <_cpu_data_by_index>
5cafc: 91006000 add x0, x0, #0x18
5cb00: d2800081 mov x1, #0x4 // #4
5cb04: 94000f8b bl 60930 <flush_dcache_range>
5cb08: 17ffffef b 5cac4 <psci_cpu_on_start+0x1cc>
5cb0c: 12800074 mov w20, #0xfffffffc // #-4
5cb10: 17ffffed b 5cac4 <psci_cpu_on_start+0x1cc>
5cb14: 12800094 mov w20, #0xfffffffb // #-5
5cb18: 17ffffeb b 5cac4 <psci_cpu_on_start+0x1cc>
000000000005cb1c <psci_cpu_on_finish>:
5cb1c: a9bd7bfd stp x29, x30, [sp, #-48]!
5cb20: 910003fd mov x29, sp
5cb24: a9025bf5 stp x21, x22, [sp, #32]
5cb28: b0000095 adrp x21, 6d000 <dist_ctx+0x1e50>
5cb2c: a90153f3 stp x19, x20, [sp, #16]
5cb30: 2a0003f3 mov w19, w0
5cb34: aa0103f4 mov x20, x1
5cb38: f944faa0 ldr x0, [x21, #2544]
5cb3c: f9401401 ldr x1, [x0, #40]
5cb40: aa1403e0 mov x0, x20
5cb44: d63f0020 blr x1
5cb48: 94000eb7 bl 60624 <psci_do_pwrup_cache_maintenance>
5cb4c: f944faa0 ldr x0, [x21, #2544]
5cb50: f9401801 ldr x1, [x0, #48]
5cb54: b4000061 cbz x1, 5cb60 <psci_cpu_on_finish+0x44>
5cb58: aa1403e0 mov x0, x20
5cb5c: d63f0020 blr x1
5cb60: d2800194 mov x20, #0xc // #12
5cb64: b0000095 adrp x21, 6d000 <dist_ctx+0x1e50>
5cb68: 8b335294 add x20, x20, w19, uxtw #4
5cb6c: 912642b5 add x21, x21, #0x990
5cb70: 8b150294 add x20, x20, x21
5cb74: 940004f4 bl 5df44 <psci_arch_setup>
5cb78: aa1403e0 mov x0, x20
5cb7c: 94000e91 bl 605c0 <spin_lock>
5cb80: aa1403e0 mov x0, x20
5cb84: 94000e97 bl 605e0 <spin_unlock>
5cb88: d53ed040 mrs x0, tpidr_el3
5cb8c: b9401800 ldr w0, [x0, #24]
5cb90: 7100081f cmp w0, #0x2
5cb94: 540000e0 b.eq 5cbb0 <psci_cpu_on_finish+0x94> // b.none
5cb98: f0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5cb9c: f0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5cba0: 912b9842 add x2, x2, #0xae6
5cba4: 91274000 add x0, x0, #0x9d0
5cba8: 52801a61 mov w1, #0xd3 // #211
5cbac: 940013a0 bl 61a2c <__assert>
5cbb0: b0000080 adrp x0, 6d000 <dist_ctx+0x1e50>
5cbb4: f944fc00 ldr x0, [x0, #2552]
5cbb8: b40000a0 cbz x0, 5cbcc <psci_cpu_on_finish+0xb0>
5cbbc: f9400c01 ldr x1, [x0, #24]
5cbc0: b4000061 cbz x1, 5cbcc <psci_cpu_on_finish+0xb0>
5cbc4: d2800000 mov x0, #0x0 // #0
5cbc8: d63f0020 blr x1
5cbcc: b0000054 adrp x20, 65000 <panic_msg+0xb>
5cbd0: b0000056 adrp x22, 65000 <panic_msg+0xb>
5cbd4: 91092294 add x20, x20, #0x248
5cbd8: 910922d6 add x22, x22, #0x248
5cbdc: eb16029f cmp x20, x22
5cbe0: 54000163 b.cc 5cc0c <psci_cpu_on_finish+0xf0> // b.lo, b.ul, b.last
5cbe4: d53800a1 mrs x1, mpidr_el1
5cbe8: d37c7e73 ubfiz x19, x19, #4, #32
5cbec: 92409c21 and x1, x1, #0xffffffffff
5cbf0: 9260dc21 and x1, x1, #0xffffffff00ffffff
5cbf4: 52800020 mov w0, #0x1 // #1
5cbf8: f8336aa1 str x1, [x21, x19]
5cbfc: a94153f3 ldp x19, x20, [sp, #16]
5cc00: a9425bf5 ldp x21, x22, [sp, #32]
5cc04: a8c37bfd ldp x29, x30, [sp], #48
5cc08: 17fffe6f b 5c5c4 <cm_prepare_el3_exit>
5cc0c: f8408681 ldr x1, [x20], #8
5cc10: d2800000 mov x0, #0x0 // #0
5cc14: d63f0020 blr x1
5cc18: 17fffff1 b 5cbdc <psci_cpu_on_finish+0xc0>
000000000005cc1c <psci_cpu_suspend_start>:
5cc1c: a9b87bfd stp x29, x30, [sp, #-128]!
5cc20: 910003fd mov x29, sp
5cc24: a90153f3 stp x19, x20, [sp, #16]
5cc28: b0000094 adrp x20, 6d000 <dist_ctx+0x1e50>
5cc2c: 2a0103f3 mov w19, w1
5cc30: a9025bf5 stp x21, x22, [sp, #32]
5cc34: aa0203f5 mov x21, x2
5cc38: a90363f7 stp x23, x24, [sp, #48]
5cc3c: 2a0303f7 mov w23, w3
5cc40: a9046bf9 stp x25, x26, [sp, #64]
5cc44: aa0003fa mov x26, x0
5cc48: f9002bfb str x27, [sp, #80]
5cc4c: 94000ca0 bl 5fecc <plat_my_core_pos>
5cc50: f944fa81 ldr x1, [x20, #2544]
5cc54: f9003bff str xzr, [sp, #112]
5cc58: f9401022 ldr x2, [x1, #32]
5cc5c: b4000062 cbz x2, 5cc68 <psci_cpu_suspend_start+0x4c>
5cc60: f9401c21 ldr x1, [x1, #56]
5cc64: b50000e1 cbnz x1, 5cc80 <psci_cpu_suspend_start+0x64>
5cc68: f0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5cc6c: f0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5cc70: 912c6042 add x2, x2, #0xb18
5cc74: 912e0000 add x0, x0, #0xb80
5cc78: 528014e1 mov w1, #0xa7 // #167
5cc7c: 9400136c bl 61a2c <__assert>
5cc80: 9101c3e2 add x2, sp, #0x70
5cc84: 2a0003f9 mov w25, w0
5cc88: 2a1303e1 mov w1, w19
5cc8c: 9400012d bl 5d140 <psci_get_parent_pwr_domain_nodes>
5cc90: 9101c3e1 add x1, sp, #0x70
5cc94: 2a1303e0 mov w0, w19
5cc98: 9400020a bl 5d4c0 <psci_acquire_pwr_domain_locks>
5cc9c: d538c100 mrs x0, isr_el1
5cca0: b50006e0 cbnz x0, 5cd7c <psci_cpu_suspend_start+0x160>
5cca4: aa1503e1 mov x1, x21
5cca8: 2a1303e0 mov w0, w19
5ccac: 9400015f bl 5d228 <psci_do_state_coordination>
5ccb0: 34000417 cbz w23, 5cd30 <psci_cpu_suspend_start+0x114>
5ccb4: aa1503e0 mov x0, x21
5ccb8: b0000056 adrp x22, 65000 <panic_msg+0xb>
5ccbc: b000005b adrp x27, 65000 <panic_msg+0xb>
5ccc0: 940001bc bl 5d3b0 <psci_find_max_off_lvl>
5ccc4: 910922d6 add x22, x22, #0x248
5ccc8: 2a0003f8 mov w24, w0
5cccc: 9109237b add x27, x27, #0x248
5ccd0: eb1b02df cmp x22, x27
5ccd4: 540004c3 b.cc 5cd6c <psci_cpu_suspend_start+0x150> // b.lo, b.ul, b.last
5ccd8: d53ed040 mrs x0, tpidr_el3
5ccdc: b9001c13 str w19, [x0, #28]
5cce0: d53ed040 mrs x0, tpidr_el3
5cce4: d2800081 mov x1, #0x4 // #4
5cce8: 91007000 add x0, x0, #0x1c
5ccec: 94000f11 bl 60930 <flush_dcache_range>
5ccf0: b0000080 adrp x0, 6d000 <dist_ctx+0x1e50>
5ccf4: f944fc00 ldr x0, [x0, #2552]
5ccf8: b40000a0 cbz x0, 5cd0c <psci_cpu_suspend_start+0xf0>
5ccfc: f9400801 ldr x1, [x0, #16]
5cd00: b4000061 cbz x1, 5cd0c <psci_cpu_suspend_start+0xf0>
5cd04: 2a1803e0 mov w0, w24
5cd08: d63f0020 blr x1
5cd0c: f944fa80 ldr x0, [x20, #2544]
5cd10: f9400c01 ldr x1, [x0, #24]
5cd14: b4000061 cbz x1, 5cd20 <psci_cpu_suspend_start+0x104>
5cd18: aa1503e0 mov x0, x21
5cd1c: d63f0020 blr x1
5cd20: aa1a03e0 mov x0, x26
5cd24: 97fffde0 bl 5c4a4 <cm_init_my_context>
5cd28: 2a1803e0 mov w0, w24
5cd2c: 940002fc bl 5d91c <psci_do_pwrdown_sequence>
5cd30: f944fa80 ldr x0, [x20, #2544]
5cd34: 52800016 mov w22, #0x0 // #0
5cd38: f9401001 ldr x1, [x0, #32]
5cd3c: aa1503e0 mov x0, x21
5cd40: d63f0020 blr x1
5cd44: 9101c3e1 add x1, sp, #0x70
5cd48: 2a1303e0 mov w0, w19
5cd4c: 940001f9 bl 5d530 <psci_release_pwr_domain_locks>
5cd50: 35000476 cbnz w22, 5cddc <psci_cpu_suspend_start+0x1c0>
5cd54: 340001b7 cbz w23, 5cd88 <psci_cpu_suspend_start+0x16c>
5cd58: f944fa80 ldr x0, [x20, #2544]
5cd5c: f9402001 ldr x1, [x0, #64]
5cd60: b4000121 cbz x1, 5cd84 <psci_cpu_suspend_start+0x168>
5cd64: aa1503e0 mov x0, x21
5cd68: d63f0020 blr x1
5cd6c: f84086c1 ldr x1, [x22], #8
5cd70: d2800000 mov x0, #0x0 // #0
5cd74: d63f0020 blr x1
5cd78: 17ffffd6 b 5ccd0 <psci_cpu_suspend_start+0xb4>
5cd7c: 52800036 mov w22, #0x1 // #1
5cd80: 17fffff1 b 5cd44 <psci_cpu_suspend_start+0x128>
5cd84: 94000e35 bl 60658 <psci_power_down_wfi>
5cd88: d503207f wfi
5cd8c: 9101e3e2 add x2, sp, #0x78
5cd90: 2a1303e1 mov w1, w19
5cd94: 2a1903e0 mov w0, w25
5cd98: f9003fff str xzr, [sp, #120]
5cd9c: 940000e9 bl 5d140 <psci_get_parent_pwr_domain_nodes>
5cda0: 9101e3e1 add x1, sp, #0x78
5cda4: 2a1303e0 mov w0, w19
5cda8: 940001c6 bl 5d4c0 <psci_acquire_pwr_domain_locks>
5cdac: 9101a3e1 add x1, sp, #0x68
5cdb0: 2a1303e0 mov w0, w19
5cdb4: 940000bf bl 5d0b0 <psci_get_target_local_pwr_states>
5cdb8: f944fa80 ldr x0, [x20, #2544]
5cdbc: f9401c01 ldr x1, [x0, #56]
5cdc0: 9101a3e0 add x0, sp, #0x68
5cdc4: d63f0020 blr x1
5cdc8: 2a1303e0 mov w0, w19
5cdcc: 940000ef bl 5d188 <psci_set_pwr_domains_to_run>
5cdd0: 9101e3e1 add x1, sp, #0x78
5cdd4: 2a1303e0 mov w0, w19
5cdd8: 940001d6 bl 5d530 <psci_release_pwr_domain_locks>
5cddc: a94153f3 ldp x19, x20, [sp, #16]
5cde0: a9425bf5 ldp x21, x22, [sp, #32]
5cde4: a94363f7 ldp x23, x24, [sp, #48]
5cde8: a9446bf9 ldp x25, x26, [sp, #64]
5cdec: f9402bfb ldr x27, [sp, #80]
5cdf0: a8c87bfd ldp x29, x30, [sp], #128
5cdf4: d65f03c0 ret
000000000005cdf8 <psci_cpu_suspend_finish>:
5cdf8: a9be7bfd stp x29, x30, [sp, #-32]!
5cdfc: 910003fd mov x29, sp
5ce00: a90153f3 stp x19, x20, [sp, #16]
5ce04: d53ed040 mrs x0, tpidr_el3
5ce08: b9401800 ldr w0, [x0, #24]
5ce0c: 350000a0 cbnz w0, 5ce20 <psci_cpu_suspend_finish+0x28>
5ce10: 39400020 ldrb w0, [x1]
5ce14: aa0103f3 mov x19, x1
5ce18: 7100081f cmp w0, #0x2
5ce1c: 540000e0 b.eq 5ce38 <psci_cpu_suspend_finish+0x40> // b.none
5ce20: f0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5ce24: 912e6042 add x2, x2, #0xb98
5ce28: 528023a1 mov w1, #0x11d // #285
5ce2c: f0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5ce30: 912e0000 add x0, x0, #0xb80
5ce34: 940012fe bl 61a2c <__assert>
5ce38: b0000080 adrp x0, 6d000 <dist_ctx+0x1e50>
5ce3c: f944f800 ldr x0, [x0, #2544]
5ce40: f9401c01 ldr x1, [x0, #56]
5ce44: aa1303e0 mov x0, x19
5ce48: d63f0020 blr x1
5ce4c: 94000df6 bl 60624 <psci_do_pwrup_cache_maintenance>
5ce50: 97ffd589 bl 52474 <plat_get_syscnt_freq2>
5ce54: 2a0003e0 mov w0, w0
5ce58: d51be000 msr cntfrq_el0, x0
5ce5c: b0000094 adrp x20, 6d000 <dist_ctx+0x1e50>
5ce60: f944fe80 ldr x0, [x20, #2552]
5ce64: b40001e0 cbz x0, 5cea0 <psci_cpu_suspend_finish+0xa8>
5ce68: f9401000 ldr x0, [x0, #32]
5ce6c: b40001a0 cbz x0, 5cea0 <psci_cpu_suspend_finish+0xa8>
5ce70: aa1303e0 mov x0, x19
5ce74: 9400014f bl 5d3b0 <psci_find_max_off_lvl>
5ce78: 71000c1f cmp w0, #0x3
5ce7c: 540000a1 b.ne 5ce90 <psci_cpu_suspend_finish+0x98> // b.any
5ce80: f0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5ce84: 52802801 mov w1, #0x140 // #320
5ce88: 91304842 add x2, x2, #0xc12
5ce8c: 17ffffe8 b 5ce2c <psci_cpu_suspend_finish+0x34>
5ce90: f944fe81 ldr x1, [x20, #2552]
5ce94: 2a0003e0 mov w0, w0
5ce98: f9401021 ldr x1, [x1, #32]
5ce9c: d63f0020 blr x1
5cea0: d53ed040 mrs x0, tpidr_el3
5cea4: b0000053 adrp x19, 65000 <panic_msg+0xb>
5cea8: b0000054 adrp x20, 65000 <panic_msg+0xb>
5ceac: 91092273 add x19, x19, #0x248
5ceb0: 91092294 add x20, x20, #0x248
5ceb4: 52800061 mov w1, #0x3 // #3
5ceb8: b9001c01 str w1, [x0, #28]
5cebc: eb14027f cmp x19, x20
5cec0: 540000a3 b.cc 5ced4 <psci_cpu_suspend_finish+0xdc> // b.lo, b.ul, b.last
5cec4: a94153f3 ldp x19, x20, [sp, #16]
5cec8: 52800020 mov w0, #0x1 // #1
5cecc: a8c27bfd ldp x29, x30, [sp], #32
5ced0: 17fffdbd b 5c5c4 <cm_prepare_el3_exit>
5ced4: f8408661 ldr x1, [x19], #8
5ced8: d2800000 mov x0, #0x0 // #0
5cedc: d63f0020 blr x1
5cee0: 17fffff7 b 5cebc <psci_cpu_suspend_finish+0xc4>
000000000005cee4 <psci_set_req_local_pwr_state>:
5cee4: 35000120 cbnz w0, 5cf08 <psci_set_req_local_pwr_state+0x24>
5cee8: a9bf7bfd stp x29, x30, [sp, #-16]!
5ceec: f0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5cef0: f0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5cef4: 910003fd mov x29, sp
5cef8: 9130d842 add x2, x2, #0xc36
5cefc: 91314000 add x0, x0, #0xc50
5cf00: 52801a41 mov w1, #0xd2 // #210
5cf04: 940012ca bl 61a2c <__assert>
5cf08: 51000400 sub w0, w0, #0x1
5cf0c: 7100041f cmp w0, #0x1
5cf10: 54000168 b.hi 5cf3c <psci_set_req_local_pwr_state+0x58> // b.pmore
5cf14: d0000083 adrp x3, 6e000 <iomux_status+0x2c>
5cf18: b94c7c63 ldr w3, [x3, #3196]
5cf1c: 6b01007f cmp w3, w1
5cf20: 540000e9 b.ls 5cf3c <psci_set_req_local_pwr_state+0x58> // b.plast
5cf24: b0000123 adrp x3, 81000 <store_sram+0x2377>
5cf28: 91342463 add x3, x3, #0xd09
5cf2c: d28000c4 mov x4, #0x6 // #6
5cf30: 12001c42 and w2, w2, #0xff
5cf34: 9b040c00 madd x0, x0, x4, x3
5cf38: 38214802 strb w2, [x0, w1, uxtw]
5cf3c: d65f03c0 ret
000000000005cf40 <psci_validate_power_state>:
5cf40: 52bf9fc2 mov w2, #0xfcfe0000 // #-50462720
5cf44: 6a02001f tst w0, w2
5cf48: 540001e1 b.ne 5cf84 <psci_validate_power_state+0x44> // b.any
5cf4c: b0000082 adrp x2, 6d000 <dist_ctx+0x1e50>
5cf50: f944f842 ldr x2, [x2, #2544]
5cf54: f9402c42 ldr x2, [x2, #88]
5cf58: b5000122 cbnz x2, 5cf7c <psci_validate_power_state+0x3c>
5cf5c: a9bf7bfd stp x29, x30, [sp, #-16]!
5cf60: f0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5cf64: f0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5cf68: 910003fd mov x29, sp
5cf6c: 91319c42 add x2, x2, #0xc67
5cf70: 91314000 add x0, x0, #0xc50
5cf74: 52801061 mov w1, #0x83 // #131
5cf78: 940012ad bl 61a2c <__assert>
5cf7c: aa0203f0 mov x16, x2
5cf80: d61f0200 br x16
5cf84: 12800020 mov w0, #0xfffffffe // #-2
5cf88: d65f03c0 ret
000000000005cf8c <psci_query_sys_suspend_pwrstate>:
5cf8c: b0000081 adrp x1, 6d000 <dist_ctx+0x1e50>
5cf90: f944f821 ldr x1, [x1, #2544]
5cf94: f9403421 ldr x1, [x1, #104]
5cf98: b5000121 cbnz x1, 5cfbc <psci_query_sys_suspend_pwrstate+0x30>
5cf9c: a9bf7bfd stp x29, x30, [sp, #-16]!
5cfa0: f0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5cfa4: f0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5cfa8: 910003fd mov x29, sp
5cfac: 91325842 add x2, x2, #0xc96
5cfb0: 91314000 add x0, x0, #0xc50
5cfb4: 52801261 mov w1, #0x93 // #147
5cfb8: 9400129d bl 61a2c <__assert>
5cfbc: aa0103f0 mov x16, x1
5cfc0: d61f0200 br x16
000000000005cfc4 <psci_is_last_on_cpu>:
5cfc4: a9bd7bfd stp x29, x30, [sp, #-48]!
5cfc8: 910003fd mov x29, sp
5cfcc: a90153f3 stp x19, x20, [sp, #16]
5cfd0: d0000094 adrp x20, 6e000 <iomux_status+0x2c>
5cfd4: 9131f294 add x20, x20, #0xc7c
5cfd8: f90013f5 str x21, [sp, #32]
5cfdc: 94000bbc bl 5fecc <plat_my_core_pos>
5cfe0: 2a0003f5 mov w21, w0
5cfe4: 52800013 mov w19, #0x0 // #0
5cfe8: b9400280 ldr w0, [x20]
5cfec: 6b13001f cmp w0, w19
5cff0: 540000c8 b.hi 5d008 <psci_is_last_on_cpu+0x44> // b.pmore
5cff4: 52800020 mov w0, #0x1 // #1
5cff8: a94153f3 ldp x19, x20, [sp, #16]
5cffc: f94013f5 ldr x21, [sp, #32]
5d000: a8c37bfd ldp x29, x30, [sp], #48
5d004: d65f03c0 ret
5d008: 6b15027f cmp w19, w21
5d00c: 54000181 b.ne 5d03c <psci_is_last_on_cpu+0x78> // b.any
5d010: d53ed040 mrs x0, tpidr_el3
5d014: b9401800 ldr w0, [x0, #24]
5d018: 35000060 cbnz w0, 5d024 <psci_is_last_on_cpu+0x60>
5d01c: 11000673 add w19, w19, #0x1
5d020: 17fffff2 b 5cfe8 <psci_is_last_on_cpu+0x24>
5d024: d0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5d028: d0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5d02c: 91333042 add x2, x2, #0xccc
5d030: 91314000 add x0, x0, #0xc50
5d034: 52801501 mov w1, #0xa8 // #168
5d038: 9400127d bl 61a2c <__assert>
5d03c: 2a1303e0 mov w0, w19
5d040: 94000cf2 bl 60408 <_cpu_data_by_index>
5d044: b9401800 ldr w0, [x0, #24]
5d048: 7100041f cmp w0, #0x1
5d04c: 54fffe80 b.eq 5d01c <psci_is_last_on_cpu+0x58> // b.none
5d050: 52800000 mov w0, #0x0 // #0
5d054: 17ffffe9 b 5cff8 <psci_is_last_on_cpu+0x34>
000000000005d058 <psci_init_req_local_pwr_states>:
5d058: b0000080 adrp x0, 6e000 <iomux_status+0x2c>
5d05c: 90000121 adrp x1, 81000 <store_sram+0x2377>
5d060: 91342421 add x1, x1, #0xd09
5d064: 52800043 mov w3, #0x2 // #2
5d068: b94c7c02 ldr w2, [x0, #3196]
5d06c: d2800000 mov x0, #0x0 // #0
5d070: 6b00005f cmp w2, w0
5d074: 54000089 b.ls 5d084 <psci_init_req_local_pwr_states+0x2c> // b.plast
5d078: 38216803 strb w3, [x0, x1]
5d07c: 91000400 add x0, x0, #0x1
5d080: 17fffffc b 5d070 <psci_init_req_local_pwr_states+0x18>
5d084: 90000121 adrp x1, 81000 <store_sram+0x2377>
5d088: 91342421 add x1, x1, #0xd09
5d08c: d2800000 mov x0, #0x0 // #0
5d090: 52800044 mov w4, #0x2 // #2
5d094: 6b00005f cmp w2, w0
5d098: 540000a9 b.ls 5d0ac <psci_init_req_local_pwr_states+0x54> // b.plast
5d09c: 8b000023 add x3, x1, x0
5d0a0: 91000400 add x0, x0, #0x1
5d0a4: 39001864 strb w4, [x3, #6]
5d0a8: 17fffffb b 5d094 <psci_init_req_local_pwr_states+0x3c>
5d0ac: d65f03c0 ret
000000000005d0b0 <psci_get_target_local_pwr_states>:
5d0b0: a9be7bfd stp x29, x30, [sp, #-32]!
5d0b4: 910003fd mov x29, sp
5d0b8: a90153f3 stp x19, x20, [sp, #16]
5d0bc: 2a0003f4 mov w20, w0
5d0c0: aa0103f3 mov x19, x1
5d0c4: d53ed040 mrs x0, tpidr_el3
5d0c8: 39408000 ldrb w0, [x0, #32]
5d0cc: 39000020 strb w0, [x1]
5d0d0: 94000b7f bl 5fecc <plat_my_core_pos>
5d0d4: d37c7c00 ubfiz x0, x0, #4, #32
5d0d8: 90000081 adrp x1, 6d000 <dist_ctx+0x1e50>
5d0dc: 91264021 add x1, x1, #0x990
5d0e0: 8b000021 add x1, x1, x0
5d0e4: b00001c0 adrp x0, 96000 <rockchip_pd_lock>
5d0e8: 9101b000 add x0, x0, #0x6c
5d0ec: 52800022 mov w2, #0x1 // #1
5d0f0: b9400823 ldr w3, [x1, #8]
5d0f4: 6b14005f cmp w2, w20
5d0f8: 2a0203e1 mov w1, w2
5d0fc: 540000e9 b.ls 5d118 <psci_get_target_local_pwr_states+0x68> // b.plast
5d100: 8b010273 add x19, x19, x1
5d104: 7100085f cmp w2, #0x2
5d108: 54000169 b.ls 5d134 <psci_get_target_local_pwr_states+0x84> // b.plast
5d10c: a94153f3 ldp x19, x20, [sp, #16]
5d110: a8c27bfd ldp x29, x30, [sp], #32
5d114: d65f03c0 ret
5d118: d37c7c63 ubfiz x3, x3, #4, #32
5d11c: 11000442 add w2, w2, #0x1
5d120: 8b030003 add x3, x0, x3
5d124: 39403064 ldrb w4, [x3, #12]
5d128: 38216a64 strb w4, [x19, x1]
5d12c: b9400863 ldr w3, [x3, #8]
5d130: 17fffff1 b 5d0f4 <psci_get_target_local_pwr_states+0x44>
5d134: 11000442 add w2, w2, #0x1
5d138: 3800167f strb wzr, [x19], #1
5d13c: 17fffff2 b 5d104 <psci_get_target_local_pwr_states+0x54>
000000000005d140 <psci_get_parent_pwr_domain_nodes>:
5d140: d37c7c03 ubfiz x3, x0, #4, #32
5d144: 90000080 adrp x0, 6d000 <dist_ctx+0x1e50>
5d148: 91264000 add x0, x0, #0x990
5d14c: b00001c4 adrp x4, 96000 <rockchip_pd_lock>
5d150: 8b030000 add x0, x0, x3
5d154: d1001042 sub x2, x2, #0x4
5d158: 9101b084 add x4, x4, #0x6c
5d15c: d2800003 mov x3, #0x0 // #0
5d160: b9400800 ldr w0, [x0, #8]
5d164: 91000463 add x3, x3, #0x1
5d168: 6b03003f cmp w1, w3
5d16c: 54000042 b.cs 5d174 <psci_get_parent_pwr_domain_nodes+0x34> // b.hs, b.nlast
5d170: d65f03c0 ret
5d174: b8237840 str w0, [x2, x3, lsl #2]
5d178: d37c7c00 ubfiz x0, x0, #4, #32
5d17c: 8b000080 add x0, x4, x0
5d180: b9400800 ldr w0, [x0, #8]
5d184: 17fffff8 b 5d164 <psci_get_parent_pwr_domain_nodes+0x24>
000000000005d188 <psci_set_pwr_domains_to_run>:
5d188: a9bc7bfd stp x29, x30, [sp, #-64]!
5d18c: 910003fd mov x29, sp
5d190: a90153f3 stp x19, x20, [sp, #16]
5d194: 52800034 mov w20, #0x1 // #1
5d198: a9025bf5 stp x21, x22, [sp, #32]
5d19c: 2a0003f6 mov w22, w0
5d1a0: f9001bf7 str x23, [sp, #48]
5d1a4: 94000b4a bl 5fecc <plat_my_core_pos>
5d1a8: 2a0003f5 mov w21, w0
5d1ac: 90000082 adrp x2, 6d000 <dist_ctx+0x1e50>
5d1b0: 91264042 add x2, x2, #0x990
5d1b4: b00001d7 adrp x23, 96000 <rockchip_pd_lock>
5d1b8: d37c7ea0 ubfiz x0, x21, #4, #32
5d1bc: 9101b2f7 add x23, x23, #0x6c
5d1c0: 8b000042 add x2, x2, x0
5d1c4: b9400853 ldr w19, [x2, #8]
5d1c8: 6b16029f cmp w20, w22
5d1cc: 540001a9 b.ls 5d200 <psci_set_pwr_domains_to_run+0x78> // b.plast
5d1d0: d53ed040 mrs x0, tpidr_el3
5d1d4: b900181f str wzr, [x0, #24]
5d1d8: d53ed040 mrs x0, tpidr_el3
5d1dc: 3900801f strb wzr, [x0, #32]
5d1e0: d53ed040 mrs x0, tpidr_el3
5d1e4: a94153f3 ldp x19, x20, [sp, #16]
5d1e8: 91006000 add x0, x0, #0x18
5d1ec: a9425bf5 ldp x21, x22, [sp, #32]
5d1f0: d2800181 mov x1, #0xc // #12
5d1f4: f9401bf7 ldr x23, [sp, #48]
5d1f8: a8c47bfd ldp x29, x30, [sp], #64
5d1fc: 14000dcd b 60930 <flush_dcache_range>
5d200: d37c7e73 ubfiz x19, x19, #4, #32
5d204: 2a1403e0 mov w0, w20
5d208: 8b1302f3 add x19, x23, x19
5d20c: 2a1503e1 mov w1, w21
5d210: 52800002 mov w2, #0x0 // #0
5d214: 11000694 add w20, w20, #0x1
5d218: 3900327f strb wzr, [x19, #12]
5d21c: 97ffff32 bl 5cee4 <psci_set_req_local_pwr_state>
5d220: b9400a73 ldr w19, [x19, #8]
5d224: 17ffffe9 b 5d1c8 <psci_set_pwr_domains_to_run+0x40>
000000000005d228 <psci_do_state_coordination>:
5d228: a9ba7bfd stp x29, x30, [sp, #-96]!
5d22c: 910003fd mov x29, sp
5d230: a90153f3 stp x19, x20, [sp, #16]
5d234: aa0103f4 mov x20, x1
5d238: a9025bf5 stp x21, x22, [sp, #32]
5d23c: 2a0003f5 mov w21, w0
5d240: a90363f7 stp x23, x24, [sp, #48]
5d244: a9046bf9 stp x25, x26, [sp, #64]
5d248: a90573fb stp x27, x28, [sp, #80]
5d24c: 94000b20 bl 5fecc <plat_my_core_pos>
5d250: 71000abf cmp w21, #0x2
5d254: 540000e9 b.ls 5d270 <psci_do_state_coordination+0x48> // b.plast
5d258: d0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5d25c: d0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5d260: 9133d842 add x2, x2, #0xcf6
5d264: 91314000 add x0, x0, #0xc50
5d268: 52803561 mov w1, #0x1ab // #427
5d26c: 940011f0 bl 61a2c <__assert>
5d270: 2a0003f9 mov w25, w0
5d274: 90000096 adrp x22, 6d000 <dist_ctx+0x1e50>
5d278: 912642d6 add x22, x22, #0x990
5d27c: b00001d7 adrp x23, 96000 <rockchip_pd_lock>
5d280: d37c7f20 ubfiz x0, x25, #4, #32
5d284: b0000098 adrp x24, 6e000 <iomux_status+0x2c>
5d288: 8b0002c0 add x0, x22, x0
5d28c: 9101b2f7 add x23, x23, #0x6c
5d290: 9131f318 add x24, x24, #0xc7c
5d294: d2800033 mov x19, #0x1 // #1
5d298: b940081a ldr w26, [x0, #8]
5d29c: 2a1303fb mov w27, w19
5d2a0: 6b1302bf cmp w21, w19
5d2a4: 54000323 b.cc 5d308 <psci_do_state_coordination+0xe0> // b.lo, b.ul, b.last
5d2a8: 38736a82 ldrb w2, [x20, x19]
5d2ac: 2a1303e0 mov w0, w19
5d2b0: 2a1903e1 mov w1, w25
5d2b4: d37c7f5a ubfiz x26, x26, #4, #32
5d2b8: 8b1a02fc add x28, x23, x26
5d2bc: 97ffff0a bl 5cee4 <psci_set_req_local_pwr_state>
5d2c0: d28000c1 mov x1, #0x6 // #6
5d2c4: b87a6ae2 ldr w2, [x23, x26]
5d2c8: b9400303 ldr w3, [x24]
5d2cc: 90000120 adrp x0, 81000 <store_sram+0x2377>
5d2d0: 9b017e61 mul x1, x19, x1
5d2d4: 91342400 add x0, x0, #0xd09
5d2d8: 6b03005f cmp w2, w3
5d2dc: d1001821 sub x1, x1, #0x6
5d2e0: 8b224021 add x1, x1, w2, uxtw
5d2e4: b9400782 ldr w2, [x28, #4]
5d2e8: 8b010001 add x1, x0, x1
5d2ec: 2a1303e0 mov w0, w19
5d2f0: 9a9f3021 csel x1, x1, xzr, cc // cc = lo, ul, last
5d2f4: 94000964 bl 5f884 <plat_get_target_pwr_state>
5d2f8: 38336a80 strb w0, [x20, x19]
5d2fc: 72001c1f tst w0, #0xff
5d300: 91000673 add x19, x19, #0x1
5d304: 54000381 b.ne 5d374 <psci_do_state_coordination+0x14c> // b.any
5d308: 11000760 add w0, w27, #0x1
5d30c: 6b15001f cmp w0, w21
5d310: 54000369 b.ls 5d37c <psci_do_state_coordination+0x154> // b.plast
5d314: 39400281 ldrb w1, [x20]
5d318: d53ed040 mrs x0, tpidr_el3
5d31c: 39008001 strb w1, [x0, #32]
5d320: d53ed040 mrs x0, tpidr_el3
5d324: 91008000 add x0, x0, #0x20
5d328: d2800021 mov x1, #0x1 // #1
5d32c: 94000d81 bl 60930 <flush_dcache_range>
5d330: 94000ae7 bl 5fecc <plat_my_core_pos>
5d334: d37c7c00 ubfiz x0, x0, #4, #32
5d338: 8b0002d6 add x22, x22, x0
5d33c: b00001c2 adrp x2, 96000 <rockchip_pd_lock>
5d340: 9101b042 add x2, x2, #0x6c
5d344: d2800000 mov x0, #0x0 // #0
5d348: b9400ac1 ldr w1, [x22, #8]
5d34c: 91000400 add x0, x0, #0x1
5d350: 6b0002bf cmp w21, w0
5d354: 54000222 b.cs 5d398 <psci_do_state_coordination+0x170> // b.hs, b.nlast
5d358: a94153f3 ldp x19, x20, [sp, #16]
5d35c: a9425bf5 ldp x21, x22, [sp, #32]
5d360: a94363f7 ldp x23, x24, [sp, #48]
5d364: a9446bf9 ldp x25, x26, [sp, #64]
5d368: a94573fb ldp x27, x28, [sp, #80]
5d36c: a8c67bfd ldp x29, x30, [sp], #96
5d370: d65f03c0 ret
5d374: b9400b9a ldr w26, [x28, #8]
5d378: 17ffffc9 b 5d29c <psci_do_state_coordination+0x74>
5d37c: 39400a82 ldrb w2, [x20, #2]
5d380: 52800040 mov w0, #0x2 // #2
5d384: 2a1903e1 mov w1, w25
5d388: 97fffed7 bl 5cee4 <psci_set_req_local_pwr_state>
5d38c: 39000a9f strb wzr, [x20, #2]
5d390: 52800060 mov w0, #0x3 // #3
5d394: 17ffffde b 5d30c <psci_do_state_coordination+0xe4>
5d398: d37c7c21 ubfiz x1, x1, #4, #32
5d39c: 38606a83 ldrb w3, [x20, x0]
5d3a0: 8b010041 add x1, x2, x1
5d3a4: 39003023 strb w3, [x1, #12]
5d3a8: b9400821 ldr w1, [x1, #8]
5d3ac: 17ffffe8 b 5d34c <psci_do_state_coordination+0x124>
000000000005d3b0 <psci_find_max_off_lvl>:
5d3b0: aa0003e1 mov x1, x0
5d3b4: 39400800 ldrb w0, [x0, #2]
5d3b8: 7100081f cmp w0, #0x2
5d3bc: 54000120 b.eq 5d3e0 <psci_find_max_off_lvl+0x30> // b.none
5d3c0: 39400420 ldrb w0, [x1, #1]
5d3c4: 7100081f cmp w0, #0x2
5d3c8: 540000e0 b.eq 5d3e4 <psci_find_max_off_lvl+0x34> // b.none
5d3cc: 39400021 ldrb w1, [x1]
5d3d0: 52800060 mov w0, #0x3 // #3
5d3d4: 7100083f cmp w1, #0x2
5d3d8: 54000041 b.ne 5d3e0 <psci_find_max_off_lvl+0x30> // b.any
5d3dc: 52800000 mov w0, #0x0 // #0
5d3e0: d65f03c0 ret
5d3e4: 52800020 mov w0, #0x1 // #1
5d3e8: 17fffffe b 5d3e0 <psci_find_max_off_lvl+0x30>
000000000005d3ec <psci_find_target_suspend_lvl>:
5d3ec: 39400801 ldrb w1, [x0, #2]
5d3f0: 35000101 cbnz w1, 5d410 <psci_find_target_suspend_lvl+0x24>
5d3f4: 39400401 ldrb w1, [x0, #1]
5d3f8: 35000101 cbnz w1, 5d418 <psci_find_target_suspend_lvl+0x2c>
5d3fc: 39400001 ldrb w1, [x0]
5d400: 52800060 mov w0, #0x3 // #3
5d404: 34000041 cbz w1, 5d40c <psci_find_target_suspend_lvl+0x20>
5d408: 52800000 mov w0, #0x0 // #0
5d40c: d65f03c0 ret
5d410: 52800040 mov w0, #0x2 // #2
5d414: 17fffffe b 5d40c <psci_find_target_suspend_lvl+0x20>
5d418: 52800020 mov w0, #0x1 // #1
5d41c: 17fffffc b 5d40c <psci_find_target_suspend_lvl+0x20>
000000000005d420 <psci_validate_suspend_req>:
5d420: aa0003e3 mov x3, x0
5d424: 2a0103e5 mov w5, w1
5d428: a9bf7bfd stp x29, x30, [sp, #-16]!
5d42c: 910003fd mov x29, sp
5d430: 97ffffef bl 5d3ec <psci_find_target_suspend_lvl>
5d434: 71000c1f cmp w0, #0x3
5d438: 54000300 b.eq 5d498 <psci_validate_suspend_req+0x78> // b.none
5d43c: 2a0003e2 mov w2, w0
5d440: 93407c00 sxtw x0, w0
5d444: 52800001 mov w1, #0x0 // #0
5d448: 36f801a0 tbz w0, #31, 5d47c <psci_validate_suspend_req+0x5c>
5d44c: aa0303e0 mov x0, x3
5d450: 97ffffd8 bl 5d3b0 <psci_find_max_off_lvl>
5d454: 6b00005f cmp w2, w0
5d458: 52800061 mov w1, #0x3 // #3
5d45c: 1a811042 csel w2, w2, w1, ne // ne = any
5d460: 350002c5 cbnz w5, 5d4b8 <psci_validate_suspend_req+0x98>
5d464: 6b01001f cmp w0, w1
5d468: 12800020 mov w0, #0xfffffffe // #-2
5d46c: 7a410044 ccmp w2, w1, #0x4, eq // eq = none
5d470: 1a8013e0 csel w0, wzr, w0, ne // ne = any
5d474: a8c17bfd ldp x29, x30, [sp], #16
5d478: d65f03c0 ret
5d47c: 38606864 ldrb w4, [x3, x0]
5d480: 34000104 cbz w4, 5d4a0 <psci_validate_suspend_req+0x80>
5d484: 7100049f cmp w4, #0x1
5d488: 54000108 b.hi 5d4a8 <psci_validate_suspend_req+0x88> // b.pmore
5d48c: 52800024 mov w4, #0x1 // #1
5d490: 6b04003f cmp w1, w4
5d494: 540000c9 b.ls 5d4ac <psci_validate_suspend_req+0x8c> // b.plast
5d498: 12800020 mov w0, #0xfffffffe // #-2
5d49c: 17fffff6 b 5d474 <psci_validate_suspend_req+0x54>
5d4a0: 52800004 mov w4, #0x0 // #0
5d4a4: 17fffffb b 5d490 <psci_validate_suspend_req+0x70>
5d4a8: 52800044 mov w4, #0x2 // #2
5d4ac: d1000400 sub x0, x0, #0x1
5d4b0: 2a0403e1 mov w1, w4
5d4b4: 17ffffe5 b 5d448 <psci_validate_suspend_req+0x28>
5d4b8: 52800000 mov w0, #0x0 // #0
5d4bc: 17ffffee b 5d474 <psci_validate_suspend_req+0x54>
000000000005d4c0 <psci_acquire_pwr_domain_locks>:
5d4c0: a9bc7bfd stp x29, x30, [sp, #-64]!
5d4c4: 910003fd mov x29, sp
5d4c8: a90153f3 stp x19, x20, [sp, #16]
5d4cc: 2a0003f4 mov w20, w0
5d4d0: 52800033 mov w19, #0x1 // #1
5d4d4: a9025bf5 stp x21, x22, [sp, #32]
5d4d8: b00001d6 adrp x22, 96000 <rockchip_pd_lock>
5d4dc: aa0103f5 mov x21, x1
5d4e0: 910032d6 add x22, x22, #0xc
5d4e4: a90363f7 stp x23, x24, [sp, #48]
5d4e8: b00001d7 adrp x23, 96000 <rockchip_pd_lock>
5d4ec: 9101b2f7 add x23, x23, #0x6c
5d4f0: 52800198 mov w24, #0xc // #12
5d4f4: 6b14027f cmp w19, w20
5d4f8: 540000c9 b.ls 5d510 <psci_acquire_pwr_domain_locks+0x50> // b.plast
5d4fc: a94153f3 ldp x19, x20, [sp, #16]
5d500: a9425bf5 ldp x21, x22, [sp, #32]
5d504: a94363f7 ldp x23, x24, [sp, #48]
5d508: a8c47bfd ldp x29, x30, [sp], #64
5d50c: d65f03c0 ret
5d510: 51000660 sub w0, w19, #0x1
5d514: 11000673 add w19, w19, #0x1
5d518: b8607aa0 ldr w0, [x21, x0, lsl #2]
5d51c: 8b0012e0 add x0, x23, x0, lsl #4
5d520: 39403800 ldrb w0, [x0, #14]
5d524: 9bb85800 umaddl x0, w0, w24, x22
5d528: 94000425 bl 5e5bc <bakery_lock_get>
5d52c: 17fffff2 b 5d4f4 <psci_acquire_pwr_domain_locks+0x34>
000000000005d530 <psci_release_pwr_domain_locks>:
5d530: a9bc7bfd stp x29, x30, [sp, #-64]!
5d534: 910003fd mov x29, sp
5d538: a90153f3 stp x19, x20, [sp, #16]
5d53c: 2a0003f3 mov w19, w0
5d540: aa0103f4 mov x20, x1
5d544: a9025bf5 stp x21, x22, [sp, #32]
5d548: b00001d5 adrp x21, 96000 <rockchip_pd_lock>
5d54c: b00001d6 adrp x22, 96000 <rockchip_pd_lock>
5d550: 910032b5 add x21, x21, #0xc
5d554: 9101b2d6 add x22, x22, #0x6c
5d558: f9001bf7 str x23, [sp, #48]
5d55c: 52800197 mov w23, #0xc // #12
5d560: 350000d3 cbnz w19, 5d578 <psci_release_pwr_domain_locks+0x48>
5d564: a94153f3 ldp x19, x20, [sp, #16]
5d568: a9425bf5 ldp x21, x22, [sp, #32]
5d56c: f9401bf7 ldr x23, [sp, #48]
5d570: a8c47bfd ldp x29, x30, [sp], #64
5d574: d65f03c0 ret
5d578: 51000673 sub w19, w19, #0x1
5d57c: b8735a80 ldr w0, [x20, w19, uxtw #2]
5d580: 8b0012c0 add x0, x22, x0, lsl #4
5d584: 39403800 ldrb w0, [x0, #14]
5d588: 9bb75400 umaddl x0, w0, w23, x21
5d58c: 9400044e bl 5e6c4 <bakery_lock_release>
5d590: 17fffff4 b 5d560 <psci_release_pwr_domain_locks+0x30>
000000000005d594 <psci_validate_mpidr>:
5d594: a9bf7bfd stp x29, x30, [sp, #-16]!
5d598: 910003fd mov x29, sp
5d59c: 97ffd390 bl 523dc <plat_core_pos_by_mpidr>
5d5a0: 7100001f cmp w0, #0x0
5d5a4: a8c17bfd ldp x29, x30, [sp], #16
5d5a8: 12800020 mov w0, #0xfffffffe // #-2
5d5ac: 1a9fb000 csel w0, w0, wzr, lt // lt = tstop
5d5b0: d65f03c0 ret
000000000005d5b4 <psci_validate_entry_point>:
5d5b4: a9bb7bfd stp x29, x30, [sp, #-80]!
5d5b8: 910003fd mov x29, sp
5d5bc: a90153f3 stp x19, x20, [sp, #16]
5d5c0: aa0003f4 mov x20, x0
5d5c4: 90000080 adrp x0, 6d000 <dist_ctx+0x1e50>
5d5c8: aa0103f3 mov x19, x1
5d5cc: a9025bf5 stp x21, x22, [sp, #32]
5d5d0: f944f800 ldr x0, [x0, #2544]
5d5d4: a90363f7 stp x23, x24, [sp, #48]
5d5d8: aa0203f8 mov x24, x2
5d5dc: f9403001 ldr x1, [x0, #96]
5d5e0: f90023f9 str x25, [sp, #64]
5d5e4: b5000361 cbnz x1, 5d650 <psci_validate_entry_point+0x9c>
5d5e8: d53e1117 mrs x23, scr_el3
5d5ec: d5381000 mrs x0, sctlr_el1
5d5f0: 927802f9 and x25, x23, #0x100
5d5f4: 37400437 tbnz w23, #8, 5d678 <psci_validate_entry_point+0xc4>
5d5f8: f2670001 ands x1, x0, #0x2000000
5d5fc: 53196415 ubfx w21, w0, #25, #1
5d600: 52802021 mov w1, #0x101 // #257
5d604: d2800076 mov x22, #0x3 // #3
5d608: 72a00b01 movk w1, #0x58, lsl #16
5d60c: 9a9f16c0 csinc x0, x22, xzr, ne // ne = any
5d610: 29000281 stp w1, w0, [x20]
5d614: 91006280 add x0, x20, #0x18
5d618: f9000693 str x19, [x20, #8]
5d61c: d2800801 mov x1, #0x40 // #64
5d620: 94000d2d bl 60ad4 <zeromem>
5d624: f9000e98 str x24, [x20, #24]
5d628: 365002d7 tbz w23, #10, 5d680 <psci_validate_entry_point+0xcc>
5d62c: 37000193 tbnz w19, #0, 5d65c <psci_validate_entry_point+0xa8>
5d630: f100033f cmp x25, #0x0
5d634: 52807821 mov w1, #0x3c1 // #961
5d638: 1a9f07e0 cset w0, ne // ne = any
5d63c: 11000400 add w0, w0, #0x1
5d640: 2a000820 orr w0, w1, w0, lsl #2
5d644: b9001280 str w0, [x20, #16]
5d648: 52800000 mov w0, #0x0 // #0
5d64c: 14000005 b 5d660 <psci_validate_entry_point+0xac>
5d650: aa1303e0 mov x0, x19
5d654: d63f0020 blr x1
5d658: 34fffc80 cbz w0, 5d5e8 <psci_validate_entry_point+0x34>
5d65c: 12800100 mov w0, #0xfffffff7 // #-9
5d660: a94153f3 ldp x19, x20, [sp, #16]
5d664: a9425bf5 ldp x21, x22, [sp, #32]
5d668: a94363f7 ldp x23, x24, [sp, #48]
5d66c: f94023f9 ldr x25, [sp, #64]
5d670: a8c57bfd ldp x29, x30, [sp], #80
5d674: d65f03c0 ret
5d678: d53c1000 mrs x0, sctlr_el2
5d67c: 17ffffdf b 5d5f8 <psci_validate_entry_point+0x44>
5d680: 52800140 mov w0, #0xa // #10
5d684: f100033f cmp x25, #0x0
5d688: 1a8002d6 csel w22, w22, w0, eq // eq = none
5d68c: 531b0273 ubfiz w19, w19, #5, #1
5d690: 52803a00 mov w0, #0x1d0 // #464
5d694: 2a160273 orr w19, w19, w22
5d698: 2a152400 orr w0, w0, w21, lsl #9
5d69c: 2a000273 orr w19, w19, w0
5d6a0: b9001293 str w19, [x20, #16]
5d6a4: 17ffffe9 b 5d648 <psci_validate_entry_point+0x94>
000000000005d6a8 <psci_warmboot_entrypoint>:
5d6a8: a9bd7bfd stp x29, x30, [sp, #-48]!
5d6ac: 910003fd mov x29, sp
5d6b0: a90153f3 stp x19, x20, [sp, #16]
5d6b4: 94000a06 bl 5fecc <plat_my_core_pos>
5d6b8: 2a0003f4 mov w20, w0
5d6bc: 790043ff strh wzr, [sp, #32]
5d6c0: 39008bff strb wzr, [sp, #34]
5d6c4: f90017ff str xzr, [sp, #40]
5d6c8: d53ed040 mrs x0, tpidr_el3
5d6cc: b9401800 ldr w0, [x0, #24]
5d6d0: 7100041f cmp w0, #0x1
5d6d4: 54000121 b.ne 5d6f8 <psci_warmboot_entrypoint+0x50> // b.any
5d6d8: d0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5d6dc: 91345400 add x0, x0, #0xd15
5d6e0: 94000469 bl 5e884 <tf_log>
5d6e4: d0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5d6e8: 9139c800 add x0, x0, #0xe72
5d6ec: 9400055a bl 5ec54 <backtrace>
5d6f0: 940004f7 bl 5eacc <console_flush>
5d6f4: 94000c7e bl 608ec <do_panic>
5d6f8: d53ed040 mrs x0, tpidr_el3
5d6fc: b9401c13 ldr w19, [x0, #28]
5d700: 71000e7f cmp w19, #0x3
5d704: 54000120 b.eq 5d728 <psci_warmboot_entrypoint+0x80> // b.none
5d708: 71000a7f cmp w19, #0x2
5d70c: 54000109 b.ls 5d72c <psci_warmboot_entrypoint+0x84> // b.plast
5d710: d0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5d714: d0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5d718: 9134dc42 add x2, x2, #0xd37
5d71c: 91314000 add x0, x0, #0xc50
5d720: 528018a1 mov w1, #0xc5 // #197
5d724: 940010c2 bl 61a2c <__assert>
5d728: 52800053 mov w19, #0x2 // #2
5d72c: 9100a3e2 add x2, sp, #0x28
5d730: 2a1303e1 mov w1, w19
5d734: 2a1403e0 mov w0, w20
5d738: 97fffe82 bl 5d140 <psci_get_parent_pwr_domain_nodes>
5d73c: 9100a3e1 add x1, sp, #0x28
5d740: 2a1303e0 mov w0, w19
5d744: 97ffff5f bl 5d4c0 <psci_acquire_pwr_domain_locks>
5d748: 910083e1 add x1, sp, #0x20
5d74c: 2a1303e0 mov w0, w19
5d750: 97fffe58 bl 5d0b0 <psci_get_target_local_pwr_states>
5d754: d53ed040 mrs x0, tpidr_el3
5d758: b9401800 ldr w0, [x0, #24]
5d75c: 910083e1 add x1, sp, #0x20
5d760: 7100081f cmp w0, #0x2
5d764: 2a1403e0 mov w0, w20
5d768: 54000141 b.ne 5d790 <psci_warmboot_entrypoint+0xe8> // b.any
5d76c: 97fffcec bl 5cb1c <psci_cpu_on_finish>
5d770: 2a1303e0 mov w0, w19
5d774: 97fffe85 bl 5d188 <psci_set_pwr_domains_to_run>
5d778: 9100a3e1 add x1, sp, #0x28
5d77c: 2a1303e0 mov w0, w19
5d780: 97ffff6c bl 5d530 <psci_release_pwr_domain_locks>
5d784: a94153f3 ldp x19, x20, [sp, #16]
5d788: a8c37bfd ldp x29, x30, [sp], #48
5d78c: d65f03c0 ret
5d790: 97fffd9a bl 5cdf8 <psci_cpu_suspend_finish>
5d794: 17fffff7 b 5d770 <psci_warmboot_entrypoint+0xc8>
000000000005d798 <psci_spd_migrate_info>:
5d798: 90000081 adrp x1, 6d000 <dist_ctx+0x1e50>
5d79c: f944fc21 ldr x1, [x1, #2552]
5d7a0: b40001e1 cbz x1, 5d7dc <psci_spd_migrate_info+0x44>
5d7a4: f9401821 ldr x1, [x1, #48]
5d7a8: b40001a1 cbz x1, 5d7dc <psci_spd_migrate_info+0x44>
5d7ac: a9bf7bfd stp x29, x30, [sp, #-16]!
5d7b0: 910003fd mov x29, sp
5d7b4: d63f0020 blr x1
5d7b8: 11000401 add w1, w0, #0x1
5d7bc: 71000c3f cmp w1, #0x3
5d7c0: 54000129 b.ls 5d7e4 <psci_spd_migrate_info+0x4c> // b.plast
5d7c4: d0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5d7c8: d0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5d7cc: 91355442 add x2, x2, #0xd55
5d7d0: 91314000 add x0, x0, #0xc50
5d7d4: 52806dc1 mov w1, #0x36e // #878
5d7d8: 94001095 bl 61a2c <__assert>
5d7dc: 12800000 mov w0, #0xffffffff // #-1
5d7e0: d65f03c0 ret
5d7e4: a8c17bfd ldp x29, x30, [sp], #16
5d7e8: d65f03c0 ret
000000000005d7ec <psci_print_power_domain_map>:
5d7ec: a9bb7bfd stp x29, x30, [sp, #-80]!
5d7f0: d0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5d7f4: 91375c00 add x0, x0, #0xdd7
5d7f8: 910003fd mov x29, sp
5d7fc: a90153f3 stp x19, x20, [sp, #16]
5d800: b00001d3 adrp x19, 96000 <rockchip_pd_lock>
5d804: b0000094 adrp x20, 6e000 <iomux_status+0x2c>
5d808: 9101b273 add x19, x19, #0x6c
5d80c: 9131f294 add x20, x20, #0xc7c
5d810: a9025bf5 stp x21, x22, [sp, #32]
5d814: b0000036 adrp x22, 62000 <vprintf+0x400>
5d818: 910ae2d6 add x22, x22, #0x2b8
5d81c: 52800015 mov w21, #0x0 // #0
5d820: a90363f7 stp x23, x24, [sp, #48]
5d824: 52800197 mov w23, #0xc // #12
5d828: a9046bf9 stp x25, x26, [sp, #64]
5d82c: 94000416 bl 5e884 <tf_log>
5d830: b9400280 ldr w0, [x20]
5d834: 4b0002e0 sub w0, w23, w0
5d838: 6b15001f cmp w0, w21
5d83c: 54000228 b.hi 5d880 <psci_print_power_domain_map+0x94> // b.pmore
5d840: 90000093 adrp x19, 6d000 <dist_ctx+0x1e50>
5d844: b0000036 adrp x22, 62000 <vprintf+0x400>
5d848: d0000037 adrp x23, 63000 <CSWTCH.22+0x37e>
5d84c: 91264273 add x19, x19, #0x990
5d850: 910ae2d6 add x22, x22, #0x2b8
5d854: 9138b2f7 add x23, x23, #0xe2c
5d858: 52800015 mov w21, #0x0 // #0
5d85c: b9400280 ldr w0, [x20]
5d860: 6b15001f cmp w0, w21
5d864: 540002e8 b.hi 5d8c0 <psci_print_power_domain_map+0xd4> // b.pmore
5d868: a94153f3 ldp x19, x20, [sp, #16]
5d86c: a9425bf5 ldp x21, x22, [sp, #32]
5d870: a94363f7 ldp x23, x24, [sp, #48]
5d874: a9446bf9 ldp x25, x26, [sp, #64]
5d878: a8c57bfd ldp x29, x30, [sp], #80
5d87c: d65f03c0 ret
5d880: 39403264 ldrb w4, [x19, #12]
5d884: 340001a4 cbz w4, 5d8b8 <psci_print_power_domain_map+0xcc>
5d888: 7100049f cmp w4, #0x1
5d88c: 1a9f97e0 cset w0, hi // hi = pmore
5d890: 11000400 add w0, w0, #0x1
5d894: 39403661 ldrb w1, [x19, #13]
5d898: 110006b5 add w21, w21, #0x1
5d89c: b9400a62 ldr w2, [x19, #8]
5d8a0: 91004273 add x19, x19, #0x10
5d8a4: f8607ac3 ldr x3, [x22, x0, lsl #3]
5d8a8: d0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5d8ac: 9137c000 add x0, x0, #0xdf0
5d8b0: 940003f5 bl 5e884 <tf_log>
5d8b4: 17ffffdf b 5d830 <psci_print_power_domain_map+0x44>
5d8b8: d2800000 mov x0, #0x0 // #0
5d8bc: 17fffff6 b 5d894 <psci_print_power_domain_map+0xa8>
5d8c0: 2a1503e0 mov w0, w21
5d8c4: 94000ad1 bl 60408 <_cpu_data_by_index>
5d8c8: 39408000 ldrb w0, [x0, #32]
5d8cc: 34000240 cbz w0, 5d914 <psci_print_power_domain_map+0x128>
5d8d0: 7100041f cmp w0, #0x1
5d8d4: 1a9f97e0 cset w0, hi // hi = pmore
5d8d8: 11000400 add w0, w0, #0x1
5d8dc: b9400a79 ldr w25, [x19, #8]
5d8e0: 91004273 add x19, x19, #0x10
5d8e4: f85f0278 ldur x24, [x19, #-16]
5d8e8: f8607ada ldr x26, [x22, x0, lsl #3]
5d8ec: 2a1503e0 mov w0, w21
5d8f0: 94000ac6 bl 60408 <_cpu_data_by_index>
5d8f4: 39408004 ldrb w4, [x0, #32]
5d8f8: aa1a03e3 mov x3, x26
5d8fc: 2a1903e2 mov w2, w25
5d900: aa1803e1 mov x1, x24
5d904: aa1703e0 mov x0, x23
5d908: 110006b5 add w21, w21, #0x1
5d90c: 940003de bl 5e884 <tf_log>
5d910: 17ffffd3 b 5d85c <psci_print_power_domain_map+0x70>
5d914: d2800000 mov x0, #0x0 // #0
5d918: 17fffff1 b 5d8dc <psci_print_power_domain_map+0xf0>
000000000005d91c <psci_do_pwrdown_sequence>:
5d91c: 14000b33 b 605e8 <psci_do_pwrdown_cache_maintenance>
000000000005d920 <psci_cpu_on>:
5d920: a9b77bfd stp x29, x30, [sp, #-144]!
5d924: 910003fd mov x29, sp
5d928: a90153f3 stp x19, x20, [sp, #16]
5d92c: aa0003f3 mov x19, x0
5d930: aa0103f4 mov x20, x1
5d934: f90013f5 str x21, [sp, #32]
5d938: aa0203f5 mov x21, x2
5d93c: 97ffff16 bl 5d594 <psci_validate_mpidr>
5d940: 350001a0 cbnz w0, 5d974 <psci_cpu_on+0x54>
5d944: aa1503e2 mov x2, x21
5d948: aa1403e1 mov x1, x20
5d94c: 9100e3e0 add x0, sp, #0x38
5d950: 97ffff19 bl 5d5b4 <psci_validate_entry_point>
5d954: 35000080 cbnz w0, 5d964 <psci_cpu_on+0x44>
5d958: 9100e3e1 add x1, sp, #0x38
5d95c: aa1303e0 mov x0, x19
5d960: 97fffbe6 bl 5c8f8 <psci_cpu_on_start>
5d964: a94153f3 ldp x19, x20, [sp, #16]
5d968: f94013f5 ldr x21, [sp, #32]
5d96c: a8c97bfd ldp x29, x30, [sp], #144
5d970: d65f03c0 ret
5d974: 12800020 mov w0, #0xfffffffe // #-2
5d978: 17fffffb b 5d964 <psci_cpu_on+0x44>
000000000005d97c <psci_cpu_suspend>:
5d97c: a9b67bfd stp x29, x30, [sp, #-160]!
5d980: 910003fd mov x29, sp
5d984: a90153f3 stp x19, x20, [sp, #16]
5d988: 2a0003f3 mov w19, w0
5d98c: a9025bf5 stp x21, x22, [sp, #32]
5d990: aa0103f6 mov x22, x1
5d994: 910103e1 add x1, sp, #0x40
5d998: f9001bf7 str x23, [sp, #48]
5d99c: aa0203f7 mov x23, x2
5d9a0: 790083ff strh wzr, [sp, #64]
5d9a4: 39010bff strb wzr, [sp, #66]
5d9a8: 97fffd66 bl 5cf40 <psci_validate_power_state>
5d9ac: 34000200 cbz w0, 5d9ec <psci_cpu_suspend+0x70>
5d9b0: 3100081f cmn w0, #0x2
5d9b4: 54000101 b.ne 5d9d4 <psci_cpu_suspend+0x58> // b.any
5d9b8: 12800034 mov w20, #0xfffffffe // #-2
5d9bc: 2a1403e0 mov w0, w20
5d9c0: a94153f3 ldp x19, x20, [sp, #16]
5d9c4: a9425bf5 ldp x21, x22, [sp, #32]
5d9c8: f9401bf7 ldr x23, [sp, #48]
5d9cc: a8ca7bfd ldp x29, x30, [sp], #160
5d9d0: d65f03c0 ret
5d9d4: d0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5d9d8: 913a2c42 add x2, x2, #0xe8b
5d9dc: 52800861 mov w1, #0x43 // #67
5d9e0: d0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5d9e4: 913a9c00 add x0, x0, #0xea7
5d9e8: 94001011 bl 61a2c <__assert>
5d9ec: d3504273 ubfx x19, x19, #16, #1
5d9f0: 910103e0 add x0, sp, #0x40
5d9f4: 2a1303e1 mov w1, w19
5d9f8: 97fffe8a bl 5d420 <psci_validate_suspend_req>
5d9fc: 2a0003f4 mov w20, w0
5da00: 340000a0 cbz w0, 5da14 <psci_cpu_suspend+0x98>
5da04: d0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5da08: 528009a1 mov w1, #0x4d // #77
5da0c: 913af042 add x2, x2, #0xebc
5da10: 17fffff4 b 5d9e0 <psci_cpu_suspend+0x64>
5da14: 910103e0 add x0, sp, #0x40
5da18: 97fffe75 bl 5d3ec <psci_find_target_suspend_lvl>
5da1c: 2a0003f5 mov w21, w0
5da20: 71000c1f cmp w0, #0x3
5da24: 54000121 b.ne 5da48 <psci_cpu_suspend+0xcc> // b.any
5da28: d0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5da2c: 913c2800 add x0, x0, #0xf0a
5da30: 94000395 bl 5e884 <tf_log>
5da34: f0000020 adrp x0, 64000 <__func__.3216+0x18e>
5da38: 91036000 add x0, x0, #0xd8
5da3c: 94000486 bl 5ec54 <backtrace>
5da40: 94000423 bl 5eacc <console_flush>
5da44: 94000baa bl 608ec <do_panic>
5da48: 2a000260 orr w0, w19, w0
5da4c: 35000180 cbnz w0, 5da7c <psci_cpu_suspend+0x100>
5da50: 90000080 adrp x0, 6d000 <dist_ctx+0x1e50>
5da54: f944f800 ldr x0, [x0, #2544]
5da58: f9400001 ldr x1, [x0]
5da5c: b4fffae1 cbz x1, 5d9b8 <psci_cpu_suspend+0x3c>
5da60: 394103e0 ldrb w0, [sp, #64]
5da64: d53ed042 mrs x2, tpidr_el3
5da68: 39008040 strb w0, [x2, #32]
5da6c: d63f0020 blr x1
5da70: d53ed040 mrs x0, tpidr_el3
5da74: 3900801f strb wzr, [x0, #32]
5da78: 17ffffd1 b 5d9bc <psci_cpu_suspend+0x40>
5da7c: 350000f3 cbnz w19, 5da98 <psci_cpu_suspend+0x11c>
5da80: 2a1303e3 mov w3, w19
5da84: 910103e2 add x2, sp, #0x40
5da88: 2a1503e1 mov w1, w21
5da8c: 910123e0 add x0, sp, #0x48
5da90: 97fffc63 bl 5cc1c <psci_cpu_suspend_start>
5da94: 17ffffca b 5d9bc <psci_cpu_suspend+0x40>
5da98: aa1703e2 mov x2, x23
5da9c: aa1603e1 mov x1, x22
5daa0: 910123e0 add x0, sp, #0x48
5daa4: 97fffec4 bl 5d5b4 <psci_validate_entry_point>
5daa8: 34fffec0 cbz w0, 5da80 <psci_cpu_suspend+0x104>
5daac: 2a0003f4 mov w20, w0
5dab0: 17ffffc3 b 5d9bc <psci_cpu_suspend+0x40>
000000000005dab4 <psci_system_suspend>:
5dab4: a9b87bfd stp x29, x30, [sp, #-128]!
5dab8: 910003fd mov x29, sp
5dabc: a90153f3 stp x19, x20, [sp, #16]
5dac0: aa0003f3 mov x19, x0
5dac4: aa0103f4 mov x20, x1
5dac8: 97fffd3f bl 5cfc4 <psci_is_last_on_cpu>
5dacc: 350000c0 cbnz w0, 5dae4 <psci_system_suspend+0x30>
5dad0: 12800053 mov w19, #0xfffffffd // #-3
5dad4: 2a1303e0 mov w0, w19
5dad8: a94153f3 ldp x19, x20, [sp, #16]
5dadc: a8c87bfd ldp x29, x30, [sp], #128
5dae0: d65f03c0 ret
5dae4: aa1303e1 mov x1, x19
5dae8: aa1403e2 mov x2, x20
5daec: 9100a3e0 add x0, sp, #0x28
5daf0: 97fffeb1 bl 5d5b4 <psci_validate_entry_point>
5daf4: 2a0003f3 mov w19, w0
5daf8: 35fffee0 cbnz w0, 5dad4 <psci_system_suspend+0x20>
5dafc: 910083e0 add x0, sp, #0x20
5db00: 97fffd23 bl 5cf8c <psci_query_sys_suspend_pwrstate>
5db04: 910083e0 add x0, sp, #0x20
5db08: 97fffe39 bl 5d3ec <psci_find_target_suspend_lvl>
5db0c: 7100041f cmp w0, #0x1
5db10: 54fffe09 b.ls 5dad0 <psci_system_suspend+0x1c> // b.plast
5db14: 910083e0 add x0, sp, #0x20
5db18: 52800021 mov w1, #0x1 // #1
5db1c: 97fffe41 bl 5d420 <psci_validate_suspend_req>
5db20: 2a0003f3 mov w19, w0
5db24: 340000e0 cbz w0, 5db40 <psci_system_suspend+0x8c>
5db28: d0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5db2c: 913cf442 add x2, x2, #0xf3d
5db30: 52801681 mov w1, #0xb4 // #180
5db34: d0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5db38: 913a9c00 add x0, x0, #0xea7
5db3c: 94000fbc bl 61a2c <__assert>
5db40: 39408be1 ldrb w1, [sp, #34]
5db44: 7100083f cmp w1, #0x2
5db48: 540000a0 b.eq 5db5c <psci_system_suspend+0xa8> // b.none
5db4c: d0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5db50: 528016c1 mov w1, #0xb6 // #182
5db54: 913e3442 add x2, x2, #0xf8d
5db58: 17fffff7 b 5db34 <psci_system_suspend+0x80>
5db5c: 910083e2 add x2, sp, #0x20
5db60: 9100a3e0 add x0, sp, #0x28
5db64: 52800023 mov w3, #0x1 // #1
5db68: 97fffc2d bl 5cc1c <psci_cpu_suspend_start>
5db6c: 17ffffda b 5dad4 <psci_system_suspend+0x20>
000000000005db70 <psci_cpu_off>:
5db70: a9bf7bfd stp x29, x30, [sp, #-16]!
5db74: 52800040 mov w0, #0x2 // #2
5db78: 910003fd mov x29, sp
5db7c: 97fffb14 bl 5c7cc <psci_do_cpu_off>
5db80: 31000c1f cmn w0, #0x3
5db84: 540000e0 b.eq 5dba0 <psci_cpu_off+0x30> // b.none
5db88: d0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5db8c: d0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5db90: 913f5442 add x2, x2, #0xfd5
5db94: 913a9c00 add x0, x0, #0xea7
5db98: 52801ac1 mov w1, #0xd6 // #214
5db9c: 94000fa4 bl 61a2c <__assert>
5dba0: a8c17bfd ldp x29, x30, [sp], #16
5dba4: d65f03c0 ret
000000000005dba8 <psci_affinity_info>:
5dba8: 340000e1 cbz w1, 5dbc4 <psci_affinity_info+0x1c>
5dbac: 12800020 mov w0, #0xfffffffe // #-2
5dbb0: d65f03c0 ret
5dbb4: 12800020 mov w0, #0xfffffffe // #-2
5dbb8: f9400bf3 ldr x19, [sp, #16]
5dbbc: a8c27bfd ldp x29, x30, [sp], #32
5dbc0: d65f03c0 ret
5dbc4: a9be7bfd stp x29, x30, [sp, #-32]!
5dbc8: 910003fd mov x29, sp
5dbcc: f9000bf3 str x19, [sp, #16]
5dbd0: 97ffd203 bl 523dc <plat_core_pos_by_mpidr>
5dbd4: 2a0003f3 mov w19, w0
5dbd8: 3100041f cmn w0, #0x1
5dbdc: 54fffec0 b.eq 5dbb4 <psci_affinity_info+0xc> // b.none
5dbe0: 94000a0a bl 60408 <_cpu_data_by_index>
5dbe4: 91006000 add x0, x0, #0x18
5dbe8: d2800081 mov x1, #0x4 // #4
5dbec: 94000b51 bl 60930 <flush_dcache_range>
5dbf0: 2a1303e0 mov w0, w19
5dbf4: 94000a05 bl 60408 <_cpu_data_by_index>
5dbf8: b9401800 ldr w0, [x0, #24]
5dbfc: 17ffffef b 5dbb8 <psci_affinity_info+0x10>
000000000005dc00 <psci_migrate>:
5dc00: a9bd7bfd stp x29, x30, [sp, #-48]!
5dc04: 910003fd mov x29, sp
5dc08: f9000bf3 str x19, [sp, #16]
5dc0c: aa0003f3 mov x19, x0
5dc10: 9100a3e0 add x0, sp, #0x28
5dc14: 97fffee1 bl 5d798 <psci_spd_migrate_info>
5dc18: 340000e0 cbz w0, 5dc34 <psci_migrate+0x34>
5dc1c: 7100041f cmp w0, #0x1
5dc20: 12800040 mov w0, #0xfffffffd // #-3
5dc24: 5a9f0000 csinv w0, w0, wzr, eq // eq = none
5dc28: f9400bf3 ldr x19, [sp, #16]
5dc2c: a8c37bfd ldp x29, x30, [sp], #48
5dc30: d65f03c0 ret
5dc34: d53800a0 mrs x0, mpidr_el1
5dc38: f94017e1 ldr x1, [sp, #40]
5dc3c: eb00003f cmp x1, x0
5dc40: 54000321 b.ne 5dca4 <psci_migrate+0xa4> // b.any
5dc44: aa1303e0 mov x0, x19
5dc48: 97fffe53 bl 5d594 <psci_validate_mpidr>
5dc4c: 35000300 cbnz w0, 5dcac <psci_migrate+0xac>
5dc50: 90000080 adrp x0, 6d000 <dist_ctx+0x1e50>
5dc54: f944fc00 ldr x0, [x0, #2552]
5dc58: b4000060 cbz x0, 5dc64 <psci_migrate+0x64>
5dc5c: f9401402 ldr x2, [x0, #40]
5dc60: b50000e2 cbnz x2, 5dc7c <psci_migrate+0x7c>
5dc64: d0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5dc68: 913fa442 add x2, x2, #0xfe9
5dc6c: 528022e1 mov w1, #0x117 // #279
5dc70: d0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5dc74: 913a9c00 add x0, x0, #0xea7
5dc78: 94000f6d bl 61a2c <__assert>
5dc7c: d53800a0 mrs x0, mpidr_el1
5dc80: aa1303e1 mov x1, x19
5dc84: d63f0040 blr x2
5dc88: 7100001f cmp w0, #0x0
5dc8c: 3a461804 ccmn w0, #0x6, #0x4, ne // ne = any
5dc90: 54fffcc0 b.eq 5dc28 <psci_migrate+0x28> // b.none
5dc94: d0000022 adrp x2, 63000 <CSWTCH.22+0x37e>
5dc98: 52802341 mov w1, #0x11a // #282
5dc9c: 912ac442 add x2, x2, #0xab1
5dca0: 17fffff4 b 5dc70 <psci_migrate+0x70>
5dca4: 128000c0 mov w0, #0xfffffff9 // #-7
5dca8: 17ffffe0 b 5dc28 <psci_migrate+0x28>
5dcac: 12800020 mov w0, #0xfffffffe // #-2
5dcb0: 17ffffde b 5dc28 <psci_migrate+0x28>
000000000005dcb4 <psci_migrate_info_type>:
5dcb4: a9be7bfd stp x29, x30, [sp, #-32]!
5dcb8: 910003fd mov x29, sp
5dcbc: 910063e0 add x0, sp, #0x18
5dcc0: 97fffeb6 bl 5d798 <psci_spd_migrate_info>
5dcc4: a8c27bfd ldp x29, x30, [sp], #32
5dcc8: d65f03c0 ret
000000000005dccc <psci_migrate_info_up_cpu>:
5dccc: a9be7bfd stp x29, x30, [sp, #-32]!
5dcd0: 910003fd mov x29, sp
5dcd4: 910063e0 add x0, sp, #0x18
5dcd8: 97fffeb0 bl 5d798 <psci_spd_migrate_info>
5dcdc: f9400fe1 ldr x1, [sp, #24]
5dce0: 7100041f cmp w0, #0x1
5dce4: a8c27bfd ldp x29, x30, [sp], #32
5dce8: 92800020 mov x0, #0xfffffffffffffffe // #-2
5dcec: 9a809020 csel x0, x1, x0, ls // ls = plast
5dcf0: d65f03c0 ret
000000000005dcf4 <psci_node_hw_state>:
5dcf4: a9be7bfd stp x29, x30, [sp, #-32]!
5dcf8: 910003fd mov x29, sp
5dcfc: a90153f3 stp x19, x20, [sp, #16]
5dd00: aa0003f4 mov x20, x0
5dd04: 2a0103f3 mov w19, w1
5dd08: 97fffe23 bl 5d594 <psci_validate_mpidr>
5dd0c: 35000320 cbnz w0, 5dd70 <psci_node_hw_state+0x7c>
5dd10: 71000a7f cmp w19, #0x2
5dd14: 540002e8 b.hi 5dd70 <psci_node_hw_state+0x7c> // b.pmore
5dd18: 90000080 adrp x0, 6d000 <dist_ctx+0x1e50>
5dd1c: f944f800 ldr x0, [x0, #2544]
5dd20: f9404002 ldr x2, [x0, #128]
5dd24: b50000e2 cbnz x2, 5dd40 <psci_node_hw_state+0x4c>
5dd28: f0000022 adrp x2, 64000 <__func__.3216+0x18e>
5dd2c: 91009442 add x2, x2, #0x25
5dd30: 52802901 mov w1, #0x148 // #328
5dd34: d0000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5dd38: 913a9c00 add x0, x0, #0xea7
5dd3c: 94000f3c bl 61a2c <__assert>
5dd40: 2a1303e1 mov w1, w19
5dd44: aa1403e0 mov x0, x20
5dd48: d63f0040 blr x2
5dd4c: 11000401 add w1, w0, #0x1
5dd50: 71000c3f cmp w1, #0x3
5dd54: 54000109 b.ls 5dd74 <psci_node_hw_state+0x80> // b.plast
5dd58: 3100081f cmn w0, #0x2
5dd5c: 540000a0 b.eq 5dd70 <psci_node_hw_state+0x7c> // b.none
5dd60: f0000022 adrp x2, 64000 <__func__.3216+0x18e>
5dd64: 52802941 mov w1, #0x14a // #330
5dd68: 91014442 add x2, x2, #0x51
5dd6c: 17fffff2 b 5dd34 <psci_node_hw_state+0x40>
5dd70: 12800020 mov w0, #0xfffffffe // #-2
5dd74: a94153f3 ldp x19, x20, [sp, #16]
5dd78: a8c27bfd ldp x29, x30, [sp], #32
5dd7c: d65f03c0 ret
000000000005dd80 <psci_features>:
5dd80: b0000081 adrp x1, 6e000 <iomux_status+0x2c>
5dd84: 52b00002 mov w2, #0x80000000 // #-2147483648
5dd88: 6b02001f cmp w0, w2
5dd8c: b94c8021 ldr w1, [x1, #3200]
5dd90: 54000240 b.eq 5ddd8 <psci_features+0x58> // b.none
5dd94: 36f00080 tbz w0, #30, 5dda4 <psci_features+0x24>
5dd98: 528c1742 mov w2, #0x60ba // #24762
5dd9c: 72a002e2 movk w2, #0x17, lsl #16
5dda0: 0a020021 and w1, w1, w2
5dda4: d3587402 ubfx x2, x0, #24, #6
5dda8: 7100105f cmp w2, #0x4
5ddac: 540001a1 b.ne 5dde0 <psci_features+0x60> // b.any
5ddb0: d3505c04 ubfx x4, x0, #16, #8
5ddb4: 531f7c02 lsr w2, w0, #31
5ddb8: 36f80140 tbz w0, #31, 5dde0 <psci_features+0x60>
5ddbc: 121b2803 and w3, w0, #0xffe0
5ddc0: 2a040063 orr w3, w3, w4
5ddc4: 350000e3 cbnz w3, 5dde0 <psci_features+0x60>
5ddc8: 1ac02040 lsl w0, w2, w0
5ddcc: 6a01001f tst w0, w1
5ddd0: 5a9f13e0 csetm w0, eq // eq = none
5ddd4: d65f03c0 ret
5ddd8: 52800000 mov w0, #0x0 // #0
5dddc: 17fffffe b 5ddd4 <psci_features+0x54>
5dde0: 12800000 mov w0, #0xffffffff // #-1
5dde4: 17fffffc b 5ddd4 <psci_features+0x54>
000000000005dde8 <psci_smc_handler>:
5dde8: 36000a67 tbz w7, #0, 5df34 <psci_smc_handler+0x14c>
5ddec: b0000085 adrp x5, 6e000 <iomux_status+0x2c>
5ddf0: 2a0003e4 mov w4, w0
5ddf4: aa0103e0 mov x0, x1
5ddf8: aa0203e1 mov x1, x2
5ddfc: b94c80a5 ldr w5, [x5, #3200]
5de00: aa0303e2 mov x2, x3
5de04: 52800023 mov w3, #0x1 // #1
5de08: 1ac42063 lsl w3, w3, w4
5de0c: 6a05007f tst w3, w5
5de10: 54000920 b.eq 5df34 <psci_smc_handler+0x14c> // b.none
5de14: a9bf7bfd stp x29, x30, [sp, #-16]!
5de18: 910003fd mov x29, sp
5de1c: 37f00784 tbnz w4, #30, 5df0c <psci_smc_handler+0x124>
5de20: 52af8003 mov w3, #0x7c000000 // #2080374784
5de24: 0b030083 add w3, w4, w3
5de28: 7100507f cmp w3, #0x14
5de2c: 54000628 b.hi 5def0 <psci_smc_handler+0x108> // b.pmore
5de30: b0000025 adrp x5, 62000 <vprintf+0x400>
5de34: 9116d0a5 add x5, x5, #0x5b4
5de38: 386348a3 ldrb w3, [x5, w3, uxtw]
5de3c: 10000065 adr x5, 5de48 <psci_smc_handler+0x60>
5de40: 8b2388a3 add x3, x5, w3, sxtb #2
5de44: d61f0060 br x3
5de48: 97ffff4a bl 5db70 <psci_cpu_off>
5de4c: 93407c00 sxtw x0, w0
5de50: 1400002d b 5df04 <psci_smc_handler+0x11c>
5de54: 2a0203e2 mov w2, w2
5de58: 2a0103e1 mov w1, w1
5de5c: 97fffec8 bl 5d97c <psci_cpu_suspend>
5de60: 17fffffb b 5de4c <psci_smc_handler+0x64>
5de64: 2a0203e2 mov w2, w2
5de68: 2a0103e1 mov w1, w1
5de6c: 2a0003e0 mov w0, w0
5de70: 97fffeac bl 5d920 <psci_cpu_on>
5de74: 17fffff6 b 5de4c <psci_smc_handler+0x64>
5de78: 2a0003e0 mov w0, w0
5de7c: 97ffff4b bl 5dba8 <psci_affinity_info>
5de80: 17fffff3 b 5de4c <psci_smc_handler+0x64>
5de84: 2a0003e0 mov w0, w0
5de88: 97ffff5e bl 5dc00 <psci_migrate>
5de8c: 17fffff0 b 5de4c <psci_smc_handler+0x64>
5de90: 97ffff89 bl 5dcb4 <psci_migrate_info_type>
5de94: 17ffffee b 5de4c <psci_smc_handler+0x64>
5de98: a8c17bfd ldp x29, x30, [sp], #16
5de9c: 17ffff8c b 5dccc <psci_migrate_info_up_cpu>
5dea0: 2a0003e0 mov w0, w0
5dea4: 97ffff94 bl 5dcf4 <psci_node_hw_state>
5dea8: 17ffffe9 b 5de4c <psci_smc_handler+0x64>
5deac: 2a0103e1 mov w1, w1
5deb0: 2a0003e0 mov w0, w0
5deb4: 97ffff00 bl 5dab4 <psci_system_suspend>
5deb8: 17ffffe5 b 5de4c <psci_smc_handler+0x64>
5debc: 94000122 bl 5e344 <psci_system_off>
5dec0: 9400013a bl 5e3a8 <psci_system_reset>
5dec4: 97ffffaf bl 5dd80 <psci_features>
5dec8: 17ffffe1 b 5de4c <psci_smc_handler+0x64>
5decc: a8c17bfd ldp x29, x30, [sp], #16
5ded0: 14000180 b 5e4d0 <psci_mem_protect>
5ded4: 2a0103e1 mov w1, w1
5ded8: 2a0003e0 mov w0, w0
5dedc: a8c17bfd ldp x29, x30, [sp], #16
5dee0: 140001a0 b 5e560 <psci_mem_chk_range>
5dee4: 2a0103e1 mov w1, w1
5dee8: a8c17bfd ldp x29, x30, [sp], #16
5deec: 14000148 b 5e40c <psci_system_reset2>
5def0: 2a0403e1 mov w1, w4
5def4: f0000020 adrp x0, 64000 <__func__.3216+0x18e>
5def8: 9102e000 add x0, x0, #0xb8
5defc: 94000262 bl 5e884 <tf_log>
5df00: 92800000 mov x0, #0xffffffffffffffff // #-1
5df04: a8c17bfd ldp x29, x30, [sp], #16
5df08: d65f03c0 ret
5df0c: 12b88003 mov w3, #0x3bffffff // #1006632959
5df10: 0b030083 add w3, w4, w3
5df14: 71004c7f cmp w3, #0x13
5df18: 54fffec8 b.hi 5def0 <psci_smc_handler+0x108> // b.pmore
5df1c: b0000025 adrp x5, 62000 <vprintf+0x400>
5df20: 911730a5 add x5, x5, #0x5cc
5df24: 386348a3 ldrb w3, [x5, w3, uxtw]
5df28: 10000065 adr x5, 5df34 <psci_smc_handler+0x14c>
5df2c: 8b2388a3 add x3, x5, w3, sxtb #2
5df30: d61f0060 br x3
5df34: 92800000 mov x0, #0xffffffffffffffff // #-1
5df38: d65f03c0 ret
5df3c: 320083e0 mov w0, #0x10001 // #65537
5df40: 17fffff1 b 5df04 <psci_smc_handler+0x11c>
000000000005df44 <psci_arch_setup>:
5df44: a9bf7bfd stp x29, x30, [sp, #-16]!
5df48: 910003fd mov x29, sp
5df4c: 97ffd14a bl 52474 <plat_get_syscnt_freq2>
5df50: 2a0003e0 mov w0, w0
5df54: d51be000 msr cntfrq_el0, x0
5df58: 9400094d bl 6048c <init_cpu_ops>
5df5c: a8c17bfd ldp x29, x30, [sp], #16
5df60: 1400097d b 60554 <print_errata_status>
000000000005df64 <psci_setup>:
5df64: a9b77bfd stp x29, x30, [sp, #-144]!
5df68: 910003fd mov x29, sp
5df6c: a90153f3 stp x19, x20, [sp, #16]
5df70: a9025bf5 stp x21, x22, [sp, #32]
5df74: a90363f7 stp x23, x24, [sp, #48]
5df78: a9046bf9 stp x25, x26, [sp, #64]
5df7c: a90573fb stp x27, x28, [sp, #80]
5df80: b4000160 cbz x0, 5dfac <psci_setup+0x48>
5df84: aa0003f4 mov x20, x0
5df88: 79400000 ldrh w0, [x0]
5df8c: 7104181f cmp w0, #0x106
5df90: 540000e1 b.ne 5dfac <psci_setup+0x48> // b.any
5df94: f9400280 ldr x0, [x20]
5df98: 9270bc00 and x0, x0, #0xffffffffffff0000
5df9c: f144001f cmp x0, #0x100, lsl #12
5dfa0: 54000061 b.ne 5dfac <psci_setup+0x48> // b.any
5dfa4: f9400680 ldr x0, [x20, #8]
5dfa8: b50000e0 cbnz x0, 5dfc4 <psci_setup+0x60>
5dfac: f0000022 adrp x2, 64000 <__func__.3216+0x18e>
5dfb0: 9103a442 add x2, x2, #0xe9
5dfb4: 52801881 mov w1, #0xc4 // #196
5dfb8: f0000020 adrp x0, 64000 <__func__.3216+0x18e>
5dfbc: 91042c00 add x0, x0, #0x10b
5dfc0: 94000e9b bl 61a2c <__assert>
5dfc4: 97ffffe0 bl 5df44 <psci_arch_setup>
5dfc8: 9000009c adrp x28, 6d000 <dist_ctx+0x1e50>
5dfcc: 97ffd101 bl 523d0 <plat_get_power_domain_tree_desc>
5dfd0: b0000075 adrp x21, 6a000 <__STACKS_START__+0x2f80>
5dfd4: aa0003e4 mov x4, x0
5dfd8: 9126439c add x28, x28, #0x990
5dfdc: 910e82b5 add x21, x21, #0x3a0
5dfe0: 52800016 mov w22, #0x0 // #0
5dfe4: 52800017 mov w23, #0x0 // #0
5dfe8: 52800001 mov w1, #0x0 // #0
5dfec: 5280003b mov w27, #0x1 // #1
5dff0: 52800058 mov w24, #0x2 // #2
5dff4: 0b160365 add w5, w27, w22
5dff8: 8b364083 add x3, x4, w22, uxtw
5dffc: 5280001b mov w27, #0x0 // #0
5e000: 14000015 b 5e054 <psci_setup+0xf0>
5e004: 71001adf cmp w22, #0x6
5e008: 540000a9 b.ls 5e01c <psci_setup+0xb8> // b.plast
5e00c: d0000022 adrp x2, 64000 <__func__.3216+0x18e>
5e010: 528011a1 mov w1, #0x8d // #141
5e014: 91048442 add x2, x2, #0x121
5e018: 17ffffe8 b 5dfb8 <psci_setup+0x54>
5e01c: 3940007a ldrb w26, [x3]
5e020: 2a1703f9 mov w25, w23
5e024: 510006c6 sub w6, w22, #0x1
5e028: 2b170341 adds w1, w26, w23
5e02c: 1a9f37e0 cset w0, cs // cs = hs, nlast
5e030: 6b01033f cmp w25, w1
5e034: 54000283 b.cc 5e084 <psci_setup+0x120> // b.lo, b.ul, b.last
5e038: 7100001f cmp w0, #0x0
5e03c: 0b1a037b add w27, w27, w26
5e040: 1a9f0341 csel w1, w26, wzr, eq // eq = none
5e044: 110006d6 add w22, w22, #0x1
5e048: 0b170021 add w1, w1, w23
5e04c: 91000463 add x3, x3, #0x1
5e050: 2a0103f7 mov w23, w1
5e054: 6b0502df cmp w22, w5
5e058: 54fffd61 b.ne 5e004 <psci_setup+0xa0> // b.any
5e05c: 71000718 subs w24, w24, #0x1
5e060: 54000680 b.eq 5e130 <psci_setup+0x1cc> // b.none
5e064: 3100071f cmn w24, #0x1
5e068: 54000661 b.ne 5e134 <psci_setup+0x1d0> // b.any
5e06c: 7100183f cmp w1, #0x6
5e070: 54000669 b.ls 5e13c <psci_setup+0x1d8> // b.plast
5e074: d0000022 adrp x2, 64000 <__func__.3216+0x18e>
5e078: 528014a1 mov w1, #0xa5 // #165
5e07c: 91054c42 add x2, x2, #0x153
5e080: 17ffffce b 5dfb8 <psci_setup+0x54>
5e084: 12001f33 and w19, w25, #0xff
5e088: 340001b8 cbz w24, 5e0bc <psci_setup+0x158>
5e08c: 900001c1 adrp x1, 96000 <rockchip_pd_lock>
5e090: 9101b021 add x1, x1, #0x6c
5e094: 8b33d033 add x19, x1, w19, sxtw #4
5e098: d37c1f20 ubfiz x0, x25, #4, #8
5e09c: 8b010001 add x1, x0, x1
5e0a0: 52800040 mov w0, #0x2 // #2
5e0a4: 39003678 strb w24, [x19, #13]
5e0a8: 39003839 strb w25, [x1, #14]
5e0ac: b9000a66 str w6, [x19, #8]
5e0b0: 39003260 strb w0, [x19, #12]
5e0b4: 11000739 add w25, w25, #0x1
5e0b8: 17ffffdc b 5e028 <psci_setup+0xc4>
5e0bc: 8b33d381 add x1, x28, w19, sxtw #4
5e0c0: 937c7e60 sbfiz x0, x19, #4, #32
5e0c4: f90037e4 str x4, [sp, #104]
5e0c8: 290e17e6 stp w6, w5, [sp, #112]
5e0cc: b9000826 str w6, [x1, #8]
5e0d0: 92800001 mov x1, #0xffffffffffffffff // #-1
5e0d4: f8206b81 str x1, [x28, x0]
5e0d8: 2a1303e0 mov w0, w19
5e0dc: f9003fe3 str x3, [sp, #120]
5e0e0: 940008ca bl 60408 <_cpu_data_by_index>
5e0e4: aa0003e1 mov x1, x0
5e0e8: 91006000 add x0, x0, #0x18
5e0ec: 52800022 mov w2, #0x1 // #1
5e0f0: b9001822 str w2, [x1, #24]
5e0f4: 52800061 mov w1, #0x3 // #3
5e0f8: b9000401 str w1, [x0, #4]
5e0fc: 52800041 mov w1, #0x2 // #2
5e100: 39002001 strb w1, [x0, #8]
5e104: d2800181 mov x1, #0xc // #12
5e108: 94000a0a bl 60930 <flush_dcache_range>
5e10c: 52804401 mov w1, #0x220 // #544
5e110: 2a1303e0 mov w0, w19
5e114: 52800022 mov w2, #0x1 // #1
5e118: 9ba15661 umaddl x1, w19, w1, x21
5e11c: 97fff798 bl 5bf7c <cm_set_context_by_index>
5e120: 294e17e6 ldp w6, w5, [sp, #112]
5e124: f94037e4 ldr x4, [sp, #104]
5e128: f9403fe3 ldr x3, [sp, #120]
5e12c: 17ffffe2 b 5e0b4 <psci_setup+0x150>
5e130: 52800017 mov w23, #0x0 // #0
5e134: 2a0503f6 mov w22, w5
5e138: 17ffffaf b 5dff4 <psci_setup+0x90>
5e13c: 90000080 adrp x0, 6e000 <iomux_status+0x2c>
5e140: 900001d5 adrp x21, 96000 <rockchip_pd_lock>
5e144: 9131f016 add x22, x0, #0xc7c
5e148: 9101b2b5 add x21, x21, #0x6c
5e14c: b90c7c01 str w1, [x0, #3196]
5e150: 52800018 mov w24, #0x0 // #0
5e154: 52800017 mov w23, #0x0 // #0
5e158: 52800013 mov w19, #0x0 // #0
5e15c: b94002c0 ldr w0, [x22]
5e160: 6b00027f cmp w19, w0
5e164: 540002e3 b.cc 5e1c0 <psci_setup+0x25c> // b.lo, b.ul, b.last
5e168: d53800b3 mrs x19, mpidr_el1
5e16c: 94000758 bl 5fecc <plat_my_core_pos>
5e170: d37c7c00 ubfiz x0, x0, #4, #32
5e174: f0000062 adrp x2, 6d000 <dist_ctx+0x1e50>
5e178: 91264042 add x2, x2, #0x990
5e17c: 92409e61 and x1, x19, #0xffffffffff
5e180: f0000073 adrp x19, 6d000 <dist_ctx+0x1e50>
5e184: 9260dc21 and x1, x1, #0xffffffff00ffffff
5e188: 9127c275 add x21, x19, #0x9f0
5e18c: f8206841 str x1, [x2, x0]
5e190: 97fffbb2 bl 5d058 <psci_init_req_local_pwr_states>
5e194: 52800040 mov w0, #0x2 // #2
5e198: 97fffbfc bl 5d188 <psci_set_pwr_domains_to_run>
5e19c: f9400680 ldr x0, [x20, #8]
5e1a0: aa1503e1 mov x1, x21
5e1a4: 97ffd078 bl 52384 <plat_setup_psci_ops>
5e1a8: f944fa60 ldr x0, [x19, #2544]
5e1ac: b5000420 cbnz x0, 5e230 <psci_setup+0x2cc>
5e1b0: d0000022 adrp x2, 64000 <__func__.3216+0x18e>
5e1b4: 52801c01 mov w1, #0xe0 // #224
5e1b8: 9105b042 add x2, x2, #0x16c
5e1bc: 17ffff7f b 5dfb8 <psci_setup+0x54>
5e1c0: 910223e2 add x2, sp, #0x88
5e1c4: 2a1303e0 mov w0, w19
5e1c8: 52800041 mov w1, #0x2 // #2
5e1cc: 97fffbdd bl 5d140 <psci_get_parent_pwr_domain_nodes>
5e1d0: b9408fe2 ldr w2, [sp, #140]
5e1d4: 6b02031f cmp w24, w2
5e1d8: 2a0203e0 mov w0, w2
5e1dc: 54000060 b.eq 5e1e8 <psci_setup+0x284> // b.none
5e1e0: d37cec01 lsl x1, x0, #4
5e1e4: b8216ab3 str w19, [x21, x1]
5e1e8: 8b0012a0 add x0, x21, x0, lsl #4
5e1ec: b9400401 ldr w1, [x0, #4]
5e1f0: 11000421 add w1, w1, #0x1
5e1f4: b9000401 str w1, [x0, #4]
5e1f8: b9408be1 ldr w1, [sp, #136]
5e1fc: 6b0102ff cmp w23, w1
5e200: 2a0103e0 mov w0, w1
5e204: 54000060 b.eq 5e210 <psci_setup+0x2ac> // b.none
5e208: d37cec03 lsl x3, x0, #4
5e20c: b8236ab3 str w19, [x21, x3]
5e210: 8b0012a0 add x0, x21, x0, lsl #4
5e214: 11000673 add w19, w19, #0x1
5e218: 2a0203f8 mov w24, w2
5e21c: 2a0103f7 mov w23, w1
5e220: b9400403 ldr w3, [x0, #4]
5e224: 11000463 add w3, w3, #0x1
5e228: b9000403 str w3, [x0, #4]
5e22c: 17ffffcc b 5e15c <psci_setup+0x1f8>
5e230: aa1503e0 mov x0, x21
5e234: d2800101 mov x1, #0x8 // #8
5e238: 940009be bl 60930 <flush_dcache_range>
5e23c: f944fa61 ldr x1, [x19, #2544]
5e240: 52808223 mov w3, #0x411 // #1041
5e244: 90000080 adrp x0, 6e000 <iomux_status+0x2c>
5e248: f9400822 ldr x2, [x1, #16]
5e24c: f100005f cmp x2, #0x0
5e250: 528082a2 mov w2, #0x415 // #1045
5e254: 1a831042 csel w2, w2, w3, ne // ne = any
5e258: b90c8002 str w2, [x0, #3200]
5e25c: f9400423 ldr x3, [x1, #8]
5e260: b40000a3 cbz x3, 5e274 <psci_setup+0x310>
5e264: f9401423 ldr x3, [x1, #40]
5e268: b4000063 cbz x3, 5e274 <psci_setup+0x310>
5e26c: 321d0042 orr w2, w2, #0x8
5e270: b90c8002 str w2, [x0, #3200]
5e274: f9401022 ldr x2, [x1, #32]
5e278: b4000162 cbz x2, 5e2a4 <psci_setup+0x340>
5e27c: f9401c22 ldr x2, [x1, #56]
5e280: b4000122 cbz x2, 5e2a4 <psci_setup+0x340>
5e284: f9403424 ldr x4, [x1, #104]
5e288: 52880045 mov w5, #0x4002 // #16386
5e28c: b94c8002 ldr w2, [x0, #3200]
5e290: f100009f cmp x4, #0x0
5e294: 321f0043 orr w3, w2, #0x2
5e298: 2a050042 orr w2, w2, w5
5e29c: 1a831042 csel w2, w2, w3, ne // ne = any
5e2a0: b90c8002 str w2, [x0, #3200]
5e2a4: f9402422 ldr x2, [x1, #72]
5e2a8: b4000082 cbz x2, 5e2b8 <psci_setup+0x354>
5e2ac: b94c8002 ldr w2, [x0, #3200]
5e2b0: 32180042 orr w2, w2, #0x100
5e2b4: b90c8002 str w2, [x0, #3200]
5e2b8: f9402822 ldr x2, [x1, #80]
5e2bc: b4000082 cbz x2, 5e2cc <psci_setup+0x368>
5e2c0: b94c8002 ldr w2, [x0, #3200]
5e2c4: 32170042 orr w2, w2, #0x200
5e2c8: b90c8002 str w2, [x0, #3200]
5e2cc: f9404022 ldr x2, [x1, #128]
5e2d0: b4000082 cbz x2, 5e2e0 <psci_setup+0x37c>
5e2d4: b94c8002 ldr w2, [x0, #3200]
5e2d8: 32130042 orr w2, w2, #0x2000
5e2dc: b90c8002 str w2, [x0, #3200]
5e2e0: f9404822 ldr x2, [x1, #144]
5e2e4: b40000c2 cbz x2, 5e2fc <psci_setup+0x398>
5e2e8: f9404c22 ldr x2, [x1, #152]
5e2ec: b4000082 cbz x2, 5e2fc <psci_setup+0x398>
5e2f0: b94c8002 ldr w2, [x0, #3200]
5e2f4: 320d0042 orr w2, w2, #0x80000
5e2f8: b90c8002 str w2, [x0, #3200]
5e2fc: f9404422 ldr x2, [x1, #136]
5e300: b4000082 cbz x2, 5e310 <psci_setup+0x3ac>
5e304: b94c8002 ldr w2, [x0, #3200]
5e308: 320c0042 orr w2, w2, #0x100000
5e30c: b90c8002 str w2, [x0, #3200]
5e310: f9405021 ldr x1, [x1, #160]
5e314: b4000081 cbz x1, 5e324 <psci_setup+0x3c0>
5e318: b94c8001 ldr w1, [x0, #3200]
5e31c: 320e0021 orr w1, w1, #0x40000
5e320: b90c8001 str w1, [x0, #3200]
5e324: 52800000 mov w0, #0x0 // #0
5e328: a94153f3 ldp x19, x20, [sp, #16]
5e32c: a9425bf5 ldp x21, x22, [sp, #32]
5e330: a94363f7 ldp x23, x24, [sp, #48]
5e334: a9446bf9 ldp x25, x26, [sp, #64]
5e338: a94573fb ldp x27, x28, [sp, #80]
5e33c: a8c97bfd ldp x29, x30, [sp], #144
5e340: d65f03c0 ret
000000000005e344 <psci_system_off>:
5e344: a9be7bfd stp x29, x30, [sp, #-32]!
5e348: 910003fd mov x29, sp
5e34c: f9000bf3 str x19, [sp, #16]
5e350: 97fffd27 bl 5d7ec <psci_print_power_domain_map>
5e354: f0000060 adrp x0, 6d000 <dist_ctx+0x1e50>
5e358: f944f801 ldr x1, [x0, #2544]
5e35c: f9402421 ldr x1, [x1, #72]
5e360: b50000e1 cbnz x1, 5e37c <psci_system_off+0x38>
5e364: d0000022 adrp x2, 64000 <__func__.3216+0x18e>
5e368: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5e36c: 91061442 add x2, x2, #0x185
5e370: 9106a800 add x0, x0, #0x1aa
5e374: 528002a1 mov w1, #0x15 // #21
5e378: 94000dad bl 61a2c <__assert>
5e37c: aa0003f3 mov x19, x0
5e380: f0000060 adrp x0, 6d000 <dist_ctx+0x1e50>
5e384: f944fc00 ldr x0, [x0, #2552]
5e388: b4000080 cbz x0, 5e398 <psci_system_off+0x54>
5e38c: f9401c00 ldr x0, [x0, #56]
5e390: b4000040 cbz x0, 5e398 <psci_system_off+0x54>
5e394: d63f0000 blr x0
5e398: 940001cd bl 5eacc <console_flush>
5e39c: f944fa60 ldr x0, [x19, #2544]
5e3a0: f9402400 ldr x0, [x0, #72]
5e3a4: d63f0000 blr x0
000000000005e3a8 <psci_system_reset>:
5e3a8: a9be7bfd stp x29, x30, [sp, #-32]!
5e3ac: 910003fd mov x29, sp
5e3b0: f9000bf3 str x19, [sp, #16]
5e3b4: 97fffd0e bl 5d7ec <psci_print_power_domain_map>
5e3b8: f0000060 adrp x0, 6d000 <dist_ctx+0x1e50>
5e3bc: f944f801 ldr x1, [x0, #2544]
5e3c0: f9402821 ldr x1, [x1, #80]
5e3c4: b50000e1 cbnz x1, 5e3e0 <psci_system_reset+0x38>
5e3c8: d0000022 adrp x2, 64000 <__func__.3216+0x18e>
5e3cc: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5e3d0: 91071442 add x2, x2, #0x1c5
5e3d4: 9106a800 add x0, x0, #0x1aa
5e3d8: 52800501 mov w1, #0x28 // #40
5e3dc: 94000d94 bl 61a2c <__assert>
5e3e0: aa0003f3 mov x19, x0
5e3e4: f0000060 adrp x0, 6d000 <dist_ctx+0x1e50>
5e3e8: f944fc00 ldr x0, [x0, #2552]
5e3ec: b4000080 cbz x0, 5e3fc <psci_system_reset+0x54>
5e3f0: f9402000 ldr x0, [x0, #64]
5e3f4: b4000040 cbz x0, 5e3fc <psci_system_reset+0x54>
5e3f8: d63f0000 blr x0
5e3fc: 940001b4 bl 5eacc <console_flush>
5e400: f944fa60 ldr x0, [x19, #2544]
5e404: f9402800 ldr x0, [x0, #80]
5e408: d63f0000 blr x0
000000000005e40c <psci_system_reset2>:
5e40c: a9bd7bfd stp x29, x30, [sp, #-48]!
5e410: 910003fd mov x29, sp
5e414: a90153f3 stp x19, x20, [sp, #16]
5e418: 2a0003f3 mov w19, w0
5e41c: a9025bf5 stp x21, x22, [sp, #32]
5e420: aa0103f5 mov x21, x1
5e424: 97fffcf2 bl 5d7ec <psci_print_power_domain_map>
5e428: f0000062 adrp x2, 6d000 <dist_ctx+0x1e50>
5e42c: f944f840 ldr x0, [x2, #2544]
5e430: f9405001 ldr x1, [x0, #160]
5e434: b50000e1 cbnz x1, 5e450 <psci_system_reset2+0x44>
5e438: d0000022 adrp x2, 64000 <__func__.3216+0x18e>
5e43c: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5e440: 9107b042 add x2, x2, #0x1ec
5e444: 9106a800 add x0, x0, #0x1aa
5e448: 528007a1 mov w1, #0x3d // #61
5e44c: 94000d78 bl 61a2c <__assert>
5e450: aa0203f4 mov x20, x2
5e454: 531f7e76 lsr w22, w19, #31
5e458: 36f80213 tbz w19, #31, 5e498 <psci_system_reset2+0x8c>
5e45c: f0000060 adrp x0, 6d000 <dist_ctx+0x1e50>
5e460: f944fc00 ldr x0, [x0, #2552]
5e464: b50002a0 cbnz x0, 5e4b8 <psci_system_reset2+0xac>
5e468: 94000199 bl 5eacc <console_flush>
5e46c: f944fa80 ldr x0, [x20, #2544]
5e470: aa1503e2 mov x2, x21
5e474: 2a1303e1 mov w1, w19
5e478: f9405003 ldr x3, [x0, #160]
5e47c: 2a1603e0 mov w0, w22
5e480: d63f0060 blr x3
5e484: 93407c00 sxtw x0, w0
5e488: a94153f3 ldp x19, x20, [sp, #16]
5e48c: a9425bf5 ldp x21, x22, [sp, #32]
5e490: a8c37bfd ldp x29, x30, [sp], #48
5e494: d65f03c0 ret
5e498: 35000193 cbnz w19, 5e4c8 <psci_system_reset2+0xbc>
5e49c: f9404c02 ldr x2, [x0, #152]
5e4a0: b4fffde2 cbz x2, 5e45c <psci_system_reset2+0x50>
5e4a4: 52800000 mov w0, #0x0 // #0
5e4a8: d63f0040 blr x2
5e4ac: 36fffd80 tbz w0, #31, 5e45c <psci_system_reset2+0x50>
5e4b0: 92800000 mov x0, #0xffffffffffffffff // #-1
5e4b4: 17fffff5 b 5e488 <psci_system_reset2+0x7c>
5e4b8: f9402000 ldr x0, [x0, #64]
5e4bc: b4fffd60 cbz x0, 5e468 <psci_system_reset2+0x5c>
5e4c0: d63f0000 blr x0
5e4c4: 17ffffe9 b 5e468 <psci_system_reset2+0x5c>
5e4c8: 92800020 mov x0, #0xfffffffffffffffe // #-2
5e4cc: 17ffffef b 5e488 <psci_system_reset2+0x7c>
000000000005e4d0 <psci_mem_protect>:
5e4d0: a9bd7bfd stp x29, x30, [sp, #-48]!
5e4d4: 910003fd mov x29, sp
5e4d8: a90153f3 stp x19, x20, [sp, #16]
5e4dc: f0000074 adrp x20, 6d000 <dist_ctx+0x1e50>
5e4e0: 2a0003f3 mov w19, w0
5e4e4: f944fa80 ldr x0, [x20, #2544]
5e4e8: f9404801 ldr x1, [x0, #144]
5e4ec: b50000e1 cbnz x1, 5e508 <psci_mem_protect+0x38>
5e4f0: d0000022 adrp x2, 64000 <__func__.3216+0x18e>
5e4f4: 91085042 add x2, x2, #0x214
5e4f8: 52800241 mov w1, #0x12 // #18
5e4fc: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5e500: 9108fc00 add x0, x0, #0x23f
5e504: 94000d4a bl 61a2c <__assert>
5e508: f9404c00 ldr x0, [x0, #152]
5e50c: b50000a0 cbnz x0, 5e520 <psci_mem_protect+0x50>
5e510: d0000022 adrp x2, 64000 <__func__.3216+0x18e>
5e514: 52800261 mov w1, #0x13 // #19
5e518: 91096c42 add x2, x2, #0x25b
5e51c: 17fffff8 b 5e4fc <psci_mem_protect+0x2c>
5e520: 9100b3e0 add x0, sp, #0x2c
5e524: d63f0020 blr x1
5e528: 36f800a0 tbz w0, #31, 5e53c <psci_mem_protect+0x6c>
5e52c: 92800000 mov x0, #0xffffffffffffffff // #-1
5e530: a94153f3 ldp x19, x20, [sp, #16]
5e534: a8c37bfd ldp x29, x30, [sp], #48
5e538: d65f03c0 ret
5e53c: f944fa80 ldr x0, [x20, #2544]
5e540: f9404c01 ldr x1, [x0, #152]
5e544: 2a1303e0 mov w0, w19
5e548: d63f0020 blr x1
5e54c: 37ffff00 tbnz w0, #31, 5e52c <psci_mem_protect+0x5c>
5e550: b9402fe0 ldr w0, [sp, #44]
5e554: 7100001f cmp w0, #0x0
5e558: 9a9f07e0 cset x0, ne // ne = any
5e55c: 17fffff5 b 5e530 <psci_mem_protect+0x60>
000000000005e560 <psci_mem_chk_range>:
5e560: a9bf7bfd stp x29, x30, [sp, #-16]!
5e564: f0000064 adrp x4, 6d000 <dist_ctx+0x1e50>
5e568: 910003fd mov x29, sp
5e56c: f944f884 ldr x4, [x4, #2544]
5e570: f9404484 ldr x4, [x4, #136]
5e574: b50000e4 cbnz x4, 5e590 <psci_mem_chk_range+0x30>
5e578: d0000022 adrp x2, 64000 <__func__.3216+0x18e>
5e57c: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5e580: 910a1c42 add x2, x2, #0x287
5e584: 9108fc00 add x0, x0, #0x23f
5e588: 52800421 mov w1, #0x21 // #33
5e58c: 94000d28 bl 61a2c <__assert>
5e590: b5000081 cbnz x1, 5e5a0 <psci_mem_chk_range+0x40>
5e594: 92800040 mov x0, #0xfffffffffffffffd // #-3
5e598: a8c17bfd ldp x29, x30, [sp], #16
5e59c: d65f03c0 ret
5e5a0: cb0103e2 neg x2, x1
5e5a4: eb00005f cmp x2, x0
5e5a8: 54ffff63 b.cc 5e594 <psci_mem_chk_range+0x34> // b.lo, b.ul, b.last
5e5ac: d63f0080 blr x4
5e5b0: 37ffff20 tbnz w0, #31, 5e594 <psci_mem_chk_range+0x34>
5e5b4: d2800000 mov x0, #0x0 // #0
5e5b8: 17fffff8 b 5e598 <psci_mem_chk_range+0x38>
000000000005e5bc <bakery_lock_get>:
5e5bc: a9be7bfd stp x29, x30, [sp, #-32]!
5e5c0: 910003fd mov x29, sp
5e5c4: f9000bf3 str x19, [sp, #16]
5e5c8: aa0003f3 mov x19, x0
5e5cc: 94000640 bl 5fecc <plat_my_core_pos>
5e5d0: b50000f3 cbnz x19, 5e5ec <bakery_lock_get+0x30>
5e5d4: d0000022 adrp x2, 64000 <__func__.3216+0x18e>
5e5d8: 910ac442 add x2, x2, #0x2b1
5e5dc: 52800c81 mov w1, #0x64 // #100
5e5e0: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5e5e4: 910b0800 add x0, x0, #0x2c2
5e5e8: 94000d11 bl 61a2c <__assert>
5e5ec: 7100141f cmp w0, #0x5
5e5f0: 54000089 b.ls 5e600 <bakery_lock_get+0x44> // b.plast
5e5f4: d0000022 adrp x2, 64000 <__func__.3216+0x18e>
5e5f8: 910ba842 add x2, x2, #0x2ea
5e5fc: 17fffff8 b 5e5dc <bakery_lock_get+0x20>
5e600: d37f7c05 ubfiz x5, x0, #1, #32
5e604: 78656a61 ldrh w1, [x19, x5]
5e608: d3413c21 ubfx x1, x1, #1, #15
5e60c: 340000a1 cbz w1, 5e620 <bakery_lock_get+0x64>
5e610: d0000022 adrp x2, 64000 <__func__.3216+0x18e>
5e614: 52800641 mov w1, #0x32 // #50
5e618: 910c1842 add x2, x2, #0x306
5e61c: 17fffff1 b 5e5e0 <bakery_lock_get+0x24>
5e620: 52800022 mov w2, #0x1 // #1
5e624: 52800003 mov w3, #0x0 // #0
5e628: 78256a62 strh w2, [x19, x5]
5e62c: 52800002 mov w2, #0x0 // #0
5e630: 2a0303e4 mov w4, w3
5e634: 11000463 add w3, w3, #0x1
5e638: 78647a64 ldrh w4, [x19, x4, lsl #1]
5e63c: d3413c84 ubfx x4, x4, #1, #15
5e640: 6b04005f cmp w2, w4
5e644: 1a842042 csel w2, w2, w4, cs // cs = hs, nlast
5e648: 7100187f cmp w3, #0x6
5e64c: 54ffff21 b.ne 5e630 <bakery_lock_get+0x74> // b.any
5e650: 11000442 add w2, w2, #0x1
5e654: 531f3843 ubfiz w3, w2, #1, #15
5e658: 2a022002 orr w2, w0, w2, lsl #8
5e65c: 78256a63 strh w3, [x19, x5]
5e660: 6b01001f cmp w0, w1
5e664: 54000220 b.eq 5e6a8 <bakery_lock_get+0xec> // b.none
5e668: d37f7c25 ubfiz x5, x1, #1, #32
5e66c: 78656a64 ldrh w4, [x19, x5]
5e670: 8b050266 add x6, x19, x5
5e674: 12003c83 and w3, w4, #0xffff
5e678: 3707ffa4 tbnz w4, #0, 5e66c <bakery_lock_get+0xb0>
5e67c: 53017c64 lsr w4, w3, #1
5e680: 6b4307ff cmp wzr, w3, lsr #1
5e684: 54000120 b.eq 5e6a8 <bakery_lock_get+0xec> // b.none
5e688: 2a042023 orr w3, w1, w4, lsl #8
5e68c: 6b03005f cmp w2, w3
5e690: 540000c9 b.ls 5e6a8 <bakery_lock_get+0xec> // b.plast
5e694: d503205f wfe
5e698: 794000c3 ldrh w3, [x6]
5e69c: d3413c63 ubfx x3, x3, #1, #15
5e6a0: 6b03009f cmp w4, w3
5e6a4: 54ffff80 b.eq 5e694 <bakery_lock_get+0xd8> // b.none
5e6a8: 11000421 add w1, w1, #0x1
5e6ac: 7100183f cmp w1, #0x6
5e6b0: 54fffd81 b.ne 5e660 <bakery_lock_get+0xa4> // b.any
5e6b4: d5033bbf dmb ish
5e6b8: f9400bf3 ldr x19, [sp, #16]
5e6bc: a8c27bfd ldp x29, x30, [sp], #32
5e6c0: d65f03c0 ret
000000000005e6c4 <bakery_lock_release>:
5e6c4: a9be7bfd stp x29, x30, [sp, #-32]!
5e6c8: 910003fd mov x29, sp
5e6cc: f9000bf3 str x19, [sp, #16]
5e6d0: aa0003f3 mov x19, x0
5e6d4: 940005fe bl 5fecc <plat_my_core_pos>
5e6d8: b50000f3 cbnz x19, 5e6f4 <bakery_lock_release+0x30>
5e6dc: d0000022 adrp x2, 64000 <__func__.3216+0x18e>
5e6e0: 910ac442 add x2, x2, #0x2b1
5e6e4: 52801321 mov w1, #0x99 // #153
5e6e8: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5e6ec: 910b0800 add x0, x0, #0x2c2
5e6f0: 94000ccf bl 61a2c <__assert>
5e6f4: 7100141f cmp w0, #0x5
5e6f8: 54000089 b.ls 5e708 <bakery_lock_release+0x44> // b.plast
5e6fc: d0000022 adrp x2, 64000 <__func__.3216+0x18e>
5e700: 910ba842 add x2, x2, #0x2ea
5e704: 17fffff8 b 5e6e4 <bakery_lock_release+0x20>
5e708: d37f7c01 ubfiz x1, x0, #1, #32
5e70c: 78616a60 ldrh w0, [x19, x1]
5e710: f27f381f tst x0, #0xfffe
5e714: 540000a1 b.ne 5e728 <bakery_lock_release+0x64> // b.any
5e718: d0000022 adrp x2, 64000 <__func__.3216+0x18e>
5e71c: 52801341 mov w1, #0x9a // #154
5e720: 910ce042 add x2, x2, #0x338
5e724: 17fffff1 b 5e6e8 <bakery_lock_release+0x24>
5e728: d5033bbf dmb ish
5e72c: 78216a7f strh wzr, [x19, x1]
5e730: d5033f9f dsb sy
5e734: d503209f sev
5e738: f9400bf3 ldr x19, [sp, #16]
5e73c: a8c27bfd ldp x29, x30, [sp], #32
5e740: d65f03c0 ret
000000000005e744 <spe_supported>:
5e744: d5380500 mrs x0, id_aa64dfr0_el1
5e748: d3608c00 ubfx x0, x0, #32, #4
5e74c: f100041f cmp x0, #0x1
5e750: 1a9f17e0 cset w0, eq // eq = none
5e754: d65f03c0 ret
000000000005e758 <spe_drain_buffers_hook>:
5e758: a9bf7bfd stp x29, x30, [sp, #-16]!
5e75c: 910003fd mov x29, sp
5e760: 97fffff9 bl 5e744 <spe_supported>
5e764: 72001c1f tst w0, #0xff
5e768: 540000c0 b.eq 5e780 <spe_drain_buffers_hook+0x28> // b.none
5e76c: d503223f psb csync
5e770: d503379f dsb nsh
5e774: d2800000 mov x0, #0x0 // #0
5e778: a8c17bfd ldp x29, x30, [sp], #16
5e77c: d65f03c0 ret
5e780: 92800000 mov x0, #0xffffffffffffffff // #-1
5e784: 17fffffd b 5e778 <spe_drain_buffers_hook+0x20>
000000000005e788 <spe_enable>:
5e788: 12001c01 and w1, w0, #0xff
5e78c: a9bf7bfd stp x29, x30, [sp, #-16]!
5e790: 910003fd mov x29, sp
5e794: 97ffffec bl 5e744 <spe_supported>
5e798: 72001c1f tst w0, #0xff
5e79c: 54000140 b.eq 5e7c4 <spe_enable+0x3c> // b.none
5e7a0: 340000c1 cbz w1, 5e7b8 <spe_enable+0x30>
5e7a4: d53c1120 mrs x0, mdcr_el2
5e7a8: 92407c00 and x0, x0, #0xffffffff
5e7ac: 9271f800 and x0, x0, #0xffffffffffffbfff
5e7b0: b2740400 orr x0, x0, #0x3000
5e7b4: d51c1120 msr mdcr_el2, x0
5e7b8: d53e1320 mrs x0, mdcr_el3
5e7bc: b2740400 orr x0, x0, #0x3000
5e7c0: d51e1320 msr mdcr_el3, x0
5e7c4: a8c17bfd ldp x29, x30, [sp], #16
5e7c8: d65f03c0 ret
000000000005e7cc <print_entry_point_info>:
5e7cc: a9be7bfd stp x29, x30, [sp, #-32]!
5e7d0: 910003fd mov x29, sp
5e7d4: f9000bf3 str x19, [sp, #16]
5e7d8: aa0003f3 mov x19, x0
5e7dc: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5e7e0: 910da800 add x0, x0, #0x36a
5e7e4: f9400661 ldr x1, [x19, #8]
5e7e8: 94000027 bl 5e884 <tf_log>
5e7ec: b9401261 ldr w1, [x19, #16]
5e7f0: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5e7f4: 910e2000 add x0, x0, #0x388
5e7f8: 94000023 bl 5e884 <tf_log>
5e7fc: f9400e61 ldr x1, [x19, #24]
5e800: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5e804: 910e5800 add x0, x0, #0x396
5e808: 9400001f bl 5e884 <tf_log>
5e80c: f9401261 ldr x1, [x19, #32]
5e810: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5e814: 910eb400 add x0, x0, #0x3ad
5e818: 9400001b bl 5e884 <tf_log>
5e81c: f9401661 ldr x1, [x19, #40]
5e820: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5e824: 910f1000 add x0, x0, #0x3c4
5e828: 94000017 bl 5e884 <tf_log>
5e82c: f9401a61 ldr x1, [x19, #48]
5e830: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5e834: 910f6c00 add x0, x0, #0x3db
5e838: 94000013 bl 5e884 <tf_log>
5e83c: f9401e61 ldr x1, [x19, #56]
5e840: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5e844: 910fc800 add x0, x0, #0x3f2
5e848: 9400000f bl 5e884 <tf_log>
5e84c: f9402261 ldr x1, [x19, #64]
5e850: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5e854: 91102400 add x0, x0, #0x409
5e858: 9400000b bl 5e884 <tf_log>
5e85c: f9402661 ldr x1, [x19, #72]
5e860: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5e864: 91108000 add x0, x0, #0x420
5e868: 94000007 bl 5e884 <tf_log>
5e86c: f9402a61 ldr x1, [x19, #80]
5e870: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5e874: f9400bf3 ldr x19, [sp, #16]
5e878: 9110dc00 add x0, x0, #0x437
5e87c: a8c27bfd ldp x29, x30, [sp], #32
5e880: 14000001 b 5e884 <tf_log>
000000000005e884 <tf_log>:
5e884: a9b67bfd stp x29, x30, [sp, #-160]!
5e888: 910003fd mov x29, sp
5e88c: a90153f3 stp x19, x20, [sp, #16]
5e890: aa0003f4 mov x20, x0
5e894: a9068be1 stp x1, x2, [sp, #104]
5e898: a90793e3 stp x3, x4, [sp, #120]
5e89c: a9089be5 stp x5, x6, [sp, #136]
5e8a0: f9004fe7 str x7, [sp, #152]
5e8a4: 39400000 ldrb w0, [x0]
5e8a8: 51000401 sub w1, w0, #0x1
5e8ac: 7100c43f cmp w1, #0x31
5e8b0: 540000e9 b.ls 5e8cc <tf_log+0x48> // b.plast
5e8b4: d0000022 adrp x2, 64000 <__func__.3216+0x18e>
5e8b8: 91113842 add x2, x2, #0x44e
5e8bc: 52800441 mov w1, #0x22 // #34
5e8c0: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5e8c4: 91120c00 add x0, x0, #0x483
5e8c8: 94000c59 bl 61a2c <__assert>
5e8cc: 52800142 mov w2, #0xa // #10
5e8d0: 1ac20801 udiv w1, w0, w2
5e8d4: 1b028021 msub w1, w1, w2, w0
5e8d8: 340000a1 cbz w1, 5e8ec <tf_log+0x68>
5e8dc: d0000022 adrp x2, 64000 <__func__.3216+0x18e>
5e8e0: 52800461 mov w1, #0x23 // #35
5e8e4: 91124c42 add x2, x2, #0x493
5e8e8: 17fffff6 b 5e8c0 <tf_log+0x3c>
5e8ec: b0000041 adrp x1, 67000 <__RO_END__>
5e8f0: b9405821 ldr w1, [x1, #88]
5e8f4: 6b00003f cmp w1, w0
5e8f8: 54000263 b.cc 5e944 <tf_log+0xc0> // b.lo, b.ul, b.last
5e8fc: 94000090 bl 5eb3c <plat_log_get_prefix>
5e900: aa0003f3 mov x19, x0
5e904: 39400260 ldrb w0, [x19]
5e908: 35000240 cbnz w0, 5e950 <tf_log+0xcc>
5e90c: 910283e0 add x0, sp, #0xa0
5e910: a90403e0 stp x0, x0, [sp, #64]
5e914: 910183e0 add x0, sp, #0x60
5e918: f9002be0 str x0, [sp, #80]
5e91c: 128006e0 mov w0, #0xffffffc8 // #-56
5e920: b9005be0 str w0, [sp, #88]
5e924: b9005fff str wzr, [sp, #92]
5e928: a94407e0 ldp x0, x1, [sp, #64]
5e92c: a90207e0 stp x0, x1, [sp, #32]
5e930: a94507e0 ldp x0, x1, [sp, #80]
5e934: a90307e0 stp x0, x1, [sp, #48]
5e938: 910083e1 add x1, sp, #0x20
5e93c: 91000680 add x0, x20, #0x1
5e940: 94000cb0 bl 61c00 <vprintf>
5e944: a94153f3 ldp x19, x20, [sp, #16]
5e948: a8ca7bfd ldp x29, x30, [sp], #160
5e94c: d65f03c0 ret
5e950: 91000673 add x19, x19, #0x1
5e954: 94000dc2 bl 6205c <putchar>
5e958: 17ffffeb b 5e904 <tf_log+0x80>
000000000005e95c <console_is_registered>:
5e95c: b5000120 cbnz x0, 5e980 <console_is_registered+0x24>
5e960: a9bf7bfd stp x29, x30, [sp, #-16]!
5e964: d0000022 adrp x2, 64000 <__func__.3216+0x18e>
5e968: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5e96c: 910003fd mov x29, sp
5e970: 91138442 add x2, x2, #0x4e1
5e974: 91130400 add x0, x0, #0x4c1
5e978: 52800681 mov w1, #0x34 // #52
5e97c: 94000c2c bl 61a2c <__assert>
5e980: f0000061 adrp x1, 6d000 <dist_ctx+0x1e50>
5e984: f9450021 ldr x1, [x1, #2560]
5e988: b5000061 cbnz x1, 5e994 <console_is_registered+0x38>
5e98c: 52800000 mov w0, #0x0 // #0
5e990: d65f03c0 ret
5e994: eb00003f cmp x1, x0
5e998: 54000060 b.eq 5e9a4 <console_is_registered+0x48> // b.none
5e99c: f9400021 ldr x1, [x1]
5e9a0: 17fffffa b 5e988 <console_is_registered+0x2c>
5e9a4: 52800020 mov w0, #0x1 // #1
5e9a8: d65f03c0 ret
000000000005e9ac <console_register>:
5e9ac: a9be7bfd stp x29, x30, [sp, #-32]!
5e9b0: 910003fd mov x29, sp
5e9b4: f9000bf3 str x19, [sp, #16]
5e9b8: aa0003f3 mov x19, x0
5e9bc: b0000040 adrp x0, 67000 <__RO_END__>
5e9c0: 91020000 add x0, x0, #0x80
5e9c4: eb00027f cmp x19, x0
5e9c8: 54000163 b.cc 5e9f4 <console_register+0x48> // b.lo, b.ul, b.last
5e9cc: 90000060 adrp x0, 6a000 <__STACKS_START__+0x2f80>
5e9d0: 91020000 add x0, x0, #0x80
5e9d4: eb00027f cmp x19, x0
5e9d8: 540000e2 b.cs 5e9f4 <console_register+0x48> // b.hs, b.nlast
5e9dc: d0000022 adrp x2, 64000 <__func__.3216+0x18e>
5e9e0: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5e9e4: 9113c442 add x2, x2, #0x4f1
5e9e8: 91130400 add x0, x0, #0x4c1
5e9ec: 52800281 mov w1, #0x14 // #20
5e9f0: 94000c0f bl 61a2c <__assert>
5e9f4: aa1303e0 mov x0, x19
5e9f8: 97ffffd9 bl 5e95c <console_is_registered>
5e9fc: 7100041f cmp w0, #0x1
5ea00: 540000a0 b.eq 5ea14 <console_register+0x68> // b.none
5ea04: f0000060 adrp x0, 6d000 <dist_ctx+0x1e50>
5ea08: f9450001 ldr x1, [x0, #2560]
5ea0c: f9000261 str x1, [x19]
5ea10: f9050013 str x19, [x0, #2560]
5ea14: 52800020 mov w0, #0x1 // #1
5ea18: f9400bf3 ldr x19, [sp, #16]
5ea1c: a8c27bfd ldp x29, x30, [sp], #32
5ea20: d65f03c0 ret
000000000005ea24 <console_switch_state>:
5ea24: b0000041 adrp x1, 67000 <__RO_END__>
5ea28: 3901c020 strb w0, [x1, #112]
5ea2c: d65f03c0 ret
000000000005ea30 <console_putc>:
5ea30: a9bd7bfd stp x29, x30, [sp, #-48]!
5ea34: 910003fd mov x29, sp
5ea38: a9025bf5 stp x21, x22, [sp, #32]
5ea3c: 2a0003f5 mov w21, w0
5ea40: f0000060 adrp x0, 6d000 <dist_ctx+0x1e50>
5ea44: a90153f3 stp x19, x20, [sp, #16]
5ea48: b0000056 adrp x22, 67000 <__RO_END__>
5ea4c: 9101c2d6 add x22, x22, #0x70
5ea50: f9450013 ldr x19, [x0, #2560]
5ea54: 12800ff4 mov w20, #0xffffff80 // #-128
5ea58: b50000d3 cbnz x19, 5ea70 <console_putc+0x40>
5ea5c: 2a1403e0 mov w0, w20
5ea60: a94153f3 ldp x19, x20, [sp, #16]
5ea64: a9425bf5 ldp x21, x22, [sp, #32]
5ea68: a8c37bfd ldp x29, x30, [sp], #48
5ea6c: d65f03c0 ret
5ea70: f9400660 ldr x0, [x19, #8]
5ea74: 394002c1 ldrb w1, [x22]
5ea78: ea00003f tst x1, x0
5ea7c: 54000180 b.eq 5eaac <console_putc+0x7c> // b.none
5ea80: f9400a62 ldr x2, [x19, #16]
5ea84: b4000142 cbz x2, 5eaac <console_putc+0x7c>
5ea88: 71002abf cmp w21, #0xa
5ea8c: 54000140 b.eq 5eab4 <console_putc+0x84> // b.none
5ea90: f9400a62 ldr x2, [x19, #16]
5ea94: aa1303e1 mov x1, x19
5ea98: 2a1503e0 mov w0, w21
5ea9c: d63f0040 blr x2
5eaa0: 3102029f cmn w20, #0x80
5eaa4: 7a401280 ccmp w20, w0, #0x0, ne // ne = any
5eaa8: 1a80d294 csel w20, w20, w0, le
5eaac: f9400273 ldr x19, [x19]
5eab0: 17ffffea b 5ea58 <console_putc+0x28>
5eab4: 3647fee0 tbz w0, #8, 5ea90 <console_putc+0x60>
5eab8: aa1303e1 mov x1, x19
5eabc: 528001a0 mov w0, #0xd // #13
5eac0: d63f0040 blr x2
5eac4: 36fffe60 tbz w0, #31, 5ea90 <console_putc+0x60>
5eac8: 17fffff6 b 5eaa0 <console_putc+0x70>
000000000005eacc <console_flush>:
5eacc: a9bd7bfd stp x29, x30, [sp, #-48]!
5ead0: f0000060 adrp x0, 6d000 <dist_ctx+0x1e50>
5ead4: 910003fd mov x29, sp
5ead8: a90153f3 stp x19, x20, [sp, #16]
5eadc: 12800ff4 mov w20, #0xffffff80 // #-128
5eae0: f9450013 ldr x19, [x0, #2560]
5eae4: f90013f5 str x21, [sp, #32]
5eae8: b0000055 adrp x21, 67000 <__RO_END__>
5eaec: 9101c2b5 add x21, x21, #0x70
5eaf0: b50000d3 cbnz x19, 5eb08 <console_flush+0x3c>
5eaf4: 2a1403e0 mov w0, w20
5eaf8: a94153f3 ldp x19, x20, [sp, #16]
5eafc: f94013f5 ldr x21, [sp, #32]
5eb00: a8c37bfd ldp x29, x30, [sp], #48
5eb04: d65f03c0 ret
5eb08: f9400660 ldr x0, [x19, #8]
5eb0c: 394002a1 ldrb w1, [x21]
5eb10: ea00003f tst x1, x0
5eb14: 54000100 b.eq 5eb34 <console_flush+0x68> // b.none
5eb18: f9401261 ldr x1, [x19, #32]
5eb1c: b40000c1 cbz x1, 5eb34 <console_flush+0x68>
5eb20: aa1303e0 mov x0, x19
5eb24: d63f0020 blr x1
5eb28: 3102029f cmn w20, #0x80
5eb2c: 7a401280 ccmp w20, w0, #0x0, ne // ne = any
5eb30: 1a80d294 csel w20, w20, w0, le
5eb34: f9400273 ldr x19, [x19]
5eb38: 17ffffee b 5eaf0 <console_flush+0x24>
000000000005eb3c <plat_log_get_prefix>:
5eb3c: 7100c81f cmp w0, #0x32
5eb40: 52800641 mov w1, #0x32 // #50
5eb44: 1a819000 csel w0, w0, w1, ls // ls = plast
5eb48: 52800141 mov w1, #0xa // #10
5eb4c: 6b01001f cmp w0, w1
5eb50: 1a812000 csel w0, w0, w1, cs // cs = hs, nlast
5eb54: 1ac10800 udiv w0, w0, w1
5eb58: 90000021 adrp x1, 62000 <vprintf+0x400>
5eb5c: 910b4021 add x1, x1, #0x2d0
5eb60: 51000400 sub w0, w0, #0x1
5eb64: f8607820 ldr x0, [x1, x0, lsl #3]
5eb68: d65f03c0 ret
000000000005eb6c <bl31_plat_runtime_setup>:
5eb6c: 52800040 mov w0, #0x2 // #2
5eb70: 17ffffad b 5ea24 <console_switch_state>
000000000005eb74 <plat_ea_handler>:
5eb74: a9be7bfd stp x29, x30, [sp, #-32]!
5eb78: 910003fd mov x29, sp
5eb7c: a90153f3 stp x19, x20, [sp, #16]
5eb80: 2a0003f3 mov w19, w0
5eb84: aa0103f4 mov x20, x1
5eb88: d53800a1 mrs x1, mpidr_el1
5eb8c: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5eb90: 91155c00 add x0, x0, #0x557
5eb94: 97ffff3c bl 5e884 <tf_log>
5eb98: aa1403e2 mov x2, x20
5eb9c: 2a1303e1 mov w1, w19
5eba0: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5eba4: 91163000 add x0, x0, #0x58c
5eba8: 97ffff37 bl 5e884 <tf_log>
5ebac: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5ebb0: 9116cc00 add x0, x0, #0x5b3
5ebb4: 94000028 bl 5ec54 <backtrace>
5ebb8: 97ffffc5 bl 5eacc <console_flush>
5ebbc: 9400074c bl 608ec <do_panic>
000000000005ebc0 <is_address_readable>:
5ebc0: d5384241 mrs x1, currentel
5ebc4: 53020c21 ubfx w1, w1, #2, #2
5ebc8: 71000c3f cmp w1, #0x3
5ebcc: 540000e1 b.ne 5ebe8 <is_address_readable+0x28> // b.any
5ebd0: d50e7800 at s1e3r, x0
5ebd4: d5033fdf isb
5ebd8: d5387400 mrs x0, par_el1
5ebdc: aa2003e0 mvn x0, x0
5ebe0: 12000000 and w0, w0, #0x1
5ebe4: d65f03c0 ret
5ebe8: 7100083f cmp w1, #0x2
5ebec: 54000061 b.ne 5ebf8 <is_address_readable+0x38> // b.any
5ebf0: d50c7800 at s1e2r, x0
5ebf4: 17fffff8 b 5ebd4 <is_address_readable+0x14>
5ebf8: d5087800 at s1e1r, x0
5ebfc: 17fffff6 b 5ebd4 <is_address_readable+0x14>
000000000005ec00 <is_valid_object.constprop.0>:
5ec00: aa0003e2 mov x2, x0
5ec04: d1000400 sub x0, x0, #0x1
5ec08: b100481f cmn x0, #0x12
5ec0c: 54000208 b.hi 5ec4c <is_valid_object.constprop.0+0x4c> // b.pmore
5ec10: f2400843 ands x3, x2, #0x7
5ec14: 540001c1 b.ne 5ec4c <is_valid_object.constprop.0+0x4c> // b.any
5ec18: a9bf7bfd stp x29, x30, [sp, #-16]!
5ec1c: 910003fd mov x29, sp
5ec20: 8b030040 add x0, x2, x3
5ec24: 97ffffe7 bl 5ebc0 <is_address_readable>
5ec28: 72001c00 ands w0, w0, #0xff
5ec2c: 540000c0 b.eq 5ec44 <is_valid_object.constprop.0+0x44> // b.none
5ec30: 91000463 add x3, x3, #0x1
5ec34: f100407f cmp x3, #0x10
5ec38: 54ffff41 b.ne 5ec20 <is_valid_object.constprop.0+0x20> // b.any
5ec3c: a8c17bfd ldp x29, x30, [sp], #16
5ec40: d65f03c0 ret
5ec44: 52800000 mov w0, #0x0 // #0
5ec48: 17fffffd b 5ec3c <is_valid_object.constprop.0+0x3c>
5ec4c: 52800000 mov w0, #0x0 // #0
5ec50: d65f03c0 ret
000000000005ec54 <backtrace>:
5ec54: a9bc7bfd stp x29, x30, [sp, #-64]!
5ec58: 910003fd mov x29, sp
5ec5c: a90153f3 stp x19, x20, [sp, #16]
5ec60: aa1d03f4 mov x20, x29
5ec64: a9025bf5 stp x21, x22, [sp, #32]
5ec68: aa1e03f6 mov x22, x30
5ec6c: aa0003f5 mov x21, x0
5ec70: f9001bf7 str x23, [sp, #48]
5ec74: 97ffff96 bl 5eacc <console_flush>
5ec78: aa1503e1 mov x1, x21
5ec7c: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5ec80: 91174400 add x0, x0, #0x5d1
5ec84: 94000ce1 bl 62008 <printf>
5ec88: d5384240 mrs x0, currentel
5ec8c: 53020c00 ubfx w0, w0, #2, #2
5ec90: 71000c1f cmp w0, #0x3
5ec94: 540002e0 b.eq 5ecf0 <backtrace+0x9c> // b.none
5ec98: d0000033 adrp x19, 64000 <__func__.3216+0x18e>
5ec9c: 7100081f cmp w0, #0x2
5eca0: d0000021 adrp x1, 64000 <__func__.3216+0x18e>
5eca4: 91172e60 add x0, x19, #0x5cb
5eca8: 91171c33 add x19, x1, #0x5c7
5ecac: 9a800273 csel x19, x19, x0, eq // eq = none
5ecb0: aa1403e0 mov x0, x20
5ecb4: 97ffffd3 bl 5ec00 <is_valid_object.constprop.0>
5ecb8: 72001c1f tst w0, #0xff
5ecbc: 54000201 b.ne 5ecfc <backtrace+0xa8> // b.any
5ecc0: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5ecc4: aa1403e1 mov x1, x20
5ecc8: 91179c00 add x0, x0, #0x5e7
5eccc: 94000ccf bl 62008 <printf>
5ecd0: aa1503e1 mov x1, x21
5ecd4: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5ecd8: a94153f3 ldp x19, x20, [sp, #16]
5ecdc: 911a2800 add x0, x0, #0x68a
5ece0: a9425bf5 ldp x21, x22, [sp, #32]
5ece4: f9401bf7 ldr x23, [sp, #48]
5ece8: a8c47bfd ldp x29, x30, [sp], #64
5ecec: 14000cc7 b 62008 <printf>
5ecf0: d0000033 adrp x19, 64000 <__func__.3216+0x18e>
5ecf4: 91170e73 add x19, x19, #0x5c3
5ecf8: 17ffffee b 5ecb0 <backtrace+0x5c>
5ecfc: f9400680 ldr x0, [x20, #8]
5ed00: eb0002df cmp x22, x0
5ed04: 540000a0 b.eq 5ed18 <backtrace+0xc4> // b.none
5ed08: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5ed0c: aa1403e1 mov x1, x20
5ed10: 91188c00 add x0, x0, #0x623
5ed14: 17ffffee b 5eccc <backtrace+0x78>
5ed18: 52800036 mov w22, #0x1 // #1
5ed1c: d0000037 adrp x23, 64000 <__func__.3216+0x18e>
5ed20: 91195ef7 add x23, x23, #0x657
5ed24: aa1303e2 mov x2, x19
5ed28: aa1703e0 mov x0, x23
5ed2c: 90000003 adrp x3, 5e000 <psci_setup+0x9c>
5ed30: 52800001 mov w1, #0x0 // #0
5ed34: 91315063 add x3, x3, #0xc54
5ed38: 94000cb4 bl 62008 <printf>
5ed3c: aa1403e0 mov x0, x20
5ed40: 97ffffb0 bl 5ec00 <is_valid_object.constprop.0>
5ed44: 72001c1f tst w0, #0xff
5ed48: 54fffc40 b.eq 5ecd0 <backtrace+0x7c> // b.none
5ed4c: f9400683 ldr x3, [x20, #8]
5ed50: f1001063 subs x3, x3, #0x4
5ed54: 54fffbe0 b.eq 5ecd0 <backtrace+0x7c> // b.none
5ed58: f240047f tst x3, #0x3
5ed5c: 54fffba1 b.ne 5ecd0 <backtrace+0x7c> // b.any
5ed60: aa0303e0 mov x0, x3
5ed64: 97ffff97 bl 5ebc0 <is_address_readable>
5ed68: 72001c1f tst w0, #0xff
5ed6c: 54fffb20 b.eq 5ecd0 <backtrace+0x7c> // b.none
5ed70: 2a1603e1 mov w1, w22
5ed74: aa1303e2 mov x2, x19
5ed78: aa1703e0 mov x0, x23
5ed7c: 110006d6 add w22, w22, #0x1
5ed80: 94000ca2 bl 62008 <printf>
5ed84: 710052df cmp w22, #0x14
5ed88: f9400294 ldr x20, [x20]
5ed8c: 54fffd81 b.ne 5ed3c <backtrace+0xe8> // b.any
5ed90: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5ed94: 91199800 add x0, x0, #0x666
5ed98: 94000c9c bl 62008 <printf>
5ed9c: 17ffffcd b 5ecd0 <backtrace+0x7c>
000000000005eda0 <bl31_params_parse_helper>:
5eda0: a9bd7bfd stp x29, x30, [sp, #-48]!
5eda4: 910003fd mov x29, sp
5eda8: a90153f3 stp x19, x20, [sp, #16]
5edac: aa0003f3 mov x19, x0
5edb0: aa0103f4 mov x20, x1
5edb4: f90013f5 str x21, [sp, #32]
5edb8: aa0203f5 mov x21, x2
5edbc: 39400400 ldrb w0, [x0, #1]
5edc0: 7100041f cmp w0, #0x1
5edc4: 54000301 b.ne 5ee24 <bl31_params_parse_helper+0x84> // b.any
5edc8: 39400260 ldrb w0, [x19]
5edcc: 71000c1f cmp w0, #0x3
5edd0: 540000e0 b.eq 5edec <bl31_params_parse_helper+0x4c> // b.none
5edd4: d0000022 adrp x2, 64000 <__func__.3216+0x18e>
5edd8: 911c2042 add x2, x2, #0x708
5eddc: 52802761 mov w1, #0x13b // #315
5ede0: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5ede4: 911ae800 add x0, x0, #0x6ba
5ede8: 94000b11 bl 61a2c <__assert>
5edec: b40000a1 cbz x1, 5ee00 <bl31_params_parse_helper+0x60>
5edf0: aa0103e0 mov x0, x1
5edf4: d2800b02 mov x2, #0x58 // #88
5edf8: f9400a61 ldr x1, [x19, #16]
5edfc: 94000b31 bl 61ac0 <memcpy>
5ee00: b40000b5 cbz x21, 5ee14 <bl31_params_parse_helper+0x74>
5ee04: f9401261 ldr x1, [x19, #32]
5ee08: aa1503e0 mov x0, x21
5ee0c: d2800b02 mov x2, #0x58 // #88
5ee10: 94000b2c bl 61ac0 <memcpy>
5ee14: a94153f3 ldp x19, x20, [sp, #16]
5ee18: f94013f5 ldr x21, [sp, #32]
5ee1c: a8c37bfd ldp x29, x30, [sp], #48
5ee20: d65f03c0 ret
5ee24: 7100081f cmp w0, #0x2
5ee28: 540000a0 b.eq 5ee3c <bl31_params_parse_helper+0x9c> // b.none
5ee2c: d0000022 adrp x2, 64000 <__func__.3216+0x18e>
5ee30: 52802881 mov w1, #0x144 // #324
5ee34: 911c8442 add x2, x2, #0x721
5ee38: 17ffffea b 5ede0 <bl31_params_parse_helper+0x40>
5ee3c: 39400260 ldrb w0, [x19]
5ee40: 7100141f cmp w0, #0x5
5ee44: 540000a0 b.eq 5ee58 <bl31_params_parse_helper+0xb8> // b.none
5ee48: d0000022 adrp x2, 64000 <__func__.3216+0x18e>
5ee4c: 528028a1 mov w1, #0x145 // #325
5ee50: 911d0842 add x2, x2, #0x742
5ee54: 17ffffe3 b 5ede0 <bl31_params_parse_helper+0x40>
5ee58: f9400673 ldr x19, [x19, #8]
5ee5c: b4fffdd3 cbz x19, 5ee14 <bl31_params_parse_helper+0x74>
5ee60: b9400260 ldr w0, [x19]
5ee64: 7100101f cmp w0, #0x4
5ee68: 54000101 b.ne 5ee88 <bl31_params_parse_helper+0xe8> // b.any
5ee6c: b40000b4 cbz x20, 5ee80 <bl31_params_parse_helper+0xe0>
5ee70: f9400a61 ldr x1, [x19, #16]
5ee74: aa1403e0 mov x0, x20
5ee78: d2800b02 mov x2, #0x58 // #88
5ee7c: 94000b11 bl 61ac0 <memcpy>
5ee80: f9400e73 ldr x19, [x19, #24]
5ee84: 17fffff6 b 5ee5c <bl31_params_parse_helper+0xbc>
5ee88: 7100141f cmp w0, #0x5
5ee8c: 54ffffa1 b.ne 5ee80 <bl31_params_parse_helper+0xe0> // b.any
5ee90: b4ffff95 cbz x21, 5ee80 <bl31_params_parse_helper+0xe0>
5ee94: aa1503e0 mov x0, x21
5ee98: d2800b02 mov x2, #0x58 // #88
5ee9c: f9400a61 ldr x1, [x19, #16]
5eea0: 17fffff7 b 5ee7c <bl31_params_parse_helper+0xdc>
000000000005eea4 <bl_aux_params_parse>:
5eea4: a9bd7bfd stp x29, x30, [sp, #-48]!
5eea8: 910003fd mov x29, sp
5eeac: a90153f3 stp x19, x20, [sp, #16]
5eeb0: aa0103f4 mov x20, x1
5eeb4: aa0003f3 mov x19, x0
5eeb8: f90013f5 str x21, [sp, #32]
5eebc: d0000035 adrp x21, 64000 <__func__.3216+0x18e>
5eec0: 911d82b5 add x21, x21, #0x760
5eec4: b50000b3 cbnz x19, 5eed8 <bl_aux_params_parse+0x34>
5eec8: a94153f3 ldp x19, x20, [sp, #16]
5eecc: f94013f5 ldr x21, [sp, #32]
5eed0: a8c37bfd ldp x29, x30, [sp], #48
5eed4: d65f03c0 ret
5eed8: b50000d4 cbnz x20, 5eef0 <bl_aux_params_parse+0x4c>
5eedc: f9400261 ldr x1, [x19]
5eee0: aa1503e0 mov x0, x21
5eee4: 97fffe68 bl 5e884 <tf_log>
5eee8: f9400673 ldr x19, [x19, #8]
5eeec: 17fffff6 b 5eec4 <bl_aux_params_parse+0x20>
5eef0: aa1303e0 mov x0, x19
5eef4: d63f0280 blr x20
5eef8: 72001c1f tst w0, #0xff
5eefc: 54ffff00 b.eq 5eedc <bl_aux_params_parse+0x38> // b.none
5ef00: 17fffffa b 5eee8 <bl_aux_params_parse+0x44>
000000000005ef04 <init_xlation_table_inner>:
5ef04: a9b87bfd stp x29, x30, [sp, #-128]!
5ef08: 71000c7f cmp w3, #0x3
5ef0c: 910003fd mov x29, sp
5ef10: a90153f3 stp x19, x20, [sp, #16]
5ef14: a9025bf5 stp x21, x22, [sp, #32]
5ef18: a90363f7 stp x23, x24, [sp, #48]
5ef1c: a9046bf9 stp x25, x26, [sp, #64]
5ef20: a90573fb stp x27, x28, [sp, #80]
5ef24: 540000e9 b.ls 5ef40 <init_xlation_table_inner+0x3c> // b.plast
5ef28: d0000022 adrp x2, 64000 <__func__.3216+0x18e>
5ef2c: 911ed842 add x2, x2, #0x7b6
5ef30: 52802921 mov w1, #0x149 // #329
5ef34: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5ef38: 911fe400 add x0, x0, #0x7f9
5ef3c: 94000abc bl 61a2c <__assert>
5ef40: aa0103fc mov x28, x1
5ef44: 0b030c61 add w1, w3, w3, lsl #3
5ef48: 528004f8 mov w24, #0x27 // #39
5ef4c: 4b010301 sub w1, w24, w1
5ef50: d2800039 mov x25, #0x1 // #1
5ef54: aa0003f3 mov x19, x0
5ef58: d2803ff8 mov x24, #0x1ff // #511
5ef5c: 9ac12320 lsl x0, x25, x1
5ef60: 2a0303fb mov w27, w3
5ef64: 9ac12318 lsl x24, x24, x1
5ef68: aa0203f5 mov x21, x2
5ef6c: f90033e0 str x0, [sp, #96]
5ef70: d0000020 adrp x0, 64000 <__func__.3216+0x18e>
5ef74: 91207800 add x0, x0, #0x81e
5ef78: 94000c24 bl 62008 <printf>
5ef7c: 92800016 mov x22, #0xffffffffffffffff // #-1
5ef80: 12800101 mov w1, #0xfffffff7 // #-9
5ef84: 71000f7f cmp w27, #0x3
5ef88: d2800077 mov x23, #0x3 // #3
5ef8c: b000003a adrp x26, 63000 <CSWTCH.22+0x37e>
5ef90: 1b017f61 mul w1, w27, w1
5ef94: 9a9902f7 csel x23, x23, x25, eq // eq = none
5ef98: 911f775a add x26, x26, #0x7dd
5ef9c: d0000039 adrp x25, 64000 <__func__.3216+0x18e>
5efa0: 11009c21 add w1, w1, #0x27
5efa4: 9120bf39 add x25, x25, #0x82f
5efa8: 9ac122d6 lsl x22, x22, x1
5efac: aa3603e0 mvn x0, x22
5efb0: aa1303f6 mov x22, x19
5efb4: f90037e0 str x0, [sp, #104]
5efb8: b27602e0 orr x0, x23, #0x400
5efbc: f9003be0 str x0, [sp, #112]
5efc0: f9400ad3 ldr x19, [x22, #16]
5efc4: b40002d3 cbz x19, 5f01c <init_xlation_table_inner+0x118>
5efc8: f94006c0 ldr x0, [x22, #8]
5efcc: 8b000273 add x19, x19, x0
5efd0: d1000673 sub x19, x19, #0x1
5efd4: eb1c027f cmp x19, x28
5efd8: 54000202 b.cs 5f018 <init_xlation_table_inner+0x114> // b.hs, b.nlast
5efdc: 910082d6 add x22, x22, #0x20
5efe0: ea18039f tst x28, x24
5efe4: 540000a0 b.eq 5eff8 <init_xlation_table_inner+0xf4> // b.none
5efe8: d1000781 sub x1, x28, #0x1
5efec: b27f7be0 mov x0, #0xfffffffe // #4294967294
5eff0: eb00003f cmp x1, x0
5eff4: 54fffe69 b.ls 5efc0 <init_xlation_table_inner+0xbc> // b.plast
5eff8: aa1603e0 mov x0, x22
5effc: a94153f3 ldp x19, x20, [sp, #16]
5f000: a9425bf5 ldp x21, x22, [sp, #32]
5f004: a94363f7 ldp x23, x24, [sp, #48]
5f008: a9446bf9 ldp x25, x26, [sp, #64]
5f00c: a94573fb ldp x27, x28, [sp, #80]
5f010: a8c87bfd ldp x29, x30, [sp], #128
5f014: d65f03c0 ret
5f018: 92800013 mov x19, #0xffffffffffffffff // #-1
5f01c: 3400057b cbz w27, 5f0c8 <init_xlation_table_inner+0x1c4>
5f020: 7100077f cmp w27, #0x1
5f024: 54000580 b.eq 5f0d4 <init_xlation_table_inner+0x1d0> // b.none
5f028: 71000b7f cmp w27, #0x2
5f02c: b0000020 adrp x0, 64000 <__func__.3216+0x18e>
5f030: b0000021 adrp x1, 64000 <__func__.3216+0x18e>
5f034: 911e2c00 add x0, x0, #0x78b
5f038: 911e3421 add x1, x1, #0x78d
5f03c: 9a800021 csel x1, x1, x0, eq // eq = none
5f040: f94033e3 ldr x3, [sp, #96]
5f044: aa1c03e2 mov x2, x28
5f048: aa1903e0 mov x0, x25
5f04c: 94000bef bl 62008 <printf>
5f050: f94033e0 ldr x0, [sp, #96]
5f054: f94006c8 ldr x8, [x22, #8]
5f058: 8b000397 add x23, x28, x0
5f05c: d10006e3 sub x3, x23, #0x1
5f060: eb03011f cmp x8, x3
5f064: 54001128 b.hi 5f288 <init_xlation_table_inner+0x384> // b.pmore
5f068: 34000adb cbz w27, 5f1c0 <init_xlation_table_inner+0x2bc>
5f06c: aa1603e1 mov x1, x22
5f070: 12800002 mov w2, #0xffffffff // #-1
5f074: f9400820 ldr x0, [x1, #16]
5f078: b4000340 cbz x0, 5f0e0 <init_xlation_table_inner+0x1dc>
5f07c: f9400427 ldr x7, [x1, #8]
5f080: eb07007f cmp x3, x7
5f084: 540002e3 b.cc 5f0e0 <init_xlation_table_inner+0x1dc> // b.lo, b.ul, b.last
5f088: 8b070000 add x0, x0, x7
5f08c: d1000400 sub x0, x0, #0x1
5f090: eb00039f cmp x28, x0
5f094: 54000168 b.hi 5f0c0 <init_xlation_table_inner+0x1bc> // b.pmore
5f098: 35000082 cbnz w2, 5f0a8 <init_xlation_table_inner+0x1a4>
5f09c: b9401829 ldr w9, [x1, #24]
5f0a0: 6b14013f cmp w9, w20
5f0a4: 540000e0 b.eq 5f0c0 <init_xlation_table_inner+0x1bc> // b.none
5f0a8: eb07039f cmp x28, x7
5f0ac: 540008a3 b.cc 5f1c0 <init_xlation_table_inner+0x2bc> // b.lo, b.ul, b.last
5f0b0: eb00007f cmp x3, x0
5f0b4: 54000868 b.hi 5f1c0 <init_xlation_table_inner+0x2bc> // b.pmore
5f0b8: b9401834 ldr w20, [x1, #24]
5f0bc: 52800002 mov w2, #0x0 // #0
5f0c0: 91008021 add x1, x1, #0x20
5f0c4: 17ffffec b 5f074 <init_xlation_table_inner+0x170>
5f0c8: 90000021 adrp x1, 63000 <CSWTCH.22+0x37e>
5f0cc: 911f7821 add x1, x1, #0x7de
5f0d0: 17ffffdc b 5f040 <init_xlation_table_inner+0x13c>
5f0d4: b0000021 adrp x1, 64000 <__func__.3216+0x18e>
5f0d8: 911e3c21 add x1, x1, #0x78f
5f0dc: 17ffffd9 b 5f040 <init_xlation_table_inner+0x13c>
5f0e0: 35000702 cbnz w2, 5f1c0 <init_xlation_table_inner+0x2bc>
5f0e4: f94002c0 ldr x0, [x22]
5f0e8: f94037e1 ldr x1, [sp, #104]
5f0ec: 8b000380 add x0, x28, x0
5f0f0: cb080000 sub x0, x0, x8
5f0f4: ea01001f tst x0, x1
5f0f8: 540000a0 b.eq 5f10c <init_xlation_table_inner+0x208> // b.none
5f0fc: b0000022 adrp x2, 64000 <__func__.3216+0x18e>
5f100: 52801881 mov w1, #0xc4 // #196
5f104: 91211442 add x2, x2, #0x845
5f108: 17ffff8b b 5ef34 <init_xlation_table_inner+0x30>
5f10c: d37f7e93 ubfiz x19, x20, #1, #32
5f110: d0000063 adrp x3, 6d000 <dist_ctx+0x1e50>
5f114: 927b0273 and x19, x19, #0x20
5f118: 721d0282 ands w2, w20, #0x8
5f11c: aa000260 orr x0, x19, x0
5f120: d2801013 mov x19, #0x80 // #128
5f124: 9a9313e1 csel x1, xzr, x19, ne // ne = any
5f128: f9450473 ldr x19, [x3, #2568]
5f12c: f9403be3 ldr x3, [sp, #112]
5f130: aa130073 orr x19, x3, x19
5f134: aa000273 orr x19, x19, x0
5f138: 72000a80 ands w0, w20, #0x7
5f13c: aa010273 orr x19, x19, x1
5f140: 54000601 b.ne 5f200 <init_xlation_table_inner+0x2fc> // b.any
5f144: d0000060 adrp x0, 6d000 <dist_ctx+0x1e50>
5f148: f9450800 ldr x0, [x0, #2576]
5f14c: aa000273 orr x19, x19, x0
5f150: d2804080 mov x0, #0x204 // #516
5f154: aa000273 orr x19, x19, x0
5f158: b0000020 adrp x0, 64000 <__func__.3216+0x18e>
5f15c: 911e4800 add x0, x0, #0x792
5f160: b9007fe2 str w2, [sp, #124]
5f164: 94000ba9 bl 62008 <printf>
5f168: b9407fe2 ldr w2, [sp, #124]
5f16c: b0000021 adrp x1, 64000 <__func__.3216+0x18e>
5f170: 911e8421 add x1, x1, #0x7a1
5f174: b0000020 adrp x0, 64000 <__func__.3216+0x18e>
5f178: 7100005f cmp w2, #0x0
5f17c: 911e7400 add x0, x0, #0x79d
5f180: 9a811000 csel x0, x0, x1, ne // ne = any
5f184: 94000ba1 bl 62008 <printf>
5f188: f27c029f tst x20, #0x10
5f18c: b0000021 adrp x1, 64000 <__func__.3216+0x18e>
5f190: 911ea421 add x1, x1, #0x7a9
5f194: b0000020 adrp x0, 64000 <__func__.3216+0x18e>
5f198: 911e9400 add x0, x0, #0x7a5
5f19c: 9a811000 csel x0, x0, x1, ne // ne = any
5f1a0: 94000b9a bl 62008 <printf>
5f1a4: f27b029f tst x20, #0x20
5f1a8: b0000021 adrp x1, 64000 <__func__.3216+0x18e>
5f1ac: 911ec021 add x1, x1, #0x7b0
5f1b0: b0000020 adrp x0, 64000 <__func__.3216+0x18e>
5f1b4: 911eb000 add x0, x0, #0x7ac
5f1b8: 9a811000 csel x0, x0, x1, ne // ne = any
5f1bc: 94000b93 bl 62008 <printf>
5f1c0: b100067f cmn x19, #0x1
5f1c4: 54000581 b.ne 5f274 <init_xlation_table_inner+0x370> // b.any
5f1c8: f0000063 adrp x3, 6e000 <iomux_status+0x2c>
5f1cc: f0000101 adrp x1, 82000 <xlat_tables>
5f1d0: 91000021 add x1, x1, #0x0
5f1d4: b94c8460 ldr w0, [x3, #3204]
5f1d8: d3747c02 ubfiz x2, x0, #12, #32
5f1dc: 11000400 add w0, w0, #0x1
5f1e0: b90c8460 str w0, [x3, #3204]
5f1e4: 8b010042 add x2, x2, x1
5f1e8: 7100501f cmp w0, #0x14
5f1ec: 54000389 b.ls 5f25c <init_xlation_table_inner+0x358> // b.plast
5f1f0: b0000022 adrp x2, 64000 <__func__.3216+0x18e>
5f1f4: 52802fa1 mov w1, #0x17d // #381
5f1f8: 91222c42 add x2, x2, #0x88b
5f1fc: 17ffff4e b 5ef34 <init_xlation_table_inner+0x30>
5f200: 52800501 mov w1, #0x28 // #40
5f204: 6a01029f tst w20, w1
5f208: 54000080 b.eq 5f218 <init_xlation_table_inner+0x314> // b.none
5f20c: d0000061 adrp x1, 6d000 <dist_ctx+0x1e50>
5f210: f9450821 ldr x1, [x1, #2576]
5f214: aa010273 orr x19, x19, x1
5f218: 7100081f cmp w0, #0x2
5f21c: 540000a1 b.ne 5f230 <init_xlation_table_inner+0x32c> // b.any
5f220: b0000020 adrp x0, 64000 <__func__.3216+0x18e>
5f224: b2780673 orr x19, x19, #0x300
5f228: 911e5800 add x0, x0, #0x796
5f22c: 17ffffcd b 5f160 <init_xlation_table_inner+0x25c>
5f230: 7100041f cmp w0, #0x1
5f234: 540000a0 b.eq 5f248 <init_xlation_table_inner+0x344> // b.none
5f238: b0000022 adrp x2, 64000 <__func__.3216+0x18e>
5f23c: 52802021 mov w1, #0x101 // #257
5f240: 9121b842 add x2, x2, #0x86e
5f244: 17ffff3c b 5ef34 <init_xlation_table_inner+0x30>
5f248: d2804100 mov x0, #0x208 // #520
5f24c: aa000273 orr x19, x19, x0
5f250: b0000020 adrp x0, 64000 <__func__.3216+0x18e>
5f254: 911e6800 add x0, x0, #0x79a
5f258: 17ffffc2 b 5f160 <init_xlation_table_inner+0x25c>
5f25c: aa1603e0 mov x0, x22
5f260: b2400453 orr x19, x2, #0x3
5f264: 11000763 add w3, w27, #0x1
5f268: aa1c03e1 mov x1, x28
5f26c: 97ffff26 bl 5ef04 <init_xlation_table_inner>
5f270: aa0003f6 mov x22, x0
5f274: aa1a03e0 mov x0, x26
5f278: aa1703fc mov x28, x23
5f27c: 94000b63 bl 62008 <printf>
5f280: f80086b3 str x19, [x21], #8
5f284: 17ffff57 b 5efe0 <init_xlation_table_inner+0xdc>
5f288: d2800013 mov x19, #0x0 // #0
5f28c: 17fffffa b 5f274 <init_xlation_table_inner+0x370>
000000000005f290 <print_mmap>:
5f290: a9be7bfd stp x29, x30, [sp, #-32]!
5f294: b0000020 adrp x0, 64000 <__func__.3216+0x18e>
5f298: 9122a000 add x0, x0, #0x8a8
5f29c: 910003fd mov x29, sp
5f2a0: a90153f3 stp x19, x20, [sp, #16]
5f2a4: d0000073 adrp x19, 6d000 <dist_ctx+0x1e50>
5f2a8: b0000034 adrp x20, 64000 <__func__.3216+0x18e>
5f2ac: 91286273 add x19, x19, #0xa18
5f2b0: 9122be94 add x20, x20, #0x8af
5f2b4: 94000b55 bl 62008 <printf>
5f2b8: f9400a63 ldr x3, [x19, #16]
5f2bc: b50000c3 cbnz x3, 5f2d4 <print_mmap+0x44>
5f2c0: a94153f3 ldp x19, x20, [sp, #16]
5f2c4: 90000020 adrp x0, 63000 <CSWTCH.22+0x37e>
5f2c8: a8c27bfd ldp x29, x30, [sp], #32
5f2cc: 911f7400 add x0, x0, #0x7dd
5f2d0: 14000b4e b 62008 <printf>
5f2d4: a9400662 ldp x2, x1, [x19]
5f2d8: aa1403e0 mov x0, x20
5f2dc: b9401a64 ldr w4, [x19, #24]
5f2e0: 91008273 add x19, x19, #0x20
5f2e4: 94000b49 bl 62008 <printf>
5f2e8: 17fffff4 b 5f2b8 <print_mmap+0x28>
000000000005f2ec <mmap_add_region>:
5f2ec: a9bb7bfd stp x29, x30, [sp, #-80]!
5f2f0: f2402c1f tst x0, #0xfff
5f2f4: 910003fd mov x29, sp
5f2f8: a90153f3 stp x19, x20, [sp, #16]
5f2fc: a9025bf5 stp x21, x22, [sp, #32]
5f300: a90363f7 stp x23, x24, [sp, #48]
5f304: a9046bf9 stp x25, x26, [sp, #64]
5f308: 540000e0 b.eq 5f324 <mmap_add_region+0x38> // b.none
5f30c: b0000022 adrp x2, 64000 <__func__.3216+0x18e>
5f310: 91236442 add x2, x2, #0x8d9
5f314: 52800a21 mov w1, #0x51 // #81
5f318: b0000020 adrp x0, 64000 <__func__.3216+0x18e>
5f31c: 911fe400 add x0, x0, #0x7f9
5f320: 940009c3 bl 61a2c <__assert>
5f324: aa0103f3 mov x19, x1
5f328: f2402c3f tst x1, #0xfff
5f32c: 540000a0 b.eq 5f340 <mmap_add_region+0x54> // b.none
5f330: b0000022 adrp x2, 64000 <__func__.3216+0x18e>
5f334: 52800a41 mov w1, #0x52 // #82
5f338: 9123c842 add x2, x2, #0x8f2
5f33c: 17fffff7 b 5f318 <mmap_add_region+0x2c>
5f340: aa0203f5 mov x21, x2
5f344: f2402c5f tst x2, #0xfff
5f348: 540000a0 b.eq 5f35c <mmap_add_region+0x70> // b.none
5f34c: b0000022 adrp x2, 64000 <__func__.3216+0x18e>
5f350: 52800a61 mov w1, #0x53 // #83
5f354: 91242c42 add x2, x2, #0x90b
5f358: 17fffff0 b 5f318 <mmap_add_region+0x2c>
5f35c: b4000fc2 cbz x2, 5f554 <mmap_add_region+0x268>
5f360: d1000458 sub x24, x2, #0x1
5f364: aa0003f6 mov x22, x0
5f368: 8b000318 add x24, x24, x0
5f36c: eb18001f cmp x0, x24
5f370: 540000a3 b.cc 5f384 <mmap_add_region+0x98> // b.lo, b.ul, b.last
5f374: b0000022 adrp x2, 64000 <__func__.3216+0x18e>
5f378: 52800b01 mov w1, #0x58 // #88
5f37c: 91248442 add x2, x2, #0x921
5f380: 17ffffe6 b 5f318 <mmap_add_region+0x2c>
5f384: d1000434 sub x20, x1, #0x1
5f388: 8b020294 add x20, x20, x2
5f38c: eb14003f cmp x1, x20
5f390: 540000a3 b.cc 5f3a4 <mmap_add_region+0xb8> // b.lo, b.ul, b.last
5f394: b0000022 adrp x2, 64000 <__func__.3216+0x18e>
5f398: 52800b21 mov w1, #0x59 // #89
5f39c: 9124c842 add x2, x2, #0x932
5f3a0: 17ffffde b 5f318 <mmap_add_region+0x2c>
5f3a4: b2407fe0 mov x0, #0xffffffff // #4294967295
5f3a8: eb00029f cmp x20, x0
5f3ac: 540000a9 b.ls 5f3c0 <mmap_add_region+0xd4> // b.plast
5f3b0: b0000022 adrp x2, 64000 <__func__.3216+0x18e>
5f3b4: 52800b61 mov w1, #0x5b // #91
5f3b8: 91250c42 add x2, x2, #0x943
5f3bc: 17ffffd7 b 5f318 <mmap_add_region+0x2c>
5f3c0: eb00031f cmp x24, x0
5f3c4: 54000909 b.ls 5f4e4 <mmap_add_region+0x1f8> // b.plast
5f3c8: b0000022 adrp x2, 64000 <__func__.3216+0x18e>
5f3cc: 52800ba1 mov w1, #0x5d // #93
5f3d0: 91264842 add x2, x2, #0x992
5f3d4: 17ffffd1 b 5f318 <mmap_add_region+0x2c>
5f3d8: a9400041 ldp x1, x0, [x2]
5f3dc: 8b050004 add x4, x0, x5
5f3e0: eb13001f cmp x0, x19
5f3e4: d1000484 sub x4, x4, #0x1
5f3e8: 540002a8 b.hi 5f43c <mmap_add_region+0x150> // b.pmore
5f3ec: eb04029f cmp x20, x4
5f3f0: 540002a9 b.ls 5f444 <mmap_add_region+0x158> // b.plast
5f3f4: eb13001f cmp x0, x19
5f3f8: 54000260 b.eq 5f444 <mmap_add_region+0x158> // b.none
5f3fc: eb18003f cmp x1, x24
5f400: 54000b68 b.hi 5f56c <mmap_add_region+0x280> // b.pmore
5f404: 8b050021 add x1, x1, x5
5f408: d1000421 sub x1, x1, #0x1
5f40c: eb0102df cmp x22, x1
5f410: 1a9f97e1 cset w1, hi // hi = pmore
5f414: eb14001f cmp x0, x20
5f418: 54000348 b.hi 5f480 <mmap_add_region+0x194> // b.pmore
5f41c: eb04027f cmp x19, x4
5f420: 1a9f97e0 cset w0, hi // hi = pmore
5f424: 6a01001f tst w0, w1
5f428: 54000301 b.ne 5f488 <mmap_add_region+0x19c> // b.any
5f42c: b0000022 adrp x2, 64000 <__func__.3216+0x18e>
5f430: 528010e1 mov w1, #0x87 // #135
5f434: 91290c42 add x2, x2, #0xa43
5f438: 17ffffb8 b 5f318 <mmap_add_region+0x2c>
5f43c: eb04029f cmp x20, x4
5f440: 54fffde3 b.cc 5f3fc <mmap_add_region+0x110> // b.lo, b.ul, b.last
5f444: cb010001 sub x1, x0, x1
5f448: eb03003f cmp x1, x3
5f44c: 540000a0 b.eq 5f460 <mmap_add_region+0x174> // b.none
5f450: b0000022 adrp x2, 64000 <__func__.3216+0x18e>
5f454: 52800ea1 mov w1, #0x75 // #117
5f458: 91278442 add x2, x2, #0x9e1
5f45c: 17ffffaf b 5f318 <mmap_add_region+0x2c>
5f460: eb13001f cmp x0, x19
5f464: 54000121 b.ne 5f488 <mmap_add_region+0x19c> // b.any
5f468: eb1500bf cmp x5, x21
5f46c: 540000e1 b.ne 5f488 <mmap_add_region+0x19c> // b.any
5f470: b0000022 adrp x2, 64000 <__func__.3216+0x18e>
5f474: 52800ee1 mov w1, #0x77 // #119
5f478: 91285042 add x2, x2, #0xa14
5f47c: 17ffffa7 b 5f318 <mmap_add_region+0x2c>
5f480: 52800020 mov w0, #0x1 // #1
5f484: 17ffffe8 b 5f424 <mmap_add_region+0x138>
5f488: 91008042 add x2, x2, #0x20
5f48c: f9400845 ldr x5, [x2, #16]
5f490: b5fffa45 cbnz x5, 5f3d8 <mmap_add_region+0xec>
5f494: aa1a03e1 mov x1, x26
5f498: f9400422 ldr x2, [x1, #8]
5f49c: aa0103e0 mov x0, x1
5f4a0: 91008021 add x1, x1, #0x20
5f4a4: eb13005f cmp x2, x19
5f4a8: 540002a2 b.cs 5f4fc <mmap_add_region+0x210> // b.hs, b.nlast
5f4ac: f85f0022 ldur x2, [x1, #-16]
5f4b0: b5ffff42 cbnz x2, 5f498 <mmap_add_region+0x1ac>
5f4b4: aa0003f7 mov x23, x0
5f4b8: 910c8342 add x2, x26, #0x320
5f4bc: aa1703e1 mov x1, x23
5f4c0: cb170042 sub x2, x2, x23
5f4c4: 910082e0 add x0, x23, #0x20
5f4c8: 94000986 bl 61ae0 <memmove>
5f4cc: f9419b40 ldr x0, [x26, #816]
5f4d0: b4000280 cbz x0, 5f520 <mmap_add_region+0x234>
5f4d4: b0000022 adrp x2, 64000 <__func__.3216+0x18e>
5f4d8: 528014a1 mov w1, #0xa5 // #165
5f4dc: 91298042 add x2, x2, #0xa60
5f4e0: 17ffff8e b 5f318 <mmap_add_region+0x2c>
5f4e4: d0000062 adrp x2, 6d000 <dist_ctx+0x1e50>
5f4e8: 91286042 add x2, x2, #0xa18
5f4ec: 2a0303f9 mov w25, w3
5f4f0: aa0203fa mov x26, x2
5f4f4: cb160023 sub x3, x1, x22
5f4f8: 17ffffe5 b 5f48c <mmap_add_region+0x1a0>
5f4fc: f9400401 ldr x1, [x0, #8]
5f500: aa0003f7 mov x23, x0
5f504: 91008000 add x0, x0, #0x20
5f508: eb13003f cmp x1, x19
5f50c: 54fffd61 b.ne 5f4b8 <mmap_add_region+0x1cc> // b.any
5f510: f85f0001 ldur x1, [x0, #-16]
5f514: eb15003f cmp x1, x21
5f518: 54ffff28 b.hi 5f4fc <mmap_add_region+0x210> // b.pmore
5f51c: 17ffffe7 b 5f4b8 <mmap_add_region+0x1cc>
5f520: d0000060 adrp x0, 6d000 <dist_ctx+0x1e50>
5f524: a9004ef6 stp x22, x19, [x23]
5f528: f946ac01 ldr x1, [x0, #3416]
5f52c: f9000af5 str x21, [x23, #16]
5f530: b9001af9 str w25, [x23, #24]
5f534: eb18003f cmp x1, x24
5f538: 54000042 b.cs 5f540 <mmap_add_region+0x254> // b.hs, b.nlast
5f53c: f906ac18 str x24, [x0, #3416]
5f540: d0000060 adrp x0, 6d000 <dist_ctx+0x1e50>
5f544: f946b001 ldr x1, [x0, #3424]
5f548: eb14003f cmp x1, x20
5f54c: 54000042 b.cs 5f554 <mmap_add_region+0x268> // b.hs, b.nlast
5f550: f906b014 str x20, [x0, #3424]
5f554: a94153f3 ldp x19, x20, [sp, #16]
5f558: a9425bf5 ldp x21, x22, [sp, #32]
5f55c: a94363f7 ldp x23, x24, [sp, #48]
5f560: a9446bf9 ldp x25, x26, [sp, #64]
5f564: a8c57bfd ldp x29, x30, [sp], #80
5f568: d65f03c0 ret
5f56c: eb14001f cmp x0, x20
5f570: 54fff8c8 b.hi 5f488 <mmap_add_region+0x19c> // b.pmore
5f574: 52800021 mov w1, #0x1 // #1
5f578: 17ffffa9 b 5f41c <mmap_add_region+0x130>
000000000005f57c <mmap_add>:
5f57c: a9be7bfd stp x29, x30, [sp, #-32]!
5f580: 910003fd mov x29, sp
5f584: f9000bf3 str x19, [sp, #16]
5f588: aa0003f3 mov x19, x0
5f58c: f9400a62 ldr x2, [x19, #16]
5f590: b9401a63 ldr w3, [x19, #24]
5f594: b50000a2 cbnz x2, 5f5a8 <mmap_add+0x2c>
5f598: 35000083 cbnz w3, 5f5a8 <mmap_add+0x2c>
5f59c: f9400bf3 ldr x19, [sp, #16]
5f5a0: a8c27bfd ldp x29, x30, [sp], #32
5f5a4: d65f03c0 ret
5f5a8: f9400661 ldr x1, [x19, #8]
5f5ac: f8420660 ldr x0, [x19], #32
5f5b0: 97ffff4f bl 5f2ec <mmap_add_region>
5f5b4: 17fffff6 b 5f58c <mmap_add+0x10>
000000000005f5b8 <init_xlation_table>:
5f5b8: a9bc7bfd stp x29, x30, [sp, #-64]!
5f5bc: 910003fd mov x29, sp
5f5c0: a90153f3 stp x19, x20, [sp, #16]
5f5c4: aa0403f4 mov x20, x4
5f5c8: a9025bf5 stp x21, x22, [sp, #32]
5f5cc: aa0303f5 mov x21, x3
5f5d0: aa0003f6 mov x22, x0
5f5d4: a90363f7 stp x23, x24, [sp, #48]
5f5d8: aa0103f7 mov x23, x1
5f5dc: 2a0203f8 mov w24, w2
5f5e0: 94000025 bl 5f674 <xlat_arch_current_el>
5f5e4: 2a0003f3 mov w19, w0
5f5e8: 94000030 bl 5f6a8 <xlat_arch_get_xn_desc>
5f5ec: d0000061 adrp x1, 6d000 <dist_ctx+0x1e50>
5f5f0: 71000e7f cmp w19, #0x3
5f5f4: f9050820 str x0, [x1, #2576]
5f5f8: d0000060 adrp x0, 6d000 <dist_ctx+0x1e50>
5f5fc: 54000281 b.ne 5f64c <init_xlation_table+0x94> // b.any
5f600: d2800801 mov x1, #0x40 // #64
5f604: f9050401 str x1, [x0, #2568]
5f608: 2a1803e3 mov w3, w24
5f60c: aa1703e2 mov x2, x23
5f610: aa1603e1 mov x1, x22
5f614: d0000060 adrp x0, 6d000 <dist_ctx+0x1e50>
5f618: 91286000 add x0, x0, #0xa18
5f61c: 97fffe3a bl 5ef04 <init_xlation_table_inner>
5f620: d0000060 adrp x0, 6d000 <dist_ctx+0x1e50>
5f624: a94363f7 ldp x23, x24, [sp, #48]
5f628: f946b000 ldr x0, [x0, #3424]
5f62c: f90002a0 str x0, [x21]
5f630: d0000060 adrp x0, 6d000 <dist_ctx+0x1e50>
5f634: a9425bf5 ldp x21, x22, [sp, #32]
5f638: f946ac00 ldr x0, [x0, #3416]
5f63c: f9000280 str x0, [x20]
5f640: a94153f3 ldp x19, x20, [sp, #16]
5f644: a8c47bfd ldp x29, x30, [sp], #64
5f648: d65f03c0 ret
5f64c: 7100067f cmp w19, #0x1
5f650: 540000e0 b.eq 5f66c <init_xlation_table+0xb4> // b.none
5f654: b0000022 adrp x2, 64000 <__func__.3216+0x18e>
5f658: b0000020 adrp x0, 64000 <__func__.3216+0x18e>
5f65c: 9129d042 add x2, x2, #0xa74
5f660: 911fe400 add x0, x0, #0x7f9
5f664: 52803341 mov w1, #0x19a // #410
5f668: 940008f1 bl 61a2c <__assert>
5f66c: f905041f str xzr, [x0, #2568]
5f670: 17ffffe6 b 5f608 <init_xlation_table+0x50>
000000000005f674 <xlat_arch_current_el>:
5f674: d5384241 mrs x1, currentel
5f678: 53020c20 ubfx w0, w1, #2, #2
5f67c: 721e043f tst w1, #0xc
5f680: 54000121 b.ne 5f6a4 <xlat_arch_current_el+0x30> // b.any
5f684: a9bf7bfd stp x29, x30, [sp, #-16]!
5f688: b0000022 adrp x2, 64000 <__func__.3216+0x18e>
5f68c: b0000020 adrp x0, 64000 <__func__.3216+0x18e>
5f690: 910003fd mov x29, sp
5f694: 9129f442 add x2, x2, #0xa7d
5f698: 912a1400 add x0, x0, #0xa85
5f69c: 52800ce1 mov w1, #0x67 // #103
5f6a0: 940008e3 bl 61a2c <__assert>
5f6a4: d65f03c0 ret
000000000005f6a8 <xlat_arch_get_xn_desc>:
5f6a8: 71000c1f cmp w0, #0x3
5f6ac: 540001a0 b.eq 5f6e0 <xlat_arch_get_xn_desc+0x38> // b.none
5f6b0: 2a0003e1 mov w1, w0
5f6b4: d2e00400 mov x0, #0x20000000000000 // #9007199254740992
5f6b8: 7100043f cmp w1, #0x1
5f6bc: 54000140 b.eq 5f6e4 <xlat_arch_get_xn_desc+0x3c> // b.none
5f6c0: a9bf7bfd stp x29, x30, [sp, #-16]!
5f6c4: b0000022 adrp x2, 64000 <__func__.3216+0x18e>
5f6c8: b0000020 adrp x0, 64000 <__func__.3216+0x18e>
5f6cc: 910003fd mov x29, sp
5f6d0: 9129d042 add x2, x2, #0xa74
5f6d4: 912a1400 add x0, x0, #0xa85
5f6d8: 52800e21 mov w1, #0x71 // #113
5f6dc: 940008d4 bl 61a2c <__assert>
5f6e0: d2e00800 mov x0, #0x40000000000000 // #18014398509481984
5f6e4: d65f03c0 ret
000000000005f6e8 <init_xlat_tables>:
5f6e8: a9be7bfd stp x29, x30, [sp, #-32]!
5f6ec: 910003fd mov x29, sp
5f6f0: d5380740 mrs x0, id_aa64mmfr2_el1
5f6f4: 97fffee7 bl 5f290 <print_mmap>
5f6f8: d2800000 mov x0, #0x0 // #0
5f6fc: 910043e4 add x4, sp, #0x10
5f700: 910063e3 add x3, sp, #0x18
5f704: 52800022 mov w2, #0x1 // #1
5f708: f0000041 adrp x1, 6a000 <__STACKS_START__+0x2f80>
5f70c: 910e0021 add x1, x1, #0x380
5f710: 97ffffaa bl 5f5b8 <init_xlation_table>
5f714: f9400fe1 ldr x1, [sp, #24]
5f718: b2407fe0 mov x0, #0xffffffff // #4294967295
5f71c: eb00003f cmp x1, x0
5f720: 540000e9 b.ls 5f73c <init_xlat_tables+0x54> // b.plast
5f724: b0000022 adrp x2, 64000 <__func__.3216+0x18e>
5f728: 912aac42 add x2, x2, #0xaab
5f72c: 52801081 mov w1, #0x84 // #132
5f730: b0000020 adrp x0, 64000 <__func__.3216+0x18e>
5f734: 912a1400 add x0, x0, #0xa85
5f738: 940008bd bl 61a2c <__assert>
5f73c: f9400be1 ldr x1, [sp, #16]
5f740: eb00003f cmp x1, x0
5f744: 540000a9 b.ls 5f758 <init_xlat_tables+0x70> // b.plast
5f748: b0000022 adrp x2, 64000 <__func__.3216+0x18e>
5f74c: 528010a1 mov w1, #0x85 // #133
5f750: 912b5842 add x2, x2, #0xad6
5f754: 17fffff7 b 5f730 <init_xlat_tables+0x48>
5f758: d5380700 mrs x0, id_aa64mmfr0_el1
5f75c: 92400c00 and x0, x0, #0xf
5f760: f100181f cmp x0, #0x6
5f764: 540000a9 b.ls 5f778 <init_xlat_tables+0x90> // b.plast
5f768: b0000022 adrp x2, 64000 <__func__.3216+0x18e>
5f76c: 528009c1 mov w1, #0x4e // #78
5f770: 912c0042 add x2, x2, #0xb00
5f774: 17ffffef b 5f730 <init_xlat_tables+0x48>
5f778: f0000001 adrp x1, 62000 <vprintf+0x400>
5f77c: 91178021 add x1, x1, #0x5e0
5f780: b8607821 ldr w1, [x1, x0, lsl #2]
5f784: d2800020 mov x0, #0x1 // #1
5f788: 9ac12000 lsl x0, x0, x1
5f78c: d1000400 sub x0, x0, #0x1
5f790: b27f7be1 mov x1, #0xfffffffe // #4294967294
5f794: eb01001f cmp x0, x1
5f798: 540000a8 b.hi 5f7ac <init_xlat_tables+0xc4> // b.pmore
5f79c: b0000022 adrp x2, 64000 <__func__.3216+0x18e>
5f7a0: 528010c1 mov w1, #0x86 // #134
5f7a4: 912ca442 add x2, x2, #0xb29
5f7a8: 17ffffe2 b 5f730 <init_xlat_tables+0x48>
5f7ac: d0000060 adrp x0, 6d000 <dist_ctx+0x1e50>
5f7b0: f906b41f str xzr, [x0, #3432]
5f7b4: a8c27bfd ldp x29, x30, [sp], #32
5f7b8: d65f03c0 ret
000000000005f7bc <enable_mmu_el3>:
5f7bc: a9bf7bfd stp x29, x30, [sp, #-16]!
5f7c0: 910003fd mov x29, sp
5f7c4: d5384241 mrs x1, currentel
5f7c8: d3420c21 ubfx x1, x1, #2, #2
5f7cc: f1000c3f cmp x1, #0x3
5f7d0: 540000e0 b.eq 5f7ec <enable_mmu_el3+0x30> // b.none
5f7d4: b0000022 adrp x2, 64000 <__func__.3216+0x18e>
5f7d8: 912d8c42 add x2, x2, #0xb63
5f7dc: b0000020 adrp x0, 64000 <__func__.3216+0x18e>
5f7e0: 52801c21 mov w1, #0xe1 // #225
5f7e4: 912a1400 add x0, x0, #0xa85
5f7e8: 94000891 bl 61a2c <__assert>
5f7ec: d53e1001 mrs x1, sctlr_el3
5f7f0: 36000081 tbz w1, #0, 5f800 <enable_mmu_el3+0x44>
5f7f4: b0000022 adrp x2, 64000 <__func__.3216+0x18e>
5f7f8: 912dbc42 add x2, x2, #0xb6f
5f7fc: 17fffff8 b 5f7dc <enable_mmu_el3+0x20>
5f800: d2809fe1 mov x1, #0x4ff // #1279
5f804: f2a00881 movk x1, #0x44, lsl #16
5f808: d51ea201 msr mair_el3, x1
5f80c: d50e871f tlbi alle3
5f810: d2800401 mov x1, #0x20 // #32
5f814: f27f001f tst x0, #0x2
5f818: d286a402 mov x2, #0x3520 // #13600
5f81c: 9a821022 csel x2, x1, x2, ne // ne = any
5f820: d0000061 adrp x1, 6d000 <dist_ctx+0x1e50>
5f824: f946b421 ldr x1, [x1, #3432]
5f828: aa014041 orr x1, x2, x1, lsl #16
5f82c: d2b01002 mov x2, #0x80800000 // #2155872256
5f830: aa020021 orr x1, x1, x2
5f834: d51e2041 msr tcr_el3, x1
5f838: f0000041 adrp x1, 6a000 <__STACKS_START__+0x2f80>
5f83c: 910e0021 add x1, x1, #0x380
5f840: d51e2001 msr ttbr0_el3, x1
5f844: d5033b9f dsb ish
5f848: d5033fdf isb
5f84c: d53e1003 mrs x3, sctlr_el3
5f850: 52800021 mov w1, #0x1 // #1
5f854: 121d7862 and w2, w3, #0xfffffffb
5f858: 72a00101 movk w1, #0x8, lsl #16
5f85c: 2a010042 orr w2, w2, w1
5f860: 11001021 add w1, w1, #0x4
5f864: f240001f tst x0, #0x1
5f868: 2a030021 orr w1, w1, w3
5f86c: 1a820020 csel w0, w1, w2, eq // eq = none
5f870: d51e1000 msr sctlr_el3, x0
5f874: d5033fdf isb
5f878: a8c17bfd ldp x29, x30, [sp], #16
5f87c: d65f03c0 ret
000000000005f880 <enable_mmu_direct_el3>:
5f880: 17ffffcf b 5f7bc <enable_mmu_el3>
000000000005f884 <plat_get_target_pwr_state>:
5f884: 35000122 cbnz w2, 5f8a8 <plat_get_target_pwr_state+0x24>
5f888: a9bf7bfd stp x29, x30, [sp, #-16]!
5f88c: b0000022 adrp x2, 64000 <__func__.3216+0x18e>
5f890: b0000020 adrp x0, 64000 <__func__.3216+0x18e>
5f894: 910003fd mov x29, sp
5f898: 912e5842 add x2, x2, #0xb96
5f89c: 912e8000 add x0, x0, #0xba0
5f8a0: 528013e1 mov w1, #0x9f // #159
5f8a4: 94000862 bl 61a2c <__assert>
5f8a8: d2800003 mov x3, #0x0 // #0
5f8ac: 52800040 mov w0, #0x2 // #2
5f8b0: 38636824 ldrb w4, [x1, x3]
5f8b4: 91000463 add x3, x3, #0x1
5f8b8: 6b00009f cmp w4, w0
5f8bc: 1a809080 csel w0, w4, w0, ls // ls = plast
5f8c0: 6b03005f cmp w2, w3
5f8c4: 12001c00 and w0, w0, #0xff
5f8c8: 54ffff41 b.ne 5f8b0 <plat_get_target_pwr_state+0x2c> // b.any
5f8cc: d65f03c0 ret
000000000005f8d0 <console_16550_core_init>:
5f8d0: b4000340 cbz x0, 5f938 <init_fail>
5f8d4: 34000321 cbz w1, 5f938 <init_fail>
5f8d8: 34000302 cbz w2, 5f938 <init_fail>
5f8dc: 531c6c42 lsl w2, w2, #4
5f8e0: 1ac20822 udiv w2, w1, w2
5f8e4: 12001c41 and w1, w2, #0xff
5f8e8: 53087c42 lsr w2, w2, #8
5f8ec: 12001c42 and w2, w2, #0xff
5f8f0: b9400c03 ldr w3, [x0, #12]
5f8f4: 32190063 orr w3, w3, #0x80
5f8f8: b9000c03 str w3, [x0, #12]
5f8fc: b9000001 str w1, [x0]
5f900: b9000402 str w2, [x0, #4]
5f904: 12801002 mov w2, #0xffffff7f // #-129
5f908: 0a020063 and w3, w3, w2
5f90c: b9000c03 str w3, [x0, #12]
5f910: 52800063 mov w3, #0x3 // #3
5f914: b9000c03 str w3, [x0, #12]
5f918: 52800003 mov w3, #0x0 // #0
5f91c: b9000403 str w3, [x0, #4]
5f920: 52800123 mov w3, #0x9 // #9
5f924: b9000803 str w3, [x0, #8]
5f928: 52800063 mov w3, #0x3 // #3
5f92c: b9001003 str w3, [x0, #16]
5f930: 52800020 mov w0, #0x1 // #1
5f934: d65f03c0 ret
000000000005f938 <init_fail>:
5f938: 52800000 mov w0, #0x0 // #0
5f93c: d65f03c0 ret
000000000005f940 <console_16550_register>:
5f940: aa1e03e7 mov x7, x30
5f944: aa0303e6 mov x6, x3
5f948: b4000266 cbz x6, 5f994 <register_fail>
5f94c: f90014c0 str x0, [x6, #40]
5f950: 34000061 cbz w1, 5f95c <register_16550>
5f954: 97ffffdf bl 5f8d0 <console_16550_core_init>
5f958: b40001e0 cbz x0, 5f994 <register_fail>
000000000005f95c <register_16550>:
5f95c: aa0603e0 mov x0, x6
5f960: aa0703fe mov x30, x7
5f964: 90000001 adrp x1, 5f000 <init_xlation_table_inner+0xfc>
5f968: 91279021 add x1, x1, #0x9e4
5f96c: f9000801 str x1, [x0, #16]
5f970: 90000001 adrp x1, 5f000 <init_xlation_table_inner+0xfc>
5f974: 9128b021 add x1, x1, #0xa2c
5f978: f9000c01 str x1, [x0, #24]
5f97c: 90000001 adrp x1, 5f000 <init_xlation_table_inner+0xfc>
5f980: 9129d021 add x1, x1, #0xa74
5f984: f9001001 str x1, [x0, #32]
5f988: d28000a1 mov x1, #0x5 // #5
5f98c: f9000401 str x1, [x0, #8]
5f990: 17fffc07 b 5e9ac <console_register>
000000000005f994 <register_fail>:
5f994: d65f00e0 ret x7
000000000005f998 <console_16550_core_putc>:
5f998: f100003f cmp x1, #0x0
5f99c: 54000081 b.ne 5f9ac <console_16550_core_putc+0x14> // b.any
5f9a0: 700290e0 adr x0, 64bbf <__func__.2717+0x60c>
5f9a4: d2801181 mov x1, #0x8c // #140
5f9a8: 140003a5 b 6083c <asm_assert>
5f9ac: 7100281f cmp w0, #0xa
5f9b0: 540000e1 b.ne 5f9cc <console_16550_core_putc+0x34> // b.any
5f9b4: b9401422 ldr w2, [x1, #20]
5f9b8: 121b0442 and w2, w2, #0x60
5f9bc: 7101805f cmp w2, #0x60
5f9c0: 54ffffa1 b.ne 5f9b4 <console_16550_core_putc+0x1c> // b.any
5f9c4: 528001a2 mov w2, #0xd // #13
5f9c8: b9000022 str w2, [x1]
5f9cc: b9401422 ldr w2, [x1, #20]
5f9d0: 121b0442 and w2, w2, #0x60
5f9d4: 7101805f cmp w2, #0x60
5f9d8: 54ffffa1 b.ne 5f9cc <console_16550_core_putc+0x34> // b.any
5f9dc: b9000020 str w0, [x1]
5f9e0: d65f03c0 ret
000000000005f9e4 <console_16550_putc>:
5f9e4: f100003f cmp x1, #0x0
5f9e8: 54000081 b.ne 5f9f8 <console_16550_putc+0x14> // b.any
5f9ec: 70028e80 adr x0, 64bbf <__func__.2717+0x60c>
5f9f0: d2801601 mov x1, #0xb0 // #176
5f9f4: 14000392 b 6083c <asm_assert>
5f9f8: f9401421 ldr x1, [x1, #40]
5f9fc: 17ffffe7 b 5f998 <console_16550_core_putc>
000000000005fa00 <console_16550_core_getc>:
5fa00: f100001f cmp x0, #0x0
5fa04: 54000081 b.ne 5fa14 <console_16550_core_getc+0x14> // b.any
5fa08: 70028da0 adr x0, 64bbf <__func__.2717+0x60c>
5fa0c: d2801861 mov x1, #0xc3 // #195
5fa10: 1400038b b 6083c <asm_assert>
5fa14: b9401401 ldr w1, [x0, #20]
5fa18: 36000061 tbz w1, #0, 5fa24 <no_char>
5fa1c: b9400000 ldr w0, [x0]
5fa20: d65f03c0 ret
000000000005fa24 <no_char>:
5fa24: 12800000 mov w0, #0xffffffff // #-1
5fa28: d65f03c0 ret
000000000005fa2c <console_16550_getc>:
5fa2c: f100003f cmp x1, #0x0
5fa30: 54000081 b.ne 5fa40 <console_16550_getc+0x14> // b.any
5fa34: 70028c40 adr x0, 64bbf <__func__.2717+0x60c>
5fa38: d2801ba1 mov x1, #0xdd // #221
5fa3c: 14000380 b 6083c <asm_assert>
5fa40: f9401400 ldr x0, [x0, #40]
5fa44: 17ffffef b 5fa00 <console_16550_core_getc>
000000000005fa48 <console_16550_core_flush>:
5fa48: f100001f cmp x0, #0x0
5fa4c: 54000081 b.ne 5fa5c <console_16550_core_flush+0x14> // b.any
5fa50: 70028b60 adr x0, 64bbf <__func__.2717+0x60c>
5fa54: d2801de1 mov x1, #0xef // #239
5fa58: 14000379 b 6083c <asm_assert>
5fa5c: b9401401 ldr w1, [x0, #20]
5fa60: 121b0421 and w1, w1, #0x60
5fa64: 7101803f cmp w1, #0x60
5fa68: 54ffffa1 b.ne 5fa5c <console_16550_core_flush+0x14> // b.any
5fa6c: 52800000 mov w0, #0x0 // #0
5fa70: d65f03c0 ret
000000000005fa74 <console_16550_flush>:
5fa74: f100001f cmp x0, #0x0
5fa78: 54000081 b.ne 5fa88 <console_16550_flush+0x14> // b.any
5fa7c: 70028a00 adr x0, 64bbf <__func__.2717+0x60c>
5fa80: d2802101 mov x1, #0x108 // #264
5fa84: 1400036e b 6083c <asm_assert>
5fa88: f9401400 ldr x0, [x0, #40]
5fa8c: 17ffffef b 5fa48 <console_16550_core_flush>
000000000005fa90 <cortex_a53_disable_dcache>:
5fa90: d53e1001 mrs x1, sctlr_el3
5fa94: 927df821 and x1, x1, #0xfffffffffffffffb
5fa98: d51e1001 msr sctlr_el3, x1
5fa9c: d5033fdf isb
5faa0: d65f03c0 ret
000000000005faa4 <cortex_a53_disable_smp>:
5faa4: d539f220 mrs x0, s3_1_c15_c2_1
5faa8: 9279f800 and x0, x0, #0xffffffffffffffbf
5faac: d519f220 msr s3_1_c15_c2_1, x0
5fab0: d5033fdf isb
5fab4: d5033f9f dsb sy
5fab8: d65f03c0 ret
000000000005fabc <check_errata_819472>:
5fabc: d2800021 mov x1, #0x1 // #1
5fac0: 1400029b b 6052c <cpu_rev_var_ls>
000000000005fac4 <check_errata_824069>:
5fac4: d2800041 mov x1, #0x2 // #2
5fac8: 14000299 b 6052c <cpu_rev_var_ls>
000000000005facc <check_errata_826319>:
5facc: d2800041 mov x1, #0x2 // #2
5fad0: 14000297 b 6052c <cpu_rev_var_ls>
000000000005fad4 <check_errata_827319>:
5fad4: d2800041 mov x1, #0x2 // #2
5fad8: 14000295 b 6052c <cpu_rev_var_ls>
000000000005fadc <a53_disable_non_temporal_hint>:
5fadc: aa1e03f1 mov x17, x30
5fae0: 94000006 bl 5faf8 <check_errata_disable_non_temporal_hint>
5fae4: b4000080 cbz x0, 5faf4 <a53_disable_non_temporal_hint+0x18>
5fae8: d539f201 mrs x1, s3_1_c15_c2_0
5faec: b2680021 orr x1, x1, #0x1000000
5faf0: d519f201 msr s3_1_c15_c2_0, x1
5faf4: d65f0220 ret x17
000000000005faf8 <check_errata_disable_non_temporal_hint>:
5faf8: d2800061 mov x1, #0x3 // #3
5fafc: 1400028c b 6052c <cpu_rev_var_ls>
000000000005fb00 <errata_a53_855873_wa>:
5fb00: aa1e03f1 mov x17, x30
5fb04: 94000006 bl 5fb1c <check_errata_855873>
5fb08: b4000080 cbz x0, 5fb18 <errata_a53_855873_wa+0x18>
5fb0c: d539f201 mrs x1, s3_1_c15_c2_0
5fb10: b2540021 orr x1, x1, #0x100000000000
5fb14: d519f201 msr s3_1_c15_c2_0, x1
5fb18: d65f0220 ret x17
000000000005fb1c <check_errata_855873>:
5fb1c: d2800061 mov x1, #0x3 // #3
5fb20: 14000288 b 60540 <cpu_rev_var_hs>
000000000005fb24 <check_errata_835769>:
5fb24: f100101f cmp x0, #0x4
5fb28: 540000c8 b.hi 5fb40 <errata_not_applies> // b.pmore
5fb2c: f100041f cmp x0, #0x1
5fb30: d2800020 mov x0, #0x1 // #1
5fb34: 54000089 b.ls 5fb44 <exit_check_errata_835769> // b.plast
5fb38: d53800c1 mrs x1, revidr_el1
5fb3c: 36380041 tbz w1, #7, 5fb44 <exit_check_errata_835769>
000000000005fb40 <errata_not_applies>:
5fb40: d2800000 mov x0, #0x0 // #0
000000000005fb44 <exit_check_errata_835769>:
5fb44: d65f03c0 ret
000000000005fb48 <check_errata_843419>:
5fb48: d2800021 mov x1, #0x1 // #1
5fb4c: d2800002 mov x2, #0x0 // #0
5fb50: f100101f cmp x0, #0x4
5fb54: 9a829020 csel x0, x1, x2, ls // ls = plast
5fb58: 54000081 b.ne 5fb68 <exit_check_errata_843419> // b.any
5fb5c: d53800c3 mrs x3, revidr_el1
5fb60: 36400043 tbz w3, #8, 5fb68 <exit_check_errata_843419>
5fb64: aa0203e0 mov x0, x2
000000000005fb68 <exit_check_errata_843419>:
5fb68: d65f03c0 ret
000000000005fb6c <cortex_a53_reset_func>:
5fb6c: aa1e03f3 mov x19, x30
5fb70: 9400026b bl 6051c <cpu_get_rev_var>
5fb74: aa0003f2 mov x18, x0
5fb78: aa1203e0 mov x0, x18
5fb7c: 97ffffd8 bl 5fadc <a53_disable_non_temporal_hint>
5fb80: aa1203e0 mov x0, x18
5fb84: 97ffffdf bl 5fb00 <errata_a53_855873_wa>
5fb88: d539f220 mrs x0, s3_1_c15_c2_1
5fb8c: b27a0000 orr x0, x0, #0x40
5fb90: d519f220 msr s3_1_c15_c2_1, x0
5fb94: d5033fdf isb
5fb98: d65f0260 ret x19
000000000005fb9c <cortex_a53_core_pwr_dwn>:
5fb9c: aa1e03f2 mov x18, x30
5fba0: 97ffffbc bl 5fa90 <cortex_a53_disable_dcache>
5fba4: d2800020 mov x0, #0x1 // #1
5fba8: 940003c3 bl 60ab4 <dcsw_op_level1>
5fbac: aa1203fe mov x30, x18
5fbb0: 17ffffbd b 5faa4 <cortex_a53_disable_smp>
000000000005fbb4 <cortex_a53_cluster_pwr_dwn>:
5fbb4: aa1e03f2 mov x18, x30
5fbb8: 97ffffb6 bl 5fa90 <cortex_a53_disable_dcache>
5fbbc: d2800020 mov x0, #0x1 // #1
5fbc0: 940003bd bl 60ab4 <dcsw_op_level1>
5fbc4: 9400040b bl 60bf0 <plat_disable_acp>
5fbc8: d2800020 mov x0, #0x1 // #1
5fbcc: 940003be bl 60ac4 <dcsw_op_level2>
5fbd0: aa1203fe mov x30, x18
5fbd4: 17ffffb4 b 5faa4 <cortex_a53_disable_smp>
000000000005fbd8 <cortex_a53_errata_report>:
5fbd8: a9bf7be8 stp x8, x30, [sp, #-16]!
5fbdc: 94000250 bl 6051c <cpu_get_rev_var>
5fbe0: aa0003e8 mov x8, x0
5fbe4: aa0803e0 mov x0, x8
5fbe8: 97ffffb5 bl 5fabc <check_errata_819472>
5fbec: b4000040 cbz x0, 5fbf4 <cortex_a53_errata_report+0x1c>
5fbf0: d2800040 mov x0, #0x2 // #2
5fbf4: 500281e1 adr x1, 64c32 <cortex_a53_cpu_str>
5fbf8: 70027f62 adr x2, 64be7 <cortex_a53_errata_819472_str>
5fbfc: 97fff2c4 bl 5c70c <errata_print_msg>
5fc00: aa0803e0 mov x0, x8
5fc04: 97ffffb0 bl 5fac4 <check_errata_824069>
5fc08: b4000040 cbz x0, 5fc10 <cortex_a53_errata_report+0x38>
5fc0c: d2800040 mov x0, #0x2 // #2
5fc10: 50028101 adr x1, 64c32 <cortex_a53_cpu_str>
5fc14: 50027ec2 adr x2, 64bee <cortex_a53_errata_824069_str>
5fc18: 97fff2bd bl 5c70c <errata_print_msg>
5fc1c: aa0803e0 mov x0, x8
5fc20: 97ffffab bl 5facc <check_errata_826319>
5fc24: b4000040 cbz x0, 5fc2c <cortex_a53_errata_report+0x54>
5fc28: d2800040 mov x0, #0x2 // #2
5fc2c: 50028021 adr x1, 64c32 <cortex_a53_cpu_str>
5fc30: 30027e22 adr x2, 64bf5 <cortex_a53_errata_826319_str>
5fc34: 97fff2b6 bl 5c70c <errata_print_msg>
5fc38: aa0803e0 mov x0, x8
5fc3c: 97ffffa6 bl 5fad4 <check_errata_827319>
5fc40: b4000040 cbz x0, 5fc48 <cortex_a53_errata_report+0x70>
5fc44: d2800040 mov x0, #0x2 // #2
5fc48: 50027f41 adr x1, 64c32 <cortex_a53_cpu_str>
5fc4c: 10027d82 adr x2, 64bfc <cortex_a53_errata_827319_str>
5fc50: 97fff2af bl 5c70c <errata_print_msg>
5fc54: aa0803e0 mov x0, x8
5fc58: 97ffffb3 bl 5fb24 <check_errata_835769>
5fc5c: b4000040 cbz x0, 5fc64 <cortex_a53_errata_report+0x8c>
5fc60: d2800040 mov x0, #0x2 // #2
5fc64: 50027e61 adr x1, 64c32 <cortex_a53_cpu_str>
5fc68: 70027cc2 adr x2, 64c03 <cortex_a53_errata_835769_str>
5fc6c: 97fff2a8 bl 5c70c <errata_print_msg>
5fc70: aa0803e0 mov x0, x8
5fc74: 97ffffa1 bl 5faf8 <check_errata_disable_non_temporal_hint>
5fc78: 50027dc1 adr x1, 64c32 <cortex_a53_cpu_str>
5fc7c: 50027c62 adr x2, 64c0a <cortex_a53_errata_disable_non_temporal_hint_str>
5fc80: 97fff2a3 bl 5c70c <errata_print_msg>
5fc84: aa0803e0 mov x0, x8
5fc88: 97ffffb0 bl 5fb48 <check_errata_843419>
5fc8c: b4000040 cbz x0, 5fc94 <cortex_a53_errata_report+0xbc>
5fc90: d2800040 mov x0, #0x2 // #2
5fc94: 50027ce1 adr x1, 64c32 <cortex_a53_cpu_str>
5fc98: 10027c62 adr x2, 64c24 <cortex_a53_errata_843419_str>
5fc9c: 97fff29c bl 5c70c <errata_print_msg>
5fca0: aa0803e0 mov x0, x8
5fca4: 97ffff9e bl 5fb1c <check_errata_855873>
5fca8: 50027c41 adr x1, 64c32 <cortex_a53_cpu_str>
5fcac: 70027be2 adr x2, 64c2b <cortex_a53_errata_855873_str>
5fcb0: 97fff297 bl 5c70c <errata_print_msg>
5fcb4: a8c17be8 ldp x8, x30, [sp], #16
5fcb8: d65f03c0 ret
000000000005fcbc <cortex_a53_cpu_reg_dump>:
5fcbc: 30027c06 adr x6, 64c3d <cortex_a53_regs>
5fcc0: d539f228 mrs x8, s3_1_c15_c2_1
5fcc4: d539f249 mrs x9, s3_1_c15_c2_2
5fcc8: d539f26a mrs x10, s3_1_c15_c2_3
5fccc: d539f20b mrs x11, s3_1_c15_c2_0
5fcd0: d65f03c0 ret
000000000005fcd4 <cortex_a72_disable_dcache>:
5fcd4: d53e1001 mrs x1, sctlr_el3
5fcd8: 927df821 and x1, x1, #0xfffffffffffffffb
5fcdc: d51e1001 msr sctlr_el3, x1
5fce0: d5033fdf isb
5fce4: d65f03c0 ret
000000000005fce8 <cortex_a72_disable_l2_prefetch>:
5fce8: d539f220 mrs x0, s3_1_c15_c2_1
5fcec: b25a0000 orr x0, x0, #0x4000000000
5fcf0: d2c00301 mov x1, #0x1800000000 // #103079215104
5fcf4: b2600421 orr x1, x1, #0x300000000
5fcf8: 8a210000 bic x0, x0, x1
5fcfc: d519f220 msr s3_1_c15_c2_1, x0
5fd00: d5033fdf isb
5fd04: d65f03c0 ret
000000000005fd08 <cortex_a72_disable_hw_prefetcher>:
5fd08: d539f200 mrs x0, s3_1_c15_c2_0
5fd0c: b2480000 orr x0, x0, #0x100000000000000
5fd10: d519f200 msr s3_1_c15_c2_0, x0
5fd14: d5033fdf isb
5fd18: d5033b9f dsb ish
5fd1c: d65f03c0 ret
000000000005fd20 <cortex_a72_disable_smp>:
5fd20: d539f220 mrs x0, s3_1_c15_c2_1
5fd24: 9279f800 and x0, x0, #0xffffffffffffffbf
5fd28: d519f220 msr s3_1_c15_c2_1, x0
5fd2c: d65f03c0 ret
000000000005fd30 <cortex_a72_disable_ext_debug>:
5fd30: d2800020 mov x0, #0x1 // #1
5fd34: d5101380 msr osdlr_el1, x0
5fd38: d5033fdf isb
5fd3c: d5033f9f dsb sy
5fd40: d65f03c0 ret
000000000005fd44 <check_errata_859971>:
5fd44: d2800061 mov x1, #0x3 // #3
5fd48: 140001f9 b 6052c <cpu_rev_var_ls>
000000000005fd4c <check_errata_cve_2017_5715>:
5fd4c: d5380400 mrs x0, id_aa64pfr0_el1
5fd50: d378ec00 ubfx x0, x0, #56, #4
5fd54: f1000c1f cmp x0, #0x3
5fd58: 54000083 b.cc 5fd68 <check_errata_cve_2017_5715+0x1c> // b.lo, b.ul, b.last
5fd5c: 700278a0 adr x0, 64c73 <cortex_a53_regs+0x36>
5fd60: d2802421 mov x1, #0x121 // #289
5fd64: 140002b6 b 6083c <asm_assert>
5fd68: f100001f cmp x0, #0x0
5fd6c: 54000061 b.ne 5fd78 <check_errata_cve_2017_5715+0x2c> // b.any
5fd70: d2800020 mov x0, #0x1 // #1
5fd74: d65f03c0 ret
5fd78: d2800000 mov x0, #0x0 // #0
5fd7c: d65f03c0 ret
000000000005fd80 <check_errata_cve_2018_3639>:
5fd80: d2800020 mov x0, #0x1 // #1
5fd84: d65f03c0 ret
000000000005fd88 <cortex_a72_reset_func>:
5fd88: aa1e03f3 mov x19, x30
5fd8c: 940001e4 bl 6051c <cpu_get_rev_var>
5fd90: aa0003f2 mov x18, x0
5fd94: d5380400 mrs x0, id_aa64pfr0_el1
5fd98: d378ec00 ubfx x0, x0, #56, #4
5fd9c: f1000c1f cmp x0, #0x3
5fda0: 54000083 b.cc 5fdb0 <cortex_a72_reset_func+0x28> // b.lo, b.ul, b.last
5fda4: 70027660 adr x0, 64c73 <cortex_a53_regs+0x36>
5fda8: d2802421 mov x1, #0x121 // #289
5fdac: 140002a4 b 6083c <asm_assert>
5fdb0: f100001f cmp x0, #0x0
5fdb4: 54000061 b.ne 5fdc0 <cortex_a72_reset_func+0x38> // b.any
5fdb8: 10031240 adr x0, 66000 <mmu_sync_exception_sp_el0>
5fdbc: d51ec000 msr vbar_el3, x0
5fdc0: d539f200 mrs x0, s3_1_c15_c2_0
5fdc4: b2490000 orr x0, x0, #0x80000000000000
5fdc8: d519f200 msr s3_1_c15_c2_0, x0
5fdcc: d5033fdf isb
5fdd0: d5033f9f dsb sy
5fdd4: d539f220 mrs x0, s3_1_c15_c2_1
5fdd8: b27a0000 orr x0, x0, #0x40
5fddc: d519f220 msr s3_1_c15_c2_1, x0
5fde0: d5033fdf isb
5fde4: d65f0260 ret x19
000000000005fde8 <cortex_a72_core_pwr_dwn>:
5fde8: aa1e03f2 mov x18, x30
5fdec: 97ffffba bl 5fcd4 <cortex_a72_disable_dcache>
5fdf0: 97ffffbe bl 5fce8 <cortex_a72_disable_l2_prefetch>
5fdf4: 97ffffc5 bl 5fd08 <cortex_a72_disable_hw_prefetcher>
5fdf8: d2800020 mov x0, #0x1 // #1
5fdfc: 9400032e bl 60ab4 <dcsw_op_level1>
5fe00: 97ffffc8 bl 5fd20 <cortex_a72_disable_smp>
5fe04: aa1203fe mov x30, x18
5fe08: 17ffffca b 5fd30 <cortex_a72_disable_ext_debug>
000000000005fe0c <cortex_a72_cluster_pwr_dwn>:
5fe0c: aa1e03f2 mov x18, x30
5fe10: 97ffffb1 bl 5fcd4 <cortex_a72_disable_dcache>
5fe14: 97ffffb5 bl 5fce8 <cortex_a72_disable_l2_prefetch>
5fe18: 97ffffbc bl 5fd08 <cortex_a72_disable_hw_prefetcher>
5fe1c: d2800020 mov x0, #0x1 // #1
5fe20: 94000325 bl 60ab4 <dcsw_op_level1>
5fe24: 94000373 bl 60bf0 <plat_disable_acp>
5fe28: d2800020 mov x0, #0x1 // #1
5fe2c: 94000326 bl 60ac4 <dcsw_op_level2>
5fe30: 97ffffbc bl 5fd20 <cortex_a72_disable_smp>
5fe34: aa1203fe mov x30, x18
5fe38: 17ffffbe b 5fd30 <cortex_a72_disable_ext_debug>
000000000005fe3c <cortex_a72_errata_report>:
5fe3c: a9bf7be8 stp x8, x30, [sp, #-16]!
5fe40: 940001b7 bl 6051c <cpu_get_rev_var>
5fe44: aa0003e8 mov x8, x0
5fe48: aa0803e0 mov x0, x8
5fe4c: 97ffffbe bl 5fd44 <check_errata_859971>
5fe50: b4000040 cbz x0, 5fe58 <cortex_a72_errata_report+0x1c>
5fe54: d2800040 mov x0, #0x2 // #2
5fe58: 10027321 adr x1, 64cbc <cortex_a72_cpu_str>
5fe5c: 300271e2 adr x2, 64c99 <cortex_a72_errata_859971_str>
5fe60: 97fff22b bl 5c70c <errata_print_msg>
5fe64: aa0803e0 mov x0, x8
5fe68: 97ffffb9 bl 5fd4c <check_errata_cve_2017_5715>
5fe6c: 10027281 adr x1, 64cbc <cortex_a72_cpu_str>
5fe70: 10027182 adr x2, 64ca0 <cortex_a72_errata_cve_2017_5715_str>
5fe74: 97fff226 bl 5c70c <errata_print_msg>
5fe78: aa0803e0 mov x0, x8
5fe7c: 97ffffc1 bl 5fd80 <check_errata_cve_2018_3639>
5fe80: 100271e1 adr x1, 64cbc <cortex_a72_cpu_str>
5fe84: 50027142 adr x2, 64cae <cortex_a72_errata_cve_2018_3639_str>
5fe88: 97fff221 bl 5c70c <errata_print_msg>
5fe8c: a8c17be8 ldp x8, x30, [sp], #16
5fe90: d65f03c0 ret
000000000005fe94 <cortex_a72_cpu_reg_dump>:
5fe94: 70027186 adr x6, 64cc7 <cortex_a72_regs>
5fe98: d539f228 mrs x8, s3_1_c15_c2_1
5fe9c: d539f249 mrs x9, s3_1_c15_c2_2
5fea0: d539f26a mrs x10, s3_1_c15_c2_3
5fea4: d65f03c0 ret
000000000005fea8 <plat_reset_handler>:
5fea8: d5380000 mrs x0, midr_el1
5feac: d3443c00 ubfx x0, x0, #4, #12
5feb0: 7134201f cmp w0, #0xd08
5feb4: 54000040 b.eq 5febc <handler_a72> // b.none
5feb8: 14000004 b 5fec8 <handler_end>
000000000005febc <handler_a72>:
5febc: d28004a0 mov x0, #0x25 // #37
5fec0: d519b040 msr s3_1_c11_c0_2, x0
5fec4: d5033fdf isb
000000000005fec8 <handler_end>:
5fec8: d65f03c0 ret
000000000005fecc <plat_my_core_pos>:
5fecc: d53800a0 mrs x0, mpidr_el1
5fed0: 92401c01 and x1, x0, #0xff
5fed4: 92781c00 and x0, x0, #0xff00
5fed8: 8b401820 add x0, x1, x0, lsr #6
5fedc: d65f03c0 ret
000000000005fee0 <plat_panic_handler>:
5fee0: d50040bf msr spsel, #0x0
5fee4: 94000140 bl 603e4 <plat_set_my_stack>
5fee8: 17ffd8ed b 5629c <rockchip_soc_soft_reset>
000000000005feec <size_controlled_print>:
5feec: 910003df mov sp, x30
5fef0: d53ed047 mrs x7, tpidr_el3
000000000005fef4 <test_size_list>:
5fef4: d53ed045 mrs x5, tpidr_el3
5fef8: 910100a5 add x5, x5, #0x40
5fefc: eb0500ff cmp x7, x5
5ff00: 54000180 b.eq 5ff30 <exit_size_print> // b.none
5ff04: 394000c4 ldrb w4, [x6]
5ff08: 34000144 cbz w4, 5ff30 <exit_size_print>
5ff0c: aa0603e4 mov x4, x6
5ff10: 94000263 bl 6089c <asm_print_str>
5ff14: cb060080 sub x0, x4, x6
5ff18: aa0403e6 mov x6, x4
5ff1c: 94000007 bl 5ff38 <print_alignment>
5ff20: f84084e4 ldr x4, [x7], #8
5ff24: 94000264 bl 608b4 <asm_print_hex>
5ff28: 9400026f bl 608e4 <asm_print_newline>
5ff2c: 17fffff2 b 5fef4 <test_size_list>
000000000005ff30 <exit_size_print>:
5ff30: 910003fe mov x30, sp
5ff34: d65f03c0 ret
000000000005ff38 <print_alignment>:
5ff38: 300273c4 adr x4, 64db1 <cci_iface_regs+0x2e>
5ff3c: 8b000084 add x4, x4, x0
5ff40: 14000257 b 6089c <asm_print_str>
000000000005ff44 <str_in_crash_buf_print>:
5ff44: d53ed040 mrs x0, tpidr_el3
5ff48: a9002408 stp x8, x9, [x0]
5ff4c: a9012c0a stp x10, x11, [x0, #16]
5ff50: a902340c stp x12, x13, [x0, #32]
5ff54: a9033c0e stp x14, x15, [x0, #48]
5ff58: 17ffffe5 b 5feec <size_controlled_print>
000000000005ff5c <report_unhandled_exception>:
5ff5c: 9100001f mov sp, x0
5ff60: d53ed040 mrs x0, tpidr_el3
5ff64: 9100a000 add x0, x0, #0x28
5ff68: d51ed040 msr tpidr_el3, x0
5ff6c: f9000401 str x1, [x0, #8]
5ff70: 910003e1 mov x1, sp
5ff74: f9000001 str x1, [x0]
5ff78: 70028460 adr x0, 65007 <excpt_msg>
5ff7c: 9100001f mov sp, x0
5ff80: 14000016 b 5ffd8 <do_crash_reporting>
000000000005ff84 <report_unhandled_interrupt>:
5ff84: 9100001f mov sp, x0
5ff88: d53ed040 mrs x0, tpidr_el3
5ff8c: 9100a000 add x0, x0, #0x28
5ff90: d51ed040 msr tpidr_el3, x0
5ff94: f9000401 str x1, [x0, #8]
5ff98: 910003e1 mov x1, sp
5ff9c: f9000001 str x1, [x0]
5ffa0: 70028420 adr x0, 65027 <intr_excpt_msg>
5ffa4: 9100001f mov sp, x0
5ffa8: 1400000c b 5ffd8 <do_crash_reporting>
000000000005ffac <el3_panic>:
5ffac: d50041bf msr spsel, #0x1
5ffb0: 9100001f mov sp, x0
5ffb4: d53ed040 mrs x0, tpidr_el3
5ffb8: 9100a000 add x0, x0, #0x28
5ffbc: d51ed040 msr tpidr_el3, x0
5ffc0: f9000401 str x1, [x0, #8]
5ffc4: 910003e1 mov x1, sp
5ffc8: f9000001 str x1, [x0]
5ffcc: 30028140 adr x0, 64ff5 <panic_msg>
5ffd0: 9100001f mov sp, x0
5ffd4: 14000001 b 5ffd8 <do_crash_reporting>
000000000005ffd8 <do_crash_reporting>:
5ffd8: d53ed040 mrs x0, tpidr_el3
5ffdc: a9010c02 stp x2, x3, [x0, #16]
5ffe0: a9021404 stp x4, x5, [x0, #32]
5ffe4: a9037806 stp x6, x30, [x0, #48]
5ffe8: 94000306 bl 60c00 <plat_crash_console_init>
5ffec: b4001020 cbz x0, 601f0 <crash_panic>
5fff0: 910003e4 mov x4, sp
5fff4: 9400022a bl 6089c <asm_print_str>
5fff8: d2800080 mov x0, #0x4 // #4
5fffc: 97ffffcf bl 5ff38 <print_alignment>
60000: d53ed040 mrs x0, tpidr_el3
60004: f9401c04 ldr x4, [x0, #56]
60008: 9400022b bl 608b4 <asm_print_hex>
6000c: 94000236 bl 608e4 <asm_print_newline>
60010: d53ed040 mrs x0, tpidr_el3
60014: f9001c07 str x7, [x0, #56]
60018: 50026d66 adr x6, 64dc6 <gp_regs>
6001c: 97ffffb4 bl 5feec <size_controlled_print>
60020: 97ffffc9 bl 5ff44 <str_in_crash_buf_print>
60024: d53ed040 mrs x0, tpidr_el3
60028: a9004410 stp x16, x17, [x0]
6002c: a9014c12 stp x18, x19, [x0, #16]
60030: a9025414 stp x20, x21, [x0, #32]
60034: a9035c16 stp x22, x23, [x0, #48]
60038: 97ffffad bl 5feec <size_controlled_print>
6003c: d53ed040 mrs x0, tpidr_el3
60040: a9006418 stp x24, x25, [x0]
60044: a9016c1a stp x26, x27, [x0, #16]
60048: a902741c stp x28, x29, [x0, #32]
6004c: 97ffffa8 bl 5feec <size_controlled_print>
60050: 30026f26 adr x6, 64e35 <el3_sys_regs>
60054: d53e1108 mrs x8, scr_el3
60058: d53e1009 mrs x9, sctlr_el3
6005c: d53e114a mrs x10, cptr_el3
60060: d53e204b mrs x11, tcr_el3
60064: d53b422c mrs x12, daif
60068: d53ea20d mrs x13, mair_el3
6006c: d53e400e mrs x14, spsr_el3
60070: d53e402f mrs x15, elr_el3
60074: 97ffffb4 bl 5ff44 <str_in_crash_buf_print>
60078: d53e2008 mrs x8, ttbr0_el3
6007c: d53e5209 mrs x9, esr_el3
60080: d53e600a mrs x10, far_el3
60084: 97ffffb0 bl 5ff44 <str_in_crash_buf_print>
60088: 50027046 adr x6, 64e92 <non_el3_sys_regs>
6008c: d5384008 mrs x8, spsr_el1
60090: d5384029 mrs x9, elr_el1
60094: d53c432a mrs x10, spsr_abt
60098: d53c434b mrs x11, spsr_und
6009c: d53c430c mrs x12, spsr_irq
600a0: d53c436d mrs x13, spsr_fiq
600a4: d538100e mrs x14, sctlr_el1
600a8: d538102f mrs x15, actlr_el1
600ac: 97ffffa6 bl 5ff44 <str_in_crash_buf_print>
600b0: d5381048 mrs x8, cpacr_el1
600b4: d53a0009 mrs x9, csselr_el1
600b8: d53c410a mrs x10, sp_el1
600bc: d538520b mrs x11, esr_el1
600c0: d538200c mrs x12, ttbr0_el1
600c4: d538202d mrs x13, ttbr1_el1
600c8: d538a20e mrs x14, mair_el1
600cc: d538a30f mrs x15, amair_el1
600d0: 97ffff9d bl 5ff44 <str_in_crash_buf_print>
600d4: d5382048 mrs x8, tcr_el1
600d8: d538d089 mrs x9, tpidr_el1
600dc: d53bd04a mrs x10, tpidr_el0
600e0: d53bd06b mrs x11, tpidrro_el0
600e4: d538740c mrs x12, par_el1
600e8: d53800ad mrs x13, mpidr_el1
600ec: d538510e mrs x14, afsr0_el1
600f0: d538512f mrs x15, afsr1_el1
600f4: 97ffff94 bl 5ff44 <str_in_crash_buf_print>
600f8: d538d028 mrs x8, contextidr_el1
600fc: d538c009 mrs x9, vbar_el1
60100: d53be22a mrs x10, cntp_ctl_el0
60104: d53be24b mrs x11, cntp_cval_el0
60108: d53be32c mrs x12, cntv_ctl_el0
6010c: d53be34d mrs x13, cntv_cval_el0
60110: d538e10e mrs x14, cntkctl_el1
60114: d538410f mrs x15, sp_el0
60118: 97ffff8b bl 5ff44 <str_in_crash_buf_print>
6011c: d538c108 mrs x8, isr_el1
60120: 97ffff89 bl 5ff44 <str_in_crash_buf_print>
60124: 500275c6 adr x6, 64fde <aarch32_regs>
60128: d53c3008 mrs x8, dacr32_el2
6012c: d53c5029 mrs x9, ifsr32_el2
60130: 97ffff85 bl 5ff44 <str_in_crash_buf_print>
60134: 940000e3 bl 604c0 <do_cpu_reg_dump>
60138: 97ffff83 bl 5ff44 <str_in_crash_buf_print>
6013c: d2bfdc1a mov x26, #0xfee00000 // #4276092928
60140: d280001b mov x27, #0x0 // #0
60144: d5380407 mrs x7, id_aa64pfr0_el1
60148: d3586ce7 ubfx x7, x7, #24, #4
6014c: f10004ff cmp x7, #0x1
60150: 54000141 b.ne 60178 <print_gicv2> // b.any
60154: d53ecca8 mrs x8, s3_6_c12_c12_5
60158: f240011f tst x8, #0x1
6015c: 540000e0 b.eq 60178 <print_gicv2> // b.none
60160: 50025d86 adr x6, 64d12 <icc_regs>
60164: d538c848 mrs x8, s3_0_c12_c8_2
60168: d538cc49 mrs x9, s3_0_c12_c12_2
6016c: d53ecc8a mrs x10, s3_6_c12_c12_4
60170: 97ffff75 bl 5ff44 <str_in_crash_buf_print>
60174: 14000006 b 6018c <print_gic_common>
0000000000060178 <print_gicv2>:
60178: 10025bc6 adr x6, 64cf0 <gicc_regs>
6017c: b9401b68 ldr w8, [x27, #24]
60180: b9402b69 ldr w9, [x27, #40]
60184: b940036a ldr w10, [x27]
60188: 97ffff6f bl 5ff44 <str_in_crash_buf_print>
000000000006018c <print_gic_common>:
6018c: 91080347 add x7, x26, #0x200
60190: 50025d64 adr x4, 64d3e <gicd_pend_reg>
60194: 940001c2 bl 6089c <asm_print_str>
0000000000060198 <gicd_ispendr_loop>:
60198: cb1a00e4 sub x4, x7, x26
6019c: f10a009f cmp x4, #0x280
601a0: 54000120 b.eq 601c4 <exit_print_gic_regs> // b.none
601a4: 940001c4 bl 608b4 <asm_print_hex>
601a8: 30025ea4 adr x4, 64d7d <spacer>
601ac: 940001bc bl 6089c <asm_print_str>
601b0: f84084e4 ldr x4, [x7], #8
601b4: 940001c0 bl 608b4 <asm_print_hex>
601b8: 70025e04 adr x4, 64d7b <newline>
601bc: 940001b8 bl 6089c <asm_print_str>
601c0: 17fffff6 b 60198 <gicd_ispendr_loop>
00000000000601c4 <exit_print_gic_regs>:
601c4: 70025de6 adr x6, 64d83 <cci_iface_regs>
601c8: d2820007 mov x7, #0x1000 // #4096
601cc: f2bff607 movk x7, #0xffb0, lsl #16
601d0: b94000e8 ldr w8, [x7]
601d4: d2840007 mov x7, #0x2000 // #8192
601d8: f2bff607 movk x7, #0xffb0, lsl #16
601dc: b94000e9 ldr w9, [x7]
601e0: 97ffff59 bl 5ff44 <str_in_crash_buf_print>
601e4: 940002ba bl 60ccc <plat_crash_console_flush>
601e8: 97ffff3e bl 5fee0 <plat_panic_handler>
601ec: d503201f nop
00000000000601f0 <crash_panic>:
601f0: 97ffff3c bl 5fee0 <plat_panic_handler>
601f4: d503201f nop
00000000000601f8 <enter_lower_el_sync_ea>:
601f8: f9007bfe str x30, [sp, #240]
601fc: d53e521e mrs x30, esr_el3
60200: d35a7fde ubfx x30, x30, #26, #6
60204: f10083df cmp x30, #0x20
60208: 540001a0 b.eq 6023c <enter_lower_el_sync_ea+0x44> // b.none
6020c: f10093df cmp x30, #0x24
60210: 54000160 b.eq 6023c <enter_lower_el_sync_ea+0x44> // b.none
60214: a90007e0 stp x0, x1, [sp]
60218: a9010fe2 stp x2, x3, [sp, #16]
6021c: a90217e4 stp x4, x5, [sp, #32]
60220: 940000b0 bl 604e0 <get_cpu_ops_ptr>
60224: f9401000 ldr x0, [x0, #32]
60228: b40001a0 cbz x0, 6025c <enter_lower_el_sync_ea+0x64>
6022c: d53e5201 mrs x1, esr_el3
60230: d35a7c21 ubfx x1, x1, #26, #6
60234: d63f0000 blr x0
60238: 14000009 b 6025c <enter_lower_el_sync_ea+0x64>
6023c: d53e521e mrs x30, esr_el3
60240: 3648015e tbz w30, #9, 60268 <enter_lower_el_sync_ea+0x70>
60244: 94000134 bl 60714 <save_gp_pmcr_pauth_regs>
60248: d2800020 mov x0, #0x1 // #1
6024c: d53e5201 mrs x1, esr_el3
60250: 94000010 bl 60290 <delegate_sync_ea>
60254: d50040bf msr spsel, #0x0
60258: 14000166 b 607f0 <el3_exit>
6025c: a94007e0 ldp x0, x1, [sp]
60260: a9410fe2 ldp x2, x3, [sp, #16]
60264: a94217e4 ldp x4, x5, [sp, #32]
60268: f9407bfe ldr x30, [sp, #240]
6026c: 97ffff3c bl 5ff5c <report_unhandled_exception>
60270: d503201f nop
0000000000060274 <enter_lower_el_async_ea>:
60274: f9007bfe str x30, [sp, #240]
60278: 94000127 bl 60714 <save_gp_pmcr_pauth_regs>
6027c: d2800000 mov x0, #0x0 // #0
60280: d53e5201 mrs x1, esr_el3
60284: 94000004 bl 60294 <delegate_async_ea>
60288: d50040bf msr spsel, #0x0
6028c: 14000159 b 607f0 <el3_exit>
0000000000060290 <delegate_sync_ea>:
60290: 14000002 b 60298 <ea_proceed>
0000000000060294 <delegate_async_ea>:
60294: 14000001 b 60298 <ea_proceed>
0000000000060298 <ea_proceed>:
60298: f94087e5 ldr x5, [sp, #264]
6029c: b4000065 cbz x5, 602a8 <ea_proceed+0x10>
602a0: 94000256 bl 60bf8 <plat_handle_double_fault>
602a4: d503201f nop
602a8: d53e4002 mrs x2, spsr_el3
602ac: d53e4023 mrs x3, elr_el3
602b0: a9118fe2 stp x2, x3, [sp, #280]
602b4: d53e1104 mrs x4, scr_el3
602b8: d53e5205 mrs x5, esr_el3
602bc: a91017e4 stp x4, x5, [sp, #256]
602c0: aa1f03e2 mov x2, xzr
602c4: 910003e3 mov x3, sp
602c8: d3400084 ubfx x4, x4, #0, #1
602cc: f9408be5 ldr x5, [sp, #272]
602d0: d50040bf msr spsel, #0x0
602d4: 910000bf mov sp, x5
602d8: aa1e03fd mov x29, x30
602dc: 910003fc mov x28, sp
602e0: 97fffa25 bl 5eb74 <plat_ea_handler>
602e4: 910003fb mov x27, sp
602e8: eb1b039f cmp x28, x27
602ec: 54000080 b.eq 602fc <ea_proceed+0x64> // b.none
602f0: 30026b00 adr x0, 65051 <intr_excpt_msg+0x2a>
602f4: d2802401 mov x1, #0x120 // #288
602f8: 14000151 b 6083c <asm_assert>
602fc: d50041bf msr spsel, #0x1
60300: a9518be1 ldp x1, x2, [sp, #280]
60304: d51e4001 msr spsr_el3, x1
60308: d51e4022 msr elr_el3, x2
6030c: a95013e3 ldp x3, x4, [sp, #256]
60310: d51e1103 msr scr_el3, x3
60314: d51e5204 msr esr_el3, x4
60318: eb1f009f cmp x4, xzr
6031c: 54000081 b.ne 6032c <ea_proceed+0x94> // b.any
60320: 30026980 adr x0, 65051 <intr_excpt_msg+0x2a>
60324: d2802641 mov x1, #0x132 // #306
60328: 14000145 b 6083c <asm_assert>
6032c: f90087ff str xzr, [sp, #264]
60330: d65f03a0 ret x29
0000000000060334 <smc_handler>:
60334: 37f003a0 tbnz w0, #30, 603a8 <smc_prohibited>
0000000000060338 <smc_handler64>:
60338: 940000f7 bl 60714 <save_gp_pmcr_pauth_regs>
6033c: aa1f03e5 mov x5, xzr
60340: 910003e6 mov x6, sp
60344: f94088cc ldr x12, [x6, #272]
60348: d50040bf msr spsel, #0x0
6034c: d53e4010 mrs x16, spsr_el3
60350: d53e4031 mrs x17, elr_el3
60354: d53e1112 mrs x18, scr_el3
60358: a911c4d0 stp x16, x17, [x6, #280]
6035c: f90080d2 str x18, [x6, #256]
60360: b3400247 bfxil x7, x18, #0, #1
60364: 9100019f mov sp, x12
60368: d3587410 ubfx x16, x0, #24, #6
6036c: d35f7c0f ubfx x15, x0, #31, #1
60370: aa0f1a10 orr x16, x16, x15, lsl #6
60374: b000010e adrp x14, 81000 <store_sram+0x2377>
60378: 913225ce add x14, x14, #0xc89
6037c: 387069cf ldrb w15, [x14, x16]
60380: 373800ef tbnz w15, #7, 6039c <smc_unknown>
60384: 10026e6b adr x11, 65150 <__RT_SVC_DESCS_START__+0x18>
60388: 531b69ea lsl w10, w15, #5
6038c: f86a496f ldr x15, [x11, w10, uxtw]
60390: b400016f cbz x15, 603bc <rt_svc_fw_critical_error>
60394: d63f01e0 blr x15
60398: 14000116 b 607f0 <el3_exit>
000000000006039c <smc_unknown>:
6039c: 92800000 mov x0, #0xffffffffffffffff // #-1
603a0: f90000c0 str x0, [x6]
603a4: 14000113 b 607f0 <el3_exit>
00000000000603a8 <smc_prohibited>:
603a8: f9407bfe ldr x30, [sp, #240]
603ac: 92800000 mov x0, #0xffffffffffffffff // #-1
603b0: d69f03e0 eret
603b4: d503379f dsb nsh
603b8: d5033fdf isb
00000000000603bc <rt_svc_fw_critical_error>:
603bc: d50041bf msr spsel, #0x1
603c0: 97fffee7 bl 5ff5c <report_unhandled_exception>
603c4: d503201f nop
00000000000603c8 <plat_get_my_stack>:
603c8: aa1e03ea mov x10, x30
603cc: 97fffec0 bl 5fecc <plat_my_core_pos>
603d0: f0000022 adrp x2, 67000 <__RO_END__>
603d4: 91220042 add x2, x2, #0x880
603d8: d2810001 mov x1, #0x800 // #2048
603dc: 9b010800 madd x0, x0, x1, x2
603e0: d65f0140 ret x10
00000000000603e4 <plat_set_my_stack>:
603e4: aa1e03e9 mov x9, x30
603e8: 97fffff8 bl 603c8 <plat_get_my_stack>
603ec: 9100001f mov sp, x0
603f0: d65f0120 ret x9
00000000000603f4 <init_cpu_data_ptr>:
603f4: aa1e03ea mov x10, x30
603f8: 97fffeb5 bl 5fecc <plat_my_core_pos>
603fc: 94000003 bl 60408 <_cpu_data_by_index>
60400: d51ed040 msr tpidr_el3, x0
60404: d65f0140 ret x10
0000000000060408 <_cpu_data_by_index>:
60408: d2801001 mov x1, #0x80 // #128
6040c: 9b017c00 mul x0, x0, x1
60410: d0000041 adrp x1, 6a000 <__STACKS_START__+0x2f80>
60414: 91020021 add x1, x1, #0x80
60418: 8b010000 add x0, x0, x1
6041c: d65f03c0 ret
0000000000060420 <reset_handler>:
60420: aa1e03f3 mov x19, x30
60424: 97fffea1 bl 5fea8 <plat_reset_handler>
60428: 9400002e bl 604e0 <get_cpu_ops_ptr>
6042c: f100001f cmp x0, #0x0
60430: 54000081 b.ne 60440 <reset_handler+0x20> // b.any
60434: 100261c0 adr x0, 6506c <intr_excpt_msg+0x45>
60438: d2800461 mov x1, #0x23 // #35
6043c: 14000100 b 6083c <asm_assert>
60440: f9400402 ldr x2, [x0, #8]
60444: aa1303fe mov x30, x19
60448: b4000042 cbz x2, 60450 <reset_handler+0x30>
6044c: d61f0040 br x2
60450: d65f03c0 ret
0000000000060454 <prepare_cpu_pwr_dwn>:
60454: d2800022 mov x2, #0x1 // #1
60458: eb02001f cmp x0, x2
6045c: 9a808042 csel x2, x2, x0, hi // hi = pmore
60460: d53ed041 mrs x1, tpidr_el3
60464: f9400820 ldr x0, [x1, #16]
60468: f100001f cmp x0, #0x0
6046c: 54000081 b.ne 6047c <prepare_cpu_pwr_dwn+0x28> // b.any
60470: 10025fe0 adr x0, 6506c <intr_excpt_msg+0x45>
60474: d2800941 mov x1, #0x4a // #74
60478: 140000f1 b 6083c <asm_assert>
6047c: d2800501 mov x1, #0x28 // #40
60480: 8b020c21 add x1, x1, x2, lsl #3
60484: f8616801 ldr x1, [x0, x1]
60488: d61f0020 br x1
000000000006048c <init_cpu_ops>:
6048c: d53ed046 mrs x6, tpidr_el3
60490: f94008c0 ldr x0, [x6, #16]
60494: b5000140 cbnz x0, 604bc <init_cpu_ops+0x30>
60498: aa1e03ea mov x10, x30
6049c: 94000011 bl 604e0 <get_cpu_ops_ptr>
604a0: f100001f cmp x0, #0x0
604a4: 54000081 b.ne 604b4 <init_cpu_ops+0x28> // b.any
604a8: 10025e20 adr x0, 6506c <intr_excpt_msg+0x45>
604ac: d2800c81 mov x1, #0x64 // #100
604b0: 140000e3 b 6083c <asm_assert>
604b4: f8010cc0 str x0, [x6, #16]!
604b8: aa0a03fe mov x30, x10
604bc: d65f03c0 ret
00000000000604c0 <do_cpu_reg_dump>:
604c0: aa1e03f0 mov x16, x30
604c4: 94000007 bl 604e0 <get_cpu_ops_ptr>
604c8: b4000080 cbz x0, 604d8 <do_cpu_reg_dump+0x18>
604cc: f9402802 ldr x2, [x0, #80]
604d0: b4000042 cbz x2, 604d8 <do_cpu_reg_dump+0x18>
604d4: d63f0040 blr x2
604d8: aa1003fe mov x30, x16
604dc: d65f03c0 ret
00000000000604e0 <get_cpu_ops_ptr>:
604e0: 100265c4 adr x4, 65198 <__CPU_OPS_START__>
604e4: 10026b25 adr x5, 65248 <__cb_func_spe_drain_buffers_hookcm_entering_secure_world>
604e8: d2800000 mov x0, #0x0 // #0
604ec: d5380002 mrs x2, midr_el1
604f0: d29ffe03 mov x3, #0xfff0 // #65520
604f4: f2bfe003 movk x3, #0xff00, lsl #16
604f8: 0a030042 and w2, w2, w3
604fc: eb05009f cmp x4, x5
60500: 540000c0 b.eq 60518 <error_exit> // b.none
60504: f8458481 ldr x1, [x4], #88
60508: 0a030021 and w1, w1, w3
6050c: 6b02003f cmp w1, w2
60510: 54ffff61 b.ne 604fc <get_cpu_ops_ptr+0x1c> // b.any
60514: d1016080 sub x0, x4, #0x58
0000000000060518 <error_exit>:
60518: d65f03c0 ret
000000000006051c <cpu_get_rev_var>:
6051c: d5380001 mrs x1, midr_el1
60520: d3505c20 ubfx x0, x1, #16, #8
60524: b3400c20 bfxil x0, x1, #0, #4
60528: d65f03c0 ret
000000000006052c <cpu_rev_var_ls>:
6052c: d2800022 mov x2, #0x1 // #1
60530: d2800003 mov x3, #0x0 // #0
60534: eb01001f cmp x0, x1
60538: 9a839040 csel x0, x2, x3, ls // ls = plast
6053c: d65f03c0 ret
0000000000060540 <cpu_rev_var_hs>:
60540: d2800022 mov x2, #0x1 // #1
60544: d2800003 mov x3, #0x0 // #0
60548: eb01001f cmp x0, x1
6054c: 9a832040 csel x0, x2, x3, cs // cs = hs, nlast
60550: d65f03c0 ret
0000000000060554 <print_errata_status>:
60554: d53ed040 mrs x0, tpidr_el3
60558: f9400801 ldr x1, [x0, #16]
6055c: f9401c20 ldr x0, [x1, #56]
60560: b4000120 cbz x0, 60584 <print_errata_status+0x30>
60564: a9bf7bf3 stp x19, x30, [sp, #-16]!
60568: aa0003f3 mov x19, x0
6056c: f9402020 ldr x0, [x1, #64]
60570: f9402421 ldr x1, [x1, #72]
60574: 97fff04e bl 5c6ac <errata_needs_reporting>
60578: aa1303e1 mov x1, x19
6057c: a8c17bf3 ldp x19, x30, [sp], #16
60580: b5000040 cbnz x0, 60588 <print_errata_status+0x34>
60584: d65f03c0 ret
60588: d61f0020 br x1
000000000006058c <check_wa_cve_2017_5715>:
6058c: d53ed040 mrs x0, tpidr_el3
60590: f100001f cmp x0, #0x0
60594: 54000081 b.ne 605a4 <check_wa_cve_2017_5715+0x18> // b.any
60598: 100256a0 adr x0, 6506c <intr_excpt_msg+0x45>
6059c: d28028c1 mov x1, #0x146 // #326
605a0: 140000a7 b 6083c <asm_assert>
605a4: f9400800 ldr x0, [x0, #16]
605a8: f9400800 ldr x0, [x0, #16]
605ac: f100001f cmp x0, #0x0
605b0: 54000040 b.eq 605b8 <check_wa_cve_2017_5715+0x2c> // b.none
605b4: d61f0000 br x0
605b8: d2800000 mov x0, #0x0 // #0
605bc: d65f03c0 ret
00000000000605c0 <spin_lock>:
605c0: 52800022 mov w2, #0x1 // #1
605c4: d50320bf sevl
00000000000605c8 <l1>:
605c8: d503205f wfe
00000000000605cc <l2>:
605cc: 885ffc01 ldaxr w1, [x0]
605d0: 35ffffc1 cbnz w1, 605c8 <l1>
605d4: 88017c02 stxr w1, w2, [x0]
605d8: 35ffffa1 cbnz w1, 605cc <l2>
605dc: d65f03c0 ret
00000000000605e0 <spin_unlock>:
605e0: 889ffc1f stlr wzr, [x0]
605e4: d65f03c0 ret
00000000000605e8 <psci_do_pwrdown_cache_maintenance>:
605e8: a9bf7bfd stp x29, x30, [sp, #-16]!
605ec: a9bf53f3 stp x19, x20, [sp, #-16]!
605f0: 97ffff99 bl 60454 <prepare_cpu_pwr_dwn>
605f4: 97ffff75 bl 603c8 <plat_get_my_stack>
605f8: aa0003f3 mov x19, x0
605fc: 910003e1 mov x1, sp
60600: cb010001 sub x1, x0, x1
60604: 910003e0 mov x0, sp
60608: 940000ca bl 60930 <flush_dcache_range>
6060c: d1200260 sub x0, x19, #0x800
60610: cb2063e1 sub x1, sp, x0
60614: 940000e3 bl 609a0 <inv_dcache_range>
60618: a8c153f3 ldp x19, x20, [sp], #16
6061c: a8c17bfd ldp x29, x30, [sp], #16
60620: d65f03c0 ret
0000000000060624 <psci_do_pwrup_cache_maintenance>:
60624: a9bf7bfd stp x29, x30, [sp, #-16]!
60628: d5033ebf dmb st
6062c: 97ffff67 bl 603c8 <plat_get_my_stack>
60630: 910003e1 mov x1, sp
60634: cb010001 sub x1, x0, x1
60638: 910003e0 mov x0, sp
6063c: 940000d9 bl 609a0 <inv_dcache_range>
60640: d53e1000 mrs x0, sctlr_el3
60644: b27e0000 orr x0, x0, #0x4
60648: d51e1000 msr sctlr_el3, x0
6064c: d5033fdf isb
60650: a8c17bfd ldp x29, x30, [sp], #16
60654: d65f03c0 ret
0000000000060658 <psci_power_down_wfi>:
60658: d5033f9f dsb sy
6065c: d503207f wfi
60660: 97fffe20 bl 5fee0 <plat_panic_handler>
60664: d503201f nop
0000000000060668 <el1_sysregs_context_restore>:
60668: a9402809 ldp x9, x10, [x0]
6066c: d5184009 msr spsr_el1, x9
60670: d518402a msr elr_el1, x10
60674: a941400f ldp x15, x16, [x0, #16]
60678: d518100f msr sctlr_el1, x15
6067c: d5181030 msr actlr_el1, x16
60680: a9422411 ldp x17, x9, [x0, #32]
60684: d5181051 msr cpacr_el1, x17
60688: d51a0009 msr csselr_el1, x9
6068c: a9432c0a ldp x10, x11, [x0, #48]
60690: d51c410a msr sp_el1, x10
60694: d518520b msr esr_el1, x11
60698: a944340c ldp x12, x13, [x0, #64]
6069c: d518200c msr ttbr0_el1, x12
606a0: d518202d msr ttbr1_el1, x13
606a4: a9453c0e ldp x14, x15, [x0, #80]
606a8: d518a20e msr mair_el1, x14
606ac: d518a30f msr amair_el1, x15
606b0: a9464410 ldp x16, x17, [x0, #96]
606b4: d5182050 msr tcr_el1, x16
606b8: d518d091 msr tpidr_el1, x17
606bc: a9472809 ldp x9, x10, [x0, #112]
606c0: d51bd049 msr tpidr_el0, x9
606c4: d51bd06a msr tpidrro_el0, x10
606c8: a948380d ldp x13, x14, [x0, #128]
606cc: d518740d msr par_el1, x13
606d0: d518600e msr far_el1, x14
606d4: a949400f ldp x15, x16, [x0, #144]
606d8: d518510f msr afsr0_el1, x15
606dc: d5185130 msr afsr1_el1, x16
606e0: a94a2411 ldp x17, x9, [x0, #160]
606e4: d518d031 msr contextidr_el1, x17
606e8: d518c009 msr vbar_el1, x9
606ec: a94b300b ldp x11, x12, [x0, #176]
606f0: d51c432b msr spsr_abt, x11
606f4: d51c434c msr spsr_und, x12
606f8: a94c380d ldp x13, x14, [x0, #192]
606fc: d51c430d msr spsr_irq, x13
60700: d51c436e msr spsr_fiq, x14
60704: a94d400f ldp x15, x16, [x0, #208]
60708: d51c300f msr dacr32_el2, x15
6070c: d51c5030 msr ifsr32_el2, x16
60710: d65f03c0 ret
0000000000060714 <save_gp_pmcr_pauth_regs>:
60714: a90007e0 stp x0, x1, [sp]
60718: a9010fe2 stp x2, x3, [sp, #16]
6071c: a90217e4 stp x4, x5, [sp, #32]
60720: a9031fe6 stp x6, x7, [sp, #48]
60724: a90427e8 stp x8, x9, [sp, #64]
60728: a9052fea stp x10, x11, [sp, #80]
6072c: a90637ec stp x12, x13, [sp, #96]
60730: a9073fee stp x14, x15, [sp, #112]
60734: a90847f0 stp x16, x17, [sp, #128]
60738: a9094ff2 stp x18, x19, [sp, #144]
6073c: a90a57f4 stp x20, x21, [sp, #160]
60740: a90b5ff6 stp x22, x23, [sp, #176]
60744: a90c67f8 stp x24, x25, [sp, #192]
60748: a90d6ffa stp x26, x27, [sp, #208]
6074c: a90e77fc stp x28, x29, [sp, #224]
60750: d5384112 mrs x18, sp_el0
60754: f9007ff2 str x18, [sp, #248]
60758: d53e1329 mrs x9, mdcr_el3
6075c: f269013f tst x9, #0x800000
60760: 54000121 b.ne 60784 <save_gp_pmcr_pauth_regs+0x70> // b.any
60764: d53b9c09 mrs x9, pmcr_el0
60768: d53e110a mrs x10, scr_el3
6076c: f240015f tst x10, #0x1
60770: 54000040 b.eq 60778 <save_gp_pmcr_pauth_regs+0x64> // b.none
60774: f90097e9 str x9, [sp, #296]
60778: b27b0129 orr x9, x9, #0x20
6077c: d51b9c09 msr pmcr_el0, x9
60780: d5033fdf isb
60784: d65f03c0 ret
0000000000060788 <restore_gp_pmcr_pauth_regs>:
60788: d53e1100 mrs x0, scr_el3
6078c: f240001f tst x0, #0x1
60790: 540000c0 b.eq 607a8 <restore_gp_pmcr_pauth_regs+0x20> // b.none
60794: d53e1320 mrs x0, mdcr_el3
60798: f269001f tst x0, #0x800000
6079c: 54000061 b.ne 607a8 <restore_gp_pmcr_pauth_regs+0x20> // b.any
607a0: f94097e0 ldr x0, [sp, #296]
607a4: d51b9c00 msr pmcr_el0, x0
607a8: a94007e0 ldp x0, x1, [sp]
607ac: a9410fe2 ldp x2, x3, [sp, #16]
607b0: a94217e4 ldp x4, x5, [sp, #32]
607b4: a9431fe6 ldp x6, x7, [sp, #48]
607b8: a94427e8 ldp x8, x9, [sp, #64]
607bc: a9452fea ldp x10, x11, [sp, #80]
607c0: a94637ec ldp x12, x13, [sp, #96]
607c4: a9473fee ldp x14, x15, [sp, #112]
607c8: a94847f0 ldp x16, x17, [sp, #128]
607cc: a9494ff2 ldp x18, x19, [sp, #144]
607d0: a94a57f4 ldp x20, x21, [sp, #160]
607d4: a94b5ff6 ldp x22, x23, [sp, #176]
607d8: a94c67f8 ldp x24, x25, [sp, #192]
607dc: a94d6ffa ldp x26, x27, [sp, #208]
607e0: f9407ffc ldr x28, [sp, #248]
607e4: d518411c msr sp_el0, x28
607e8: a94e77fc ldp x28, x29, [sp, #224]
607ec: d65f03c0 ret
00000000000607f0 <el3_exit>:
607f0: d5384211 mrs x17, spsel
607f4: f100023f cmp x17, #0x0
607f8: 54000080 b.eq 60808 <el3_exit+0x18> // b.none
607fc: 70024460 adr x0, 6508b <intr_excpt_msg+0x64>
60800: d2803ca1 mov x1, #0x1e5 // #485
60804: 1400000e b 6083c <asm_assert>
60808: 910003f1 mov x17, sp
6080c: d50041bf msr spsel, #0x1
60810: f9008bf1 str x17, [sp, #272]
60814: f94083f2 ldr x18, [sp, #256]
60818: a951c7f0 ldp x16, x17, [sp, #280]
6081c: d51e1112 msr scr_el3, x18
60820: d51e4010 msr spsr_el3, x16
60824: d51e4031 msr elr_el3, x17
60828: 97ffffd8 bl 60788 <restore_gp_pmcr_pauth_regs>
6082c: f9407bfe ldr x30, [sp, #240]
60830: d69f03e0 eret
60834: d503379f dsb nsh
60838: d5033fdf isb
000000000006083c <asm_assert>:
6083c: aa0003e5 mov x5, x0
60840: aa0103e6 mov x6, x1
60844: 940000ef bl 60c00 <plat_crash_console_init>
60848: b4000260 cbz x0, 60894 <_assert_loop>
6084c: 30024304 adr x4, 650ad <assert_msg1>
60850: 94000013 bl 6089c <asm_print_str>
60854: aa0503e4 mov x4, x5
60858: 94000011 bl 6089c <asm_print_str>
6085c: 700242e4 adr x4, 650bb <assert_msg2>
60860: 9400000f bl 6089c <asm_print_str>
60864: f270bcdf tst x6, #0xffffffffffff0000
60868: 54000161 b.ne 60894 <_assert_loop> // b.any
6086c: aa0603e4 mov x4, x6
60870: d2800146 mov x6, #0xa // #10
60874: d284e205 mov x5, #0x2710 // #10000
0000000000060878 <dec_print_loop>:
60878: 9ac50880 udiv x0, x4, x5
6087c: 9b059004 msub x4, x0, x5, x4
60880: 9100c000 add x0, x0, #0x30
60884: 940000f1 bl 60c48 <plat_crash_console_putc>
60888: 9ac608a5 udiv x5, x5, x6
6088c: b5ffff65 cbnz x5, 60878 <dec_print_loop>
60890: 9400010f bl 60ccc <plat_crash_console_flush>
0000000000060894 <_assert_loop>:
60894: 97fffd93 bl 5fee0 <plat_panic_handler>
60898: d503201f nop
000000000006089c <asm_print_str>:
6089c: aa1e03e3 mov x3, x30
608a0: 38401480 ldrb w0, [x4], #1
608a4: b4000060 cbz x0, 608b0 <asm_print_str+0x14>
608a8: 940000e8 bl 60c48 <plat_crash_console_putc>
608ac: 17fffffd b 608a0 <asm_print_str+0x4>
608b0: d65f0060 ret x3
00000000000608b4 <asm_print_hex>:
608b4: d2800805 mov x5, #0x40 // #64
00000000000608b8 <asm_print_hex_bits>:
608b8: aa1e03e3 mov x3, x30
608bc: d10010a5 sub x5, x5, #0x4
608c0: 9ac52480 lsr x0, x4, x5
608c4: 92400c00 and x0, x0, #0xf
608c8: f100281f cmp x0, #0xa
608cc: 54000043 b.cc 608d4 <asm_print_hex_bits+0x1c> // b.lo, b.ul, b.last
608d0: 91009c00 add x0, x0, #0x27
608d4: 9100c000 add x0, x0, #0x30
608d8: 940000dc bl 60c48 <plat_crash_console_putc>
608dc: b5ffff05 cbnz x5, 608bc <asm_print_hex_bits+0x4>
608e0: d65f0060 ret x3
00000000000608e4 <asm_print_newline>:
608e4: d2800140 mov x0, #0xa // #10
608e8: 140000d8 b 60c48 <plat_crash_console_putc>
00000000000608ec <do_panic>:
608ec: f81f0fe0 str x0, [sp, #-16]!
608f0: d5384240 mrs x0, currentel
608f4: d3420c00 ubfx x0, x0, #2, #2
608f8: f1000c1f cmp x0, #0x3
608fc: f84107e0 ldr x0, [sp], #16
60900: 54ffb560 b.eq 5ffac <el3_panic> // b.none
0000000000060904 <panic_common>:
60904: aa1e03e6 mov x6, x30
60908: 940000be bl 60c00 <plat_crash_console_init>
6090c: b40000e0 cbz x0, 60928 <_panic_handler>
60910: 50023d84 adr x4, 650c2 <panic_msg>
60914: 97ffffe2 bl 6089c <asm_print_str>
60918: aa0603e4 mov x4, x6
6091c: d1001084 sub x4, x4, #0x4
60920: 97ffffe5 bl 608b4 <asm_print_hex>
60924: 940000ea bl 60ccc <plat_crash_console_flush>
0000000000060928 <_panic_handler>:
60928: aa0603fe mov x30, x6
6092c: 17fffd6d b 5fee0 <plat_panic_handler>
0000000000060930 <flush_dcache_range>:
60930: b40001a1 cbz x1, 60964 <exit_loop_civac>
60934: d53b0023 mrs x3, ctr_el0
60938: d3504c63 ubfx x3, x3, #16, #4
6093c: d2800082 mov x2, #0x4 // #4
60940: 9ac32042 lsl x2, x2, x3
60944: 8b010001 add x1, x0, x1
60948: d1000443 sub x3, x2, #0x1
6094c: 8a230000 bic x0, x0, x3
0000000000060950 <loop_civac>:
60950: d50b7e20 dc civac, x0
60954: 8b020000 add x0, x0, x2
60958: eb01001f cmp x0, x1
6095c: 54ffffa3 b.cc 60950 <loop_civac> // b.lo, b.ul, b.last
60960: d5033f9f dsb sy
0000000000060964 <exit_loop_civac>:
60964: d65f03c0 ret
0000000000060968 <clean_dcache_range>:
60968: b40001a1 cbz x1, 6099c <exit_loop_cvac>
6096c: d53b0023 mrs x3, ctr_el0
60970: d3504c63 ubfx x3, x3, #16, #4
60974: d2800082 mov x2, #0x4 // #4
60978: 9ac32042 lsl x2, x2, x3
6097c: 8b010001 add x1, x0, x1
60980: d1000443 sub x3, x2, #0x1
60984: 8a230000 bic x0, x0, x3
0000000000060988 <loop_cvac>:
60988: d50b7a20 dc cvac, x0
6098c: 8b020000 add x0, x0, x2
60990: eb01001f cmp x0, x1
60994: 54ffffa3 b.cc 60988 <loop_cvac> // b.lo, b.ul, b.last
60998: d5033f9f dsb sy
000000000006099c <exit_loop_cvac>:
6099c: d65f03c0 ret
00000000000609a0 <inv_dcache_range>:
609a0: b40001a1 cbz x1, 609d4 <exit_loop_ivac>
609a4: d53b0023 mrs x3, ctr_el0
609a8: d3504c63 ubfx x3, x3, #16, #4
609ac: d2800082 mov x2, #0x4 // #4
609b0: 9ac32042 lsl x2, x2, x3
609b4: 8b010001 add x1, x0, x1
609b8: d1000443 sub x3, x2, #0x1
609bc: 8a230000 bic x0, x0, x3
00000000000609c0 <loop_ivac>:
609c0: d5087620 dc ivac, x0
609c4: 8b020000 add x0, x0, x2
609c8: eb01001f cmp x0, x1
609cc: 54ffffa3 b.cc 609c0 <loop_ivac> // b.lo, b.ul, b.last
609d0: d5033f9f dsb sy
00000000000609d4 <exit_loop_ivac>:
609d4: d65f03c0 ret
00000000000609d8 <do_dcsw_op>:
609d8: b40003c3 cbz x3, 60a50 <exit>
609dc: 100003ce adr x14, 60a54 <dcsw_loop_table>
609e0: 8b0015ce add x14, x14, x0, lsl #5
609e4: aa0903e0 mov x0, x9
609e8: 52800028 mov w8, #0x1 // #1
00000000000609ec <loop1>:
609ec: 8b4a0542 add x2, x10, x10, lsr #1
609f0: 9ac22401 lsr x1, x0, x2
609f4: 92400821 and x1, x1, #0x7
609f8: f100083f cmp x1, #0x2
609fc: 540001e3 b.cc 60a38 <level_done> // b.lo, b.ul, b.last
60a00: d51a000a msr csselr_el1, x10
60a04: d5033fdf isb
60a08: d5390001 mrs x1, ccsidr_el1
60a0c: 92400822 and x2, x1, #0x7
60a10: 91001042 add x2, x2, #0x4
60a14: d3433024 ubfx x4, x1, #3, #10
60a18: 5ac01085 clz w5, w4
60a1c: 1ac52089 lsl w9, w4, w5
60a20: 1ac52110 lsl w16, w8, w5
60a24: 2a090149 orr w9, w10, w9
60a28: 530d6c26 ubfx w6, w1, #13, #15
60a2c: 1ac22111 lsl w17, w8, w2
60a30: d5033f9f dsb sy
60a34: d61f01c0 br x14
0000000000060a38 <level_done>:
60a38: 9100094a add x10, x10, #0x2
60a3c: eb0a007f cmp x3, x10
60a40: 54fffd68 b.hi 609ec <loop1> // b.pmore
60a44: d51a001f msr csselr_el1, xzr
60a48: d5033f9f dsb sy
60a4c: d5033fdf isb
0000000000060a50 <exit>:
60a50: d65f03c0 ret
0000000000060a54 <dcsw_loop_table>:
60a54: 1ac220c7 lsl w7, w6, w2
0000000000060a58 <loop3_isw>:
60a58: 2a07012b orr w11, w9, w7
60a5c: d508764b dc isw, x11
60a60: 6b1100e7 subs w7, w7, w17
60a64: 54ffffa2 b.cs 60a58 <loop3_isw> // b.hs, b.nlast
60a68: eb100129 subs x9, x9, x16
60a6c: 54ffff42 b.cs 60a54 <dcsw_loop_table> // b.hs, b.nlast
60a70: 17fffff2 b 60a38 <level_done>
0000000000060a74 <loop2_cisw>:
60a74: 1ac220c7 lsl w7, w6, w2
0000000000060a78 <loop3_cisw>:
60a78: 2a07012b orr w11, w9, w7
60a7c: d5087e4b dc cisw, x11
60a80: 6b1100e7 subs w7, w7, w17
60a84: 54ffffa2 b.cs 60a78 <loop3_cisw> // b.hs, b.nlast
60a88: eb100129 subs x9, x9, x16
60a8c: 54ffff42 b.cs 60a74 <loop2_cisw> // b.hs, b.nlast
60a90: 17ffffea b 60a38 <level_done>
0000000000060a94 <loop2_csw>:
60a94: 1ac220c7 lsl w7, w6, w2
0000000000060a98 <loop3_csw>:
60a98: 2a07012b orr w11, w9, w7
60a9c: d5087a4b dc csw, x11
60aa0: 6b1100e7 subs w7, w7, w17
60aa4: 54ffffa2 b.cs 60a98 <loop3_csw> // b.hs, b.nlast
60aa8: eb100129 subs x9, x9, x16
60aac: 54ffff42 b.cs 60a94 <loop2_csw> // b.hs, b.nlast
60ab0: 17ffffe2 b 60a38 <level_done>
0000000000060ab4 <dcsw_op_level1>:
60ab4: d5390029 mrs x9, clidr_el1
60ab8: d2800043 mov x3, #0x2 // #2
60abc: d100086a sub x10, x3, #0x2
60ac0: 17ffffc6 b 609d8 <do_dcsw_op>
0000000000060ac4 <dcsw_op_level2>:
60ac4: d5390029 mrs x9, clidr_el1
60ac8: d2800083 mov x3, #0x4 // #4
60acc: d100086a sub x10, x3, #0x2
60ad0: 17ffffc2 b 609d8 <do_dcsw_op>
0000000000060ad4 <zeromem>:
60ad4: 8b010002 add x2, x0, x1
60ad8: 1400003b b 60bc4 <zero_normalmem+0xe8>
0000000000060adc <zero_normalmem>:
60adc: d53e1004 mrs x4, sctlr_el3
60ae0: f240009f tst x4, #0x1
60ae4: 54000081 b.ne 60af4 <zero_normalmem+0x18> // b.any
60ae8: 70022f40 adr x0, 650d3 <panic_msg+0x11>
60aec: d2801581 mov x1, #0xac // #172
60af0: 17ffff53 b 6083c <asm_assert>
60af4: 8b010002 add x2, x0, x1
60af8: d53b00e3 mrs x3, dczid_el0
60afc: d3400c63 ubfx x3, x3, #0, #4
60b00: d2800085 mov x5, #0x4 // #4
60b04: 9ac320a3 lsl x3, x5, x3
60b08: f100407f cmp x3, #0x10
60b0c: 54000082 b.cs 60b1c <zero_normalmem+0x40> // b.hs, b.nlast
60b10: 70022e00 adr x0, 650d3 <panic_msg+0x11>
60b14: d28018c1 mov x1, #0xc6 // #198
60b18: 17ffff49 b 6083c <asm_assert>
60b1c: eb03003f cmp x1, x3
60b20: 54000523 b.cc 60bc4 <zero_normalmem+0xe8> // b.lo, b.ul, b.last
60b24: d1000461 sub x1, x3, #0x1
60b28: ea01001f tst x0, x1
60b2c: 54000260 b.eq 60b78 <zero_normalmem+0x9c> // b.none
60b30: aa010004 orr x4, x0, x1
60b34: 91000484 add x4, x4, #0x1
60b38: b4000464 cbz x4, 60bc4 <zero_normalmem+0xe8>
60b3c: eb02009f cmp x4, x2
60b40: 54000428 b.hi 60bc4 <zero_normalmem+0xe8> // b.pmore
60b44: f2400c1f tst x0, #0xf
60b48: 540000e0 b.eq 60b64 <zero_normalmem+0x88> // b.none
60b4c: b2400c05 orr x5, x0, #0xf
60b50: 910004a5 add x5, x5, #0x1
60b54: b4000385 cbz x5, 60bc4 <zero_normalmem+0xe8>
60b58: 3800141f strb wzr, [x0], #1
60b5c: eb05001f cmp x0, x5
60b60: 54ffffc1 b.ne 60b58 <zero_normalmem+0x7c> // b.any
60b64: eb04001f cmp x0, x4
60b68: 54000082 b.cs 60b78 <zero_normalmem+0x9c> // b.hs, b.nlast
60b6c: a8817c1f stp xzr, xzr, [x0], #16
60b70: eb04001f cmp x0, x4
60b74: 54ffffc3 b.cc 60b6c <zero_normalmem+0x90> // b.lo, b.ul, b.last
60b78: 8a210044 bic x4, x2, x1
60b7c: eb04001f cmp x0, x4
60b80: 540000a2 b.cs 60b94 <zero_normalmem+0xb8> // b.hs, b.nlast
60b84: d50b7420 dc zva, x0
60b88: 8b030000 add x0, x0, x3
60b8c: eb04001f cmp x0, x4
60b90: 54ffffa3 b.cc 60b84 <zero_normalmem+0xa8> // b.lo, b.ul, b.last
60b94: 927cec44 and x4, x2, #0xfffffffffffffff0
60b98: eb04001f cmp x0, x4
60b9c: 54000082 b.cs 60bac <zero_normalmem+0xd0> // b.hs, b.nlast
60ba0: a8817c1f stp xzr, xzr, [x0], #16
60ba4: eb04001f cmp x0, x4
60ba8: 54ffffc3 b.cc 60ba0 <zero_normalmem+0xc4> // b.lo, b.ul, b.last
60bac: eb02001f cmp x0, x2
60bb0: 54000080 b.eq 60bc0 <zero_normalmem+0xe4> // b.none
60bb4: 3800141f strb wzr, [x0], #1
60bb8: eb02001f cmp x0, x2
60bbc: 54ffffc1 b.ne 60bb4 <zero_normalmem+0xd8> // b.any
60bc0: d65f03c0 ret
60bc4: f2400c1f tst x0, #0xf
60bc8: 54fffe60 b.eq 60b94 <zero_normalmem+0xb8> // b.none
60bcc: b2400c04 orr x4, x0, #0xf
60bd0: 91000484 add x4, x4, #0x1
60bd4: b4fffec4 cbz x4, 60bac <zero_normalmem+0xd0>
60bd8: eb02009f cmp x4, x2
60bdc: 54fffe82 b.cs 60bac <zero_normalmem+0xd0> // b.hs, b.nlast
60be0: 3800141f strb wzr, [x0], #1
60be4: eb04001f cmp x0, x4
60be8: 54ffffc1 b.ne 60be0 <zero_normalmem+0x104> // b.any
60bec: 17ffffea b 60b94 <zero_normalmem+0xb8>
0000000000060bf0 <plat_disable_acp>:
60bf0: d65f03c0 ret
0000000000060bf4 <bl31_plat_enable_mmu>:
60bf4: 17fffb23 b 5f880 <enable_mmu_direct_el3>
0000000000060bf8 <plat_handle_double_fault>:
60bf8: 17fffcd9 b 5ff5c <report_unhandled_exception>
0000000000060bfc <plat_handle_el3_ea>:
60bfc: 17fffcd8 b 5ff5c <report_unhandled_exception>
0000000000060c00 <plat_crash_console_init>:
60c00: aa1e03e4 mov x4, x30
60c04: d2800003 mov x3, #0x0 // #0
60c08: d53e1001 mrs x1, sctlr_el3
60c0c: f27e003f tst x1, #0x4
60c10: 54000080 b.eq 60c20 <skip_spinlock> // b.none
60c14: f0000020 adrp x0, 67000 <__RO_END__>
60c18: 9101b000 add x0, x0, #0x6c
60c1c: 97fffe69 bl 605c0 <spin_lock>
0000000000060c20 <skip_spinlock>:
60c20: f0000021 adrp x1, 67000 <__RO_END__>
60c24: 9101c421 add x1, x1, #0x71
60c28: 08dffc22 ldarb w2, [x1]
60c2c: 7100005f cmp w2, #0x0
60c30: 54000061 b.ne 60c3c <init_error> // b.any
60c34: d2800023 mov x3, #0x1 // #1
60c38: 089ffc23 stlrb w3, [x1]
0000000000060c3c <init_error>:
60c3c: 97fffe69 bl 605e0 <spin_unlock>
60c40: aa0303e0 mov x0, x3
60c44: d65f0080 ret x4
0000000000060c48 <plat_crash_console_putc>:
60c48: f0000021 adrp x1, 67000 <__RO_END__>
60c4c: 91000021 add x1, x1, #0x0
60c50: a9003c2e stp x14, x15, [x1]
60c54: a9014430 stp x16, x17, [x1, #16]
60c58: f900103e str x30, [x1, #32]
60c5c: 2a0003ee mov w14, w0
60c60: b000006f adrp x15, 6d000 <dist_ctx+0x1e50>
60c64: f94501ef ldr x15, [x15, #2560]
0000000000060c68 <putc_loop>:
60c68: b400026f cbz x15, 60cb4 <putc_done>
60c6c: b94009e1 ldr w1, [x15, #8]
60c70: 721e003f tst w1, #0x4
60c74: 540001c0 b.eq 60cac <putc_continue> // b.none
60c78: f94009e2 ldr x2, [x15, #16]
60c7c: b4000182 cbz x2, 60cac <putc_continue>
60c80: 710029df cmp w14, #0xa
60c84: 540000e1 b.ne 60ca0 <putc> // b.any
60c88: 7218003f tst w1, #0x100
60c8c: 540000a0 b.eq 60ca0 <putc> // b.none
60c90: aa0f03e1 mov x1, x15
60c94: 528001a0 mov w0, #0xd // #13
60c98: d63f0040 blr x2
60c9c: f94009e2 ldr x2, [x15, #16]
0000000000060ca0 <putc>:
60ca0: aa0f03e1 mov x1, x15
60ca4: 2a0e03e0 mov w0, w14
60ca8: d63f0040 blr x2
0000000000060cac <putc_continue>:
60cac: f94001ef ldr x15, [x15]
60cb0: 17ffffee b 60c68 <putc_loop>
0000000000060cb4 <putc_done>:
60cb4: f0000021 adrp x1, 67000 <__RO_END__>
60cb8: 91000021 add x1, x1, #0x0
60cbc: a9403c2e ldp x14, x15, [x1]
60cc0: a9414430 ldp x16, x17, [x1, #16]
60cc4: f940103e ldr x30, [x1, #32]
60cc8: d65f03c0 ret
0000000000060ccc <plat_crash_console_flush>:
60ccc: f0000021 adrp x1, 67000 <__RO_END__>
60cd0: 91000021 add x1, x1, #0x0
60cd4: a9003c3e stp x30, x15, [x1]
60cd8: a9014430 stp x16, x17, [x1, #16]
60cdc: b000006f adrp x15, 6d000 <dist_ctx+0x1e50>
60ce0: f94501ef ldr x15, [x15, #2560]
0000000000060ce4 <flush_loop>:
60ce4: b400014f cbz x15, 60d0c <flush_done>
60ce8: b94009e1 ldr w1, [x15, #8]
60cec: 721e003f tst w1, #0x4
60cf0: 540000a0 b.eq 60d04 <flush_continue> // b.none
60cf4: f94011e2 ldr x2, [x15, #32]
60cf8: b4000062 cbz x2, 60d04 <flush_continue>
60cfc: aa0f03e0 mov x0, x15
60d00: d63f0040 blr x2
0000000000060d04 <flush_continue>:
60d04: f94001ef ldr x15, [x15]
60d08: 17fffff7 b 60ce4 <flush_loop>
0000000000060d0c <flush_done>:
60d0c: f0000021 adrp x1, 67000 <__RO_END__>
60d10: 91000021 add x1, x1, #0x0
60d14: a9403c3e ldp x30, x15, [x1]
60d18: a9414430 ldp x16, x17, [x1, #16]
60d1c: d65f03c0 ret
0000000000060d20 <fdt32_to_cpu>:
60d20: 5ac00800 rev w0, w0
60d24: d65f03c0 ret
0000000000060d28 <fdt64_to_cpu>:
60d28: dac00c00 rev x0, x0
60d2c: d65f03c0 ret
0000000000060d30 <nextprop_>:
60d30: a9bd7bfd stp x29, x30, [sp, #-48]!
60d34: 910003fd mov x29, sp
60d38: a90153f3 stp x19, x20, [sp, #16]
60d3c: aa0003f4 mov x20, x0
60d40: 2a0103f3 mov w19, w1
60d44: 9100b3e2 add x2, sp, #0x2c
60d48: 2a1303e1 mov w1, w19
60d4c: aa1403e0 mov x0, x20
60d50: 94000292 bl 61798 <fdt_next_tag>
60d54: 71000c1f cmp w0, #0x3
60d58: 540000e0 b.eq 60d74 <nextprop_+0x44> // b.none
60d5c: b9402ff3 ldr w19, [sp, #44]
60d60: 7100241f cmp w0, #0x9
60d64: 54000101 b.ne 60d84 <nextprop_+0x54> // b.any
60d68: 7100027f cmp w19, #0x0
60d6c: 12800141 mov w1, #0xfffffff5 // #-11
60d70: 1a81b273 csel w19, w19, w1, lt // lt = tstop
60d74: 2a1303e0 mov w0, w19
60d78: a94153f3 ldp x19, x20, [sp, #16]
60d7c: a8c37bfd ldp x29, x30, [sp], #48
60d80: d65f03c0 ret
60d84: 7100101f cmp w0, #0x4
60d88: 54fffde0 b.eq 60d44 <nextprop_+0x14> // b.none
60d8c: 12800013 mov w19, #0xffffffff // #-1
60d90: 17fffff9 b 60d74 <nextprop_+0x44>
0000000000060d94 <fdt_get_property_by_offset_>:
60d94: a9bd7bfd stp x29, x30, [sp, #-48]!
60d98: 910003fd mov x29, sp
60d9c: a90153f3 stp x19, x20, [sp, #16]
60da0: aa0003f3 mov x19, x0
60da4: aa0203f4 mov x20, x2
60da8: f90013f5 str x21, [sp, #32]
60dac: 93407c35 sxtw x21, w1
60db0: 940002cc bl 618e0 <fdt_check_prop_offset_>
60db4: 36f800a0 tbz w0, #31, 60dc8 <fdt_get_property_by_offset_+0x34>
60db8: b4000054 cbz x20, 60dc0 <fdt_get_property_by_offset_+0x2c>
60dbc: b9000280 str w0, [x20]
60dc0: d2800013 mov x19, #0x0 // #0
60dc4: 14000009 b 60de8 <fdt_get_property_by_offset_+0x54>
60dc8: b9400a60 ldr w0, [x19, #8]
60dcc: 97ffffd5 bl 60d20 <fdt32_to_cpu>
60dd0: 8b2042b5 add x21, x21, w0, uxtw
60dd4: 8b150273 add x19, x19, x21
60dd8: b4000094 cbz x20, 60de8 <fdt_get_property_by_offset_+0x54>
60ddc: b9400660 ldr w0, [x19, #4]
60de0: 97ffffd0 bl 60d20 <fdt32_to_cpu>
60de4: b9000280 str w0, [x20]
60de8: aa1303e0 mov x0, x19
60dec: a94153f3 ldp x19, x20, [sp, #16]
60df0: f94013f5 ldr x21, [sp, #32]
60df4: a8c37bfd ldp x29, x30, [sp], #48
60df8: d65f03c0 ret
0000000000060dfc <fdt_string>:
60dfc: a9bf7bfd stp x29, x30, [sp, #-16]!
60e00: aa0003e2 mov x2, x0
60e04: 910003fd mov x29, sp
60e08: b9400c00 ldr w0, [x0, #12]
60e0c: 97ffffc5 bl 60d20 <fdt32_to_cpu>
60e10: 93407c21 sxtw x1, w1
60e14: 8b204020 add x0, x1, w0, uxtw
60e18: 8b000040 add x0, x2, x0
60e1c: a8c17bfd ldp x29, x30, [sp], #16
60e20: d65f03c0 ret
0000000000060e24 <fdt_num_mem_rsv>:
60e24: a9bf7bfd stp x29, x30, [sp, #-16]!
60e28: aa0003e1 mov x1, x0
60e2c: 910003fd mov x29, sp
60e30: b9401000 ldr w0, [x0, #16]
60e34: 97ffffbb bl 60d20 <fdt32_to_cpu>
60e38: 8b204021 add x1, x1, w0, uxtw
60e3c: 52800002 mov w2, #0x0 // #0
60e40: f9400420 ldr x0, [x1, #8]
60e44: 97ffffb9 bl 60d28 <fdt64_to_cpu>
60e48: 91004021 add x1, x1, #0x10
60e4c: b5000080 cbnz x0, 60e5c <fdt_num_mem_rsv+0x38>
60e50: 2a0203e0 mov w0, w2
60e54: a8c17bfd ldp x29, x30, [sp], #16
60e58: d65f03c0 ret
60e5c: 11000442 add w2, w2, #0x1
60e60: 17fffff8 b 60e40 <fdt_num_mem_rsv+0x1c>
0000000000060e64 <fdt_get_name>:
60e64: a9bd7bfd stp x29, x30, [sp, #-48]!
60e68: 910003fd mov x29, sp
60e6c: a90153f3 stp x19, x20, [sp, #16]
60e70: 93407c33 sxtw x19, w1
60e74: aa0203f4 mov x20, x2
60e78: a9025bf5 stp x21, x22, [sp, #32]
60e7c: aa0003f5 mov x21, x0
60e80: b9400816 ldr w22, [x0, #8]
60e84: 94000204 bl 61694 <fdt_check_header>
60e88: 350003a0 cbnz w0, 60efc <fdt_get_name+0x98>
60e8c: 2a1303e1 mov w1, w19
60e90: aa1503e0 mov x0, x21
60e94: 94000283 bl 618a0 <fdt_check_node_offset_>
60e98: 37f80320 tbnz w0, #31, 60efc <fdt_get_name+0x98>
60e9c: 2a1603e0 mov w0, w22
60ea0: 97ffffa0 bl 60d20 <fdt32_to_cpu>
60ea4: 8b204273 add x19, x19, w0, uxtw
60ea8: b94016a0 ldr w0, [x21, #20]
60eac: 8b1302b3 add x19, x21, x19
60eb0: 91001273 add x19, x19, #0x4
60eb4: 97ffff9b bl 60d20 <fdt32_to_cpu>
60eb8: 71003c1f cmp w0, #0xf
60ebc: 540000c8 b.hi 60ed4 <fdt_get_name+0x70> // b.pmore
60ec0: aa1303e0 mov x0, x19
60ec4: 528005e1 mov w1, #0x2f // #47
60ec8: 9400048e bl 62100 <strrchr>
60ecc: b4000160 cbz x0, 60ef8 <fdt_get_name+0x94>
60ed0: 91000413 add x19, x0, #0x1
60ed4: b4000094 cbz x20, 60ee4 <fdt_get_name+0x80>
60ed8: aa1303e0 mov x0, x19
60edc: 94000474 bl 620ac <strlen>
60ee0: b9000280 str w0, [x20]
60ee4: aa1303e0 mov x0, x19
60ee8: a94153f3 ldp x19, x20, [sp, #16]
60eec: a9425bf5 ldp x21, x22, [sp, #32]
60ef0: a8c37bfd ldp x29, x30, [sp], #48
60ef4: d65f03c0 ret
60ef8: 12800140 mov w0, #0xfffffff5 // #-11
60efc: b4000054 cbz x20, 60f04 <fdt_get_name+0xa0>
60f00: b9000280 str w0, [x20]
60f04: d2800013 mov x19, #0x0 // #0
60f08: 17fffff7 b 60ee4 <fdt_get_name+0x80>
0000000000060f0c <fdt_subnode_offset_namelen>:
60f0c: a9bb7bfd stp x29, x30, [sp, #-80]!
60f10: 910003fd mov x29, sp
60f14: a90153f3 stp x19, x20, [sp, #16]
60f18: 2a0103f4 mov w20, w1
60f1c: a9025bf5 stp x21, x22, [sp, #32]
60f20: aa0003f5 mov x21, x0
60f24: aa0203f6 mov x22, x2
60f28: a90363f7 stp x23, x24, [sp, #48]
60f2c: 2a0303f7 mov w23, w3
60f30: 940001d9 bl 61694 <fdt_check_header>
60f34: 2a0003f3 mov w19, w0
60f38: 35000140 cbnz w0, 60f60 <fdt_subnode_offset_namelen+0x54>
60f3c: 2a1403f3 mov w19, w20
60f40: 93407ef8 sxtw x24, w23
60f44: b9004bff str wzr, [sp, #72]
60f48: b9404be0 ldr w0, [sp, #72]
60f4c: 7100027f cmp w19, #0x0
60f50: 7a40a801 ccmp w0, #0x0, #0x1, ge // ge = tcont
60f54: 5400012a b.ge 60f78 <fdt_subnode_offset_namelen+0x6c> // b.tcont
60f58: 7100001f cmp w0, #0x0
60f5c: 5a9fa273 csinv w19, w19, wzr, ge // ge = tcont
60f60: 2a1303e0 mov w0, w19
60f64: a94153f3 ldp x19, x20, [sp, #16]
60f68: a9425bf5 ldp x21, x22, [sp, #32]
60f6c: a94363f7 ldp x23, x24, [sp, #48]
60f70: a8c57bfd ldp x29, x30, [sp], #80
60f74: d65f03c0 ret
60f78: 7100041f cmp w0, #0x1
60f7c: 54000301 b.ne 60fdc <fdt_subnode_offset_namelen+0xd0> // b.any
60f80: 910133e2 add x2, sp, #0x4c
60f84: 2a1303e1 mov w1, w19
60f88: aa1503e0 mov x0, x21
60f8c: 97ffffb6 bl 60e64 <fdt_get_name>
60f90: aa0003f4 mov x20, x0
60f94: b4000240 cbz x0, 60fdc <fdt_subnode_offset_namelen+0xd0>
60f98: b9404fe1 ldr w1, [sp, #76]
60f9c: 6b0102ff cmp w23, w1
60fa0: 540001ec b.gt 60fdc <fdt_subnode_offset_namelen+0xd0>
60fa4: aa1803e2 mov x2, x24
60fa8: aa1603e1 mov x1, x22
60fac: 940002b8 bl 61a8c <memcmp>
60fb0: 35000160 cbnz w0, 60fdc <fdt_subnode_offset_namelen+0xd0>
60fb4: 38786a80 ldrb w0, [x20, x24]
60fb8: 34fffd40 cbz w0, 60f60 <fdt_subnode_offset_namelen+0x54>
60fbc: aa1803e2 mov x2, x24
60fc0: aa1603e0 mov x0, x22
60fc4: 52800801 mov w1, #0x40 // #64
60fc8: 940002a6 bl 61a60 <memchr>
60fcc: b5000080 cbnz x0, 60fdc <fdt_subnode_offset_namelen+0xd0>
60fd0: 38786a80 ldrb w0, [x20, x24]
60fd4: 7101001f cmp w0, #0x40
60fd8: 54fffc40 b.eq 60f60 <fdt_subnode_offset_namelen+0x54> // b.none
60fdc: 2a1303e1 mov w1, w19
60fe0: 910123e2 add x2, sp, #0x48
60fe4: aa1503e0 mov x0, x21
60fe8: 9400024e bl 61920 <fdt_next_node>
60fec: 2a0003f3 mov w19, w0
60ff0: 17ffffd6 b 60f48 <fdt_subnode_offset_namelen+0x3c>
0000000000060ff4 <fdt_first_property_offset>:
60ff4: a9be7bfd stp x29, x30, [sp, #-32]!
60ff8: 910003fd mov x29, sp
60ffc: f9000bf3 str x19, [sp, #16]
61000: aa0003f3 mov x19, x0
61004: 94000227 bl 618a0 <fdt_check_node_offset_>
61008: 37f800c0 tbnz w0, #31, 61020 <fdt_first_property_offset+0x2c>
6100c: 2a0003e1 mov w1, w0
61010: aa1303e0 mov x0, x19
61014: f9400bf3 ldr x19, [sp, #16]
61018: a8c27bfd ldp x29, x30, [sp], #32
6101c: 17ffff45 b 60d30 <nextprop_>
61020: f9400bf3 ldr x19, [sp, #16]
61024: a8c27bfd ldp x29, x30, [sp], #32
61028: d65f03c0 ret
000000000006102c <fdt_next_property_offset>:
6102c: a9be7bfd stp x29, x30, [sp, #-32]!
61030: 910003fd mov x29, sp
61034: f9000bf3 str x19, [sp, #16]
61038: aa0003f3 mov x19, x0
6103c: 94000229 bl 618e0 <fdt_check_prop_offset_>
61040: 37f800c0 tbnz w0, #31, 61058 <fdt_next_property_offset+0x2c>
61044: 2a0003e1 mov w1, w0
61048: aa1303e0 mov x0, x19
6104c: f9400bf3 ldr x19, [sp, #16]
61050: a8c27bfd ldp x29, x30, [sp], #32
61054: 17ffff37 b 60d30 <nextprop_>
61058: f9400bf3 ldr x19, [sp, #16]
6105c: a8c27bfd ldp x29, x30, [sp], #32
61060: d65f03c0 ret
0000000000061064 <fdt_get_property_namelen_>:
61064: a9bb7bfd stp x29, x30, [sp, #-80]!
61068: 910003fd mov x29, sp
6106c: a90153f3 stp x19, x20, [sp, #16]
61070: a9025bf5 stp x21, x22, [sp, #32]
61074: 93407c75 sxtw x21, w3
61078: aa0403f6 mov x22, x4
6107c: a90363f7 stp x23, x24, [sp, #48]
61080: aa0003f7 mov x23, x0
61084: aa0503f8 mov x24, x5
61088: a9046bf9 stp x25, x26, [sp, #64]
6108c: aa0203f9 mov x25, x2
61090: 97ffffd9 bl 60ff4 <fdt_first_property_offset>
61094: 2a0003f3 mov w19, w0
61098: 36f800a0 tbz w0, #31, 610ac <fdt_get_property_namelen_+0x48>
6109c: b4000056 cbz x22, 610a4 <fdt_get_property_namelen_+0x40>
610a0: b90002d3 str w19, [x22]
610a4: d2800014 mov x20, #0x0 // #0
610a8: 14000017 b 61104 <fdt_get_property_namelen_+0xa0>
610ac: aa1603e2 mov x2, x22
610b0: 2a1303e1 mov w1, w19
610b4: aa1703e0 mov x0, x23
610b8: 97ffff37 bl 60d94 <fdt_get_property_by_offset_>
610bc: aa0003f4 mov x20, x0
610c0: b4000380 cbz x0, 61130 <fdt_get_property_namelen_+0xcc>
610c4: b9400800 ldr w0, [x0, #8]
610c8: 97ffff16 bl 60d20 <fdt32_to_cpu>
610cc: 2a0003e1 mov w1, w0
610d0: aa1703e0 mov x0, x23
610d4: 97ffff4a bl 60dfc <fdt_string>
610d8: aa0003fa mov x26, x0
610dc: 940003f4 bl 620ac <strlen>
610e0: eb15001f cmp x0, x21
610e4: 540001e1 b.ne 61120 <fdt_get_property_namelen_+0xbc> // b.any
610e8: aa1503e2 mov x2, x21
610ec: aa1903e1 mov x1, x25
610f0: aa1a03e0 mov x0, x26
610f4: 94000266 bl 61a8c <memcmp>
610f8: 35000140 cbnz w0, 61120 <fdt_get_property_namelen_+0xbc>
610fc: b4000058 cbz x24, 61104 <fdt_get_property_namelen_+0xa0>
61100: b9000313 str w19, [x24]
61104: aa1403e0 mov x0, x20
61108: a94153f3 ldp x19, x20, [sp, #16]
6110c: a9425bf5 ldp x21, x22, [sp, #32]
61110: a94363f7 ldp x23, x24, [sp, #48]
61114: a9446bf9 ldp x25, x26, [sp, #64]
61118: a8c57bfd ldp x29, x30, [sp], #80
6111c: d65f03c0 ret
61120: 2a1303e1 mov w1, w19
61124: aa1703e0 mov x0, x23
61128: 97ffffc1 bl 6102c <fdt_next_property_offset>
6112c: 17ffffda b 61094 <fdt_get_property_namelen_+0x30>
61130: 12800193 mov w19, #0xfffffff3 // #-13
61134: 17ffffda b 6109c <fdt_get_property_namelen_+0x38>
0000000000061138 <fdt_getprop_namelen>:
61138: a9bd7bfd stp x29, x30, [sp, #-48]!
6113c: 910003fd mov x29, sp
61140: 9100b3e5 add x5, sp, #0x2c
61144: f9000bf3 str x19, [sp, #16]
61148: aa0003f3 mov x19, x0
6114c: 97ffffc6 bl 61064 <fdt_get_property_namelen_>
61150: aa0003e1 mov x1, x0
61154: b40001c0 cbz x0, 6118c <fdt_getprop_namelen+0x54>
61158: b9401660 ldr w0, [x19, #20]
6115c: 97fffef1 bl 60d20 <fdt32_to_cpu>
61160: 71003c1f cmp w0, #0xf
61164: 540001c8 b.hi 6119c <fdt_getprop_namelen+0x64> // b.pmore
61168: b9802fe0 ldrsw x0, [sp, #44]
6116c: 91003000 add x0, x0, #0xc
61170: f240081f tst x0, #0x7
61174: 54000140 b.eq 6119c <fdt_getprop_namelen+0x64> // b.none
61178: b9400420 ldr w0, [x1, #4]
6117c: 97fffee9 bl 60d20 <fdt32_to_cpu>
61180: 71001c1f cmp w0, #0x7
61184: 540000c9 b.ls 6119c <fdt_getprop_namelen+0x64> // b.plast
61188: 91004021 add x1, x1, #0x10
6118c: aa0103e0 mov x0, x1
61190: f9400bf3 ldr x19, [sp, #16]
61194: a8c37bfd ldp x29, x30, [sp], #48
61198: d65f03c0 ret
6119c: 91003021 add x1, x1, #0xc
611a0: 17fffffb b 6118c <fdt_getprop_namelen+0x54>
00000000000611a4 <fdt_getprop>:
611a4: a9bd7bfd stp x29, x30, [sp, #-48]!
611a8: 910003fd mov x29, sp
611ac: a90153f3 stp x19, x20, [sp, #16]
611b0: aa0003f4 mov x20, x0
611b4: aa0203f3 mov x19, x2
611b8: aa0203e0 mov x0, x2
611bc: a9025bf5 stp x21, x22, [sp, #32]
611c0: aa0303f6 mov x22, x3
611c4: 2a0103f5 mov w21, w1
611c8: 940003b9 bl 620ac <strlen>
611cc: aa1603e4 mov x4, x22
611d0: 2a0003e3 mov w3, w0
611d4: aa1303e2 mov x2, x19
611d8: 2a1503e1 mov w1, w21
611dc: aa1403e0 mov x0, x20
611e0: a94153f3 ldp x19, x20, [sp, #16]
611e4: a9425bf5 ldp x21, x22, [sp, #32]
611e8: a8c37bfd ldp x29, x30, [sp], #48
611ec: 17ffffd3 b 61138 <fdt_getprop_namelen>
00000000000611f0 <fdt_get_alias_namelen>:
611f0: a9bd7bfd stp x29, x30, [sp, #-48]!
611f4: 910003fd mov x29, sp
611f8: a90153f3 stp x19, x20, [sp, #16]
611fc: aa0103f4 mov x20, x1
61200: aa0003f3 mov x19, x0
61204: 90000021 adrp x1, 65000 <panic_msg+0xb>
61208: 9103b821 add x1, x1, #0xee
6120c: f90013f5 str x21, [sp, #32]
61210: 2a0203f5 mov w21, w2
61214: 9400004e bl 6134c <fdt_path_offset>
61218: 37f80140 tbnz w0, #31, 61240 <fdt_get_alias_namelen+0x50>
6121c: 2a0003e1 mov w1, w0
61220: 2a1503e3 mov w3, w21
61224: aa1403e2 mov x2, x20
61228: aa1303e0 mov x0, x19
6122c: a94153f3 ldp x19, x20, [sp, #16]
61230: d2800004 mov x4, #0x0 // #0
61234: f94013f5 ldr x21, [sp, #32]
61238: a8c37bfd ldp x29, x30, [sp], #48
6123c: 17ffffbf b 61138 <fdt_getprop_namelen>
61240: d2800000 mov x0, #0x0 // #0
61244: a94153f3 ldp x19, x20, [sp, #16]
61248: f94013f5 ldr x21, [sp, #32]
6124c: a8c37bfd ldp x29, x30, [sp], #48
61250: d65f03c0 ret
0000000000061254 <fdt_path_offset_namelen>:
61254: a9bc7bfd stp x29, x30, [sp, #-64]!
61258: 910003fd mov x29, sp
6125c: a90153f3 stp x19, x20, [sp, #16]
61260: aa0103f3 mov x19, x1
61264: a9025bf5 stp x21, x22, [sp, #32]
61268: 2a0203f5 mov w21, w2
6126c: f9001bf7 str x23, [sp, #48]
61270: aa0003f7 mov x23, x0
61274: 94000108 bl 61694 <fdt_check_header>
61278: 2a0003f4 mov w20, w0
6127c: 35000580 cbnz w0, 6132c <fdt_path_offset_namelen+0xd8>
61280: 39400260 ldrb w0, [x19]
61284: 93407ea2 sxtw x2, w21
61288: 8b35c275 add x21, x19, w21, sxtw
6128c: 7100bc1f cmp w0, #0x2f
61290: 54000200 b.eq 612d0 <fdt_path_offset_namelen+0x7c> // b.none
61294: 528005e1 mov w1, #0x2f // #47
61298: aa1303e0 mov x0, x19
6129c: 940001f1 bl 61a60 <memchr>
612a0: f100001f cmp x0, #0x0
612a4: 9a951016 csel x22, x0, x21, ne // ne = any
612a8: aa1303e1 mov x1, x19
612ac: 4b1302c2 sub w2, w22, w19
612b0: aa1703e0 mov x0, x23
612b4: 97ffffcf bl 611f0 <fdt_get_alias_namelen>
612b8: aa0003e1 mov x1, x0
612bc: b4000440 cbz x0, 61344 <fdt_path_offset_namelen+0xf0>
612c0: aa1703e0 mov x0, x23
612c4: aa1603f3 mov x19, x22
612c8: 94000021 bl 6134c <fdt_path_offset>
612cc: 2a0003f4 mov w20, w0
612d0: eb15027f cmp x19, x21
612d4: 540002c2 b.cs 6132c <fdt_path_offset_namelen+0xd8> // b.hs, b.nlast
612d8: aa1303f6 mov x22, x19
612dc: 394002c0 ldrb w0, [x22]
612e0: 7100bc1f cmp w0, #0x2f
612e4: 540001e0 b.eq 61320 <fdt_path_offset_namelen+0xcc> // b.none
612e8: cb1602a2 sub x2, x21, x22
612ec: 528005e1 mov w1, #0x2f // #47
612f0: aa1603e0 mov x0, x22
612f4: 940001db bl 61a60 <memchr>
612f8: f100001f cmp x0, #0x0
612fc: 2a1403e1 mov w1, w20
61300: 9a951013 csel x19, x0, x21, ne // ne = any
61304: aa1603e2 mov x2, x22
61308: 4b160263 sub w3, w19, w22
6130c: aa1703e0 mov x0, x23
61310: 97fffeff bl 60f0c <fdt_subnode_offset_namelen>
61314: 2a0003f4 mov w20, w0
61318: 36fffdc0 tbz w0, #31, 612d0 <fdt_path_offset_namelen+0x7c>
6131c: 14000004 b 6132c <fdt_path_offset_namelen+0xd8>
61320: 910006d6 add x22, x22, #0x1
61324: eb1602bf cmp x21, x22
61328: 54fffda1 b.ne 612dc <fdt_path_offset_namelen+0x88> // b.any
6132c: 2a1403e0 mov w0, w20
61330: a94153f3 ldp x19, x20, [sp, #16]
61334: a9425bf5 ldp x21, x22, [sp, #32]
61338: f9401bf7 ldr x23, [sp, #48]
6133c: a8c47bfd ldp x29, x30, [sp], #64
61340: d65f03c0 ret
61344: 12800094 mov w20, #0xfffffffb // #-5
61348: 17fffff9 b 6132c <fdt_path_offset_namelen+0xd8>
000000000006134c <fdt_path_offset>:
6134c: a9be7bfd stp x29, x30, [sp, #-32]!
61350: 910003fd mov x29, sp
61354: a90153f3 stp x19, x20, [sp, #16]
61358: aa0003f4 mov x20, x0
6135c: aa0103f3 mov x19, x1
61360: aa0103e0 mov x0, x1
61364: 94000352 bl 620ac <strlen>
61368: aa1303e1 mov x1, x19
6136c: 2a0003e2 mov w2, w0
61370: aa1403e0 mov x0, x20
61374: a94153f3 ldp x19, x20, [sp, #16]
61378: a8c27bfd ldp x29, x30, [sp], #32
6137c: 17ffffb6 b 61254 <fdt_path_offset_namelen>
0000000000061380 <cpu_to_fdt32>:
61380: 5ac00800 rev w0, w0
61384: d65f03c0 ret
0000000000061388 <fdt_blocks_misordered_>:
61388: a9bf7bfd stp x29, x30, [sp, #-16]!
6138c: aa0003e3 mov x3, x0
61390: 910003fd mov x29, sp
61394: b9401000 ldr w0, [x0, #16]
61398: 97fffffa bl 61380 <cpu_to_fdt32>
6139c: 71009c1f cmp w0, #0x27
613a0: 54000309 b.ls 61400 <fdt_blocks_misordered_+0x78> // b.plast
613a4: 2a0003e5 mov w5, w0
613a8: b9400860 ldr w0, [x3, #8]
613ac: 97fffff5 bl 61380 <cpu_to_fdt32>
613b0: 0b050021 add w1, w1, w5
613b4: 2a0003e4 mov w4, w0
613b8: 6b01001f cmp w0, w1
613bc: 54000223 b.cc 61400 <fdt_blocks_misordered_+0x78> // b.lo, b.ul, b.last
61
Raw
bl31.map
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Raw
full_boot_suspend_log.txt
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@sigmaris
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@AlexeiFedorov I created this new gist with bl31.dump and bl31.map from TF-A compiled with GCC 9.2.0 (from Arch Linux).
I also included a full boot and suspend log using the resulting bl31.elf (compiled with make -j$(getconf _NPROCESSORS_ONLN) CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399 DEBUG=1 LOG_LEVEL=50 ENABLE_BACKTRACE=1 bl31).

Note in the full boot & suspend log you'll see that I have to unbind the dwc3 driver in Linux from the USB controllers before suspending, otherwise it prevents suspend, but I think that's not related to the exception happening in TF-A.

@AlexeiFedorov
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From crash dump:
x16 = 0x00000000ff8c1000
x30 = 0x0000000000055078 ------------->

55070: 52800020 mov w0, #0x1 // #1
55074: 97ffac2b bl 40120 <__sram_func_set_ddrctl_pll_veneer>
55078: d29c4200 mov x0, #0xe210 // #57872
...
0000000000040120 <__sram_func_set_ddrctl_pll_veneer>:
40120: b07fc410 adrp x16, ff8c1000 <__sram_incbin_end>
40124: 91000210 add x16, x16, #0x0
40128: d61f0200 br x16

x16 = 0x00000000ff8c1000

What is the disassembly for function @0xff8c1000?

@sigmaris
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What is the disassembly for function @0xff8c1000?

I'm not experienced at reading these dump files but I think that's on line 1059 in bl31.dump:

00000000ff8c1000 <sram_func_set_ddrctl_pll>:
    ff8c1000:	aa0003e8 	mov	x8, x0

@AlexeiFedorov
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Why do you need to disable & reenable MMU in sram_func_set_ddrctl_pll()?

@sigmaris
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@AlexeiFedorov I'm not sure of the exact why - I'm just compiling the upstream TF-A code from https://github.com/ARM-software/arm-trusted-firmware/

It looks like the disable/reenable code was added in this commit ARM-software/arm-trusted-firmware@4c127e6#diff-a87bcbe1b5acd0f09a08569389a58aa9 which shuts down the "center" power domain in suspend, and does some save/restore DDR settings around that.

@AlexeiFedorov
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With MMU being disabled DEV-RW-S-EXEC memory @0xff310000 and 0xff760000 is treated as a normal memory, which might have side effects when you reprogram PMU & CRU registers.

@theotherjimmy
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I tried removing the MMU disabling bit, and it does not affect the failure mode, only the value of far_el3 is affected. That may be a red herring though, as that seems like it changes every boot.

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