Makefile to compile c files in the project with autovar.

Makefile

CC = gcc
CFLAGS = -Wall
OBJDIR = out

SRCS = $(wildcard *.c */*.c)
OB = $(notdir $(patsubst %.c,%.o,$(SRCS)))
OBJS = $(addprefix $(OBJDIR)/,$(OB))

all: main

# Check evaluated values
debug:
	@echo 'SRCS: "$(SRCS)"'
	@echo 'OB: "$(OB)"'
	@echo 'OBJS: "$(OBJS)"'

main: $(OBJS)
	$(CC) $(CFLAGS) -o $@ $^ 

# Compile with static lib
# main: main.o libex.a
# 	$(CC) $(CFLAGS) -o $@ $^ -L. -lex

*/%.o: %.c
	$(CC) $(CFLAGS) -c -o $@ $<

*/%.o: */%.c
	$(CC) $(CFLAGS) -c -o $@ $<

libex.a: $(OBJS)
	ar -rcs libex.a $^

.PHONY: clean all

clean:
	rm -rf *.o */*.o main libex.a
  
# Change libex to your lib name
# Use debug rule to check the eval values 

# Compile all of the o files into a static lib with "libex.a" rule
# Compile all of the c files into out with the "all" rule