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July 22, 2019 20:14
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#include <stdio.h> | |
#include <stdlib.h> | |
#include <unistd.h> | |
#include <string.h> | |
#include <fcntl.h> | |
#include <time.h> | |
#include <termios.h> | |
#include <sys/time.h> | |
#include <sys/timeb.h> | |
#include <sys/types.h> | |
#include <sys/ioctl.h> | |
#include <ctype.h> | |
#include <math.h> | |
#include <signal.h> | |
#include <sys/stat.h> | |
#include <sys/mman.h> | |
#include <sys/select.h> | |
#include <pthread.h> | |
#include <sched.h> | |
#pragma region | |
#ifndef _ERRNO_H_ | |
#define _ERRNO_H_ | |
#define E_MEM_OPEN 612 | |
#define E_MEM_MAP 613 | |
#define E_MUX_INVAL 614 | |
#define E_MUX_UNROUTED 615 | |
#define E_MUX_GPIOONLY 616 | |
#endif | |
#define RK_GPIO0 0 | |
#define RK_GPIO1 1 | |
#define RK_GPIO2 2 | |
#define RK_GPIO3 3 | |
#define RK_GPIO4 4 | |
#define RK_GPIO6 6 | |
#define RK_FUNC_GPIO 0 | |
#define RK_FUNC_1 1 | |
#define RK_FUNC_2 2 | |
#define ROCKCHIP_GPIO_INPUT 1 | |
#define ROCKCHIP_GPIO_OUTPUT 0 | |
#define ROCKCHIP_PULL_UP 0 | |
#define ROCKCHIP_PULL_DOWN 1 | |
#define GPIO_SWPORT_DR 0x00 | |
#define GPIO_SWPORT_DDR 0x04 | |
#define GPIO_INTEN 0x30 | |
#define GPIO_INTMASK 0x34 | |
#define GPIO_INTTYPE_LEVEL 0x38 | |
#define GPIO_INT_POLARITY 0x3c | |
#define GPIO_INT_STATUS 0x40 | |
#define GPIO_INT_RAWSTATUS 0x44 | |
#define GPIO_DEBOUNCE 0x48 | |
#define GPIO_PORTS_EOI 0x4c | |
#define GPIO_EXT_PORT 0x50 | |
#define GPIO_LS_SYNC 0x60 | |
#define BIT(nr) (1UL << (nr)) | |
#define IOMUX_GPIO_ONLY BIT(0) | |
#define IOMUX_WIDTH_4BIT BIT(1) | |
#define IOMUX_SOURCE_PMU BIT(2) | |
#define IOMUX_UNROUTED BIT(3) | |
struct rockchip_iomux | |
{ | |
int type; | |
int offset; | |
}; | |
struct rockchip_pin_bank | |
{ | |
void *reg_base; | |
int irq; | |
int pin_base; | |
int nr_pins; | |
char *name; | |
int bank_num; | |
struct rockchip_iomux iomux[4]; | |
int valid; | |
int toggle_edge_mode; | |
//void *reg_mapped_base; | |
volatile void *reg_mapped_base; | |
}; | |
struct rockchip_pin_ctrl | |
{ | |
struct rockchip_pin_bank *pin_banks; | |
unsigned int nr_banks; | |
unsigned int nr_pins; | |
char *label; | |
int grf_mux_offset; | |
int pmu_mux_offset; | |
void *grf_base; | |
void *pmu_base; | |
//void *grf_mapped_base; | |
//void *pmu_mapped_base; | |
volatile void *grf_mapped_base; | |
volatile void *pmu_mapped_base; | |
}; | |
#define PIN_BANK(id, addr, pins, label) \ | |
{ \ | |
.bank_num = id, \ | |
.reg_base = (void *)addr, \ | |
.nr_pins = pins, \ | |
.name = label, \ | |
.iomux = { \ | |
{.offset = -1}, \ | |
{.offset = -1}, \ | |
{.offset = -1}, \ | |
{.offset = -1}, \ | |
}, \ | |
} | |
#define PIN_BANK_IOMUX_FLAGS(id, addr, pins, label, iom0, iom1, iom2, iom3) \ | |
{ \ | |
.bank_num = id, \ | |
.reg_base = (void *)addr, \ | |
.nr_pins = pins, \ | |
.name = label, \ | |
.iomux = { \ | |
{.type = iom0, .offset = -1}, \ | |
{.type = iom1, .offset = -1}, \ | |
{.type = iom2, .offset = -1}, \ | |
{.type = iom3, .offset = -1}, \ | |
}, \ | |
} | |
static inline void writel(unsigned int b, volatile void *addr) | |
{ | |
*(volatile unsigned int *)addr = b; | |
} | |
static struct rockchip_pin_bank rk3188_pin_banks[] = { | |
PIN_BANK_IOMUX_FLAGS(0, 0x2000a000, 32, "gpio0", IOMUX_GPIO_ONLY, IOMUX_GPIO_ONLY, 0, 0), | |
PIN_BANK(1, 0x2003c000, 32, "gpio1"), | |
PIN_BANK(2, 0x2003e000, 32, "gpio2"), | |
PIN_BANK(3, 0x20080000, 32, "gpio3"), | |
}; | |
static struct rockchip_pin_ctrl rk3188_pin_ctrl = { | |
.pin_banks = rk3188_pin_banks, | |
.nr_banks = sizeof(rk3188_pin_banks) / sizeof(struct rockchip_pin_bank), | |
.label = "RK3188-GPIO", | |
.grf_mux_offset = 0x60, | |
.pmu_base = (void *)0x20004000, | |
.grf_base = (void *)0x20008000, | |
}; | |
struct rockchip_pin_ctrl *rkxx_pin_ctrl = &rk3188_pin_ctrl; | |
static struct rockchip_pin_bank *pin_to_bank(unsigned pin) | |
{ | |
struct rockchip_pin_bank *b = rkxx_pin_ctrl->pin_banks; | |
while (pin >= (b->pin_base + b->nr_pins)) | |
b++; | |
return b; | |
} | |
static int map_reg(void *reg, volatile void **reg_mapped) | |
{ | |
int fd; | |
unsigned int addr_start, addr_offset; | |
unsigned int pagesize, pagemask; | |
void *pc; | |
#ifdef O_NONBLOCK | |
#ifdef O_DIRECT | |
fd = open("/dev/mem", O_RDWR | O_DIRECT | O_NONBLOCK); | |
#else | |
fd = open("/dev/mem", O_RDWR | O_NONBLOCK); | |
#endif | |
#else | |
#ifdef O_DIRECT | |
fd = open("/dev/mem", O_RDWR | O_DIRECT); | |
#else | |
fd = open("/dev/mem", O_RDWR); | |
#endif | |
#endif | |
if (fd < 0) | |
{ | |
return -E_MEM_OPEN; | |
} | |
pagesize = sysconf(_SC_PAGESIZE); | |
pagemask = (~(pagesize - 1)); | |
addr_start = (unsigned int)reg & pagemask; | |
addr_offset = (unsigned int)reg & ~pagemask; | |
pc = (void *)mmap(0, pagesize * 2, PROT_READ | PROT_WRITE, MAP_SHARED, fd, addr_start); | |
if (pc == MAP_FAILED) | |
{ | |
return -E_MEM_MAP; | |
} | |
close(fd); | |
*reg_mapped = (pc + addr_offset); | |
return 0; | |
} | |
int rockchip_gpio_init(void) | |
{ | |
int grf_offs, pmu_offs, i, j; | |
int ret; | |
struct rockchip_pin_ctrl *ctrl = rkxx_pin_ctrl; | |
struct rockchip_pin_bank *bank = ctrl->pin_banks; | |
grf_offs = ctrl->grf_mux_offset; | |
pmu_offs = ctrl->pmu_mux_offset; | |
for (i = 0; i < ctrl->nr_banks; ++i, ++bank) | |
{ | |
int bank_pins = 0; | |
bank->pin_base = ctrl->nr_pins; | |
ctrl->nr_pins += bank->nr_pins; | |
for (j = 0; j < 4; j++) | |
{ | |
struct rockchip_iomux *iom = &bank->iomux[j]; | |
int inc; | |
if (bank_pins >= bank->nr_pins) | |
break; | |
if (iom->offset >= 0) | |
{ | |
if (iom->type & IOMUX_SOURCE_PMU) | |
pmu_offs = iom->offset; | |
else | |
grf_offs = iom->offset; | |
} | |
else | |
{ | |
iom->offset = (iom->type & IOMUX_SOURCE_PMU) ? pmu_offs : grf_offs; | |
} | |
inc = (iom->type & IOMUX_WIDTH_4BIT) ? 8 : 4; | |
if (iom->type & IOMUX_SOURCE_PMU) | |
pmu_offs += inc; | |
else | |
grf_offs += inc; | |
bank_pins += 8; | |
} | |
ret = map_reg(bank->reg_base, &bank->reg_mapped_base); | |
if (ret < 0) | |
return ret; | |
} | |
ret = map_reg(ctrl->pmu_base, &ctrl->pmu_mapped_base); | |
if (ret < 0) | |
return ret; | |
ret = map_reg(ctrl->grf_base, &ctrl->grf_mapped_base); | |
if (ret < 0) | |
return ret; | |
return 0; | |
} | |
int pinMode(unsigned int pin, int pinMask, volatile unsigned int *pinPD, struct rockchip_pin_bank *bank, unsigned int input) | |
{ | |
int ret = rockchip_gpio_set_mux(pin, RK_FUNC_GPIO, bank); | |
if (ret < 0) | |
return ret; | |
if (!input) | |
{ | |
(*(pinPD)) |= BIT(pinMask); | |
} | |
else | |
{ | |
(*(pinPD)) &= ~BIT(pinMask); | |
} | |
return 0; | |
} | |
/*void digitalWrite(volatile unsigned int *pinPO, int pinMask, unsigned int val) | |
{ | |
if (val) | |
{ | |
(*(pinPO)) |= BIT(pinMask); | |
} | |
else | |
{ | |
(*(pinPO)) &= ~BIT(pinMask); | |
} | |
}*/ | |
int rockchip_gpio_set_mux(unsigned int pin, unsigned int mux, struct rockchip_pin_bank *bank) | |
{ | |
int iomux_num = ((pin - bank->pin_base) / 8); | |
if (iomux_num > 3) | |
{ | |
printf("iomux_num %d \n", iomux_num); | |
printf("bank base %d \n", bank->pin_base); | |
return -E_MUX_INVAL; | |
} | |
if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) | |
{ | |
return -E_MUX_UNROUTED; | |
} | |
if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) | |
{ | |
if (mux != RK_FUNC_GPIO) | |
{ | |
return -E_MUX_GPIOONLY; | |
} | |
else | |
{ | |
return 0; | |
} | |
} | |
unsigned int data, offset, mask; | |
unsigned char bit; | |
//void *reg_mapped_base; | |
volatile void *reg_mapped_base; | |
reg_mapped_base = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) | |
? rkxx_pin_ctrl->pmu_mapped_base | |
: rkxx_pin_ctrl->grf_mapped_base; | |
mask = (bank->iomux[iomux_num].type & IOMUX_WIDTH_4BIT) ? 0xf : 0x3; | |
offset = bank->iomux[iomux_num].offset; | |
if (bank->iomux[iomux_num].type & IOMUX_WIDTH_4BIT) | |
{ | |
if ((pin % 8) >= 4) | |
offset += 0x4; | |
bit = (pin % 4) * 4; | |
} | |
else | |
{ | |
bit = (pin % 8) * 2; | |
} | |
data = (mask << (bit + 16)); | |
data |= (mux & mask) << bit; | |
writel(data, reg_mapped_base + offset); | |
return 0; | |
} | |
#pragma endregion | |
#define pinToPort(pin) (&(pin_to_bank(pin))) | |
#define pinToBitMask(pin, base) ((pin - base)) | |
#define portDirectionRegister(port) ((port->reg_mapped_base + GPIO_SWPORT_DDR)) | |
#define portOutputRegister(port) ((port->reg_mapped_base + GPIO_SWPORT_DR)) | |
#define cbi(sfr, bitmask) ((*(sfr)) &= ~BIT(bitmask)) | |
#define sbi(sfr, bitmask) ((*(sfr)) |= BIT(bitmask)) | |
#pragma region | |
#ifdef _WIN32 | |
#define timeradd(a, b, result) \ | |
do \ | |
{ \ | |
(result)->tv_sec = (a)->tv_sec + (b)->tv_sec; \ | |
(result)->tv_usec = (a)->tv_usec + (b)->tv_usec; \ | |
if ((result)->tv_usec >= 1000000L) \ | |
{ \ | |
++(result)->tv_sec; \ | |
(result)->tv_usec -= 1000000L; \ | |
} \ | |
} while (0) | |
#define timersub(a, b, result) \ | |
do \ | |
{ \ | |
(result)->tv_sec = (a)->tv_sec - (b)->tv_sec; \ | |
(result)->tv_usec = (a)->tv_usec - (b)->tv_usec; \ | |
if ((result)->tv_usec < 0) \ | |
{ \ | |
--(result)->tv_sec; \ | |
(result)->tv_usec += 1000000L; \ | |
} \ | |
} while (0) | |
#endif | |
static struct platform_t *platform = NULL; | |
#ifndef _WIN32 | |
static int setup = -2; | |
#endif | |
static void delayMicrosecondsHard(unsigned int howLong) | |
{ | |
struct timeval tNow, tLong, tEnd; | |
gettimeofday(&tNow, NULL); | |
#ifdef _WIN32 | |
tLong.tv_sec = howLong / 1000000; | |
tLong.tv_usec = howLong % 1000000; | |
#else | |
tLong.tv_sec = (__time_t)howLong / 1000000; | |
tLong.tv_usec = (__suseconds_t)howLong % 1000000; | |
#endif | |
timeradd(&tNow, &tLong, &tEnd); | |
while (timercmp(&tNow, &tEnd, <)) | |
{ | |
gettimeofday(&tNow, NULL); | |
} | |
} | |
void delayMicroseconds(unsigned int howLong) | |
{ | |
struct timespec sleeper; | |
#ifdef _WIN32 | |
long int uSecs = howLong % 1000000; | |
unsigned int wSecs = howLong / 1000000; | |
#else | |
long int uSecs = (__time_t)howLong % 1000000; | |
unsigned int wSecs = howLong / 1000000; | |
#endif | |
if (howLong == 0) | |
{ | |
return; | |
} | |
else if (howLong < 100) | |
{ | |
delayMicrosecondsHard(howLong); | |
} | |
else | |
{ | |
#ifdef _WIN32 | |
sleeper.tv_sec = wSecs; | |
#else | |
sleeper.tv_sec = (__time_t)wSecs; | |
#endif | |
sleeper.tv_nsec = (long)(uSecs * 1000L); | |
nanosleep(&sleeper, NULL); | |
} | |
} | |
#pragma endregion | |
int RS = 37; | |
int WR = 30; | |
int CS = 6; | |
int RST = 7; | |
int db0 = 28; | |
int db1 = 42; | |
int db2 = 43; | |
int db3 = 9; | |
int db4 = 44; | |
int db5 = 47; | |
int db6 = 56; | |
int db7 = 29; | |
int db10 = 57; | |
struct rockchip_pin_bank *pRS; | |
struct rockchip_pin_bank *pWR; | |
struct rockchip_pin_bank *pCS; | |
struct rockchip_pin_bank *pRST; | |
struct rockchip_pin_bank *pDb0; | |
struct rockchip_pin_bank *pDb1; | |
struct rockchip_pin_bank *pDb2; | |
struct rockchip_pin_bank *pDb3; | |
struct rockchip_pin_bank *pDb4; | |
struct rockchip_pin_bank *pDb5; | |
struct rockchip_pin_bank *pDb6; | |
struct rockchip_pin_bank *pDb7; | |
struct rockchip_pin_bank *pDb10; | |
volatile unsigned int *pdRS; | |
volatile unsigned int *pdWR; | |
volatile unsigned int *pdCS; | |
volatile unsigned int *pdRST; | |
volatile unsigned int *pdDb0; | |
volatile unsigned int *pdDb1; | |
volatile unsigned int *pdDb2; | |
volatile unsigned int *pdDb3; | |
volatile unsigned int *pdDb4; | |
volatile unsigned int *pdDb5; | |
volatile unsigned int *pdDb6; | |
volatile unsigned int *pdDb7; | |
volatile unsigned int *pdDb10; | |
volatile unsigned int *poRS; | |
volatile unsigned int *poWR; | |
volatile unsigned int *poCS; | |
volatile unsigned int *poRST; | |
volatile unsigned int *poDb0; | |
volatile unsigned int *poDb1; | |
volatile unsigned int *poDb2; | |
volatile unsigned int *poDb3; | |
volatile unsigned int *poDb4; | |
volatile unsigned int *poDb5; | |
volatile unsigned int *poDb6; | |
volatile unsigned int *poDb7; | |
volatile unsigned int *poDb10; | |
int maskRS; | |
int maskWR; | |
int maskCS; | |
int maskRST; | |
int maskDb0; | |
int maskDb1; | |
int maskDb2; | |
int maskDb3; | |
int maskDb4; | |
int maskDb5; | |
int maskDb6; | |
int maskDb7; | |
int maskDb10; | |
int red = -1; | |
int green = -1; | |
int blue = -1; | |
int pulseLow(); | |
int prepareComData(); | |
int resetLcd() | |
{ | |
sbi(poRST, maskRST); | |
delayMicroseconds(15); | |
cbi(poRST, maskRST); | |
delayMicroseconds(15); | |
sbi(poRST, maskRST); | |
delayMicroseconds(15); | |
return 1; | |
/*if (rockchip_gpio_output(RST, 1) < 0) | |
{ | |
printf("reset err\n"); | |
return 0; | |
} | |
delayMicroseconds(15); | |
//sleep(1); | |
if (rockchip_gpio_output(RST, 0) < 0) | |
{ | |
printf("reset err\n"); | |
return 0; | |
} | |
delayMicroseconds(15); | |
//sleep(1); | |
if (rockchip_gpio_output(RST, 1) < 0) | |
{ | |
printf("reset err\n"); | |
return 0; | |
} | |
delayMicroseconds(15); | |
//sleep(1); | |
return 1;*/ | |
} | |
int chipEnable() | |
{ | |
cbi(poCS, maskCS); | |
/*if (rockchip_gpio_output(CS, 0) < 0) | |
{ | |
printf("cs err\n"); | |
return 0; | |
}*/ | |
return 1; | |
} | |
int chipDisable() | |
{ | |
sbi(poCS, maskCS); | |
/*if (rockchip_gpio_output(CS, 1) < 0) | |
{ | |
printf("cs err\n"); | |
return 0; | |
}*/ | |
return 1; | |
} | |
int enableCommand() | |
{ | |
cbi(poRS, maskRS); | |
/*if (rockchip_gpio_output(RS, 0) < 0) | |
{ | |
printf("rs err\n"); | |
return 0; | |
}*/ | |
return 1; | |
} | |
int enableData() | |
{ | |
sbi(poRS, maskRS); | |
/*if (rockchip_gpio_output(RS, 1) < 0) | |
{ | |
printf("rs err\n"); | |
return 0; | |
}*/ | |
return 1; | |
} | |
int LCD_Write_COM(uint VL) | |
{ | |
if (!enableCommand()) | |
{ | |
return 0; | |
} | |
if (!prepareComData(VL)) | |
{ | |
return 0; | |
} | |
if (!pulseLow()) | |
{ | |
return 0; | |
} | |
//sleep(1); | |
if (!prepareComData(0)) | |
{ | |
return 0; | |
} | |
return 1; | |
} | |
int LCD_Write_COM_Data(uint VL) | |
{ | |
if (!enableData()) | |
{ | |
return 0; | |
} | |
if (!prepareComData(VL)) | |
{ | |
return 0; | |
} | |
if (!pulseLow()) | |
{ | |
return 0; | |
} | |
//sleep(1); | |
if (!prepareComData(0)) | |
{ | |
return 0; | |
} | |
return 1; | |
} | |
int pulseLow() | |
{ | |
cbi(poWR, maskWR); | |
sbi(poWR, maskWR); | |
/*if (rockchip_gpio_output(WR, 0) < 0) | |
{ | |
printf("wr err\n"); | |
return 0; | |
} | |
//delayMicroseconds(15); | |
if (rockchip_gpio_output(WR, 1) < 0) | |
{ | |
printf("wr err\n"); | |
return 0; | |
}*/ | |
//delayMicroseconds(15); | |
return 1; | |
} | |
int prepareComData(uint VL) | |
{ | |
if (VL & (1 << 0 % 8)) | |
{ | |
sbi(poDb0, maskDb0); | |
} | |
else | |
{ | |
cbi(poDb0, maskDb0); | |
} | |
if (VL & (1 << 1 % 8)) | |
{ | |
sbi(poDb1, maskDb1); | |
} | |
else | |
{ | |
cbi(poDb1, maskDb1); | |
} | |
if (VL & (1 << 2 % 8)) | |
{ | |
sbi(poDb2, maskDb2); | |
} | |
else | |
{ | |
cbi(poDb2, maskDb2); | |
} | |
if (VL & (1 << 3 % 8)) | |
{ | |
sbi(poDb3, maskDb3); | |
} | |
else | |
{ | |
cbi(poDb3, maskDb3); | |
} | |
if (VL & (1 << 4 % 8)) | |
{ | |
sbi(poDb4, maskDb4); | |
} | |
else | |
{ | |
cbi(poDb4, maskDb4); | |
} | |
if (VL & (1 << 5 % 8)) | |
{ | |
sbi(poDb5, maskDb5); | |
} | |
else | |
{ | |
cbi(poDb5, maskDb5); | |
} | |
if (VL & (1 << 6 % 8)) | |
{ | |
sbi(poDb6, maskDb6); | |
} | |
else | |
{ | |
cbi(poDb6, maskDb6); | |
} | |
if (VL & (1 << 7 % 8)) | |
{ | |
sbi(poDb7, maskDb7); | |
} | |
else | |
{ | |
cbi(poDb7, maskDb7); | |
} | |
cbi(poDb10, maskDb10); | |
return 1; | |
} | |
/*int prepareComData(uint VL) | |
{ | |
if (VL & (1 << 0 % 8)) | |
{ | |
sbi(poDb0, maskDb0); | |
if (rockchip_gpio_output(db0, 1) < 0) | |
{ | |
printf("db0 err\n"); | |
return 0; | |
} | |
} | |
else | |
{ | |
if (rockchip_gpio_output(db0, 0) < 0) | |
{ | |
printf("db0 err\n"); | |
return 0; | |
} | |
} | |
if (VL & (1 << 1 % 8)) | |
{ | |
if (rockchip_gpio_output(db1, 1) < 0) | |
{ | |
printf("db1 err\n"); | |
return 0; | |
} | |
} | |
else | |
{ | |
if (rockchip_gpio_output(db1, 0) < 0) | |
{ | |
printf("db1 err\n"); | |
return 0; | |
} | |
} | |
if (VL & (1 << 2 % 8)) | |
{ | |
if (rockchip_gpio_output(db2, 1) < 0) | |
{ | |
printf("db2 err\n"); | |
return 0; | |
} | |
} | |
else | |
{ | |
if (rockchip_gpio_output(db2, 0) < 0) | |
{ | |
printf("db2 err\n"); | |
return 0; | |
} | |
} | |
if (VL & (1 << 3 % 8)) | |
{ | |
if (rockchip_gpio_output(db3, 1) < 0) | |
{ | |
printf("db3 err\n"); | |
return 0; | |
} | |
} | |
else | |
{ | |
if (rockchip_gpio_output(db3, 0) < 0) | |
{ | |
printf("db3 err\n"); | |
return 0; | |
} | |
} | |
if (VL & (1 << 4 % 8)) | |
{ | |
if (rockchip_gpio_output(db4, 1) < 0) | |
{ | |
printf("db4 err\n"); | |
return 0; | |
} | |
} | |
else | |
{ | |
if (rockchip_gpio_output(db4, 0) < 0) | |
{ | |
printf("db4 err\n"); | |
return 0; | |
} | |
} | |
if (VL & (1 << 5 % 8)) | |
{ | |
if (rockchip_gpio_output(db5, 1) < 0) | |
{ | |
printf("db5 err\n"); | |
return 0; | |
} | |
} | |
else | |
{ | |
if (rockchip_gpio_output(db5, 0) < 0) | |
{ | |
printf("db5 err\n"); | |
return 0; | |
} | |
} | |
if (VL & (1 << 6 % 8)) | |
{ | |
if (rockchip_gpio_output(db6, 1) < 0) | |
{ | |
printf("db6 err\n"); | |
return 0; | |
} | |
} | |
else | |
{ | |
if (rockchip_gpio_output(db6, 0) < 0) | |
{ | |
printf("db6 err\n"); | |
return 0; | |
} | |
} | |
if (VL & (1 << 7 % 8)) | |
{ | |
if (rockchip_gpio_output(db7, 1) < 0) | |
{ | |
printf("db7 err\n"); | |
return 0; | |
} | |
} | |
else | |
{ | |
if (rockchip_gpio_output(db7, 0) < 0) | |
{ | |
printf("db7 err\n"); | |
return 0; | |
} | |
} | |
if (rockchip_gpio_output(db10, 0) < 0) | |
{ | |
printf("db10 err\n"); | |
return 0; | |
} | |
return 1; | |
}*/ | |
int setXY(uint x1, uint y1, uint x2, uint y2) | |
{ | |
if (!LCD_Write_COM(0x2A)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(x1 >> 8)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(x1)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(x2 >> 8)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(x2)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM(0x2B)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(y1 >> 8)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(y1)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(y2 >> 8)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(y2)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM(0x2C)) | |
{ | |
return 0; | |
} | |
if (!enableData()) | |
{ | |
return 0; | |
} | |
return 1; | |
} | |
int initLCD() | |
{ | |
if (!chipEnable()) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM(0xE2)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x1E)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x02)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x04)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM(0xE0)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x01)) | |
{ | |
return 0; | |
} | |
//sleep(1); | |
delayMicroseconds(10); | |
if (!LCD_Write_COM(0xE0)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x03)) | |
{ | |
return 0; | |
} | |
//sleep(1); | |
delayMicroseconds(10); | |
if (!LCD_Write_COM(0x01)) | |
{ | |
return 0; | |
} | |
//sleep(1); | |
delayMicroseconds(100); | |
if (!LCD_Write_COM(0xE6)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x03)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0xFF)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0xFF)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM(0xB0)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x24)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x00)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x03)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x1F)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x01)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0xDF)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x00)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM(0xB4)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x03)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0xA0)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x00)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x2E)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x30)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x00)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x0F)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x00)) | |
{ | |
return 0; | |
} | |
/*if (!LCD_Write_COM_Data(0x04)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x1F)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x00)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0xD2)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x00)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x00)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x00)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x00)) | |
{ | |
return 0; | |
}*/ | |
if (!LCD_Write_COM(0xB6)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x02)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x0D)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x00)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x10)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x10)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x00)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x08)) | |
{ | |
return 0; | |
} | |
/*if (!LCD_Write_COM_Data(0x02)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x0E)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x00)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x22)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x00)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x00)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x00)) | |
{ | |
return 0; | |
}*/ | |
if (!LCD_Write_COM(0xBA)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x0F)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM(0xB8)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x07)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x01)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM(0x36)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x14)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM(0xF0)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x03)) | |
{ | |
return 0; | |
} | |
//sleep(1); | |
delayMicroseconds(1); | |
if (!setXY(0, 0, 799, 479)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM(0x29)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM(0xBE)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x06)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0xF0)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x01)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0xF0)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x00)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x00)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM(0xD0)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM_Data(0x00)) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM(0x2C)) | |
{ | |
return 0; | |
} | |
if (!chipDisable()) | |
{ | |
return 0; | |
} | |
return 1; | |
} | |
int clrXY() | |
{ | |
if (!setXY(0, 0, 799, 479)) | |
{ | |
return 0; | |
} | |
return 1; | |
} | |
int prepareDataColor(uint r, uint g, uint b) | |
{ | |
if (b != blue) | |
{ | |
if (b & (1 << 1 % 8)) | |
{ | |
sbi(poDb0, maskDb0); | |
} | |
else | |
{ | |
cbi(poDb0, maskDb0); | |
} | |
if (b & (1 << 2 % 8)) | |
{ | |
sbi(poDb1, maskDb1); | |
} | |
else | |
{ | |
cbi(poDb1, maskDb1); | |
} | |
if (b & (1 << 3 % 8)) | |
{ | |
sbi(poDb2, maskDb2); | |
} | |
else | |
{ | |
cbi(poDb2, maskDb2); | |
} | |
if (b & (1 << 4 % 8)) | |
{ | |
sbi(poDb3, maskDb3); | |
} | |
else | |
{ | |
cbi(poDb3, maskDb3); | |
} | |
if (b & (1 << 5 % 8)) | |
{ | |
sbi(poDb4, maskDb4); | |
} | |
else | |
{ | |
cbi(poDb4, maskDb4); | |
} | |
blue = b; | |
} | |
if (g != green) | |
{ | |
if (g & (1 << 0 % 8)) | |
{ | |
sbi(poDb5, maskDb5); | |
} | |
else | |
{ | |
cbi(poDb5, maskDb5); | |
} | |
if (g & (1 << 1 % 8)) | |
{ | |
sbi(poDb6, maskDb6); | |
} | |
else | |
{ | |
cbi(poDb6, maskDb6); | |
} | |
if (g & (1 << 2 % 8)) | |
{ | |
sbi(poDb7, maskDb7); | |
} | |
else | |
{ | |
cbi(poDb7, maskDb7); | |
} | |
if (g & (1 << 5 % 8)) | |
{ | |
sbi(poDb10, maskDb10); | |
} | |
else | |
{ | |
cbi(poDb10, maskDb10); | |
} | |
green = g; | |
} | |
return 1; | |
} | |
/*int prepareDataColor(uint r, uint g, uint b) | |
{ | |
if (b != blue) | |
{ | |
if (b & (1 << 1 % 8)) | |
{ | |
if (rockchip_gpio_output(db0, 1) < 0) | |
{ | |
printf("db0 err\n"); | |
return 0; | |
} | |
} | |
else | |
{ | |
if (rockchip_gpio_output(db0, 0) < 0) | |
{ | |
printf("db0 err\n"); | |
return 0; | |
} | |
} | |
if (b & (1 << 2 % 8)) | |
{ | |
if (rockchip_gpio_output(db1, 1) < 0) | |
{ | |
printf("db1 err\n"); | |
return 0; | |
} | |
} | |
else | |
{ | |
if (rockchip_gpio_output(db1, 0) < 0) | |
{ | |
printf("db1 err\n"); | |
return 0; | |
} | |
} | |
if (b & (1 << 3 % 8)) | |
{ | |
if (rockchip_gpio_output(db2, 1) < 0) | |
{ | |
printf("db2 err\n"); | |
return 0; | |
} | |
} | |
else | |
{ | |
if (rockchip_gpio_output(db2, 0) < 0) | |
{ | |
printf("db2 err\n"); | |
return 0; | |
} | |
} | |
if (b & (1 << 4 % 8)) | |
{ | |
if (rockchip_gpio_output(db3, 1) < 0) | |
{ | |
printf("db3 err\n"); | |
return 0; | |
} | |
} | |
else | |
{ | |
if (rockchip_gpio_output(db3, 0) < 0) | |
{ | |
printf("db3 err\n"); | |
return 0; | |
} | |
} | |
if (b & (1 << 5 % 8)) | |
{ | |
if (rockchip_gpio_output(db4, 1) < 0) | |
{ | |
printf("db4 err\n"); | |
return 0; | |
} | |
} | |
else | |
{ | |
if (rockchip_gpio_output(db4, 0) < 0) | |
{ | |
printf("db4 err\n"); | |
return 0; | |
} | |
} | |
blue = b; | |
} | |
if (g != green) | |
{ | |
if (g & (1 << 0 % 8)) | |
{ | |
if (rockchip_gpio_output(db5, 1) < 0) | |
{ | |
printf("db5 err\n"); | |
return 0; | |
} | |
} | |
else | |
{ | |
if (rockchip_gpio_output(db5, 0) < 0) | |
{ | |
printf("db5 err\n"); | |
return 0; | |
} | |
} | |
if (g & (1 << 1 % 8)) | |
{ | |
if (rockchip_gpio_output(db6, 1) < 0) | |
{ | |
printf("db6 err\n"); | |
return 0; | |
} | |
} | |
else | |
{ | |
if (rockchip_gpio_output(db6, 0) < 0) | |
{ | |
printf("db6 err\n"); | |
return 0; | |
} | |
} | |
if (g & (1 << 2 % 8)) | |
{ | |
if (rockchip_gpio_output(db7, 1) < 0) | |
{ | |
printf("db7 err\n"); | |
return 0; | |
} | |
} | |
else | |
{ | |
if (rockchip_gpio_output(db7, 0) < 0) | |
{ | |
printf("db7 err\n"); | |
return 0; | |
} | |
} | |
if (g & (1 << 5 % 8)) | |
{ | |
if (rockchip_gpio_output(db10, 1) < 0) | |
{ | |
printf("db10 err\n"); | |
return 0; | |
} | |
} | |
else | |
{ | |
if (rockchip_gpio_output(db10, 0) < 0) | |
{ | |
printf("db10 err\n"); | |
return 0; | |
} | |
} | |
green = g; | |
} | |
return 1; | |
}*/ | |
int _fast_fill_16(uint r, uint g, uint b, long pix) | |
{ | |
if (!enableData()) | |
{ | |
return 0; | |
} | |
if (!prepareDataColor(r, g, b)) | |
{ | |
return 0; | |
} | |
long blocks = pix / 16; | |
//blocks = pix; | |
int j = 0; | |
for (j = 0; j < blocks; j++) | |
{ | |
if (!pulseLow()) | |
{ | |
return 0; | |
} | |
if (!pulseLow()) | |
{ | |
return 0; | |
} | |
if (!pulseLow()) | |
{ | |
return 0; | |
} | |
if (!pulseLow()) | |
{ | |
return 0; | |
} | |
if (! pulseLow()) { | |
return 0; | |
} | |
if (! pulseLow()) { | |
return 0; | |
} | |
if (!pulseLow()) | |
{ | |
return 0; | |
} | |
if (!pulseLow()) | |
{ | |
return 0; | |
} | |
if (!pulseLow()) | |
{ | |
return 0; | |
} | |
if (!pulseLow()) | |
{ | |
return 0; | |
} | |
if (!pulseLow()) | |
{ | |
return 0; | |
} | |
if (!pulseLow()) | |
{ | |
return 0; | |
} | |
if (!pulseLow()) | |
{ | |
return 0; | |
} | |
if (!pulseLow()) | |
{ | |
return 0; | |
} | |
if (!pulseLow()) | |
{ | |
return 0; | |
} | |
if (!pulseLow()) | |
{ | |
return 0; | |
} | |
} | |
if ((pix % 16) != 0) | |
{ | |
//for (int i = 0; i < ((pix % 16) + 1); i++) | |
int i = 0; | |
for (i = 0; i < (pix % 16); i++) | |
{ | |
if (!pulseLow()) | |
{ | |
return 0; | |
} | |
} | |
} | |
return 1; | |
} | |
int startFastFill(uint x1, uint y1, uint x2, uint y2, uint r, uint g, uint b) | |
{ | |
if (!chipEnable()) | |
{ | |
return 0; | |
} | |
if (!setXY(x1, y1, x2, y2)) | |
{ | |
return 0; | |
} | |
if (!enableData()) | |
{ | |
return 0; | |
} | |
if (!prepareDataColor(r, g, b)) | |
{ | |
return 0; | |
} | |
return 0; | |
} | |
int endFastFill() | |
{ | |
if (!chipDisable()) | |
{ | |
return 0; | |
} | |
return 1; | |
} | |
int clrScr() | |
{ | |
if (!chipEnable()) | |
{ | |
return 0; | |
} | |
if (!clrXY()) | |
{ | |
return 0; | |
} | |
if (!_fast_fill_16(0, 0, 0, ((799 + 1) * (479 + 1)))) | |
{ | |
return 0; | |
} | |
if (!chipDisable()) | |
{ | |
return 0; | |
} | |
return 1; | |
} | |
int idleOn() | |
{ | |
if (!chipEnable()) | |
{ | |
return 0; | |
} | |
if (!LCD_Write_COM(0x39)) | |
{ | |
return 0; | |
} | |
if (!chipDisable()) | |
{ | |
return 0; | |
} | |
return 1; | |
} | |
int fillRect(uint x1, uint y1, uint x2, uint y2, uint r, uint g, uint b) | |
{ | |
if (!chipEnable()) | |
{ | |
return 0; | |
} | |
if (!setXY(x1, y1, x2, y2)) | |
{ | |
return 0; | |
} | |
if (!_fast_fill_16(r, g, b, (((x2 - x1) + 1) * ((y2 - y1) + 1)))) | |
{ | |
return 0; | |
} | |
if (!chipDisable()) | |
{ | |
return 0; | |
} | |
return 1; | |
} | |
int setAll(int val) | |
{ | |
if (val > 0) { | |
sbi(poRS, maskRS); | |
sbi(poCS, maskCS); | |
sbi(poWR, maskWR); | |
sbi(poRST, maskRST); | |
sbi(poDb0, maskDb0); | |
sbi(poDb1, maskDb1); | |
sbi(poDb2, maskDb2); | |
sbi(poDb3, maskDb3); | |
sbi(poDb4, maskDb4); | |
sbi(poDb5, maskDb5); | |
sbi(poDb6, maskDb6); | |
sbi(poDb7, maskDb7); | |
sbi(poDb10, maskDb10); | |
} else { | |
cbi(poRS, maskRS); | |
cbi(poCS, maskCS); | |
cbi(poWR, maskWR); | |
cbi(poRST, maskRST); | |
cbi(poDb0, maskDb0); | |
cbi(poDb1, maskDb1); | |
cbi(poDb2, maskDb2); | |
cbi(poDb3, maskDb3); | |
cbi(poDb4, maskDb4); | |
cbi(poDb5, maskDb5); | |
cbi(poDb6, maskDb6); | |
cbi(poDb7, maskDb7); | |
cbi(poDb10, maskDb10); | |
} | |
return 1; | |
} | |
/*int setAll(int val) | |
{ | |
if (rockchip_gpio_output(RS, val) < 0) | |
{ | |
printf("rs err\n"); | |
return 0; | |
} | |
if (rockchip_gpio_output(WR, val) < 0) | |
{ | |
printf("wr err\n"); | |
return 0; | |
} | |
if (rockchip_gpio_output(CS, val) < 0) | |
{ | |
printf("cs err\n"); | |
return 0; | |
} | |
if (rockchip_gpio_output(RST, val) < 0) | |
{ | |
printf("rst err\n"); | |
return 0; | |
} | |
if (rockchip_gpio_output(db0, val) < 0) | |
{ | |
printf("db0 err\n"); | |
return 0; | |
} | |
if (rockchip_gpio_output(db1, val) < 0) | |
{ | |
printf("db1 err\n"); | |
return 0; | |
} | |
if (rockchip_gpio_output(db2, val) < 0) | |
{ | |
printf("db2 err\n"); | |
return 0; | |
} | |
if (rockchip_gpio_output(db3, val) < 0) | |
{ | |
printf("db3 err\n"); | |
return 0; | |
} | |
if (rockchip_gpio_output(db4, val) < 0) | |
{ | |
printf("db4 err\n"); | |
return 0; | |
} | |
if (rockchip_gpio_output(db5, val) < 0) | |
{ | |
printf("db5 err\n"); | |
return 0; | |
} | |
if (rockchip_gpio_output(db6, val) < 0) | |
{ | |
printf("db6 err\n"); | |
return 0; | |
} | |
if (rockchip_gpio_output(db7, val) < 0) | |
{ | |
printf("db7 err\n"); | |
return 0; | |
} | |
if (rockchip_gpio_output(db10, val) < 0) | |
{ | |
printf("db10 err\n"); | |
return 0; | |
} | |
return 1; | |
} | |
*/ | |
int main(void) | |
{ | |
clock_t t; | |
struct timeb start, end; | |
double diff; | |
double time_taken; | |
t = clock(); | |
ftime(&start); | |
if (rockchip_gpio_init() < 0) | |
{ | |
printf("setup err\n"); | |
} | |
else | |
{ | |
printf("start\n"); | |
//pRS = pinToPort(RS); | |
pRS = pin_to_bank(RS); | |
pCS = pin_to_bank(CS); | |
pWR = pin_to_bank(WR); | |
pRST = pin_to_bank(RST); | |
pDb0 = pin_to_bank(db0); | |
pDb1 = pin_to_bank(db1); | |
pDb2 = pin_to_bank(db2); | |
pDb3 = pin_to_bank(db3); | |
pDb4 = pin_to_bank(db4); | |
pDb5 = pin_to_bank(db5); | |
pDb6 = pin_to_bank(db6); | |
pDb7 = pin_to_bank(db7); | |
pDb10 = pin_to_bank(db10); | |
maskRS = pinToBitMask(RS, pRS->pin_base); | |
maskCS = pinToBitMask(CS, pCS->pin_base); | |
maskWR = pinToBitMask(WR, pWR->pin_base); | |
maskRST = pinToBitMask(RST, pRST->pin_base); | |
maskDb0 = pinToBitMask(db0, pDb0->pin_base); | |
maskDb1 = pinToBitMask(db1, pDb1->pin_base); | |
maskDb2 = pinToBitMask(db2, pDb2->pin_base); | |
maskDb3 = pinToBitMask(db3, pDb3->pin_base); | |
maskDb4 = pinToBitMask(db4, pDb4->pin_base); | |
maskDb5 = pinToBitMask(db5, pDb5->pin_base); | |
maskDb6 = pinToBitMask(db6, pDb6->pin_base); | |
maskDb7 = pinToBitMask(db7, pDb7->pin_base); | |
maskDb10 = pinToBitMask(db10, pDb10->pin_base); | |
pdRS = portDirectionRegister(pRS); | |
pdCS = portDirectionRegister(pCS); | |
pdWR = portDirectionRegister(pWR); | |
pdRST = portDirectionRegister(pRST); | |
pdDb0 = portDirectionRegister(pDb0); | |
pdDb1 = portDirectionRegister(pDb1); | |
pdDb2 = portDirectionRegister(pDb2); | |
pdDb3 = portDirectionRegister(pDb3); | |
pdDb4 = portDirectionRegister(pDb4); | |
pdDb5 = portDirectionRegister(pDb5); | |
pdDb6 = portDirectionRegister(pDb6); | |
pdDb7 = portDirectionRegister(pDb7); | |
pdDb10 = portDirectionRegister(pDb10); | |
poRS = portOutputRegister(pRS); | |
poCS = portOutputRegister(pCS); | |
poWR = portOutputRegister(pWR); | |
poRST = portOutputRegister(pRST); | |
poDb0 = portOutputRegister(pDb0); | |
poDb1 = portOutputRegister(pDb1); | |
poDb2 = portOutputRegister(pDb2); | |
poDb3 = portOutputRegister(pDb3); | |
poDb4 = portOutputRegister(pDb4); | |
poDb5 = portOutputRegister(pDb5); | |
poDb6 = portOutputRegister(pDb6); | |
poDb7 = portOutputRegister(pDb7); | |
poDb10 = portOutputRegister(pDb10); | |
int rett = 0; | |
rett = pinMode(RS, maskRS, pdRS, pRS, ROCKCHIP_GPIO_OUTPUT); | |
if (rett != 0) | |
{ | |
printf("rett rs %d \n", rett); | |
return; | |
} | |
rett = pinMode(CS, maskCS, pdCS, pCS, ROCKCHIP_GPIO_OUTPUT); | |
if (rett != 0) | |
{ | |
printf("rett cs %d \n", rett); | |
return; | |
} | |
rett = pinMode(WR, maskWR, pdWR, pWR, ROCKCHIP_GPIO_OUTPUT); | |
if (rett != 0) | |
{ | |
printf("rett wr %d \n", rett); | |
return; | |
} | |
rett = pinMode(RST, maskRST, pdRST, pRST, ROCKCHIP_GPIO_OUTPUT); | |
if (rett != 0) { | |
printf("rett rst %d \n", rett); | |
return; | |
} | |
rett = pinMode(db0, maskDb0, pdDb0, pDb0, ROCKCHIP_GPIO_OUTPUT); | |
if (rett != 0) | |
{ | |
printf("rett db0 %d \n", rett); | |
return; | |
} | |
rett = pinMode(db1, maskDb1, pdDb1, pDb1, ROCKCHIP_GPIO_OUTPUT); | |
if (rett != 0) | |
{ | |
printf("rett db1 %d \n", rett); | |
return; | |
} | |
rett = pinMode(db2, maskDb2, pdDb2, pDb2, ROCKCHIP_GPIO_OUTPUT); | |
if (rett != 0) | |
{ | |
printf("rett db2 %d \n", rett); | |
return; | |
} | |
rett = pinMode(db3, maskDb3, pdDb3, pDb3, ROCKCHIP_GPIO_OUTPUT); | |
if (rett != 0) | |
{ | |
printf("rett db3 %d \n", rett); | |
return; | |
} | |
rett = pinMode(db4, maskDb4, pdDb4, pDb4, ROCKCHIP_GPIO_OUTPUT); | |
if (rett != 0) | |
{ | |
printf("rett db4 %d \n", rett); | |
return; | |
} | |
rett = pinMode(db5, maskDb5, pdDb5, pDb5, ROCKCHIP_GPIO_OUTPUT); | |
if (rett != 0) | |
{ | |
printf("rett db5 %d \n", rett); | |
return; | |
} | |
rett = pinMode(db6, maskDb6, pdDb6, pDb6, ROCKCHIP_GPIO_OUTPUT); | |
if (rett != 0) | |
{ | |
printf("rett db6 %d \n", rett); | |
return; | |
} | |
rett = pinMode(db7, maskDb7, pdDb7, pDb7, ROCKCHIP_GPIO_OUTPUT); | |
if (rett != 0) | |
{ | |
printf("rett db7 %d \n", rett); | |
return; | |
} | |
rett = pinMode(db10, maskDb10, pdDb10, pDb10, ROCKCHIP_GPIO_OUTPUT); | |
if (rett != 0) | |
{ | |
printf("rett db10 %d \n", rett); | |
return; | |
} | |
/*sbi(poRS, maskRS); | |
sbi(poCS, maskCS); | |
sbi(poWR, maskWR); | |
sbi(poRST, maskRST); | |
sbi(poDb0, maskDb0); | |
sbi(poDb1, maskDb1); | |
sbi(poDb2, maskDb2); | |
sbi(poDb3, maskDb3); | |
sbi(poDb4, maskDb4); | |
sbi(poDb5, maskDb5); | |
sbi(poDb6, maskDb6); | |
sbi(poDb7, maskDb7); | |
sbi(poDb10, maskDb10); | |
sleep(30); | |
cbi(poRS, maskRS); | |
cbi(poCS, maskCS); | |
cbi(poWR, maskWR); | |
cbi(poRST, maskRST); | |
cbi(poDb0, maskDb0); | |
cbi(poDb1, maskDb1); | |
cbi(poDb2, maskDb2); | |
cbi(poDb3, maskDb3); | |
cbi(poDb4, maskDb4); | |
cbi(poDb5, maskDb5); | |
cbi(poDb6, maskDb6); | |
cbi(poDb7, maskDb7); | |
cbi(poDb10, maskDb10); | |
sleep(30); | |
//digitalWrite(poWR, maskWR, 0); | |
//cbi(poWR, maskWR); | |
/*t = clock(); | |
ftime(&start); | |
int yy = 0; | |
for (yy = 0; yy < 384000; yy++) { | |
pulseLow(); | |
}* / | |
t = clock() - t; | |
ftime(&end); | |
time_taken = ((double)t) / CLOCKS_PER_SEC; | |
diff = (int)(1000.0 * (end.time - start.time) + (end.millitm - start.millitm)); | |
printf("finished\n"); | |
printf("Operation took %f seconds\n", (diff / 1000)); | |
printf("took %f seconds to execute \n", time_taken); | |
printf("clocks %ld \n", CLOCKS_PER_SEC);*/ | |
// usleep(1 * 1000 * 1000); | |
if (!setAll(0)) | |
{ | |
return; | |
} | |
printf("allLow\n"); | |
/* if (! setAll(1)) { | |
return; | |
} | |
printf("allHigh\n"); | |
return;*/ | |
if (!resetLcd()) | |
{ | |
return; | |
} | |
printf("reset\n"); | |
if (!initLCD()) | |
{ | |
return; | |
} | |
printf("inited\n"); | |
printf("clearing\n"); | |
if (!clrScr()) | |
{ | |
return; | |
} | |
printf("clreared\n"); | |
if (!idleOn()) | |
{ | |
return; | |
} | |
printf("idleon\n"); | |
// usleep(2 * 1000 * 1000); | |
printf("filling\n"); | |
if (!fillRect(0, 0, 799, 479, 255, 255, 255)) | |
{ | |
return; | |
} | |
printf("filled\n"); | |
//sleep(1); | |
/*if (! startFastFill(0, 0, 799, 479, 0, 255, 0)) { | |
return; | |
} | |
while (1) | |
{ | |
printf("loop\n"); | |
sleep(1); | |
} | |
if (! endFastFill()) { | |
return; | |
}* / | |
// usleep(1 * 1000 * 1000); | |
/* if (! clrScr()) { | |
return; | |
}*/ | |
t = clock() - t; | |
ftime(&end); | |
time_taken = ((double)t) / CLOCKS_PER_SEC; // in seconds | |
diff = (int)(1000.0 * (end.time - start.time) + (end.millitm - start.millitm)); | |
printf("finished\n"); | |
printf("Operation took %f seconds\n", (diff / 1000)); | |
printf("took %f seconds to execute \n", time_taken); | |
printf("clocks %ld \n", CLOCKS_PER_SEC); | |
if (!setAll(0)) | |
{ | |
return; | |
} | |
printf("allLow\n"); | |
printf("end\n"); | |
} | |
} |
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